sim/mips/ChangeLog

   1 2004-06-25  Chris Demetriou  <cgd@broadcom.com>
   2
   3         * configure.in (sim_m16_machine): Include mipsIII.
   4         * configure: Regenerate.
   5
   6 2004-05-11  Maciej W. Rozycki  <macro@ds2.pg.gda.pl>
   7
   8         * mips/interp.c (decode_coproc): Sign-extend the address retrieved
   9         from COP0_BADVADDR.
  10         * mips/sim-main.h (COP0_BADVADDR): Remove a cast.
  11
  12 2004-04-10  Chris Demetriou  <cgd@broadcom.com>
  13
  14         * sb1.igen (DIV.PS, RECIP.PS, RSQRT.PS, SQRT.PS): New.
  15
  16 2004-04-09  Chris Demetriou  <cgd@broadcom.com>
  17
  18         * mips.igen (check_fmt): Remove.
  19         (ABS.fmt, ADD.fmt, C.cond.fmta, C.cond.fmtb, CEIL.L.fmt, CEIL.W)
  20         (CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt, FLOOR.L.fmt)
  21         (FLOOR.W.fmt, MADD.fmt, MOV.fmt, MOVtf.fmt, MOVN.fmt, MOVZ.fmt)
  22         (MSUB.fmt, MUL.fmt, NEG.fmt, NMADD.fmt, NMSUB.fmt, RECIP.fmt)
  23         (ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt)
  24         (TRUNC.L.fmt, TRUNC.W): Explicitly specify allowed FPU formats.
  25         (check_fmt_p, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
  26         (FLOOR.W.fmt, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt)
  27         (SQRT.fmt, TRUNC.L.fmt, TRUNC.W): Remove all uses of check_fmt.
  28         (C.cnd.fmta): Remove incorrect call to check_fmt_p.
  29
  30 2004-04-09  Chris Demetriou  <cgd@broadcom.com>
  31
  32         * sb1.igen (check_sbx): New function.
  33         (PABSDIFF.fmt, PABSDIFC.fmt, PAVG.fmt): Use check_sbx.
  34
  35 2004-03-29  Chris Demetriou  <cgd@broadcom.com>
  36             Richard Sandiford  <rsandifo@redhat.com>
  37
  38         * sim-main.h (MIPS_MACH_HAS_MT_HILO_HAZARD)
  39         (MIPS_MACH_HAS_MULT_HILO_HAZARD, MIPS_MACH_HAS_DIV_HILO_HAZARD): New.
  40         * mips.igen (check_mt_hilo, check_mult_hilo, check_div_hilo): Provide
  41         separate implementations for mipsIV and mipsV.  Use new macros to
  42         determine whether the restrictions apply.
  43
  44 2004-01-19  Chris Demetriou  <cgd@broadcom.com>
  45
  46         * mips.igen (check_mf_cycles, check_mt_hilo, check_mf_hilo)
  47         (check_mult_hilo): Improve comments.
  48         (check_div_hilo): Likewise.  Also, fork off a new version
  49         to handle mips32/mips64 (since there are no hazards to check
  50         in MIPS32/MIPS64).
  51
  52 2003-06-17  Richard Sandiford  <rsandifo@redhat.com>
  53
  54         * mips.igen (do_dmultx): Fix check for negative operands.
  55
  56 2003-05-16  Ian Lance Taylor  <ian@airs.com>
  57
  58         * Makefile.in (SHELL): Make sure this is defined.
  59         (various): Use $(SHELL) whenever we invoke move-if-change.
  60
  61 2003-05-03  Chris Demetriou  <cgd@broadcom.com>
  62
  63         * cp1.c: Tweak attribution slightly.
  64         * cp1.h: Likewise.
  65         * mdmx.c: Likewise.
  66         * mdmx.igen: Likewise.
  67         * mips3d.igen: Likewise.
  68         * sb1.igen: Likewise.
  69
  70 2003-04-15  Richard Sandiford  <rsandifo@redhat.com>
  71
  72         * vr.igen (do_vr_mul_op): Zero-extend the low 32 bits of
  73         unsigned operands.
  74
  75 2003-02-27  Andrew Cagney  <cagney@redhat.com>
  76
  77         * interp.c (sim_open): Rename _bfd to bfd.
  78         (sim_create_inferior): Ditto.
  79
  80 2003-01-14  Chris Demetriou  <cgd@broadcom.com>
  81
  82         * mips.igen (LUXC1, SUXC1): New, for mipsV and mips64.
  83
  84 2003-01-14  Chris Demetriou  <cgd@broadcom.com>
  85
  86         * mips.igen (EI, DI): Remove.
  87
  88 2003-01-05  Richard Sandiford  <rsandifo@redhat.com>
  89
  90         * Makefile.in (tmp-run-multi): Fix mips16 filter.
  91
  92 2003-01-04  Richard Sandiford  <rsandifo@redhat.com>
  93             Andrew Cagney  <ac131313@redhat.com>
  94             Gavin Romig-Koch  <gavin@redhat.com>
  95             Graydon Hoare  <graydon@redhat.com>
  96             Aldy Hernandez  <aldyh@redhat.com>
  97             Dave Brolley  <brolley@redhat.com>
  98             Chris Demetriou  <cgd@broadcom.com>
  99
 100         * configure.in (mips64vr*): Define TARGET_ENABLE_FR to 1.
 101         (sim_mach_default): New variable.
 102         (mips64vr-*-*, mips64vrel-*-*): New configurations.
 103         Add a new simulator generator, MULTI.
 104         * configure: Regenerate.
 105         * Makefile.in (SIM_MULTI_OBJ, SIM_EXTRA_DISTCLEAN): New variables.
 106         (multi-run.o): New dependency.
 107         (SIM_MULTI_ALL, SIM_MULTI_IGEN_CONFIGS): New variables.
 108         (tmp-mach-multi, tmp-itable-multi, tmp-run-multi): New rules.
 109         (tmp-multi): Combine them.
 110         (BUILT_SRC_FROM_MULTI): New variable.  Depend on tmp-multi.
 111         (clean-extra): Remove sources in BUILT_SRC_FROM_MULTI.
 112         (distclean-extra): New rule.
 113         * sim-main.h: Include bfd.h.
 114         (MIPS_MACH): New macro.
 115         * mips.igen (vr4120, vr5400, vr5500): New models.
 116         (clo, clz, dclo, dclz, madd, maddu, msub, msub, mul): Add *vr5500.
 117         * vr.igen: Replace with new version.
 118
 119 2003-01-04  Chris Demetriou  <cgd@broadcom.com>
 120
 121         * configure.in: Use SIM_AC_OPTION_RESERVED_BITS(1).
 122         * configure: Regenerate.
 123
 124 2002-12-31  Chris Demetriou  <cgd@broadcom.com>
 125
 126         * sim-main.h (check_branch_bug, mark_branch_bug): Remove.
 127         * mips.igen: Remove all invocations of check_branch_bug and
 128         mark_branch_bug.
 129
 130 2002-12-16  Chris Demetriou  <cgd@broadcom.com>
 131
 132         * tconfig.in: Include "gdb/callback.h" and "gdb/remote-sim.h".
 133
 134 2002-07-30  Chris Demetriou  <cgd@broadcom.com>
 135
 136         * mips.igen (do_load_double, do_store_double): New functions.
 137         (LDC1, SDC1): Rename to...
 138         (LDC1b, SDC1b): respectively.
 139         (LDC1a, SDC1a): New instructions for MIPS II and MIPS32 support.
 140
 141 2002-07-29  Michael Snyder  <msnyder@redhat.com>
 142
 143         * cp1.c (fp_recip2): Modify initialization expression so that
 144         GCC will recognize it as constant.
 145
 146 2002-06-18  Chris Demetriou  <cgd@broadcom.com>
 147
 148         * mdmx.c (SD_): Delete.
 149         (Unpredictable): Re-define, for now, to directly invoke
 150         unpredictable_action().
 151         (mdmx_acc_op): Fix error in .ob immediate handling.
 152
 153 2002-06-18  Andrew Cagney  <cagney@redhat.com>
 154
 155         * interp.c (sim_firmware_command): Initialize `address'.
 156
 157 2002-06-16  Andrew Cagney  <ac131313@redhat.com>
 158
 159         * configure: Regenerated to track ../common/aclocal.m4 changes.
 160
 161 2002-06-14  Chris Demetriou  <cgd@broadcom.com>
 162             Ed Satterthwaite  <ehs@broadcom.com>
 163
 164         * mips3d.igen: New file which contains MIPS-3D ASE instructions.
 165         * Makefile.in (IGEN_INCLUDE): Add mips3d.igen.
 166         * mips.igen: Include mips3d.igen.
 167         (mips3d): New model name for MIPS-3D ASE instructions.
 168         (CVT.W.fmt): Don't use this instruction for word (source) format
 169         instructions.
 170         * cp1.c (fp_binary_r, fp_add_r, fp_mul_r, fpu_inv1, fpu_inv1_32)
 171         (fpu_inv1_64, fp_recip1, fp_recip2, fpu_inv_sqrt1, fpu_inv_sqrt1_32)
 172         (fpu_inv_sqrt1_64, fp_rsqrt1, fp_rsqrt2): New functions.
 173         (NR_FRAC_GUARD, IMPLICIT_1): New macros.
 174         * sim-main.h (fmt_pw, CompareAbs, AddR, MultiplyR, Recip1, Recip2)
 175         (RSquareRoot1, RSquareRoot2): New macros.
 176         (fp_add_r, fp_mul_r, fp_recip1, fp_recip2, fp_rsqrt1)
 177         (fp_rsqrt2): New functions.
 178         * configure.in: Add MIPS-3D support to mipsisa64 simulator.
 179         * configure: Regenerate.
 180
 181 2002-06-13  Chris Demetriou  <cgd@broadcom.com>
 182             Ed Satterthwaite  <ehs@broadcom.com>
 183
 184         * cp1.c (FP_PS_upper, FP_PS_lower, FP_PS_cat, FPQNaN_PS): New macros.
 185         (value_fpr, store_fpr, fp_cmp, fp_unary, fp_binary, fp_mac)
 186         (fp_inv_sqrt, fpu_format_name): Add paired-single support.
 187         (convert): Note that this function is not used for paired-single
 188         format conversions.
 189         (ps_lower, ps_upper, pack_ps, convert_ps): New functions.
 190         * mips.igen (FMT, MOVtf.fmt): Add paired-single support.
 191         (check_fmt_p): Enable paired-single support.
 192         (ALNV.PS, CVT.PS.S, CVT.S.PL, CVT.S.PU, PLL.PS, PLU.PS, PUL.PS)
 193         (PUU.PS): New instructions.
 194         (CVT.S.fmt): Don't use this instruction for paired-single format
 195         destinations.
 196         * sim-main.h (FP_formats): New value 'fmt_ps.'
 197         (ps_lower, ps_upper, pack_ps, convert_ps): New prototypes.
 198         (PSLower, PSUpper, PackPS, ConvertPS): New macros.
 199
 200 2002-06-12  Chris Demetriou  <cgd@broadcom.com>
 201
 202         * mips.igen: Fix formatting of function calls in
 203         many FP operations.
 204
 205 2002-06-12  Chris Demetriou  <cgd@broadcom.com>
 206
 207         * mips.igen (MOVN, MOVZ): Trace result.
 208         (TNEI): Print "tnei" as the opcode name in traces.
 209         (CEIL.W): Add disassembly string for traces.
 210         (RSQRT.fmt): Make location of disassembly string consistent
 211         with other instructions.
 212
 213 2002-06-12  Chris Demetriou  <cgd@broadcom.com>
 214
 215         * mips.igen (X): Delete unused function.
 216
 217 2002-06-08  Andrew Cagney  <cagney@redhat.com>
 218
 219         * interp.c: Include "gdb/callback.h" and "gdb/remote-sim.h".
 220
 221 2002-06-07  Chris Demetriou  <cgd@broadcom.com>
 222             Ed Satterthwaite  <ehs@broadcom.com>
 223
 224         * cp1.c (inner_mac, fp_mac, inner_rsqrt, fp_inv_sqrt)
 225         (fp_rsqrt, fp_madd, fp_msub, fp_nmadd, fp_nmsub): New functions.
 226         * sim-main.h (fp_rsqrt, fp_madd, fp_msub, fp_nmadd)
 227         (fp_nmsub): New prototypes.
 228         (RSquareRoot, MultiplyAdd, MultiplySub, NegMultiplyAdd)
 229         (NegMultiplySub): New defines.
 230         * mips.igen (RSQRT.fmt): Use RSquareRoot().
 231         (MADD.D, MADD.S): Replace with...
 232         (MADD.fmt): New instruction.
 233         (MSUB.D, MSUB.S): Replace with...
 234         (MSUB.fmt): New instruction.
 235         (NMADD.D, NMADD.S): Replace with...
 236         (NMADD.fmt): New instruction.
 237         (NMSUB.D, MSUB.S): Replace with...
 238         (NMSUB.fmt): New instruction.
 239
 240 2002-06-07  Chris Demetriou  <cgd@broadcom.com>
 241             Ed Satterthwaite  <ehs@broadcom.com>
 242
 243         * cp1.c: Fix more comment spelling and formatting.
 244         (value_fcr, store_fcr): Use fenr_FS rather than hard-coding value.
 245         (denorm_mode): New function.
 246         (fpu_unary, fpu_binary): Round results after operation, collect
 247         status from rounding operations, and update the FCSR.
 248         (convert): Collect status from integer conversions and rounding
 249         operations, and update the FCSR.  Adjust NaN values that result
 250         from conversions.  Convert to use sim_io_eprintf rather than
 251         fprintf, and remove some debugging code.
 252         * cp1.h (fenr_FS): New define.
 253
 254 2002-06-07  Chris Demetriou  <cgd@broadcom.com>
 255
 256         * cp1.c (convert): Remove unusable debugging code, and move MIPS
 257         rounding mode to sim FP rounding mode flag conversion code into...
 258         (rounding_mode): New function.
 259
 260 2002-06-07  Chris Demetriou  <cgd@broadcom.com>
 261
 262         * cp1.c: Clean up formatting of a few comments.
 263         (value_fpr): Reformat switch statement.
 264
 265 2002-06-06  Chris Demetriou  <cgd@broadcom.com>
 266             Ed Satterthwaite  <ehs@broadcom.com>
 267
 268         * cp1.h: New file.
 269         * sim-main.h: Include cp1.h.
 270         (SETFCC, GETFCC, IR, UF, OF, DX, IO, UO, FP_FLAGS, FP_ENABLE)
 271         (FP_CAUSE, GETFS, FP_RM_NEAREST, FP_RM_TOZERO, FP_RM_TOPINF)
 272         (FP_RM_TOMINF, GETRM): Remove.  Moved to cp1.h.
 273         (FP_FS, FP_MASK_RM, FP_SH_RM, Nan, Less, Equal): Remove.
 274         (value_fcr, store_fcr, test_fcsr, fp_cmp): New prototypes.
 275         (ValueFCR, StoreFCR, TestFCSR, Compare): New macros.
 276         * cp1.c: Don't include sim-fpu.h; already included by
 277         sim-main.h.  Clean up formatting of some comments.
 278         (NaN, Equal, Less): Remove.
 279         (test_fcsr, value_fcr, store_fcr, update_fcsr, fp_test)
 280         (fp_cmp): New functions.
 281         * mips.igen (do_c_cond_fmt): Remove.
 282         (C.cond.fmta, C.cond.fmtb): Replace uses of do_c_cond_fmt_a with
 283         Compare.  Add result tracing.
 284         (CxC1): Remove, replace with...
 285         (CFC1a, CFC1b, CFC1c, CTC1a, CTC1b, CTC1c): New instructions.
 286         (DMxC1): Remove, replace with...
 287         (DMFC1a, DMFC1b, DMTC1a, DMTC1b): New instructions.
 288         (MxC1): Remove, replace with...
 289         (MFC1a, MFC1b, MTC1a, MTC1b): New instructions.
 290
 291 2002-06-04  Chris Demetriou  <cgd@broadcom.com>
 292
 293         * sim-main.h (FGRIDX): Remove, replace all uses with...
 294         (FGR_BASE): New macro.
 295         (FP0_REGNUM, FCRCS_REGNUM, FCRIR_REGNUM): New macros.
 296         (_sim_cpu): Move 'fgr' member to be right before 'fpr_state' member.
 297         (NR_FGR, FGR): Likewise.
 298         * interp.c: Replace all uses of FGRIDX with FGR_BASE.
 299         * mips.igen: Likewise.
 300
 301 2002-06-04  Chris Demetriou  <cgd@broadcom.com>
 302
 303         * cp1.c: Add an FSF Copyright notice to this file.
 304
 305 2002-06-04  Chris Demetriou  <cgd@broadcom.com>
 306             Ed Satterthwaite  <ehs@broadcom.com>
 307
 308         * cp1.c (Infinity): Remove.
 309         * sim-main.h (Infinity): Likewise.
 310
 311         * cp1.c (fp_unary, fp_binary): New functions.
 312         (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div, fp_recip)
 313         (fp_sqrt): New functions, implemented in terms of the above.
 314         (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
 315         (Recip, SquareRoot): Remove (replaced by functions above).
 316         * sim-main.h (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div)
 317         (fp_recip, fp_sqrt): New prototypes.
 318         (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
 319         (Recip, SquareRoot): Replace prototypes with #defines which
 320         invoke the functions above.
 321
 322 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
 323
 324         * sim-main.h (Nan, Infinity, Less, Equal, AbsoluteValue, Negate)
 325         (Add, Sub, Multiply, Divide, Recip, SquareRoot): Move lower in
 326         file, remove PARAMS from prototypes.
 327         (value_fpr, store_fpr, convert): Likewise.  Use SIM_STATE to provide
 328         simulator state arguments.
 329         (ValueFPR, StoreFPR, Convert): Move lower in file.  Use SIM_ARGS to
 330         pass simulator state arguments.
 331         * cp1.c (SD): Redefine as CPU_STATE(cpu).
 332         (store_fpr, convert): Remove 'sd' argument.
 333         (value_fpr): Likewise.  Convert to use 'SD' instead.
 334
 335 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
 336
 337         * cp1.c (Min, Max): Remove #if 0'd functions.
 338         * sim-main.h (Min, Max): Remove.
 339
 340 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
 341
 342         * cp1.c: fix formatting of switch case and default labels.
 343         * interp.c: Likewise.
 344         * sim-main.c: Likewise.
 345
 346 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
 347
 348         * cp1.c: Clean up comments which describe FP formats.
 349          (FPQNaN_DOUBLE, FPQNaN_LONG): Generate using UNSIGNED64.
 350
 351 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
 352             Ed Satterthwaite  <ehs@broadcom.com>
 353
 354         * configure.in (mipsisa64sb1*-*-*): New target for supporting
 355         Broadcom SiByte SB-1 processor configurations.
 356         * configure: Regenerate.
 357         * sb1.igen: New file.
 358         * mips.igen: Include sb1.igen.
 359         (sb1): New model.
 360         * Makefile.in (IGEN_INCLUDE): Add sb1.igen.
 361         * mdmx.igen: Add "sb1" model to all appropriate functions and
 362         instructions.
 363         * mdmx.c (AbsDiffOB, AvgOB, AccAbsDiffOB): New functions.
 364         (ob_func, ob_acc): Reference the above.
 365         (qh_acc): Adjust to keep the same size as ob_acc.
 366         * sim-main.h (status_SBX, MX_VECT_ABSD, MX_VECT_AVG, MX_AbsDiff)
 367         (MX_Avg, MX_VECT_ABSDA, MX_AbsDiffC): New macros.
 368
 369 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
 370
 371         * Makefile.in (IGEN_INCLUDE): Add mdmx.igen.
 372
 373 2002-06-02  Chris Demetriou  <cgd@broadcom.com>
 374             Ed Satterthwaite  <ehs@broadcom.com>
 375
 376         * mips.igen (mdmx): New (pseudo-)model.
 377         * mdmx.c, mdmx.igen: New files.
 378         * Makefile.in (SIM_OBJS): Add mdmx.o.
 379         * sim-main.h (MDMX_accumulator, MX_fmtsel, signed24, signed48):
 380         New typedefs.
 381         (ACC, MX_Add, MX_AddA, MX_AddL, MX_And, MX_C_EQ, MX_C_LT, MX_Comp)
 382         (MX_FMT_OB, MX_FMT_QH, MX_Max, MX_Min, MX_Msgn, MX_Mul, MX_MulA)
 383         (MX_MulL, MX_MulS, MX_MulSL, MX_Nor, MX_Or, MX_Pick, MX_RAC)
 384         (MX_RAC_H, MX_RAC_L, MX_RAC_M, MX_RNAS, MX_RNAU, MX_RND_AS)
 385         (MX_RND_AU, MX_RND_ES, MX_RND_EU, MX_RND_ZS, MX_RND_ZU, MX_RNES)
 386         (MX_RNEU, MX_RZS, MX_RZU, MX_SHFL, MX_ShiftLeftLogical)
 387         (MX_ShiftRightArith, MX_ShiftRightLogical, MX_Sub, MX_SubA, MX_SubL)
 388         (MX_VECT_ADD, MX_VECT_ADDA, MX_VECT_ADDL, MX_VECT_AND)
 389         (MX_VECT_MAX, MX_VECT_MIN, MX_VECT_MSGN, MX_VECT_MUL, MX_VECT_MULA)
 390         (MX_VECT_MULL, MX_VECT_MULS, MX_VECT_MULSL, MX_VECT_NOR)
 391         (MX_VECT_OR, MX_VECT_SLL, MX_VECT_SRA, MX_VECT_SRL, MX_VECT_SUB)
 392         (MX_VECT_SUBA, MX_VECT_SUBL, MX_VECT_XOR, MX_WACH, MX_WACL, MX_Xor)
 393         (SIM_ARGS, SIM_STATE, UnpredictableResult, fmt_mdmx, ob_fmtsel)
 394         (qh_fmtsel): New macros.
 395         (_sim_cpu): New member "acc".
 396         (mdmx_acc_op, mdmx_cc_op, mdmx_cpr_op, mdmx_pick_op, mdmx_rac_op)
 397         (mdmx_round_op, mdmx_shuffle, mdmx_wach, mdmx_wacl): New functions.
 398
 399 2002-05-01  Chris Demetriou  <cgd@broadcom.com>
 400
 401         * interp.c: Use 'deprecated' rather than 'depreciated.'
 402         * sim-main.h: Likewise.
 403
 404 2002-05-01  Chris Demetriou  <cgd@broadcom.com>
 405
 406         * cp1.c (store_fpr): Remove #ifdef'd out call to UndefinedResult
 407         which wouldn't compile anyway.
 408         * sim-main.h (unpredictable_action): New function prototype.
 409         (Unpredictable): Define to call igen function unpredictable().
 410         (NotWordValue): New macro to call igen function not_word_value().
 411         (UndefinedResult): Remove.
 412         * interp.c (undefined_result): Remove.
 413         (unpredictable_action): New function.
 414         * mips.igen (not_word_value, unpredictable): New functions.
 415         (ADD, ADDI, do_addiu, do_addu, BGEZAL, BGEZALL, BLTZAL, BLTZALL)
 416         (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, do_mult, do_multu)
 417         (do_sra, do_srav, do_srl, do_srlv, SUB, do_subu): Invoke
 418         NotWordValue() to check for unpredictable inputs, then
 419         Unpredictable() to handle them.
 420
 421 2002-02-24  Chris Demetriou  <cgd@broadcom.com>
 422
 423         * mips.igen: Fix formatting of calls to Unpredictable().
 424
 425 2002-04-20  Andrew Cagney  <ac131313@redhat.com>
 426
 427         * interp.c (sim_open): Revert previous change.
 428
 429 2002-04-18  Alexandre Oliva  <aoliva@redhat.com>
 430
 431         * interp.c (sim_open): Disable chunk of code that wrote code in
 432         vector table entries.
 433
 434 2002-03-19  Chris Demetriou  <cgd@broadcom.com>
 435
 436         * cp1.c (FP_S_s, FP_D_s, FP_S_be, FP_D_be, FP_S_e, FP_D_e, FP_S_f)
 437         (FP_D_f, FP_S_fb, FP_D_fb, FPINF_SINGLE, FPINF_DOUBLE): Remove
 438         unused definitions.
 439
 440 2002-03-19  Chris Demetriou  <cgd@broadcom.com>
 441
 442         * cp1.c: Fix many formatting issues.
 443
 444 2002-03-19  Chris G. Demetriou  <cgd@broadcom.com>
 445
 446         * cp1.c (fpu_format_name): New function to replace...
 447         (DOFMT): This.  Delete, and update all callers.
 448         (fpu_rounding_mode_name): New function to replace...
 449         (RMMODE): This.  Delete, and update all callers.
 450
 451 2002-03-19  Chris G. Demetriou  <cgd@broadcom.com>
 452
 453         * interp.c: Move FPU support routines from here to...
 454         * cp1.c: Here.  New file.
 455         * Makefile.in (SIM_OBJS): Add cp1.o to object list.
 456         (cp1.o): New target.
 457
 458 2002-03-12  Chris Demetriou  <cgd@broadcom.com>
 459
 460         * configure.in (mipsisa32*-*-*, mipsisa64*-*-*): New targets.
 461         * mips.igen (mips32, mips64): New models, add to all instructions
 462         and functions as appropriate.
 463         (loadstore_ea, check_u64): New variant for model mips64.
 464         (check_fmt_p): New variant for models mipsV and mips64, remove
 465         mipsV model marking fro other variant.
 466         (SLL) Rename to...
 467         (SLLa) this.
 468         (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, SLLb): New instructions
 469         for mips32 and mips64.
 470         (DCLO, DCLZ): New instructions for mips64.
 471
 472 2002-03-07  Chris Demetriou  <cgd@broadcom.com>
 473
 474         * mips.igen (BREAK, LUI, ORI, SYSCALL, XORI): Print
 475         immediate or code as a hex value with the "%#lx" format.
 476         (ANDI): Likewise, and fix printed instruction name.
 477
 478 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
 479
 480         * sim-main.h (UndefinedResult, Unpredictable): New macros
 481         which currently do nothing.
 482
 483 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
 484
 485         * sim-main.h (status_UX, status_SX, status_KX, status_TS)
 486         (status_PX, status_MX, status_CU0, status_CU1, status_CU2)
 487         (status_CU3): New definitions.
 488
 489         * sim-main.h (ExceptionCause): Add new values for MIPS32
 490         and MIPS64: MDMX, MCheck, CacheErr.  Update comments
 491         for DebugBreakPoint and NMIReset to note their status in
 492         MIPS32 and MIPS64.
 493         (SignalExceptionMDMX, SignalExceptionWatch, SignalExceptionMCheck)
 494         (SignalExceptionCacheErr): New exception macros.
 495
 496 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
 497
 498         * mips.igen (check_fpu): Enable check for coprocessor 1 usability.
 499         * sim-main.h (COP_Usable): Define, but for now coprocessor 1
 500         is always enabled.
 501         (SignalExceptionCoProcessorUnusable): Take as argument the
 502         unusable coprocessor number.
 503
 504 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
 505
 506         * mips.igen: Fix formatting of all SignalException calls.
 507
 508 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
 509
 510         * sim-main.h (SIGNEXTEND): Remove.
 511
 512 2002-03-04  Chris Demetriou  <cgd@broadcom.com>
 513
 514         * mips.igen: Remove gencode comment from top of file, fix
 515         spelling in another comment.
 516
 517 2002-03-04  Chris Demetriou  <cgd@broadcom.com>
 518
 519         * mips.igen (check_fmt, check_fmt_p): New functions to check
 520         whether specific floating point formats are usable.
 521         (ABS.fmt, ADD.fmt, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
 522         (FLOOR.W.fmt, MOV.fmt, MUL.fmt, NEG.fmt, RECIP.fmt, ROUND.L.fmt)
 523         (ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt, TRUNC.L.fmt, TRUNC.W):
 524         Use the new functions.
 525         (do_c_cond_fmt): Remove format checks...
 526         (C.cond.fmta, C.cond.fmtb): And move them into all callers.
 527
 528 2002-03-03  Chris Demetriou  <cgd@broadcom.com>
 529
 530         * mips.igen: Fix formatting of check_fpu calls.
 531
 532 2002-03-03  Chris Demetriou  <cgd@broadcom.com>
 533
 534         * mips.igen (FLOOR.L.fmt): Store correct destination register.
 535
 536 2002-03-03  Chris Demetriou  <cgd@broadcom.com>
 537
 538         * mips.igen: Remove whitespace at end of lines.
 539
 540 2002-03-02  Chris Demetriou  <cgd@broadcom.com>
 541
 542         * mips.igen (loadstore_ea): New function to do effective
 543         address calculations.
 544         (do_load, do_load_left, do_load_right, LL, LDD, PREF, do_store,
 545         do_store_left, do_store_right, SC, SCD, PREFX, SWC1, SWXC1,
 546         CACHE): Use loadstore_ea to do effective address computations.
 547
 548 2002-03-02  Chris Demetriou  <cgd@broadcom.com>
 549
 550         * interp.c (load_word): Use EXTEND32 rather than SIGNEXTEND.
 551         * mips.igen (LL, CxC1, MxC1): Likewise.
 552
 553 2002-03-02  Chris Demetriou  <cgd@broadcom.com>
 554
 555         * mips.igen (LL, LLD, PREF, SC, SCD, ABS.fmt, ADD.fmt, CEIL.L.fmt,
 556         CEIL.W, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt,
 557         FLOOR.L.fmt, FLOOR.W.fmt, MADD.D, MADD.S, MOV.fmt, MOVtf.fmt,
 558         MSUB.D, MSUB.S, MUL.fmt, NEG.fmt, NMADD.D, NMADD.S, NMSUB.D,
 559         NMSUB.S, PREFX, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt,
 560         SQRT.fmt, SUB.fmt, SWC1, SWXC1, TRUNC.L.fmt, TRUNC.W, CACHE):
 561         Don't split opcode fields by hand, use the opcode field values
 562         provided by igen.
 563
 564 2002-03-01  Chris Demetriou  <cgd@broadcom.com>
 565
 566         * mips.igen (do_divu): Fix spacing.
 567
 568         * mips.igen (do_dsllv): Move to be right before DSLLV,
 569         to match the rest of the do_<shift> functions.
 570
 571 2002-03-01  Chris Demetriou  <cgd@broadcom.com>
 572
 573         * mips.igen (do_dsll, do_dsllv, DSLL32, do_dsra, DSRA32, do_dsrl,
 574         DSRL32, do_dsrlv): Trace inputs and results.
 575
 576 2002-03-01  Chris Demetriou  <cgd@broadcom.com>
 577
 578         * mips.igen (CACHE): Provide instruction-printing string.
 579
 580         * interp.c (signal_exception): Comment tokens after #endif.
 581
 582 2002-02-28  Chris Demetriou  <cgd@broadcom.com>
 583
 584         * mips.igen (LWXC1): Mark with filter "64,f", rather than just "32".
 585         (MOVtf, MxC1, MxC1, DMxC1, DMxC1, CxC1, CxC1, SQRT.fmt, MOV.fmt,
 586         NEG.fmt, ROUND.L.fmt, TRUNC.L.fmt, CEIL.L.fmt, FLOOR.L.fmt,
 587         ROUND.W.fmt, TRUNC.W, CEIL.W, FLOOR.W.fmt, RECIP.fmt, RSQRT.fmt,
 588         CVT.S.fmt, CVT.D.fmt, CVT.W.fmt, CVT.L.fmt, MOVtf.fmt, C.cond.fmta,
 589         C.cond.fmtb, SUB.fmt, MUL.fmt, DIV.fmt, MOVZ.fmt, MOVN.fmt, LDXC1,
 590         SWXC1, SDXC1, MSUB.D, MSUB.S, NMADD.S, NMADD.D, NMSUB.S, NMSUB.D,
 591         LWC1, SWC1): Add "f" to filter, since these are FP instructions.
 592
 593 2002-02-28  Chris Demetriou  <cgd@broadcom.com>
 594
 595         * mips.igen (DSRA32, DSRAV): Fix order of arguments in
 596         instruction-printing string.
 597         (LWU): Use '64' as the filter flag.
 598
 599 2002-02-28  Chris Demetriou  <cgd@broadcom.com>
 600
 601         * mips.igen (SDXC1): Fix instruction-printing string.
 602
 603 2002-02-28  Chris Demetriou  <cgd@broadcom.com>
 604
 605         * mips.igen (LDC1, SDC1): Remove mipsI model, and mark with
 606         filter flags "32,f".
 607
 608 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
 609
 610         * mips.igen (PREFX): This is a 64-bit instruction, use '64'
 611         as the filter flag.
 612
 613 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
 614
 615         * mips.igen (PREFX): Tweak instruction opcode fields (i.e.,
 616         add a comma) so that it more closely match the MIPS ISA
 617         documentation opcode partitioning.
 618         (PREF): Put useful names on opcode fields, and include
 619         instruction-printing string.
 620
 621 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
 622
 623         * mips.igen (check_u64): New function which in the future will
 624         check whether 64-bit instructions are usable and signal an
 625         exception if not.  Currently a no-op.
 626         (DADD, DADDI, DADDIU, DADDU, DDIV, DDIVU, DMULT, DMULTU, DSLL,
 627         DSLL32, DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB,
 628         DSUBU, LD, LDL, LDR, LLD, LWU, SCD, SD, SDL, SDR, DMxC1, LDXC1,
 629         LWXC1, SDXC1, SWXC1, DMFC0, DMTC0): Use check_u64.
 630
 631         * mips.igen (check_fpu): New function which in the future will
 632         check whether FPU instructions are usable and signal an exception
 633         if not.  Currently a no-op.
 634         (ABS.fmt, ADD.fmt, BC1a, BC1b, C.cond.fmta, C.cond.fmtb,
 635         CEIL.L.fmt, CEIL.W, CxC1, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt,
 636         CVT.W.fmt, DIV.fmt, DMxC1, DMxC1, FLOOR.L.fmt, FLOOR.W.fmt, LDC1,
 637         LDXC1, LWC1, LWXC1, MADD.D, MADD.S, MxC1, MOV.fmt, MOVtf,
 638         MOVtf.fmt, MOVN.fmt, MOVZ.fmt, MSUB.D, MSUB.S, MUL.fmt, NEG.fmt,
 639         NMADD.D, NMADD.S, NMSUB.D, NMSUB.S, RECIP.fmt, ROUND.L.fmt,
 640         ROUND.W.fmt, RSQRT.fmt, SDC1, SDXC1, SQRT.fmt, SUB.fmt, SWC1,
 641         SWXC1, TRUNC.L.fmt, TRUNC.W): Use check_fpu.
 642
 643 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
 644
 645         * mips.igen (do_load_left, do_load_right): Move to be immediately
 646         following do_load.
 647         (do_store_left, do_store_right): Move to be immediately following
 648         do_store.
 649
 650 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
 651
 652         * mips.igen (mipsV): New model name.  Also, add it to
 653         all instructions and functions where it is appropriate.
 654
 655 2002-02-18  Chris Demetriou  <cgd@broadcom.com>
 656
 657         * mips.igen: For all functions and instructions, list model
 658         names that support that instruction one per line.
 659
 660 2002-02-11  Chris Demetriou  <cgd@broadcom.com>
 661
 662         * mips.igen: Add some additional comments about supported
 663         models, and about which instructions go where.
 664         (BC1b, MFC0, MTC0, RFE): Sort supported models in the same
 665         order as is used in the rest of the file.
 666
 667 2002-02-11  Chris Demetriou  <cgd@broadcom.com>
 668
 669         * mips.igen (ADD, ADDI, DADDI, DSUB, SUB): Add comment
 670         indicating that ALU32_END or ALU64_END are there to check
 671         for overflow.
 672         (DADD): Likewise, but also remove previous comment about
 673         overflow checking.
 674
 675 2002-02-10  Chris Demetriou  <cgd@broadcom.com>
 676
 677         * mips.igen (DDIV, DIV, DIVU, DMULT, DMULTU, DSLL, DSLL32,
 678         DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB, DSUBU,
 679         JALR, JR, MOVN, MOVZ, MTLO, MULT, MULTU, SLL, SLLV, SLT, SLTU,
 680         SRAV, SRLV, SUB, SUBU, SYNC, XOR, MOVtf, DI, DMFC0, DMTC0, EI,
 681         ERET, RFE, TLBP, TLBR, TLBWI, TLBWR): Tweak instruction opcode
 682         fields (i.e., add and move commas) so that they more closely
 683         match the MIPS ISA documentation opcode partitioning.
 684
 685 2002-02-10  Chris Demetriou  <cgd@broadcom.com>
 686
 687         * mips.igen (ADDI): Print immediate value.
 688         (BREAK): Print code.
 689         (DADDIU, DSRAV, DSRLV): Print correct instruction name.
 690         (SLL): Print "nop" specially, and don't run the code
 691         that does the shift for the "nop" case.
 692
 693 2001-11-17  Fred Fish  <fnf@redhat.com>
 694
 695         * sim-main.h (float_operation): Move enum declaration outside
 696         of _sim_cpu struct declaration.
 697
 698 2001-04-12  Jim Blandy  <jimb@redhat.com>
 699
 700         * mips.igen (CFC1, CTC1): Pass the correct register numbers to
 701         PENDING_FILL.  Use PENDING_SCHED directly to handle the pending
 702         set of the FCSR.
 703         * sim-main.h (COCIDX): Remove definition; this isn't supported by
 704         PENDING_FILL, and you can get the intended effect gracefully by
 705         calling PENDING_SCHED directly.
 706
 707 2001-02-23  Ben Elliston  <bje@redhat.com>
 708
 709         * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Only define if not
 710         already defined elsewhere.
 711
 712 2001-02-19  Ben Elliston  <bje@redhat.com>
 713
 714         * sim-main.h (sim_monitor): Return an int.
 715         * interp.c (sim_monitor): Add return values.
 716         (signal_exception): Handle error conditions from sim_monitor.
 717
 718 2001-02-08  Ben Elliston  <bje@redhat.com>
 719
 720         * sim-main.c (load_memory): Pass cia to sim_core_read* functions.
 721         (store_memory): Likewise, pass cia to sim_core_write*.
 722
 723 2000-10-19  Frank Ch. Eigler  <fche@redhat.com>
 724
 725         On advice from Chris G. Demetriou <cgd@sibyte.com>:
 726         * sim-main.h (GPR_CLEAR): Remove unused alternative macro.
 727
 728 Thu Jul 27 22:02:05 2000  Andrew Cagney  <cagney@b1.cygnus.com>
 729
 730         From Maciej W. Rozycki <macro@ds2.pg.gda.pl>:
 731         * Makefile.in: Don't delete *.igen when cleaning directory.
 732
 733 Wed Jul 19 18:50:51 2000  Andrew Cagney  <cagney@b1.cygnus.com>
 734
 735         * m16.igen (break): Call SignalException not sim_engine_halt.
 736
 737 Mon Jul  3 11:13:20 2000  Andrew Cagney  <cagney@b1.cygnus.com>
 738
 739         From Jason Eckhardt:
 740         * mips.igen (MOVZ.fmt, MOVN.fmt): Move conditional on GPR[RT].
 741
 742 Tue Jun 13 20:52:07 2000  Andrew Cagney  <cagney@b1.cygnus.com>
 743
 744         * mips.igen (MxC1, DMxC1): Fix printf formatting.
 745
 746 2000-05-24  Michael Hayes  <mhayes@cygnus.com>
 747
 748         * mips.igen (do_dmultx): Fix typo.
 749
 750 Tue May 23 21:39:23 2000  Andrew Cagney  <cagney@b1.cygnus.com>
 751
 752         * configure: Regenerated to track ../common/aclocal.m4 changes.
 753
 754 Fri Apr 28 20:48:36 2000  Andrew Cagney  <cagney@b1.cygnus.com>
 755
 756         * mips.igen (DMxC1): Fix format arguments for sim_io_eprintf call.
 757
 758 2000-04-12  Frank Ch. Eigler  <fche@redhat.com>
 759
 760         * sim-main.h (GPR_CLEAR): Define macro.
 761
 762 Mon Apr 10 00:07:09 2000  Andrew Cagney  <cagney@b1.cygnus.com>
 763
 764         * interp.c (decode_coproc): Output long using %lx and not %s.
 765
 766 2000-03-21  Frank Ch. Eigler  <fche@redhat.com>
 767
 768         * interp.c (sim_open): Sort & extend dummy memory regions for
 769         --board=jmr3904 for eCos.
 770
 771 2000-03-02  Frank Ch. Eigler  <fche@redhat.com>
 772
 773         * configure: Regenerated.
 774
 775 Tue Feb  8 18:35:01 2000  Donald Lindsay  <dlindsay@hound.cygnus.com>
 776
 777         * interp.c, mips.igen: all 5 DEADC0DE situations now have sim_io_eprintf
 778         calls, conditional on the simulator being in verbose mode.
 779
 780 Fri Feb  4 09:45:15 2000  Donald Lindsay  <dlindsay@cygnus.com>
 781
 782         * sim-main.c (cache_op): Added case arm so that CACHE ops to a secondary
 783         cache don't get ReservedInstruction traps.
 784
 785 1999-11-29  Mark Salter  <msalter@cygnus.com>
 786
 787         * dv-tx3904sio.c (tx3904sio_io_write_buffer): Use write value as a mask
 788         to clear status bits in sdisr register. This is how the hardware works.
 789
 790         * interp.c (sim_open): Added more memory aliases for jmr3904 hardware
 791         being used by cygmon.
 792
 793 1999-11-11  Andrew Haley  <aph@cygnus.com>
 794
 795         * interp.c (decode_coproc): Correctly handle DMFC0 and DMTC0
 796         instructions.
 797
 798 Thu Sep  9 15:12:08 1999  Geoffrey Keating  <geoffk@cygnus.com>
 799
 800         * mips.igen (MULT): Correct previous mis-applied patch.
 801
 802 Tue Sep  7 13:34:54 1999  Geoffrey Keating  <geoffk@cygnus.com>
 803
 804         * mips.igen (delayslot32): Handle sequence like
 805         mtc1 $at,$f12 ; jal fp_add ; mov.s $f13,$f12
 806         correctly by calling ENGINE_ISSUE_PREFIX_HOOK() before issue.
 807         (MULT): Actually pass the third register...
 808
 809 1999-09-03  Mark Salter  <msalter@cygnus.com>
 810
 811         * interp.c (sim_open): Added more memory aliases for additional
 812         hardware being touched by cygmon on jmr3904 board.
 813
 814 Thu Sep  2 18:15:53 1999  Andrew Cagney  <cagney@b1.cygnus.com>
 815
 816         * configure: Regenerated to track ../common/aclocal.m4 changes.
 817
 818 Tue Jul 27 16:36:51 1999  Andrew Cagney  <cagney@amy.cygnus.com>
 819
 820         * interp.c (sim_store_register): Handle case where client - GDB -
 821         specifies that a 4 byte register is 8 bytes in size.
 822         (sim_fetch_register): Ditto.
 823
 824 1999-07-14  Frank Ch. Eigler  <fche@cygnus.com>
 825
 826         Implement "sim firmware" option, inspired by jimb's version of 1998-01.
 827         * interp.c (firmware_option_p): New global flag: "sim firmware" given.
 828         (idt_monitor_base): Base address for IDT monitor traps.
 829         (pmon_monitor_base): Ditto for PMON.
 830         (lsipmon_monitor_base): Ditto for LSI PMON.
 831         (MONITOR_BASE, MONITOR_SIZE): Removed macros.
 832         (mips_option): Add "firmware" option with new OPTION_FIRMWARE key.
 833         (sim_firmware_command): New function.
 834         (mips_option_handler): Call it for OPTION_FIRMWARE.
 835         (sim_open): Allocate memory for idt_monitor region.  If "--board"
 836         option was given, add no monitor by default.  Add BREAK hooks only if
 837         monitors are also there.
 838
 839 Mon Jul 12 00:02:27 1999  Andrew Cagney  <cagney@amy.cygnus.com>
 840
 841         * interp.c (sim_monitor): Flush output before reading input.
 842
 843 Sun Jul 11 19:28:11 1999  Andrew Cagney  <cagney@b1.cygnus.com>
 844
 845         * tconfig.in (SIM_HANDLES_LMA): Always define.
 846
 847 Thu Jul  8 16:06:59 1999  Andrew Cagney  <cagney@b1.cygnus.com>
 848
 849         From Mark Salter <msalter@cygnus.com>:
 850         * interp.c (BOARD_BSP): Define.  Add to list of possible boards.
 851         (sim_open): Add setup for BSP board.
 852
 853 Wed Jul  7 12:45:58 1999  Andrew Cagney  <cagney@b1.cygnus.com>
 854
 855         * mips.igen (MULT, MULTU): Add syntax for two operand version.
 856         (DMFC0, DMTC0): Recognize.  Call DecodeCoproc which will report
 857         them as unimplemented.
 858
 859 1999-05-08  Felix Lee  <flee@cygnus.com>
 860
 861         * configure: Regenerated to track ../common/aclocal.m4 changes.
 862
 863 1999-04-21  Frank Ch. Eigler  <fche@cygnus.com>
 864
 865         * mips.igen (bc0f): For the TX39 only, decode this as a no-op stub.
 866
 867 Thu Apr 15 14:15:17 1999  Andrew Cagney  <cagney@amy.cygnus.com>
 868
 869         * configure.in: Any mips64vr5*-*-* target should have
 870         -DTARGET_ENABLE_FR=1.
 871         (default_endian): Any mips64vr*el-*-* target should default to
 872         LITTLE_ENDIAN.
 873         * configure: Re-generate.
 874
 875 1999-02-19  Gavin Romig-Koch  <gavin@cygnus.com>
 876
 877         * mips.igen (ldl): Extend from _16_, not 32.
 878
 879 Wed Jan 27 18:51:38 1999  Andrew Cagney  <cagney@chook.cygnus.com>
 880
 881         * interp.c (sim_store_register): Force registers written to by GDB
 882         into an un-interpreted state.
 883
 884 1999-02-05  Frank Ch. Eigler  <fche@cygnus.com>
 885
 886         * dv-tx3904sio.c (tx3904sio_tickle): After a polled I/O from the
 887         CPU, start periodic background I/O polls.
 888         (tx3904sio_poll): New function: periodic I/O poller.
 889
 890 1998-12-30  Frank Ch. Eigler  <fche@cygnus.com>
 891
 892         * mips.igen (BREAK): Call signal_exception instead of sim_engine_halt.
 893
 894 Tue Dec 29 16:03:53 1998  Rainer Orth  <ro@TechFak.Uni-Bielefeld.DE>
 895
 896         * configure.in, configure (mips64vr5*-*-*): Added missing ;; in
 897         case statement.
 898
 899 1998-12-29  Frank Ch. Eigler  <fche@cygnus.com>
 900
 901         * interp.c (sim_open): Allocate jm3904 memory in smaller chunks.
 902         (load_word): Call SIM_CORE_SIGNAL hook on error.
 903         (signal_exception): Call SIM_CPU_EXCEPTION_TRIGGER hook before
 904         starting.  For exception dispatching, pass PC instead of NULL_CIA.
 905         (decode_coproc): Use COP0_BADVADDR to store faulting address.
 906         * sim-main.h (COP0_BADVADDR): Define.
 907         (SIM_CORE_SIGNAL): Define hook to call mips_core_signal.
 908         (SIM_CPU_EXCEPTION*): Define hooks to call mips_cpu_exception*().
 909         (_sim_cpu): Add exc_* fields to store register value snapshots.
 910         * mips.igen (*): Replace memory-related SignalException* calls
 911         with references to SIM_CORE_SIGNAL hook.
 912
 913         * dv-tx3904irc.c (tx3904irc_port_event): printf format warning
 914         fix.
 915         * sim-main.c (*): Minor warning cleanups.
 916
 917 1998-12-24  Gavin Romig-Koch  <gavin@cygnus.com>
 918
 919         * m16.igen (DADDIU5): Correct type-o.
 920
 921 Mon Dec 21 10:34:48 1998  Andrew Cagney  <cagney@chook>
 922
 923         * mips.igen (do_ddiv, do_ddivu): Pacify GCC. Update hi/lo via tmp
 924         variables.
 925
 926 Wed Dec 16 18:20:28 1998  Andrew Cagney  <cagney@chook>
 927
 928         * Makefile.in (SIM_EXTRA_CFLAGS): No longer need to add .../newlib
 929         to include path.
 930         (interp.o): Add dependency on itable.h
 931         (oengine.c, gencode): Delete remaining references.
 932         (BUILT_SRC_FROM_GEN): Clean up.
 933
 934 1998-12-16  Gavin Romig-Koch  <gavin@cygnus.com>
 935
 936         * vr4run.c: New.
 937         * Makefile.in (SIM_HACK_OBJ,HACK_OBJS,HACK_GEN_SRCS,libhack.a,
 938         tmp-hack,tmp-m32-hack,tmp-m16-hack,tmp-itable-hack,
 939         tmp-run-hack) : New.
 940         * m16.igen (LD,DADDIU,DADDUI5,DADJSP,DADDIUSP,DADDI,DADDU,DSUBU,
 941         DSLL,DSRL,DSRA,DSLLV,DSRAV,DMULT,DMULTU,DDIV,DDIVU,JALX32,JALX):
 942         Drop the "64" qualifier to get the HACK generator working.
 943         Use IMMEDIATE rather than IMMED.  Use SHAMT rather than SHIFT.
 944         * mips.igen (do_daddiu,do_ddiv,do_divu): Remove the 64-only
 945         qualifier to get the hack generator working.
 946         (do_dsll,do_dsllv,do_dsra,do_dsrl,do_dsrlv): New.
 947         (DSLL): Use do_dsll.
 948         (DSLLV): Use do_dsllv.
 949         (DSRA): Use do_dsra.
 950         (DSRL): Use do_dsrl.
 951         (DSRLV): Use do_dsrlv.
 952         (BC1): Move *vr4100 to get the HACK generator working.
 953         (CxC1, DMxC1, MxC1,MACCU,MACCHI,MACCHIU): Rename to
 954         get the HACK generator working.
 955         (MACC) Rename to get the HACK generator working.
 956         (DMACC,MACCS,DMACCS): Add the 64.
 957
 958 1998-12-12  Gavin Romig-Koch  <gavin@cygnus.com>
 959
 960         * mips.igen (BC1): Renamed to BC1a and BC1b to avoid conflicts.
 961         * sim-main.h (SizeFGR): Handle TARGET_ENABLE_FR.
 962
 963 1998-12-11  Gavin Romig-Koch  <gavin@cygnus.com>
 964
 965     * mips/interp.c (DEBUG): Cleanups.
 966
 967 1998-12-10  Frank Ch. Eigler  <fche@cygnus.com>
 968
 969         * dv-tx3904sio.c (tx3904sio_io_read_buffer): Endianness fixes.
 970         (tx3904sio_tickle): fflush after a stdout character output.
 971
 972 1998-12-03  Frank Ch. Eigler  <fche@cygnus.com>
 973
 974         * interp.c (sim_close): Uninstall modules.
 975
 976 Wed Nov 25 13:41:03 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 977
 978         * sim-main.h, interp.c (sim_monitor): Change to global
 979         function.
 980
 981 Wed Nov 25 17:33:24 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 982
 983         * configure.in (vr4100): Only include vr4100 instructions in
 984         simulator.
 985         * configure: Re-generate.
 986         * m16.igen (*): Tag all mips16 instructions as also being vr4100.
 987
 988 Mon Nov 23 18:20:36 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 989
 990         * Makefile.in (SIM_CFLAGS): Do not define WITH_IGEN.
 991         * sim-main.h, sim-main.c, interp.c: Delete #if WITH_IGEN keeping
 992         true alternative.
 993
 994         * configure.in (sim_default_gen, sim_use_gen): Replace with
 995         sim_gen.
 996         (--enable-sim-igen): Delete config option. Always using IGEN.
 997         * configure: Re-generate.
 998
 999         * Makefile.in (gencode): Kill, kill, kill.
1000         * gencode.c: Ditto.
1001
1002 Mon Nov 23 18:07:36 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1003
1004         * configure.in: Configure mips64vr4100-elf nee mips64vr41* as a 64
1005         bit mips16 igen simulator.
1006         * configure: Re-generate.
1007
1008         * mips.igen (check_div_hilo, check_mult_hilo, check_mf_hilo): Mark
1009         as part of vr4100 ISA.
1010         * vr.igen: Mark all instructions as 64 bit only.
1011
1012 Mon Nov 23 17:07:37 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1013
1014         * interp.c (get_cell, sim_monitor, fetch_str, CoProcPresent):
1015         Pacify GCC.
1016
1017 Mon Nov 23 13:23:40 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1018
1019         * configure.in: Configure mips-lsi-elf nee mips*lsi* as a
1020         mipsIII/mips16 igen simulator.  Fix sim_gen VS sim_igen typos.
1021         * configure: Re-generate.
1022
1023         * m16.igen (BREAK): Define breakpoint instruction.
1024         (JALX32): Mark instruction as mips16 and not r3900.
1025         * mips.igen (C.cond.fmt): Fix typo in instruction format.
1026
1027         * sim-main.h (PENDING_FILL): Wrap C statements in do/while.
1028
1029 Sat Nov  7 09:54:38 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1030
1031         * gencode.c (build_instruction - BREAK): For MIPS16, handle BREAK
1032         insn as a debug breakpoint.
1033
1034         * sim-main.h (PENDING_SLOT_BIT): Fix, was incorrectly defined as
1035         pending.slot_size.
1036         (PENDING_SCHED): Clean up trace statement.
1037         (PENDING_SCHED): Increment PENDING_IN and PENDING_TOTAL.
1038         (PENDING_FILL): Delay write by only one cycle.
1039         (PENDING_FILL): For FSRs, write fmt_uninterpreted to FPR_STATE.
1040
1041         * sim-main.c (pending_tick): Clean up trace statements. Add trace
1042         of pending writes.
1043         (pending_tick): Fix sizes in switch statements, 4 & 8 instead of
1044         32 & 64.
1045         (pending_tick): Move incrementing of index to FOR statement.
1046         (pending_tick): Only update PENDING_OUT after a write has occured.
1047
1048         * configure.in: Add explicit mips-lsi-* target.  Use gencode to
1049         build simulator.
1050         * configure: Re-generate.
1051
1052         * interp.c (sim_engine_run OLD): Delete explicit call to
1053         PENDING_TICK. Now called via ENGINE_ISSUE_PREFIX_HOOK.
1054
1055 Sat Oct 30 09:49:10 1998  Frank Ch. Eigler  <fche@cygnus.com>
1056
1057         * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Add dummy
1058         interrupt level number to match changed SignalExceptionInterrupt
1059         macro.
1060
1061 Fri Oct  9 18:02:25 1998  Doug Evans  <devans@canuck.cygnus.com>
1062
1063         * interp.c: #include "itable.h" if WITH_IGEN.
1064         (get_insn_name): New function.
1065         (sim_open): Initialize CPU_INSN_NAME,CPU_MAX_INSNS.
1066         * sim-main.h (MAX_INSNS,INSN_NAME): Delete.
1067
1068 Mon Sep 14 12:36:44 1998  Frank Ch. Eigler  <fche@cygnus.com>
1069
1070         * configure: Rebuilt to inhale new common/aclocal.m4.
1071
1072 Tue Sep  1 15:39:18 1998  Frank Ch. Eigler  <fche@cygnus.com>
1073
1074         * dv-tx3904sio.c: Include sim-assert.h.
1075
1076 Tue Aug 25 12:49:46 1998  Frank Ch. Eigler  <fche@cygnus.com>
1077
1078         * dv-tx3904sio.c: New file: tx3904 serial I/O module.
1079         * configure.in: Add dv-tx3904sio, dv-sockser for tx39 target.
1080         Reorganize target-specific sim-hardware checks.
1081         * configure: rebuilt.
1082         * interp.c (sim_open): For tx39 target boards, set
1083         OPERATING_ENVIRONMENT, add tx3904sio devices.
1084         * tconfig.in: For tx39 target, set SIM_HANDLES_LMA for loading
1085         ROM executables.  Install dv-sockser into sim-modules list.
1086
1087         * dv-tx3904irc.c: Compiler warning clean-up.
1088         * dv-tx3904tmr.c: Compiler warning clean-up.  Remove particularly
1089         frequent hw-trace messages.
1090
1091 Fri Jul 31 18:14:16 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1092
1093         * vr.igen (MulAcc): Identify as a vr4100 specific function.
1094
1095 Sat Jul 25 16:03:14 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1096
1097         * Makefile.in (IGEN_INCLUDE): Add vr.igen.
1098
1099         * vr.igen: New file.
1100         (MAC/MADD16, DMAC/DMADD16): Implement using code from gencode.c.
1101         * mips.igen: Define vr4100 model. Include vr.igen.
1102 Mon Jun 29 09:21:07 1998  Gavin Koch  <gavin@cygnus.com>
1103
1104         * mips.igen (check_mf_hilo): Correct check.
1105
1106 Wed Jun 17 12:20:49 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1107
1108         * sim-main.h (interrupt_event): Add prototype.
1109
1110         * dv-tx3904tmr.c (tx3904tmr_io_write_buffer): Delete unused
1111         register_ptr, register_value.
1112         (deliver_tx3904tmr_tick): Fix types passed to printf fmt.
1113
1114         * sim-main.h (tracefh): Make extern.
1115
1116 Tue Jun 16 14:39:00 1998  Frank Ch. Eigler  <fche@cygnus.com>
1117
1118         * dv-tx3904tmr.c: Deschedule timer event after dispatching.
1119         Reduce unnecessarily high timer event frequency.
1120         * dv-tx3904cpu.c: Ditto for interrupt event.
1121
1122 Wed Jun 10 13:22:32 1998  Frank Ch. Eigler  <fche@cygnus.com>
1123
1124         * interp.c (decode_coproc): For TX39, add stub COP0 register #7,
1125         to allay warnings.
1126         (interrupt_event): Made non-static.
1127
1128         * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Correct accidental
1129         interchange of configuration values for external vs. internal
1130         clock dividers.
1131
1132 Tue Jun  9 12:46:24 1998  Ian Carmichael  <iancarm@cygnus.com>
1133
1134         * mips.igen (BREAK): Moved code to here for
1135         simulator-reserved break instructions.
1136         * gencode.c (build_instruction): Ditto.
1137         * interp.c (signal_exception): Code moved from here.  Non-
1138         reserved instructions now use exception vector, rather
1139         than halting sim.
1140         * sim-main.h: Moved magic constants to here.
1141
1142 Tue Jun  9 12:29:50 1998  Frank Ch. Eigler  <fche@cygnus.com>
1143
1144         * dv-tx3904cpu.c (deliver_*_interrupt,*_port_event): Set the CAUSE
1145         register upon non-zero interrupt event level, clear upon zero
1146         event value.
1147         * dv-tx3904irc.c (*_port_event): Handle deactivated interrupt signal
1148         by passing zero event value.
1149         (*_io_{read,write}_buffer): Endianness fixes.
1150         * dv-tx3904tmr.c (*_io_{read,write}_buffer): Endianness fixes.
1151         (deliver_*_tick): Reduce sim event interval to 75% of count interval.
1152
1153         * interp.c (sim_open): Added jmr3904pal board type that adds PAL-based
1154         serial I/O and timer module at base address 0xFFFF0000.
1155
1156 Tue Jun  9 11:52:29 1998  Gavin Koch  <gavin@cygnus.com>
1157
1158         * mips.igen (SWC1) : Correct the handling of ReverseEndian
1159         and BigEndianCPU.
1160
1161 Tue Jun  9 11:40:57 1998  Gavin Koch  <gavin@cygnus.com>
1162
1163         * configure.in (mips_fpu_bitsize) : Set this correctly for 32-bit mips
1164         parts.
1165         * configure: Update.
1166
1167 Thu Jun  4 15:37:33 1998  Frank Ch. Eigler  <fche@cygnus.com>
1168
1169         * dv-tx3904tmr.c: New file - implements tx3904 timer.
1170         * dv-tx3904{irc,cpu}.c: Mild reformatting.
1171         * configure.in: Include tx3904tmr in hw_device list.
1172         * configure: Rebuilt.
1173         * interp.c (sim_open): Instantiate three timer instances.
1174         Fix address typo of tx3904irc instance.
1175
1176 Tue Jun  2 15:48:02 1998  Ian Carmichael  <iancarm@cygnus.com>
1177
1178         * interp.c (signal_exception): SystemCall exception now uses
1179         the exception vector.
1180
1181 Mon Jun  1 18:18:26 1998  Frank Ch. Eigler  <fche@cygnus.com>
1182
1183         * interp.c (decode_coproc): For TX39, add stub COP0 register #3,
1184         to allay warnings.
1185
1186 Fri May 29 11:40:39 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1187
1188         * configure.in (sim_igen_filter): Match mips*tx39 not mipst*tx39.
1189
1190 Mon May 25 20:47:45 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1191
1192         * dv-tx3904cpu.c, dv-tx3904irc.c: Rename *_callback to *_method.
1193
1194         * dv-tx3904cpu.c, dv-tx3904irc.c: Include hw-main.h and
1195         sim-main.h. Declare a struct hw_descriptor instead of struct
1196         hw_device_descriptor.
1197
1198 Mon May 25 12:41:38 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1199
1200         * mips.igen (do_store_left, do_load_left): Compute nr of left and
1201         right bits and then re-align left hand bytes to correct byte
1202         lanes.  Fix incorrect computation in do_store_left when loading
1203         bytes from second word.
1204
1205 Fri May 22 13:34:20 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1206
1207         * configure.in (SIM_AC_OPTION_HARDWARE): Only enable when tx3904.
1208         * interp.c (sim_open): Only create a device tree when HW is
1209         enabled.
1210
1211         * dv-tx3904irc.c (tx3904irc_finish): Pacify GCC.
1212         * interp.c (signal_exception): Ditto.
1213
1214 Thu May 21 14:24:11 1998  Gavin Koch  <gavin@cygnus.com>
1215
1216         * gencode.c: Mark BEGEZALL as LIKELY.
1217
1218 Thu May 21 18:57:19 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1219
1220         * sim-main.h (ALU32_END): Sign extend 32 bit results.
1221         * mips.igen (ADD, SUB, ADDI, DADD, DSUB): Trace.
1222
1223 Mon May 18 18:22:42 1998  Frank Ch. Eigler  <fche@cygnus.com>
1224
1225         * configure.in (SIM_AC_OPTION_HARDWARE): Added common hardware
1226         modules.  Recognize TX39 target with "mips*tx39" pattern.
1227         * configure: Rebuilt.
1228         * sim-main.h (*): Added many macros defining bits in
1229         TX39 control registers.
1230         (SignalInterrupt): Send actual PC instead of NULL.
1231         (SignalNMIReset): New exception type.
1232         * interp.c (board): New variable for future use to identify
1233         a particular board being simulated.
1234         (mips_option_handler,mips_options): Added "--board" option.
1235         (interrupt_event): Send actual PC.
1236         (sim_open): Make memory layout conditional on board setting.
1237         (signal_exception): Initial implementation of hardware interrupt
1238         handling.  Accept another break instruction variant for simulator
1239         exit.
1240         (decode_coproc): Implement RFE instruction for TX39.
1241         (mips.igen): Decode RFE instruction as such.
1242         * configure.in (tx3904cpu,tx3904irc): Added devices for tx3904.
1243         * interp.c: Define "jmr3904" and "jmr3904debug" board types and
1244         bbegin to implement memory map.
1245         * dv-tx3904cpu.c: New file.
1246         * dv-tx3904irc.c: New file.
1247
1248 Wed May 13 14:40:11 1998  Gavin Koch  <gavin@cygnus.com>
1249
1250         * mips.igen (check_mt_hilo): Create a separate r3900 version.
1251
1252 Wed May 13 14:11:46 1998  Gavin Koch  <gavin@cygnus.com>
1253
1254         * tx.igen (madd,maddu):  Replace calls to check_op_hilo
1255         with calls to check_div_hilo.
1256
1257 Wed May 13 09:59:27 1998  Gavin Koch  <gavin@cygnus.com>
1258
1259         * mips/mips.igen (check_op_hilo,check_mult_hilo,check_div_hilo):
1260         Replace check_op_hilo with check_mult_hilo and check_div_hilo.
1261         Add special r3900 version of do_mult_hilo.
1262         (do_dmultx,do_mult,do_multu): Replace calls to check_op_hilo
1263         with calls to check_mult_hilo.
1264         (do_ddiv,do_ddivu,do_div,do_divu): Replace calls to check_op_hilo
1265         with calls to check_div_hilo.
1266
1267 Tue May 12 15:22:11 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1268
1269         * configure.in (SUBTARGET_R3900): Define for mipstx39 target.
1270         Document a replacement.
1271
1272 Fri May  8 17:48:19 1998  Ian Carmichael  <iancarm@cygnus.com>
1273
1274         * interp.c (sim_monitor): Make mon_printf work.
1275
1276 Wed May  6 19:42:19 1998  Doug Evans  <devans@canuck.cygnus.com>
1277
1278         * sim-main.h (INSN_NAME): New arg `cpu'.
1279
1280 Tue Apr 28 18:33:31 1998  Geoffrey Noer  <noer@cygnus.com>
1281
1282         * configure: Regenerated to track ../common/aclocal.m4 changes.
1283
1284 Sun Apr 26 15:31:55 1998  Tom Tromey  <tromey@creche>
1285
1286         * configure: Regenerated to track ../common/aclocal.m4 changes.
1287         * config.in: Ditto.
1288
1289 Sun Apr 26 15:20:01 1998  Tom Tromey  <tromey@cygnus.com>
1290
1291         * acconfig.h: New file.
1292         * configure.in: Reverted change of Apr 24; use sinclude again.
1293
1294 Fri Apr 24 14:16:40 1998  Tom Tromey  <tromey@creche>
1295
1296         * configure: Regenerated to track ../common/aclocal.m4 changes.
1297         * config.in: Ditto.
1298
1299 Fri Apr 24 11:19:20 1998  Tom Tromey  <tromey@cygnus.com>
1300
1301         * configure.in: Don't call sinclude.
1302
1303 Fri Apr 24 11:35:01 1998  Andrew Cagney  <cagney@chook.cygnus.com>
1304
1305         * mips.igen (do_store_left): Pass 0 not NULL to store_memory.
1306
1307 Tue Apr 21 11:59:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1308
1309         * mips.igen (ERET): Implement.
1310
1311         * interp.c (decode_coproc): Return sign-extended EPC.
1312
1313         * mips.igen (ANDI, LUI, MFC0): Add tracing code.
1314
1315         * interp.c (signal_exception): Do not ignore Trap.
1316         (signal_exception): On TRAP, restart at exception address.
1317         (HALT_INSTRUCTION, HALT_INSTRUCTION_MASK): Define.
1318         (signal_exception): Update.
1319         (sim_open): Patch V_COMMON interrupt vector with an abort sequence
1320         so that TRAP instructions are caught.
1321
1322 Mon Apr 20 11:26:55 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1323
1324         * sim-main.h (struct hilo_access, struct hilo_history): Define,
1325         contains HI/LO access history.
1326         (struct _sim_cpu): Make hiaccess and loaccess of type hilo_access.
1327         (HIACCESS, LOACCESS): Delete, replace with
1328         (HIHISTORY, LOHISTORY): New macros.
1329         (CHECKHILO): Delete all, moved to mips.igen
1330
1331         * gencode.c (build_instruction): Do not generate checks for
1332         correct HI/LO register usage.
1333
1334         * interp.c (old_engine_run): Delete checks for correct HI/LO
1335         register usage.
1336
1337         * mips.igen (check_mt_hilo, check_mf_hilo, check_op_hilo,
1338         check_mf_cycles): New functions.
1339         (do_mfhi, do_mflo, "mthi", "mtlo", do_ddiv, do_ddivu, do_div,
1340         do_divu, domultx, do_mult, do_multu): Use.
1341
1342         * tx.igen ("madd", "maddu"): Use.
1343
1344 Wed Apr 15 18:31:54 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1345
1346         * mips.igen (DSRAV): Use function do_dsrav.
1347         (SRAV): Use new function do_srav.
1348
1349         * m16.igen (BEQZ, BNEZ): Compare GPR[TRX] not GPR[RX].
1350         (B): Sign extend 11 bit immediate.
1351         (EXT-B*): Shift 16 bit immediate left by 1.
1352         (ADDIU*): Don't sign extend immediate value.
1353
1354 Wed Apr 15 10:32:15 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1355
1356         * m16run.c (sim_engine_run): Restore CIA after handling an event.
1357
1358         * sim-main.h (DELAY_SLOT, NULLIFY_NEXT_INSTRUCTION): For IGEN, use
1359         functions.
1360
1361         * mips.igen (delayslot32, nullify_next_insn): New functions.
1362         (m16.igen): Always include.
1363         (do_*): Add more tracing.
1364
1365         * m16.igen (delayslot16): Add NIA argument, could be called by a
1366         32 bit MIPS16 instruction.
1367
1368         * interp.c (ifetch16): Move function from here.
1369         * sim-main.c (ifetch16): To here.
1370
1371         * sim-main.c (ifetch16, ifetch32): Update to match current
1372         implementations of LH, LW.
1373         (signal_exception): Don't print out incorrect hex value of illegal
1374         instruction.
1375
1376 Wed Apr 15 00:17:25 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1377
1378         * m16run.c (sim_engine_run): Use IMEM16 and IMEM32 to fetch an
1379         instruction.
1380
1381         * m16.igen: Implement MIPS16 instructions.
1382
1383         * mips.igen (do_addiu, do_addu, do_and, do_daddiu, do_daddu,
1384         do_ddiv, do_ddivu, do_div, do_divu, do_dmultx, do_dmultu, do_srav,
1385         do_dsubu, do_mfhi, do_mflo, do_mult, do_multu, do_nor, do_or,
1386         do_sll, do_sllv, do_slt, do_slti, do_sltiu, do_sltu, do_sra,
1387         do_srl, do_srlv, do_subu, do_xor, do_xori): New functions.  Move
1388         bodies of corresponding code from 32 bit insn to these.  Also used
1389         by MIPS16 versions of functions.
1390
1391         * sim-main.h (RAIDX, T8IDX, T8, SPIDX): Define.
1392         (IMEM16): Drop NR argument from macro.
1393
1394 Sat Apr  4 22:39:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1395
1396         * Makefile.in (SIM_OBJS): Add sim-main.o.
1397
1398         * sim-main.h (address_translation, load_memory, store_memory,
1399         cache_op, sync_operation, prefetch, ifetch32, pending_tick): Mark
1400         as INLINE_SIM_MAIN.
1401         (pr_addr, pr_uword64): Declare.
1402         (sim-main.c): Include when H_REVEALS_MODULE_P.
1403
1404         * interp.c (address_translation, load_memory, store_memory,
1405         cache_op, sync_operation, prefetch, ifetch32, pending_tick): Move
1406         from here.
1407         * sim-main.c: To here. Fix compilation problems.
1408
1409         * configure.in: Enable inlining.
1410         * configure: Re-config.
1411
1412 Sat Apr  4 20:36:25 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1413
1414         * configure: Regenerated to track ../common/aclocal.m4 changes.
1415
1416 Fri Apr  3 04:32:35 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1417
1418         * mips.igen: Include tx.igen.
1419         * Makefile.in (IGEN_INCLUDE): Add tx.igen.
1420         * tx.igen: New file, contains MADD and MADDU.
1421
1422         * interp.c (load_memory): When shifting bytes, use LOADDRMASK not
1423         the hardwired constant `7'.
1424         (store_memory): Ditto.
1425         (LOADDRMASK): Move definition to sim-main.h.
1426
1427         mips.igen (MTC0): Enable for r3900.
1428         (ADDU): Add trace.
1429
1430         mips.igen (do_load_byte): Delete.
1431         (do_load, do_store, do_load_left, do_load_write, do_store_left,
1432         do_store_right): New functions.
1433         (SW*, LW*, SD*, LD*, SH, LH, SB, LB): Use.
1434
1435         configure.in: Let the tx39 use igen again.
1436         configure: Update.
1437
1438 Thu Apr  2 10:59:39 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1439
1440         * interp.c (sim_monitor): get_mem_info returns a 4 byte quantity,
1441         not an address sized quantity.  Return zero for cache sizes.
1442
1443 Wed Apr  1 23:47:53 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1444
1445         * mips.igen (r3900): r3900 does not support 64 bit integer
1446         operations.
1447
1448 Mon Mar 30 14:46:05 1998  Gavin Koch  <gavin@cygnus.com>
1449
1450         * configure.in (mipstx39*-*-*): Use gencode simulator rather
1451         than igen one.
1452         * configure : Rebuild.
1453
1454 Fri Mar 27 16:15:52 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1455
1456         * configure: Regenerated to track ../common/aclocal.m4 changes.
1457
1458 Fri Mar 27 15:01:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1459
1460         * interp.c (mips_option_handler): Iterate over MAX_NR_PROCESSORS.
1461
1462 Wed Mar 25 16:44:27 1998  Ian Carmichael  <iancarm@cygnus.com>
1463
1464         * configure: Regenerated to track ../common/aclocal.m4 changes.
1465         * config.in: Regenerated to track ../common/aclocal.m4 changes.
1466
1467 Wed Mar 25 12:35:29 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1468
1469         * configure: Regenerated to track ../common/aclocal.m4 changes.
1470
1471 Wed Mar 25 10:05:46 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1472
1473         * interp.c (Max, Min): Comment out functions. Not yet used.
1474
1475 Wed Mar 18 12:38:12 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1476
1477         * configure: Regenerated to track ../common/aclocal.m4 changes.
1478
1479 Tue Mar 17 19:05:20 1998  Frank Ch. Eigler  <fche@cygnus.com>
1480
1481         * Makefile.in (MIPS_EXTRA_LIBS, SIM_EXTRA_LIBS): Added
1482         configurable settings for stand-alone simulator.
1483
1484         * configure.in: Added X11 search, just in case.
1485
1486         * configure: Regenerated.
1487
1488 Wed Mar 11 14:09:10 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1489
1490         * interp.c (sim_write, sim_read, load_memory, store_memory):
1491         Replace sim_core_*_map with read_map, write_map, exec_map resp.
1492
1493 Tue Mar  3 13:58:43 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1494
1495         * sim-main.h (GETFCC): Return an unsigned value.
1496
1497 Tue Mar  3 13:21:37 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1498
1499         * mips.igen (DIV): Fix check for -1 / MIN_INT.
1500         (DADD): Result destination is RD not RT.
1501
1502 Fri Feb 27 13:49:49 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1503
1504         * sim-main.h (HIACCESS, LOACCESS): Always define.
1505
1506         * mdmx.igen (Maxi, Mini): Rename Max, Min.
1507
1508         * interp.c (sim_info): Delete.
1509
1510 Fri Feb 27 18:41:01 1998  Doug Evans  <devans@canuck.cygnus.com>
1511
1512         * interp.c (DECLARE_OPTION_HANDLER): Use it.
1513         (mips_option_handler): New argument `cpu'.
1514         (sim_open): Update call to sim_add_option_table.
1515
1516 Wed Feb 25 18:56:22 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1517
1518         * mips.igen (CxC1): Add tracing.
1519
1520 Fri Feb 20 17:43:21 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1521
1522         * sim-main.h (Max, Min): Declare.
1523
1524         * interp.c (Max, Min): New functions.
1525
1526         * mips.igen (BC1): Add tracing.
1527
1528 Thu Feb 19 14:50:00 1998  John Metzler  <jmetzler@cygnus.com>
1529
1530         * interp.c Added memory map for stack in vr4100
1531
1532 Thu Feb 19 10:21:21 1998  Gavin Koch  <gavin@cygnus.com>
1533
1534         * interp.c (load_memory): Add missing "break"'s.
1535
1536 Tue Feb 17 12:45:35 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1537
1538         * interp.c (sim_store_register, sim_fetch_register): Pass in
1539         length parameter.  Return -1.
1540
1541 Tue Feb 10 11:57:40 1998  Ian Carmichael  <iancarm@cygnus.com>
1542
1543         * interp.c: Added hardware init hook, fixed warnings.
1544
1545 Sat Feb  7 17:16:20 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1546
1547         * Makefile.in (itable.h itable.c): Depend on SIM_@sim_gen@_ALL.
1548
1549 Tue Feb  3 11:36:02 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1550
1551         * interp.c (ifetch16): New function.
1552
1553         * sim-main.h (IMEM32): Rename IMEM.
1554         (IMEM16_IMMED): Define.
1555         (IMEM16): Define.
1556         (DELAY_SLOT): Update.
1557
1558         * m16run.c (sim_engine_run): New file.
1559
1560         * m16.igen: All instructions except LB.
1561         (LB): Call do_load_byte.
1562         * mips.igen (do_load_byte): New function.
1563         (LB): Call do_load_byte.
1564
1565         * mips.igen: Move spec for insn bit size and high bit from here.
1566         * Makefile.in (tmp-igen, tmp-m16): To here.
1567
1568         * m16.dc: New file, decode mips16 instructions.
1569
1570         * Makefile.in (SIM_NO_ALL): Define.
1571         (tmp-m16): Generate both 16 bit and 32 bit simulator engines.
1572
1573 Tue Feb  3 11:28:00 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1574
1575         * configure.in (mips_fpu_bitsize): For tx39, restrict floating
1576         point unit to 32 bit registers.
1577         * configure: Re-generate.
1578
1579 Sun Feb  1 15:47:14 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1580
1581         * configure.in (sim_use_gen): Make IGEN the default simulator
1582         generator for generic 32 and 64 bit mips targets.
1583         * configure: Re-generate.
1584
1585 Sun Feb  1 16:52:37 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1586
1587         * sim-main.h (SizeFGR): Determine from floating-point and not gpr
1588         bitsize.
1589
1590         * interp.c (sim_fetch_register, sim_store_register): Read/write
1591         FGR from correct location.
1592         (sim_open): Set size of FGR's according to
1593         WITH_TARGET_FLOATING_POINT_BITSIZE.
1594
1595         * sim-main.h (FGR): Store floating point registers in a separate
1596         array.
1597
1598 Sun Feb  1 16:47:51 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1599
1600         * configure: Regenerated to track ../common/aclocal.m4 changes.
1601
1602 Tue Feb  3 00:10:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1603
1604         * interp.c (ColdReset): Call PENDING_INVALIDATE.
1605
1606         * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Call PENDING_TICK.
1607
1608         * interp.c (pending_tick): New function.  Deliver pending writes.
1609
1610         * sim-main.h (PENDING_FILL, PENDING_TICK, PENDING_SCHED,
1611         PENDING_BIT, PENDING_INVALIDATE): Re-write pipeline code so that
1612         it can handle mixed sized quantites and single bits.
1613
1614 Mon Feb  2 17:43:15 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1615
1616         * interp.c (oengine.h): Do not include when building with IGEN.
1617         (sim_open): Replace GPRLEN by WITH_TARGET_WORD_BITSIZE.
1618         (sim_info): Ditto for PROCESSOR_64BIT.
1619         (sim_monitor): Replace ut_reg with unsigned_word.
1620         (*): Ditto for t_reg.
1621         (LOADDRMASK): Define.
1622         (sim_open): Remove defunct check that host FP is IEEE compliant,
1623         using software to emulate floating point.
1624         (value_fpr, ...): Always compile, was conditional on HASFPU.
1625
1626 Sun Feb  1 11:15:29 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1627
1628         * sim-main.h (sim_state): Make the cpu array MAX_NR_PROCESSORS in
1629         size.
1630
1631         * interp.c (SD, CPU): Define.
1632         (mips_option_handler): Set flags in each CPU.
1633         (interrupt_event): Assume CPU 0 is the one being iterrupted.
1634         (sim_close): Do not clear STATE, deleted anyway.
1635         (sim_write, sim_read): Assume CPU zero's vm should be used for
1636         data transfers.
1637         (sim_create_inferior): Set the PC for all processors.
1638         (sim_monitor, store_word, load_word, mips16_entry): Add cpu
1639         argument.
1640         (mips16_entry): Pass correct nr of args to store_word, load_word.
1641         (ColdReset): Cold reset all cpu's.
1642         (signal_exception): Pass cpu to sim_monitor & mips16_entry.
1643         (sim_monitor, load_memory, store_memory, signal_exception): Use
1644         `CPU' instead of STATE_CPU.
1645
1646
1647         * sim-main.h: Replace uses of STATE_CPU with CPU. Replace sd with
1648         SD or CPU_.
1649
1650         * sim-main.h (signal_exception): Add sim_cpu arg.
1651         (SignalException*): Pass both SD and CPU to signal_exception.
1652         * interp.c (signal_exception): Update.
1653
1654         * sim-main.h (value_fpr, store_fpr, dotrace, ifetch32), interp.c:
1655         Ditto
1656         (sync_operation, prefetch, cache_op, store_memory, load_memory,
1657         address_translation): Ditto
1658         (decode_coproc, cop_lw, cop_ld, cop_sw, cop_sd): Ditto.
1659
1660 Sat Jan 31 18:15:41 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1661
1662         * configure: Regenerated to track ../common/aclocal.m4 changes.
1663
1664 Sat Jan 31 14:49:24 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1665
1666         * interp.c (sim_engine_run): Add `nr_cpus' argument.
1667
1668         * mips.igen (model): Map processor names onto BFD name.
1669
1670         * sim-main.h (CPU_CIA): Delete.
1671         (SET_CIA, GET_CIA): Define
1672
1673 Wed Jan 21 16:16:27 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1674
1675         * sim-main.h (GPR_SET): Define, used by igen when zeroing a
1676         regiser.
1677
1678         * configure.in (default_endian): Configure a big-endian simulator
1679         by default.
1680         * configure: Re-generate.
1681
1682 Mon Jan 19 22:26:29 1998  Doug Evans  <devans@seba>
1683
1684         * configure: Regenerated to track ../common/aclocal.m4 changes.
1685
1686 Mon Jan  5 20:38:54 1998  Mark Alexander  <marka@cygnus.com>
1687
1688         * interp.c (sim_monitor): Handle Densan monitor outbyte
1689         and inbyte functions.
1690
1691 1997-12-29  Felix Lee  <flee@cygnus.com>
1692
1693         * interp.c (sim_engine_run): msvc cpp barfs on #if (a==b!=c).
1694
1695 Wed Dec 17 14:48:20 1997  Jeffrey A Law  (law@cygnus.com)
1696
1697         * Makefile.in (tmp-igen): Arrange for $zero to always be
1698         reset to zero after every instruction.
1699
1700 Mon Dec 15 23:17:11 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1701
1702         * configure: Regenerated to track ../common/aclocal.m4 changes.
1703         * config.in: Ditto.
1704
1705 Wed Dec 10 17:10:45 1997  Jeffrey A Law  (law@cygnus.com)
1706
1707         * mips.igen (MSUB): Fix to work like MADD.
1708         * gencode.c (MSUB): Similarly.
1709
1710 Thu Dec  4 09:21:05 1997  Doug Evans  <devans@canuck.cygnus.com>
1711
1712         * configure: Regenerated to track ../common/aclocal.m4 changes.
1713
1714 Wed Nov 26 11:00:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1715
1716         * mips.igen (LWC1): Correct assembler - lwc1 not swc1.
1717
1718 Sun Nov 23 01:45:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1719
1720         * sim-main.h (sim-fpu.h): Include.
1721
1722         * interp.c (convert, SquareRoot, Recip, Divide, Multiply, Sub,
1723         Add, Negate, AbsoluteValue, Equal, Less, Infinity, NaN): Rewrite
1724         using host independant sim_fpu module.
1725
1726 Thu Nov 20 19:56:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1727
1728         * interp.c (signal_exception): Report internal errors with SIGABRT
1729         not SIGQUIT.
1730
1731         * sim-main.h (C0_CONFIG): New register.
1732         (signal.h): No longer include.
1733
1734         * interp.c (decode_coproc): Allow access C0_CONFIG to register.
1735
1736 Tue Nov 18 15:33:48 1997  Doug Evans  <devans@canuck.cygnus.com>
1737
1738         * Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS).
1739
1740 Fri Nov 14 11:56:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1741
1742         * mips.igen: Tag vr5000 instructions.
1743         (ANDI): Was missing mipsIV model, fix assembler syntax.
1744         (do_c_cond_fmt): New function.
1745         (C.cond.fmt): Handle mips I-III which do not support CC field
1746         separatly.
1747         (bc1): Handle mips IV which do not have a delaed FCC separatly.
1748         (SDR): Mask paddr when BigEndianMem, not the converse as specified
1749         in IV3.2 spec.
1750         (DMULT, DMULTU): Force use of hosts 64bit multiplication.  Handle
1751         vr5000 which saves LO in a GPR separatly.
1752
1753         * configure.in (enable-sim-igen): For vr5000, select vr5000
1754         specific instructions.
1755         * configure: Re-generate.
1756
1757 Wed Nov 12 14:42:52 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1758
1759         * Makefile.in (SIM_OBJS): Add sim-fpu module.
1760
1761         * interp.c (store_fpr), sim-main.h: Add separate fmt_uninterpreted_32 and
1762         fmt_uninterpreted_64 bit cases to switch.  Convert to
1763         fmt_formatted,
1764
1765         * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Define,
1766
1767         * mips.igen (SWR): Mask paddr when BigEndianMem, not the converse
1768         as specified in IV3.2 spec.
1769         (MTC1, DMTC1): Call StoreFPR to store the GPR in the FPR.
1770
1771 Tue Nov 11 12:38:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1772
1773         * mips.igen: Delay slot branches add OFFSET to NIA not CIA.
1774         (MFC0, MTC0, SWC1, LWC1, SDC1, LDC1): Implement.
1775         (MTC1, MFC1, DMTC1, DMFC1, CFC1, CTC1): Implement separate non
1776         PENDING_FILL versions of instructions.  Simplify.
1777         (X): New function.
1778         (MULT, MULTU): Implement separate RD==0 and RD!=0 versions of
1779         instructions.
1780         (BEQZ, ..., SLT, SLTI, TLT, TLE, TLI, ...): Explicitly cast GPR to
1781         a signed value.
1782         (MTHI, MFHI): Disable code checking HI-LO.
1783
1784         * sim-main.h (dotrace,tracefh), interp.c: Make dotrace & tracefh
1785         global.
1786         (NULLIFY_NEXT_INSTRUCTION): Call dotrace.
1787
1788 Thu Nov  6 16:36:35 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1789
1790         * gencode.c (build_mips16_operands): Replace IPC with cia.
1791
1792         * interp.c (sim_monitor, signal_exception, cache_op, store_fpr,
1793         value_fpr, cop_ld, cop_lw, cop_sw, cop_sd, decode_coproc): Replace
1794         IPC to `cia'.
1795         (UndefinedResult): Replace function with macro/function
1796         combination.
1797         (sim_engine_run): Don't save PC in IPC.
1798
1799         * sim-main.h (IPC): Delete.
1800
1801
1802         * interp.c (signal_exception, store_word, load_word,
1803         address_translation, load_memory, store_memory, cache_op,
1804         prefetch, sync_operation, ifetch, value_fpr, store_fpr, convert,
1805         cop_lw, cop_ld, cop_sw, cop_sd, decode_coproc, sim_monitor): Add
1806         current instruction address - cia - argument.
1807         (sim_read, sim_write): Call address_translation directly.
1808         (sim_engine_run): Rename variable vaddr to cia.
1809         (signal_exception): Pass cia to sim_monitor
1810
1811         * sim-main.h (SignalException, LoadWord, StoreWord, CacheOp,
1812         Prefetch, SyncOperation, ValueFPR, StoreFPR, Convert, COP_LW,
1813         COP_LD, COP_SW, COP_SD, DecodeCoproc): Update.
1814
1815         * sim-main.h (SignalExceptionSimulatorFault): Delete definition.
1816         * interp.c (sim_open): Replace SignalExceptionSimulatorFault with
1817         SIM_ASSERT.
1818
1819         * interp.c (signal_exception): Pass restart address to
1820         sim_engine_restart.
1821
1822         * Makefile.in (semantics.o, engine.o, support.o, itable.o,
1823         idecode.o): Add dependency.
1824
1825         * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESUME_HOOK):
1826         Delete definitions
1827         (DELAY_SLOT): Update NIA not PC with branch address.
1828         (NULLIFY_NEXT_INSTRUCTION): Set NIA to instruction after next.
1829
1830         * mips.igen: Use CIA not PC in branch calculations.
1831         (illegal): Call SignalException.
1832         (BEQ, ADDIU): Fix assembler.
1833
1834 Wed Nov  5 12:19:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1835
1836         * m16.igen (JALX): Was missing.
1837
1838         * configure.in (enable-sim-igen): New configuration option.
1839         * configure: Re-generate.
1840
1841         * sim-main.h (MAX_INSNS, INSN_NAME): Define.
1842
1843         * interp.c (load_memory, store_memory): Delete parameter RAW.
1844         (sim_read, sim_write): Use sim_core_{read,write}_buffer directly
1845         bypassing {load,store}_memory.
1846
1847         * sim-main.h (ByteSwapMem): Delete definition.
1848
1849         * Makefile.in (SIM_OBJS): Add sim-memopt module.
1850
1851         * interp.c (sim_do_command, sim_commands): Delete mips specific
1852         commands.  Handled by module sim-options.
1853
1854         * sim-main.h (SIM_HAVE_FLATMEM): Undefine, use sim-core.o module.
1855         (WITH_MODULO_MEMORY): Define.
1856
1857         * interp.c (sim_info): Delete code printing memory size.
1858
1859         * interp.c (mips_size): Nee sim_size, delete function.
1860         (power2): Delete.
1861         (monitor, monitor_base, monitor_size): Delete global variables.
1862         (sim_open, sim_close): Delete code creating monitor and other
1863         memory regions.  Use sim-memopts module, via sim_do_commandf, to
1864         manage memory regions.
1865         (load_memory, store_memory): Use sim-core for memory model.
1866
1867         * interp.c (address_translation): Delete all memory map code
1868         except line forcing 32 bit addresses.
1869
1870 Wed Nov  5 11:21:11 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1871
1872         * sim-main.h (WITH_TRACE): Delete definition.  Enables common
1873         trace options.
1874
1875         * interp.c (logfh, logfile): Delete globals.
1876         (sim_open, sim_close): Delete code opening & closing log file.
1877         (mips_option_handler): Delete -l and -n options.
1878         (OPTION mips_options): Ditto.
1879
1880         * interp.c (OPTION mips_options): Rename option trace to dinero.
1881         (mips_option_handler): Update.
1882
1883 Wed Nov  5 09:35:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1884
1885         * interp.c (fetch_str): New function.
1886         (sim_monitor): Rewrite using sim_read & sim_write.
1887         (sim_open): Check magic number.
1888         (sim_open): Write monitor vectors into memory using sim_write.
1889         (MONITOR_BASE, MONITOR_SIZE, MEM_SIZE): Define.
1890         (sim_read, sim_write): Simplify - transfer data one byte at a
1891         time.
1892         (load_memory, store_memory): Clarify meaning of parameter RAW.
1893
1894         * sim-main.h (isHOST): Defete definition.
1895         (isTARGET): Mark as depreciated.
1896         (address_translation): Delete parameter HOST.
1897
1898         * interp.c (address_translation): Delete parameter HOST.
1899
1900 Wed Oct 29 11:13:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1901
1902         * mips.igen:
1903
1904         * Makefile.in (IGEN_INCLUDE): Files included by mips.igen.
1905         (tmp-igen, tmp-m16): Depend on IGEN_INCLUDE.
1906
1907 Tue Oct 28 11:06:47 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1908
1909         * mips.igen: Add model filter field to records.
1910
1911 Mon Oct 27 17:53:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1912
1913         * Makefile.in (SIM_NO_CFLAGS): Define.  Define WITH_IGEN=0.
1914
1915         interp.c (sim_engine_run): Do not compile function sim_engine_run
1916         when WITH_IGEN == 1.
1917
1918         * configure.in (sim_igen_flags, sim_m16_flags): Set according to
1919         target architecture.
1920
1921         Makefile.in (tmp-igen, tmp-m16): Drop -F and -M options to
1922         igen. Replace with configuration variables sim_igen_flags /
1923         sim_m16_flags.
1924
1925         * m16.igen: New file.  Copy mips16 insns here.
1926         * mips.igen: From here.
1927
1928 Mon Oct 27 13:53:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1929
1930         * Makefile.in (SIM_NO_OBJ): Define, move SIM_M16_OBJ, SIM_IGEN_OBJ
1931         to top.
1932         (tmp-igen, tmp-m16): Pass -I srcdir to igen.
1933
1934 Sat Oct 25 16:51:40 1997  Gavin Koch  <gavin@cygnus.com>
1935
1936         * gencode.c (build_instruction): Follow sim_write's lead in using
1937         BigEndianMem instead of !ByteSwapMem.
1938
1939 Fri Oct 24 17:41:49 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1940
1941         * configure.in (sim_gen): Dependent on target, select type of
1942         generator.  Always select old style generator.
1943
1944         configure: Re-generate.
1945
1946         Makefile.in (tmp-igen, tmp-m16, clean-m16, clean-igen): New
1947         targets.
1948         (SIM_M16_CFLAGS, SIM_M16_ALL, SIM_M16_OBJ, BUILT_SRC_FROM_M16,
1949         SIM_IGEN_CFLAGS, SIM_IGEN_ALL, SIM_IGEN_OBJ, BUILT_SRC_FROM_IGEN,
1950         IGEN_TRACE, IGEN_INSN, IGEN_DC): Define
1951         (SIM_EXTRA_CFLAGS, SIM_EXTRA_ALL, SIM_OBJS): Add member
1952         SIM_@sim_gen@_*, set by autoconf.
1953
1954 Wed Oct 22 12:52:06 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1955
1956         * sim-main.h (NULLIFY_NEXT_INSTRUCTION, DELAY_SLOT): Define.
1957
1958         * interp.c (ColdReset): Remove #ifdef HASFPU, check
1959         CURRENT_FLOATING_POINT instead.
1960
1961         * interp.c (ifetch32): New function. Fetch 32 bit instruction.
1962         (address_translation): Raise exception InstructionFetch when
1963         translation fails and isINSTRUCTION.
1964
1965         * interp.c (sim_open, sim_write, sim_monitor, store_word,
1966         sim_engine_run): Change type of of vaddr and paddr to
1967         address_word.
1968         (address_translation, prefetch, load_memory, store_memory,
1969         cache_op): Change type of vAddr and pAddr to address_word.
1970
1971         * gencode.c (build_instruction): Change type of vaddr and paddr to
1972         address_word.
1973
1974 Mon Oct 20 15:29:04 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1975
1976         * sim-main.h (ALU64_END, ALU32_END): Use ALU*_OVERFLOW_RESULT
1977         macro to obtain result of ALU op.
1978
1979 Tue Oct 21 17:39:14 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1980
1981         * interp.c (sim_info): Call profile_print.
1982
1983 Mon Oct 20 13:31:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1984
1985         * Makefile.in (SIM_OBJS): Add sim-profile.o module.
1986
1987         * sim-main.h (WITH_PROFILE): Do not define, defined in
1988         common/sim-config.h.  Use sim-profile module.
1989         (simPROFILE): Delete defintion.
1990
1991         * interp.c (PROFILE): Delete definition.
1992         (mips_option_handler): Delete 'p', 'y' and 'x' profile options.
1993         (sim_close): Delete code writing profile histogram.
1994         (mips_set_profile, mips_set_profile_size, writeout16, writeout32):
1995         Delete.
1996         (sim_engine_run): Delete code profiling the PC.
1997
1998 Mon Oct 20 13:31:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1999
2000         * sim-main.h (SIGNEXTEND): Force type of result to unsigned_word.
2001
2002         * interp.c (sim_monitor): Make register pointers of type
2003         unsigned_word*.
2004
2005         * sim-main.h: Make registers of type unsigned_word not
2006         signed_word.
2007
2008 Thu Oct 16 10:31:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2009
2010         * interp.c (sync_operation): Rename from SyncOperation, make
2011         global, add SD argument.
2012         (prefetch): Rename from Prefetch, make global, add SD argument.
2013         (decode_coproc): Make global.
2014
2015         * sim-main.h (SyncOperation, DecodeCoproc, Pefetch): Define.
2016
2017         * gencode.c (build_instruction): Generate DecodeCoproc not
2018         decode_coproc calls.
2019
2020         * interp.c (SETFCC, GETFCC, PREVCOC1): Move to sim-main.h
2021         (SizeFGR): Move to sim-main.h
2022         (simHALTEX, simHALTIN, simTRACE, simPROFILE, simDELAYSLOT,
2023         simSIGINT, simJALDELAYSLOT): Move to sim-main.h
2024         (FP_FLAGS, FP_ENABLE, FP_CAUSE, IR, UF, OF, DZ, IO, UO): Move to
2025         sim-main.h.
2026         (FP_FS, FP_MASK_RM, FP_SH_RM, FP_RM_NEAREST, FP_RM_TOPINF,
2027         FP_RM_TOMINF, GETRM): Move to sim-main.h.
2028         (Uncached, CachedNoncoherent, CachedCoherent, Cached,
2029         isINSTRUCTION, ..., AccessLength_BYTE, ...): Move to sim-main.h.
2030         (UserMode, BigEndianMem, ByteSwapMem, ReverseEndian,
2031         BigEndianCPU, status_KSU_mask, ...). Moved to sim-main.h
2032
2033         * sim-main.h (ALU32_END, ALU64_END): Define. When overflow raise
2034         exception.
2035         (sim-alu.h): Include.
2036         (NULLIFY_NIA, NULL_CIA, CPU_CIA): Define.
2037         (sim_cia): Typedef to instruction_address.
2038
2039 Thu Oct 16 10:31:41 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2040
2041         * Makefile.in (interp.o): Rename generated file engine.c to
2042         oengine.c.
2043
2044         * interp.c: Update.
2045
2046 Thu Oct 16 10:31:40 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2047
2048         * gencode.c (build_instruction): Use FPR_STATE not fpr_state.
2049
2050 Thu Oct 16 10:31:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2051
2052         * gencode.c (build_instruction): For "FPSQRT", output correct
2053         number of arguments to Recip.
2054
2055 Tue Oct 14 17:38:18 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2056
2057         * Makefile.in (interp.o): Depends on sim-main.h
2058
2059         * interp.c (mips16_entry, ColdReset,dotrace): Add SD argument. Use GPR not registers.
2060
2061         * sim-main.h (sim_cpu): Add registers, register_widths, fpr_state,
2062         ipc, dspc, pending_*, hiaccess, loaccess, state, dsstate fields.
2063         (REGISTERS, REGISTER_WIDTHS, FPR_STATE, IPC, DSPC, PENDING_*,
2064         STATE, DSSTATE): Define
2065         (GPR, FGRIDX, ..): Define.
2066
2067         * interp.c (registers, register_widths, fpr_state, ipc, dspc,
2068         pending_*, hiaccess, loaccess, state, dsstate): Delete globals.
2069         (GPR, FGRIDX, ...): Delete macros.
2070
2071         * interp.c: Update names to match defines from sim-main.h
2072
2073 Tue Oct 14 15:11:45 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2074
2075         * interp.c (sim_monitor): Add SD argument.
2076         (sim_warning): Delete.  Replace calls with calls to
2077         sim_io_eprintf.
2078         (sim_error): Delete. Replace calls with sim_io_error.
2079         (open_trace, writeout32, writeout16, getnum): Add SD argument.
2080         (mips_set_profile): Rename from sim_set_profile. Add SD argument.
2081         (mips_set_profile_size): Rename from sim_set_profile_size. Add SD
2082         argument.
2083         (mips_size): Rename from sim_size. Add SD argument.
2084
2085         * interp.c (simulator): Delete global variable.
2086         (callback): Delete global variable.
2087         (mips_option_handler, sim_open, sim_write, sim_read,
2088         sim_store_register, sim_fetch_register, sim_info, sim_do_command,
2089         sim_size,sim_monitor): Use sim_io_* not callback->*.
2090         (sim_open): ZALLOC simulator struct.
2091         (PROFILE): Do not define.
2092
2093 Tue Oct 14 13:35:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2094
2095         * interp.c (sim_open), support.h: Replace CHECKSIM macro found in
2096         support.h with corresponding code.
2097
2098         * sim-main.h (word64, uword64), support.h: Move definition to
2099         sim-main.h.
2100         (WORD64LO, WORD64HI, SET64LO, SET64HI, WORD64, UWORD64): Ditto.
2101
2102         * support.h: Delete
2103         * Makefile.in: Update dependencies
2104         * interp.c: Do not include.
2105
2106 Tue Oct 14 13:35:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2107
2108         * interp.c (address_translation, load_memory, store_memory,
2109         cache_op): Rename to from AddressTranslation et.al., make global,
2110         add SD argument
2111
2112         * sim-main.h (AddressTranslation, LoadMemory, StoreMemory,
2113         CacheOp): Define.
2114
2115         * interp.c (SignalException): Rename to signal_exception, make
2116         global.
2117
2118         * interp.c (Interrupt, ...): Move definitions to sim-main.h.
2119
2120         * sim-main.h (SignalException, SignalExceptionInterrupt,
2121         SignalExceptionInstructionFetch, SignalExceptionAddressStore,
2122         SignalExceptionAddressLoad, SignalExceptionSimulatorFault,
2123         SignalExceptionIntegerOverflow, SignalExceptionCoProcessorUnusable):
2124         Define.
2125
2126         * interp.c, support.h: Use.
2127
2128 Tue Oct 14 13:19:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2129
2130         * interp.c (ValueFPR, StoreFPR), sim-main.h: Make global, rename
2131         to value_fpr / store_fpr. Add SD argument.
2132         (NaN, Infinity, Less, Equal, AbsoluteValue, Negate, Add, Sub,
2133         Multiply, Divide, Recip, SquareRoot, Convert): Make global.
2134
2135         * sim-main.h (ValueFPR, StoreFPR): Define.
2136
2137 Tue Oct 14 13:06:55 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2138
2139         * interp.c (sim_engine_run): Check consistency between configure
2140         WITH_TARGET_WORD_BITSIZE and WITH_FLOATING_POINT and gensim GPRLEN
2141         and HASFPU.
2142
2143         * configure.in (mips_bitsize): Configure WITH_TARGET_WORD_BITSIZE.
2144         (mips_fpu): Configure WITH_FLOATING_POINT.
2145         (mips_endian): Configure WITH_TARGET_ENDIAN.
2146         * configure: Update.
2147
2148 Fri Oct  3 09:28:00 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2149
2150         * configure: Regenerated to track ../common/aclocal.m4 changes.
2151
2152 Mon Sep 29 14:45:00 1997  Bob Manson  <manson@charmed.cygnus.com>
2153
2154         * configure: Regenerated.
2155
2156 Fri Sep 26 12:48:18 1997  Mark Alexander  <marka@cygnus.com>
2157
2158         * interp.c: Allow Debug, DEPC, and EPC registers to be examined in GDB.
2159
2160 Thu Sep 25 11:15:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2161
2162         * gencode.c (print_igen_insn_models): Assume certain architectures
2163         include all mips* instructions.
2164         (print_igen_insn_format): Use data_size==-1 as marker for MIPS16
2165         instruction.
2166
2167         * Makefile.in (tmp.igen): Add target. Generate igen input from
2168         gencode file.
2169
2170         * gencode.c (FEATURE_IGEN): Define.
2171         (main): Add --igen option.  Generate output in igen format.
2172         (process_instructions): Format output according to igen option.
2173         (print_igen_insn_format): New function.
2174         (print_igen_insn_models): New function.
2175         (process_instructions): Only issue warnings and ignore
2176         instructions when no FEATURE_IGEN.
2177
2178 Wed Sep 24 17:38:57 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2179
2180         * interp.c (COP_SD, COP_LD): Add UNUSED to pacify GCC for some
2181         MIPS targets.
2182
2183 Tue Sep 23 11:04:38 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2184
2185         * configure: Regenerated to track ../common/aclocal.m4 changes.
2186
2187 Tue Sep 23 10:19:51 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2188
2189         * Makefile.in (SIM_ALIGNMENT, SIM_ENDIAN, SIM_HOSTENDIAN,
2190         SIM_RESERVED_BITS): Delete, moved to common.
2191         (SIM_EXTRA_CFLAGS): Update.
2192
2193 Mon Sep 22 11:46:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2194
2195         * configure.in: Configure non-strict memory alignment.
2196         * configure: Regenerated to track ../common/aclocal.m4 changes.
2197
2198 Fri Sep 19 17:45:25 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2199
2200         * configure: Regenerated to track ../common/aclocal.m4 changes.
2201
2202 Sat Sep 20 14:07:28 1997  Gavin Koch  <gavin@cygnus.com>
2203
2204         * gencode.c (SDBBP,DERET): Added (3900) insns.
2205         (RFE): Turn on for 3900.
2206         * interp.c (DebugBreakPoint,DEPC,Debug,Debug_*): Added.
2207         (dsstate): Made global.
2208         (SUBTARGET_R3900): Added.
2209         (CANCELDELAYSLOT): New.
2210         (SignalException): Ignore SystemCall rather than ignore and
2211         terminate.  Add DebugBreakPoint handling.
2212         (decode_coproc): New insns RFE, DERET; and new registers Debug
2213         and DEPC protected by SUBTARGET_R3900.
2214         (sim_engine_run): Use CANCELDELAYSLOT rather than clearing
2215         bits explicitly.
2216         * Makefile.in,configure.in: Add mips subtarget option.
2217         * configure: Update.
2218
2219 Fri Sep 19 09:33:27 1997  Gavin Koch  <gavin@cygnus.com>
2220
2221         * gencode.c: Add r3900 (tx39).
2222
2223
2224 Tue Sep 16 15:52:04 1997  Gavin Koch  <gavin@cygnus.com>
2225
2226         * gencode.c (build_instruction): Don't need to subtract 4 for
2227         JALR, just 2.
2228
2229 Tue Sep 16 11:32:28 1997  Gavin Koch  <gavin@cygnus.com>
2230
2231         * interp.c: Correct some HASFPU problems.
2232
2233 Mon Sep 15 17:36:15 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2234
2235         * configure: Regenerated to track ../common/aclocal.m4 changes.
2236
2237 Fri Sep 12 12:01:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2238
2239         * interp.c (mips_options): Fix samples option short form, should
2240         be `x'.
2241
2242 Thu Sep 11 09:35:29 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2243
2244         * interp.c (sim_info): Enable info code.  Was just returning.
2245
2246 Tue Sep  9 17:30:57 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2247
2248         * interp.c (decode_coproc): Clarify warning about unsuported MTC0,
2249         MFC0.
2250
2251 Tue Sep  9 16:28:28 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2252
2253         * gencode.c (build_instruction): Use SIGNED64 for 64 bit
2254         constants.
2255         (build_instruction): Ditto for LL.
2256
2257 Thu Sep  4 17:21:23 1997  Doug Evans  <dje@seba>
2258
2259         * configure: Regenerated to track ../common/aclocal.m4 changes.
2260
2261 Wed Aug 27 18:13:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2262
2263         * configure: Regenerated to track ../common/aclocal.m4 changes.
2264         * config.in: Ditto.
2265
2266 Wed Aug 27 14:12:27 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2267
2268         * interp.c (sim_open): Add call to sim_analyze_program, update
2269         call to sim_config.
2270
2271 Tue Aug 26 10:40:07 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2272
2273         * interp.c (sim_kill): Delete.
2274         (sim_create_inferior): Add ABFD argument. Set PC from same.
2275         (sim_load): Move code initializing trap handlers from here.
2276         (sim_open): To here.
2277         (sim_load): Delete, use sim-hload.c.
2278
2279         * Makefile.in (SIM_OBJS): Add sim-hload.o module.
2280
2281 Mon Aug 25 17:50:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2282
2283         * configure: Regenerated to track ../common/aclocal.m4 changes.
2284         * config.in: Ditto.
2285
2286 Mon Aug 25 15:59:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2287
2288         * interp.c (sim_open): Add ABFD argument.
2289         (sim_load): Move call to sim_config from here.
2290         (sim_open): To here.  Check return status.
2291
2292 Fri Jul 25 15:00:45 1997  Gavin Koch  <gavin@cygnus.com>
2293
2294         * gencode.c (build_instruction): Two arg MADD should
2295         not assign result to $0.
2296
2297 Thu Jun 26 12:13:17 1997  Angela Marie Thomas (angela@cygnus.com)
2298
2299         * sim/mips/configure: Change default_sim_endian to 0 (bi-endian)
2300         * sim/mips/configure.in: Regenerate.
2301
2302 Wed Jul  9 10:29:21 1997  Andrew Cagney  <cagney@critters.cygnus.com>
2303
2304         * interp.c (SUB_REG_UW, SUB_REG_SW, SUB_REG_*): Use more explicit
2305         signed8, unsigned8 et.al. types.
2306
2307         * interp.c (SUB_REG_FETCH): Handle both little and big endian
2308         hosts when selecting subreg.
2309
2310 Wed Jul  2 11:54:10 1997  Jeffrey A Law  (law@cygnus.com)
2311
2312         * interp.c (sim_engine_run): Reset the ZERO register to zero
2313         regardless of FEATURE_WARN_ZERO.
2314         * gencode.c (FEATURE_WARNINGS): Remove FEATURE_WARN_ZERO.
2315
2316 Wed Jun  4 10:43:14 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2317
2318         * interp.c (decode_coproc): Implement MTC0 N, CAUSE.
2319         (SignalException): For BreakPoints ignore any mode bits and just
2320         save the PC.
2321         (SignalException): Always set the CAUSE register.
2322
2323 Tue Jun  3 05:00:33 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2324
2325         * interp.c (SignalException): Clear the simDELAYSLOT flag when an
2326         exception has been taken.
2327
2328         * interp.c: Implement the ERET and mt/f sr instructions.
2329
2330 Sat May 31 00:44:16 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2331
2332         * interp.c (SignalException): Don't bother restarting an
2333         interrupt.
2334
2335 Fri May 30 23:41:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2336
2337         * interp.c (SignalException): Really take an interrupt.
2338         (interrupt_event): Only deliver interrupts when enabled.
2339
2340 Tue May 27 20:08:06 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2341
2342         * interp.c (sim_info): Only print info when verbose.
2343         (sim_info) Use sim_io_printf for output.
2344
2345 Tue May 27 14:22:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2346
2347         * interp.c (CoProcPresent): Add UNUSED attribute - not used by all
2348         mips architectures.
2349
2350 Tue May 27 14:22:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2351
2352         * interp.c (sim_do_command): Check for common commands if a
2353         simulator specific command fails.
2354
2355 Thu May 22 09:32:03 1997  Gavin Koch  <gavin@cygnus.com>
2356
2357         * interp.c (sim_engine_run): ifdef out uses of simSTOP, simSTEP
2358         and simBE when DEBUG is defined.
2359
2360 Wed May 21 09:08:10 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2361
2362         * interp.c (interrupt_event): New function.  Pass exception event
2363         onto exception handler.
2364
2365         * configure.in: Check for stdlib.h.
2366         * configure: Regenerate.
2367
2368         * gencode.c (build_instruction): Add UNUSED attribute to tempS
2369         variable declaration.
2370         (build_instruction): Initialize memval1.
2371         (build_instruction): Add UNUSED attribute to byte, bigend,
2372         reverse.
2373         (build_operands): Ditto.
2374
2375         * interp.c: Fix GCC warnings.
2376         (sim_get_quit_code): Delete.
2377
2378         * configure.in: Add INLINE, ENDIAN, HOSTENDIAN and WARNINGS.
2379         * Makefile.in: Ditto.
2380         * configure: Re-generate.
2381
2382         * Makefile.in (SIM_OBJS): Add sim-watch.o module.
2383
2384 Tue May 20 15:08:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2385
2386         * interp.c (mips_option_handler): New function parse argumes using
2387         sim-options.
2388         (myname): Replace with STATE_MY_NAME.
2389         (sim_open): Delete check for host endianness - performed by
2390         sim_config.
2391         (simHOSTBE, simBE): Delete, replaced by sim-endian flags.
2392         (sim_open): Move much of the initialization from here.
2393         (sim_load): To here.  After the image has been loaded and
2394         endianness set.
2395         (sim_open): Move ColdReset from here.
2396         (sim_create_inferior): To here.
2397         (sim_open): Make FP check less dependant on host endianness.
2398
2399         * Makefile.in (SIM_RUN_OBJS): Set to nrun.o - use new version or
2400         run.
2401         * interp.c (sim_set_callbacks): Delete.
2402
2403         * interp.c (membank, membank_base, membank_size): Replace with
2404         STATE_MEMORY, STATE_MEM_SIZE, STATE_MEM_BASE.
2405         (sim_open): Remove call to callback->init. gdb/run do this.
2406
2407         * interp.c: Update
2408
2409         * sim-main.h (SIM_HAVE_FLATMEM): Define.
2410
2411         * interp.c (big_endian_p): Delete, replaced by
2412         current_target_byte_order.
2413
2414 Tue May 20 13:55:00 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2415
2416         * interp.c (host_read_long, host_read_word, host_swap_word,
2417         host_swap_long): Delete. Using common sim-endian.
2418         (sim_fetch_register, sim_store_register): Use H2T.
2419         (pipeline_ticks): Delete.  Handled by sim-events.
2420         (sim_info): Update.
2421         (sim_engine_run): Update.
2422
2423 Tue May 20 13:42:03 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2424
2425         * interp.c (sim_stop_reason): Move code determining simEXCEPTION
2426         reason from here.
2427         (SignalException): To here. Signal using sim_engine_halt.
2428         (sim_stop_reason): Delete, moved to common.
2429
2430 Tue May 20 10:19:48 1997  Andrew Cagney  <cagney@b2.cygnus.com>
2431
2432         * interp.c (sim_open): Add callback argument.
2433         (sim_set_callbacks): Delete SIM_DESC argument.
2434         (sim_size): Ditto.
2435
2436 Mon May 19 18:20:38 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2437
2438         * Makefile.in (SIM_OBJS): Add common modules.
2439
2440         * interp.c (sim_set_callbacks): Also set SD callback.
2441         (set_endianness, xfer_*, swap_*): Delete.
2442         (host_read_word, host_read_long, host_swap_word, host_swap_long):
2443         Change to functions using sim-endian macros.
2444         (control_c, sim_stop): Delete, use common version.
2445         (simulate): Convert into.
2446         (sim_engine_run): This function.
2447         (sim_resume): Delete.
2448
2449         * interp.c (simulation): New variable - the simulator object.
2450         (sim_kind): Delete global - merged into simulation.
2451         (sim_load): Cleanup.  Move PC assignment from here.
2452         (sim_create_inferior): To here.
2453
2454         * sim-main.h: New file.
2455         * interp.c (sim-main.h): Include.
2456
2457 Thu Apr 24 00:39:51 1997  Doug Evans  <dje@canuck.cygnus.com>
2458
2459         * configure: Regenerated to track ../common/aclocal.m4 changes.
2460
2461 Wed Apr 23 17:32:19 1997  Doug Evans  <dje@canuck.cygnus.com>
2462
2463         * tconfig.in (SIM_HAVE_BIENDIAN): Define.
2464
2465 Mon Apr 21 17:16:13 1997  Gavin Koch  <gavin@cygnus.com>
2466
2467         * gencode.c (build_instruction): DIV instructions: check
2468         for division by zero and integer overflow before using
2469         host's division operation.
2470
2471 Thu Apr 17 03:18:14 1997  Doug Evans  <dje@canuck.cygnus.com>
2472
2473         * Makefile.in (SIM_OBJS): Add sim-load.o.
2474         * interp.c: #include bfd.h.
2475         (target_byte_order): Delete.
2476         (sim_kind, myname, big_endian_p): New static locals.
2477         (sim_open): Set sim_kind, myname.  Move call to set_endianness to
2478         after argument parsing.  Recognize -E arg, set endianness accordingly.
2479         (sim_load): Return SIM_RC.  New arg abfd.  Call sim_load_file to
2480         load file into simulator.  Set PC from bfd.
2481         (sim_create_inferior): Return SIM_RC.  Delete arg start_address.
2482         (set_endianness): Use big_endian_p instead of target_byte_order.
2483
2484 Wed Apr 16 17:55:37 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2485
2486         * interp.c (sim_size): Delete prototype - conflicts with
2487         definition in remote-sim.h.  Correct definition.
2488
2489 Mon Apr  7 15:45:02 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
2490
2491         * configure: Regenerated to track ../common/aclocal.m4 changes.
2492         * config.in: Ditto.
2493
2494 Wed Apr  2 15:06:28 1997  Doug Evans  <dje@canuck.cygnus.com>
2495
2496         * interp.c (sim_open): New arg `kind'.
2497
2498         * configure: Regenerated to track ../common/aclocal.m4 changes.
2499
2500 Wed Apr  2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
2501
2502         * configure: Regenerated to track ../common/aclocal.m4 changes.
2503
2504 Tue Mar 25 11:38:22 1997  Doug Evans  <dje@canuck.cygnus.com>
2505
2506         * interp.c (sim_open): Set optind to 0 before calling getopt.
2507
2508 Wed Mar 19 01:14:00 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
2509
2510         * configure: Regenerated to track ../common/aclocal.m4 changes.
2511
2512 Mon Mar 17 10:52:59 1997  Gavin Koch  <gavin@cetus.cygnus.com>
2513
2514         * interp.c : Replace uses of pr_addr with pr_uword64
2515         where the bit length is always 64 independent of SIM_ADDR.
2516         (pr_uword64) : added.
2517
2518 Mon Mar 17 15:10:07 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
2519
2520         * configure: Re-generate.
2521
2522 Fri Mar 14 10:34:11 1997  Michael Meissner  <meissner@cygnus.com>
2523
2524         * configure: Regenerate to track ../common/aclocal.m4 changes.
2525
2526 Thu Mar 13 12:51:36 1997  Doug Evans  <dje@canuck.cygnus.com>
2527
2528         * interp.c (sim_open): New SIM_DESC result.  Argument is now
2529         in argv form.
2530         (other sim_*): New SIM_DESC argument.
2531
2532 Mon Feb 24 22:47:14 1997  Dawn Perchik  <dawn@cygnus.com>
2533
2534         * interp.c: Fix printing of addresses for non-64-bit targets.
2535         (pr_addr): Add function to print address based on size.
2536
2537 Wed Feb 19 14:42:09 1997  Mark Alexander  <marka@cygnus.com>
2538
2539         * interp.c (simopen): Add support for LSI MiniRISC PMON vectors.
2540
2541 Thu Feb 13 14:08:30 1997  Ian Lance Taylor  <ian@cygnus.com>
2542
2543         * gencode.c (build_mips16_operands): Correct computation of base
2544         address for extended PC relative instruction.
2545
2546 Thu Feb  6 17:16:15 1997  Ian Lance Taylor  <ian@cygnus.com>
2547
2548         * interp.c (mips16_entry): Add support for floating point cases.
2549         (SignalException): Pass floating point cases to mips16_entry.
2550         (ValueFPR): Don't restrict fmt_single and fmt_word to even
2551         registers.
2552         (StoreFPR): Likewise.  Also, don't clobber fpr + 1 for fmt_single
2553         or fmt_word.
2554         (COP_LW): Pass fmt_word rather than fmt_uninterpreted to StoreFPR,
2555         and then set the state to fmt_uninterpreted.
2556         (COP_SW): Temporarily set the state to fmt_word while calling
2557         ValueFPR.
2558
2559 Tue Feb  4 16:48:25 1997  Ian Lance Taylor  <ian@cygnus.com>
2560
2561         * gencode.c (build_instruction): The high order may be set in the
2562         comparison flags at any ISA level, not just ISA 4.
2563
2564 Tue Feb  4 13:33:30 1997  Doug Evans  <dje@canuck.cygnus.com>
2565
2566         * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
2567         COMMON_{PRE,POST}_CONFIG_FRAG instead.
2568         * configure.in: sinclude ../common/aclocal.m4.
2569         * configure: Regenerated.
2570
2571 Fri Jan 31 11:11:45 1997  Ian Lance Taylor  <ian@cygnus.com>
2572
2573         * configure: Rebuild after change to aclocal.m4.
2574
2575 Thu Jan 23 11:46:23 1997  Stu Grossman  (grossman@critters.cygnus.com)
2576
2577         * configure configure.in Makefile.in:  Update to new configure
2578         scheme which is more compatible with WinGDB builds.
2579         * configure.in:  Improve comment on how to run autoconf.
2580         * configure:  Re-run autoconf to get new ../common/aclocal.m4.
2581         * Makefile.in:  Use autoconf substitution to install common
2582         makefile fragment.
2583
2584 Wed Jan  8 12:39:03 1997  Jim Wilson  <wilson@cygnus.com>
2585
2586         * gencode.c (build_instruction): Use BigEndianCPU instead of
2587         ByteSwapMem.
2588
2589 Thu Jan 02 22:23:04 1997  Mark Alexander  <marka@cygnus.com>
2590
2591         * interp.c (sim_monitor): Make output to stdout visible in
2592         wingdb's I/O log window.
2593
2594 Tue Dec 31 07:04:00 1996  Mark Alexander  <marka@cygnus.com>
2595
2596         * support.h: Undo previous change to SIGTRAP
2597         and SIGQUIT values.
2598
2599 Mon Dec 30 17:36:06 1996  Ian Lance Taylor  <ian@cygnus.com>
2600
2601         * interp.c (store_word, load_word): New static functions.
2602         (mips16_entry): New static function.
2603         (SignalException): Look for mips16 entry and exit instructions.
2604         (simulate): Use the correct index when setting fpr_state after
2605         doing a pending move.
2606
2607 Sun Dec 29 09:37:18 1996  Mark Alexander  <marka@cygnus.com>
2608
2609         * interp.c: Fix byte-swapping code throughout to work on
2610         both little- and big-endian hosts.
2611
2612 Sun Dec 29 09:18:32 1996  Mark Alexander  <marka@cygnus.com>
2613
2614         * support.h: Make definitions of SIGTRAP and SIGQUIT consistent
2615         with gdb/config/i386/xm-windows.h.
2616
2617 Fri Dec 27 22:48:51 1996  Mark Alexander  <marka@cygnus.com>
2618
2619         * gencode.c (build_instruction): Work around MSVC++ code gen bug
2620         that messes up arithmetic shifts.
2621
2622 Fri Dec 20 11:04:05 1996  Stu Grossman  (grossman@critters.cygnus.com)
2623
2624         * support.h:  Use _WIN32 instead of __WIN32__.  Also add defs for
2625         SIGTRAP and SIGQUIT for _WIN32.
2626
2627 Thu Dec 19 14:07:27 1996  Ian Lance Taylor  <ian@cygnus.com>
2628
2629         * gencode.c (build_instruction) [MUL]: Cast operands to word64, to
2630         force a 64 bit multiplication.
2631         (build_instruction) [OR]: In mips16 mode, don't do anything if the
2632         destination register is 0, since that is the default mips16 nop
2633         instruction.
2634
2635 Mon Dec 16 14:59:38 1996  Ian Lance Taylor  <ian@cygnus.com>
2636
2637         * gencode.c (MIPS16_DECODE): SWRASP is I8, not RI.
2638         (build_endian_shift): Don't check proc64.
2639         (build_instruction): Always set memval to uword64.  Cast op2 to
2640         uword64 when shifting it left in memory instructions.  Always use
2641         the same code for stores--don't special case proc64.
2642
2643         * gencode.c (build_mips16_operands): Fix base PC value for PC
2644         relative operands.
2645         (build_instruction): Call JALDELAYSLOT rather than DELAYSLOT for a
2646         jal instruction.
2647         * interp.c (simJALDELAYSLOT): Define.
2648         (JALDELAYSLOT): Define.
2649         (INDELAYSLOT, INJALDELAYSLOT): Define.
2650         (simulate): Clear simJALDELAYSLOT when simDELAYSLOT is cleared.
2651
2652 Tue Dec 24 22:11:20 1996  Angela Marie Thomas (angela@cygnus.com)
2653
2654         * interp.c (sim_open): add flush_cache as a PMON routine
2655         (sim_monitor): handle flush_cache by ignoring it
2656
2657 Wed Dec 11 13:53:51 1996  Jim Wilson  <wilson@cygnus.com>
2658
2659         * gencode.c (build_instruction): Use !ByteSwapMem instead of
2660         BigEndianMem.
2661         * interp.c (CONFIG, config_EP_{mask,shift,D,DxxDxx, config_BE): Delete.
2662         (BigEndianMem): Rename to ByteSwapMem and change sense.
2663         (BigEndianCPU, sim_write, LoadMemory, StoreMemory): Change
2664         BigEndianMem references to !ByteSwapMem.
2665         (set_endianness): New function, with prototype.
2666         (sim_open): Call set_endianness.
2667         (sim_info): Use simBE instead of BigEndianMem.
2668         (xfer_direct_word, xfer_direct_long, swap_direct_word,
2669         swap_direct_long, xfer_big_word, xfer_big_long, xfer_little_word,
2670         xfer_little_long, swap_word, swap_long): Delete unnecessary MSC_VER
2671         ifdefs, keeping the prototype declaration.
2672         (swap_word): Rewrite correctly.
2673         (ColdReset): Delete references to CONFIG.  Delete endianness related
2674         code; moved to set_endianness.
2675
2676 Tue Dec 10 11:32:04 1996  Jim Wilson  <wilson@cygnus.com>
2677
2678         * gencode.c (build_instruction, case JUMP): Truncate PC to 32 bits.
2679         * interp.c (CHECKHILO): Define away.
2680         (simSIGINT): New macro.
2681         (membank_size): Increase from 1MB to 2MB.
2682         (control_c): New function.
2683         (sim_resume): Rename parameter signal to signal_number.  Add local
2684         variable prev.  Call signal before and after simulate.
2685         (sim_stop_reason): Add simSIGINT support.
2686         (sim_warning, sim_error, dotrace, SignalException): Define as stdarg
2687         functions always.
2688         (sim_warning): Delete call to SignalException.  Do call printf_filtered
2689         if logfh is NULL.
2690         (AddressTranslation): Add #ifdef DEBUG around debugging message and
2691         a call to sim_warning.
2692
2693 Wed Nov 27 11:53:50 1996  Ian Lance Taylor  <ian@cygnus.com>
2694
2695         * gencode.c (process_instructions): If ! proc64, skip DOUBLEWORD
2696         16 bit instructions.
2697
2698 Tue Nov 26 11:53:12 1996  Ian Lance Taylor  <ian@cygnus.com>
2699
2700         Add support for mips16 (16 bit MIPS implementation):
2701         * gencode.c (inst_type): Add mips16 instruction encoding types.
2702         (GETDATASIZEINSN): Define.
2703         (MIPS_DECODE): Add REG flag to dsllv, dsrav, and dsrlv.  Add
2704         jalx.  Add LEFT flag to mfhi and mflo.  Add RIGHT flag to mthi and
2705         mtlo.
2706         (MIPS16_DECODE): New table, for mips16 instructions.
2707         (bitmap_val): New static function.
2708         (struct mips16_op): Define.
2709         (mips16_op_table): New table, for mips16 operands.
2710         (build_mips16_operands): New static function.
2711         (process_instructions): If PC is odd, decode a mips16
2712         instruction.  Break out instruction handling into new
2713         build_instruction function.
2714         (build_instruction): New static function, broken out of
2715         process_instructions.  Check modifiers rather than flags for SHIFT
2716         bit count and m[ft]{hi,lo} direction.
2717         (usage): Pass program name to fprintf.
2718         (main): Remove unused variable this_option_optind.  Change
2719         ``*loptarg++'' to ``loptarg++''.
2720         (my_strtoul): Parenthesize && within ||.
2721         * interp.c (LoadMemory): Accept a halfword pAddr if vAddr is odd.
2722         (simulate): If PC is odd, fetch a 16 bit instruction, and
2723         increment PC by 2 rather than 4.
2724         * configure.in: Add case for mips16*-*-*.
2725         * configure: Rebuild.
2726
2727 Fri Nov 22 08:49:36 1996  Mark Alexander  <marka@cygnus.com>
2728
2729         * interp.c: Allow -t to enable tracing in standalone simulator.
2730         Fix garbage output in trace file and error messages.
2731
2732 Wed Nov 20 01:54:37 1996  Doug Evans  <dje@canuck.cygnus.com>
2733
2734         * Makefile.in: Delete stuff moved to ../common/Make-common.in.
2735         (SIM_{OBJS,EXTRA_CFLAGS,EXTRA_CLEAN}): Define.
2736         * configure.in: Simplify using macros in ../common/aclocal.m4.
2737         * configure: Regenerated.
2738         * tconfig.in: New file.
2739
2740 Tue Nov 12 13:34:00 1996  Dawn Perchik  <dawn@cygnus.com>
2741
2742         * interp.c: Fix bugs in 64-bit port.
2743         Use ansi function declarations for msvc compiler.
2744         Initialize and test file pointer in trace code.
2745         Prevent duplicate definition of LAST_EMED_REGNUM.
2746
2747 Tue Oct 15 11:07:06 1996  Mark Alexander  <marka@cygnus.com>
2748
2749         * interp.c (xfer_big_long): Prevent unwanted sign extension.
2750
2751 Thu Sep 26 17:35:00 1996  James G. Smith  <jsmith@cygnus.co.uk>
2752
2753         * interp.c (SignalException): Check for explicit terminating
2754         breakpoint value.
2755         * gencode.c: Pass instruction value through SignalException()
2756         calls for Trap, Breakpoint and Syscall.
2757
2758 Thu Sep 26 11:35:17 1996  James G. Smith  <jsmith@cygnus.co.uk>
2759
2760         * interp.c (SquareRoot): Add HAVE_SQRT check to ensure sqrt() is
2761         only used on those hosts that provide it.
2762         * configure.in: Add sqrt() to list of functions to be checked for.
2763         * config.in: Re-generated.
2764         * configure: Re-generated.
2765
2766 Fri Sep 20 15:47:12 1996  Ian Lance Taylor  <ian@cygnus.com>
2767
2768         * gencode.c (process_instructions): Call build_endian_shift when
2769         expanding STORE RIGHT, to fix swr.
2770         * support.h (SIGNEXTEND): If the sign bit is not set, explicitly
2771         clear the high bits.
2772         * interp.c (Convert): Fix fmt_single to fmt_long to not truncate.
2773         Fix float to int conversions to produce signed values.
2774
2775 Thu Sep 19 15:34:17 1996  Ian Lance Taylor  <ian@cygnus.com>
2776
2777         * gencode.c (MIPS_DECODE): Set UNSIGNED for multu instruction.
2778         (process_instructions): Correct handling of nor instruction.
2779         Correct shift count for 32 bit shift instructions. Correct sign
2780         extension for arithmetic shifts to not shift the number of bits in
2781         the type.  Fix 64 bit multiply high word calculation.  Fix 32 bit
2782         unsigned multiply.  Fix ldxc1 and friends to use coprocessor 1.
2783         Fix madd.
2784         * interp.c (CHECKHILO): Don't set HIACCESS, LOACCESS, or HLPC.
2785         It's OK to have a mult follow a mult.  What's not OK is to have a
2786         mult follow an mfhi.
2787         (Convert): Comment out incorrect rounding code.
2788
2789 Mon Sep 16 11:38:16 1996  James G. Smith  <jsmith@cygnus.co.uk>
2790
2791         * interp.c (sim_monitor): Improved monitor printf
2792         simulation. Tidied up simulator warnings, and added "--log" option
2793         for directing warning message output.
2794         * gencode.c: Use sim_warning() rather than WARNING macro.
2795
2796 Thu Aug 22 15:03:12 1996  Ian Lance Taylor  <ian@cygnus.com>
2797
2798         * Makefile.in (gencode): Depend upon gencode.o, getopt.o, and
2799         getopt1.o, rather than on gencode.c.  Link objects together.
2800         Don't link against -liberty.
2801         (gencode.o, getopt.o, getopt1.o): New targets.
2802         * gencode.c: Include <ctype.h> and "ansidecl.h".
2803         (AND): Undefine after including "ansidecl.h".
2804         (ULONG_MAX): Define if not defined.
2805         (OP_*): Don't define macros; now defined in opcode/mips.h.
2806         (main): Call my_strtoul rather than strtoul.
2807         (my_strtoul): New static function.
2808
2809 Wed Jul 17 18:12:38 1996  Stu Grossman  (grossman@critters.cygnus.com)
2810
2811         * gencode.c (process_instructions):  Generate word64 and uword64
2812         instead of `long long' and `unsigned long long' data types.
2813         * interp.c:  #include sysdep.h to get signals, and define default
2814         for SIGBUS.
2815         * (Convert):  Work around for Visual-C++ compiler bug with type
2816         conversion.
2817         * support.h:  Make things compile under Visual-C++ by using
2818         __int64 instead of `long long'.  Change many refs to long long
2819         into word64/uword64 typedefs.
2820
2821 Wed Jun 26 12:24:55 1996  Jason Molenda  (crash@godzilla.cygnus.co.jp)
2822
2823         * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
2824         INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
2825         (docdir): Removed.
2826         * configure.in (AC_PREREQ): autoconf 2.5 or higher.
2827         (AC_PROG_INSTALL): Added.
2828         (AC_PROG_CC): Moved to before configure.host call.
2829         * configure: Rebuilt.
2830
2831 Wed Jun  5 08:28:13 1996  James G. Smith  <jsmith@cygnus.co.uk>
2832
2833         * configure.in: Define @SIMCONF@ depending on mips target.
2834         * configure: Rebuild.
2835         * Makefile.in (run): Add @SIMCONF@ to control simulator
2836         construction.
2837         * gencode.c: Change LOADDRMASK to 64bit memory model only.
2838         * interp.c: Remove some debugging, provide more detailed error
2839         messages, update memory accesses to use LOADDRMASK.
2840
2841 Mon Jun  3 11:55:03 1996  Ian Lance Taylor  <ian@cygnus.com>
2842
2843         * configure.in: Add calls to AC_CONFIG_HEADER, AC_CHECK_HEADERS,
2844         AC_CHECK_LIB, and AC_CHECK_FUNCS.  Change AC_OUTPUT to set
2845         stamp-h.
2846         * configure: Rebuild.
2847         * config.in: New file, generated by autoheader.
2848         * interp.c: Include "config.h".  Include <stdlib.h>, <string.h>,
2849         and <strings.h> if they exist.  Replace #ifdef sun with #ifdef
2850         HAVE_ANINT and HAVE_AINT, as appropriate.
2851         * Makefile.in (run): Use @LIBS@ rather than -lm.
2852         (interp.o): Depend upon config.h.
2853         (Makefile): Just rebuild Makefile.
2854         (clean): Remove stamp-h.
2855         (mostlyclean): Make the same as clean, not as distclean.
2856         (config.h, stamp-h): New targets.
2857
2858 Fri May 10 00:41:17 1996  James G. Smith  <jsmith@cygnus.co.uk>
2859
2860         * interp.c (ColdReset): Fix boolean test. Make all simulator
2861         globals static.
2862
2863 Wed May  8 15:12:58 1996  James G. Smith  <jsmith@cygnus.co.uk>
2864
2865         * interp.c (xfer_direct_word, xfer_direct_long,
2866         swap_direct_word, swap_direct_long, xfer_big_word,
2867         xfer_big_long, xfer_little_word, xfer_little_long,
2868         swap_word,swap_long): Added.
2869         * interp.c (ColdReset): Provide function indirection to
2870         host<->simulated_target transfer routines.
2871         * interp.c (sim_store_register, sim_fetch_register): Updated to
2872         make use of indirected transfer routines.
2873
2874 Fri Apr 19 15:48:24 1996  James G. Smith  <jsmith@cygnus.co.uk>
2875
2876         * gencode.c (process_instructions): Ensure FP ABS instruction
2877         recognised.
2878         * interp.c (AbsoluteValue): Add routine. Also provide simple PMON
2879         system call support.
2880
2881 Wed Apr 10 09:51:38 1996  James G. Smith  <jsmith@cygnus.co.uk>
2882
2883         * interp.c (sim_do_command): Complain if callback structure not
2884         initialised.
2885
2886 Thu Mar 28 13:50:51 1996  James G. Smith  <jsmith@cygnus.co.uk>
2887
2888         * interp.c (Convert): Provide round-to-nearest and round-to-zero
2889         support for Sun hosts.
2890         * Makefile.in (gencode): Ensure the host compiler and libraries
2891         used for cross-hosted build.
2892
2893 Wed Mar 27 14:42:12 1996  James G. Smith  <jsmith@cygnus.co.uk>
2894
2895         * interp.c, gencode.c: Some more (TODO) tidying.
2896
2897 Thu Mar  7 11:19:33 1996  James G. Smith  <jsmith@cygnus.co.uk>
2898
2899         * gencode.c, interp.c: Replaced explicit long long references with
2900         WORD64HI, WORD64LO, SET64HI and SET64LO macro calls.
2901         * support.h (SET64LO, SET64HI): Macros added.
2902
2903 Wed Feb 21 12:16:21 1996  Ian Lance Taylor  <ian@cygnus.com>
2904
2905         * configure: Regenerate with autoconf 2.7.
2906
2907 Tue Jan 30 08:48:18 1996  Fred Fish  <fnf@cygnus.com>
2908
2909         * interp.c (LoadMemory): Enclose text following #endif in /* */.
2910         * support.h: Remove superfluous "1" from #if.
2911         * support.h (CHECKSIM): Remove stray 'a' at end of line.
2912
2913 Mon Dec  4 11:44:40 1995  Jamie Smith  <jsmith@cygnus.com>
2914
2915         * interp.c (StoreFPR): Control UndefinedResult() call on
2916         WARN_RESULT manifest.
2917
2918 Fri Dec  1 16:37:19 1995  James G. Smith  <jsmith@cygnus.co.uk>
2919
2920         * gencode.c: Tidied instruction decoding, and added FP instruction
2921         support.
2922
2923         * interp.c: Added dineroIII, and BSD profiling support. Also
2924         run-time FP handling.
2925
2926 Sun Oct 22 00:57:18 1995  James G. Smith  <jsmith@pasanda.cygnus.co.uk>
2927
2928         * Changelog, Makefile.in, README.Cygnus, configure, configure.in,
2929         gencode.c, interp.c, support.h: created.