sim/mips/ChangeLog

   1 Tue Feb  3 11:36:02 1998  Andrew Cagney  <cagney@b1.cygnus.com>
   2
   3         * interp.c (ifetch16): New function.
   4
   5         * sim-main.h (IMEM32): Rename IMEM.
   6         (IMEM16_IMMED): Define.
   7         (IMEM16): Define.
   8         (DELAY_SLOT): Update.
   9
  10         * m16run.c (sim_engine_run): New file.
  11
  12         * m16.igen: All instructions except LB.
  13         (LB): Call do_load_byte.
  14         * mips.igen (do_load_byte): New function.
  15         (LB): Call do_load_byte.
  16
  17         * mips.igen: Move spec for insn bit size and high bit from here.
  18         * Makefile.in (tmp-igen, tmp-m16): To here.
  19
  20         * m16.dc: New file, decode mips16 instructions.
  21
  22         * Makefile.in (SIM_NO_ALL): Define.
  23         (tmp-m16): Generate both 16 bit and 32 bit simulator engines.
  24
  25 start-sanitize-tx19
  26         * m16.igen: Mark all mips16 insns as being part of the tx19 insn
  27         set.
  28
  29 end-sanitize-tx19
  30 Tue Feb  3 11:28:00 1998  Andrew Cagney  <cagney@b1.cygnus.com>
  31
  32         * configure.in (mips_fpu_bitsize): For tx39, restrict floating
  33         point unit to 32 bit registers.
  34         * configure: Re-generate.
  35
  36 Sun Feb  1 15:47:14 1998  Andrew Cagney  <cagney@b1.cygnus.com>
  37
  38         * configure.in (sim_use_gen): Make IGEN the default simulator
  39         generator for generic 32 and 64 bit mips targets.
  40         * configure: Re-generate.
  41
  42 Sun Feb  1 16:52:37 1998  Andrew Cagney  <cagney@b1.cygnus.com>
  43
  44         * sim-main.h (SizeFGR): Determine from floating-point and not gpr
  45         bitsize.
  46
  47         * interp.c (sim_fetch_register, sim_store_register): Read/write
  48         FGR from correct location.
  49         (sim_open): Set size of FGR's according to
  50         WITH_TARGET_FLOATING_POINT_BITSIZE.
  51
  52         * sim-main.h (FGR): Store floating point registers in a separate
  53         array.
  54
  55 Sun Feb  1 16:47:51 1998  Andrew Cagney  <cagney@b1.cygnus.com>
  56
  57         * configure: Regenerated to track ../common/aclocal.m4 changes.
  58
  59 start-sanitize-vr5400
  60         * mdmx.igen: Mark all instructions as 64bit/fp specific.
  61
  62 end-sanitize-vr5400
  63 Tue Feb  3 00:10:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
  64
  65         * interp.c (ColdReset): Call PENDING_INVALIDATE.
  66
  67         * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Call PENDING_TICK.
  68
  69         * interp.c (pending_tick): New function.  Deliver pending writes.
  70
  71         * sim-main.h (PENDING_FILL, PENDING_TICK, PENDING_SCHED,
  72         PENDING_BIT, PENDING_INVALIDATE): Re-write pipeline code so that
  73         it can handle mixed sized quantites and single bits.
  74
  75 Mon Feb  2 17:43:15 1998  Andrew Cagney  <cagney@b1.cygnus.com>
  76
  77         * interp.c (oengine.h): Do not include when building with IGEN.
  78         (sim_open): Replace GPRLEN by WITH_TARGET_WORD_BITSIZE.
  79         (sim_info): Ditto for PROCESSOR_64BIT.
  80         (sim_monitor): Replace ut_reg with unsigned_word.
  81         (*): Ditto for t_reg.
  82         (LOADDRMASK): Define.
  83         (sim_open): Remove defunct check that host FP is IEEE compliant,
  84         using software to emulate floating point.
  85         (value_fpr, ...): Always compile, was conditional on HASFPU.
  86
  87 Sun Feb  1 11:15:29 1998  Andrew Cagney  <cagney@b1.cygnus.com>
  88
  89         * sim-main.h (sim_state): Make the cpu array MAX_NR_PROCESSORS in
  90         size.
  91
  92         * interp.c (SD, CPU): Define.
  93         (mips_option_handler): Set flags in each CPU.
  94         (interrupt_event): Assume CPU 0 is the one being iterrupted.
  95         (sim_close): Do not clear STATE, deleted anyway.
  96         (sim_write, sim_read): Assume CPU zero's vm should be used for
  97         data transfers.
  98         (sim_create_inferior): Set the PC for all processors.
  99         (sim_monitor, store_word, load_word, mips16_entry): Add cpu
 100         argument.
 101         (mips16_entry): Pass correct nr of args to store_word, load_word.
 102         (ColdReset): Cold reset all cpu's.
 103         (signal_exception): Pass cpu to sim_monitor & mips16_entry.
 104         (sim_monitor, load_memory, store_memory, signal_exception): Use
 105         `CPU' instead of STATE_CPU.
 106
 107
 108         * sim-main.h: Replace uses of STATE_CPU with CPU. Replace sd with
 109         SD or CPU_.
 110
 111         * sim-main.h (signal_exception): Add sim_cpu arg.
 112         (SignalException*): Pass both SD and CPU to signal_exception.
 113         * interp.c (signal_exception): Update.
 114
 115         * sim-main.h (value_fpr, store_fpr, dotrace, ifetch32), interp.c:
 116         Ditto
 117         (sync_operation, prefetch, cache_op, store_memory, load_memory,
 118         address_translation): Ditto
 119         (decode_coproc, cop_lw, cop_ld, cop_sw, cop_sd): Ditto.
 120
 121 start-sanitize-vr5400
 122         * mdmx.igen (get_scale): Pass CPU_ to semantic_illegal instead of
 123         `sd'.
 124         (ByteAlign): Use StoreFPR, pass args in correct order.
 125
 126 end-sanitize-vr5400
 127 start-sanitize-r5900
 128 Sun Feb  1 10:59:55 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 129
 130         * configure.in (sim_igen_filter): For r5900, configure as SMP.
 131
 132 end-sanitize-r5900
 133 Sat Jan 31 18:15:41 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 134
 135         * configure: Regenerated to track ../common/aclocal.m4 changes.
 136
 137 Sat Jan 31 14:49:24 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 138
 139 start-sanitize-r5900
 140         * configure.in (sim_igen_filter): For r5900, use igen.
 141         * configure: Re-generate.
 142
 143 end-sanitize-r5900
 144         * interp.c (sim_engine_run): Add `nr_cpus' argument.
 145
 146         * mips.igen (model): Map processor names onto BFD name.
 147
 148         * sim-main.h (CPU_CIA): Delete.
 149         (SET_CIA, GET_CIA): Define
 150
 151 Wed Jan 21 16:16:27 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 152
 153         * sim-main.h (GPR_SET): Define, used by igen when zeroing a
 154         regiser.
 155
 156         * configure.in (default_endian): Configure a big-endian simulator
 157         by default.
 158         * configure: Re-generate.
 159
 160 Mon Jan 19 22:26:29 1998  Doug Evans  <devans@seba>
 161
 162         * configure: Regenerated to track ../common/aclocal.m4 changes.
 163
 164 Mon Jan  5 20:38:54 1998  Mark Alexander  <marka@cygnus.com>
 165
 166         * interp.c (sim_monitor): Handle Densan monitor outbyte
 167         and inbyte functions.
 168
 169 1997-12-29  Felix Lee  <flee@cygnus.com>
 170
 171         * interp.c (sim_engine_run): msvc cpp barfs on #if (a==b!=c).
 172
 173 Wed Dec 17 14:48:20 1997  Jeffrey A Law  (law@cygnus.com)
 174
 175         * Makefile.in (tmp-igen): Arrange for $zero to always be
 176         reset to zero after every instruction.
 177
 178 Mon Dec 15 23:17:11 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 179
 180         * configure: Regenerated to track ../common/aclocal.m4 changes.
 181         * config.in: Ditto.
 182
 183 start-sanitize-vr5400
 184 Sat Dec 13 15:18:51 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 185
 186         * vr5400.igen (Low32Bits, High32Bits): Sign extend extracted 32
 187         bit values.
 188
 189 end-sanitize-vr5400
 190 start-sanitize-vr5400
 191 Fri Dec 12 12:26:07 1997  Jeffrey A Law  (law@cygnus.com)
 192
 193         * configure.in (sim_igen_filter): Multi-sim vr5000 - vr5000 or
 194         vr5400 with the vr5000 as the default.
 195
 196 end-sanitize-vr5400
 197 Wed Dec 10 17:10:45 1997  Jeffrey A Law  (law@cygnus.com)
 198
 199         * mips.igen (MSUB): Fix to work like MADD.
 200         * gencode.c (MSUB): Similarly.
 201
 202 start-sanitize-vr5400
 203 Tue Dec  9 12:02:12 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 204
 205         * configure.in (sim_igen_filter): Multi-sim vr5400 - vr5000 or
 206         vr5400.
 207
 208 end-sanitize-vr5400
 209 Thu Dec  4 09:21:05 1997  Doug Evans  <devans@canuck.cygnus.com>
 210
 211         * configure: Regenerated to track ../common/aclocal.m4 changes.
 212
 213 Wed Nov 26 11:00:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 214
 215         * mips.igen (LWC1): Correct assembler - lwc1 not swc1.
 216
 217 start-sanitize-vr5400
 218         * mdmx.igen (value_vr): Correct sim_io_eprintf format argument.
 219         (value_cc, store_cc): Implement.
 220
 221         * sim-main.h: Add 8*3*8 bit accumulator.
 222
 223         * vr5400.igen: Move mdmx instructins from here
 224         * mdmx.igen: To here - new file. Add/fix missing instructions.
 225         * mips.igen: Include mdmx.igen.
 226         * Makefile.in (IGEN_INCLUDE): Add mdmx.igen.
 227
 228 end-sanitize-vr5400
 229 Sun Nov 23 01:45:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 230
 231         * sim-main.h (sim-fpu.h): Include.
 232
 233         * interp.c (convert, SquareRoot, Recip, Divide, Multiply, Sub,
 234         Add, Negate, AbsoluteValue, Equal, Less, Infinity, NaN): Rewrite
 235         using host independant sim_fpu module.
 236
 237 Thu Nov 20 19:56:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 238
 239         * interp.c (signal_exception): Report internal errors with SIGABRT
 240         not SIGQUIT.
 241
 242         * sim-main.h (C0_CONFIG): New register.
 243         (signal.h): No longer include.
 244
 245         * interp.c (decode_coproc): Allow access C0_CONFIG to register.
 246
 247 Tue Nov 18 15:33:48 1997  Doug Evans  <devans@canuck.cygnus.com>
 248
 249         * Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS).
 250
 251 Fri Nov 14 11:56:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 252
 253         * mips.igen: Tag vr5000 instructions.
 254         (ANDI): Was missing mipsIV model, fix assembler syntax.
 255         (do_c_cond_fmt): New function.
 256         (C.cond.fmt): Handle mips I-III which do not support CC field
 257         separatly.
 258         (bc1): Handle mips IV which do not have a delaed FCC separatly.
 259         (SDR): Mask paddr when BigEndianMem, not the converse as specified
 260         in IV3.2 spec.
 261         (DMULT, DMULTU): Force use of hosts 64bit multiplication.  Handle
 262         vr5000 which saves LO in a GPR separatly.
 263
 264         * configure.in (enable-sim-igen): For vr5000, select vr5000
 265         specific instructions.
 266         * configure: Re-generate.
 267
 268 Wed Nov 12 14:42:52 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 269
 270         * Makefile.in (SIM_OBJS): Add sim-fpu module.
 271
 272         * interp.c (store_fpr), sim-main.h: Add separate fmt_uninterpreted_32 and
 273         fmt_uninterpreted_64 bit cases to switch.  Convert to
 274         fmt_formatted,
 275
 276         * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Define,
 277
 278         * mips.igen (SWR): Mask paddr when BigEndianMem, not the converse
 279         as specified in IV3.2 spec.
 280         (MTC1, DMTC1): Call StoreFPR to store the GPR in the FPR.
 281
 282 Tue Nov 11 12:38:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 283
 284         * mips.igen: Delay slot branches add OFFSET to NIA not CIA.
 285         (MFC0, MTC0, SWC1, LWC1, SDC1, LDC1): Implement.
 286         (start-sanitize-r5900):
 287         (LWXC1, SWXC1): Delete from r5900 instruction set.
 288         (end-sanitize-r5900):
 289         (MTC1, MFC1, DMTC1, DMFC1, CFC1, CTC1): Implement separate non
 290         PENDING_FILL versions of instructions.  Simplify.
 291         (X): New function.
 292         (MULT, MULTU): Implement separate RD==0 and RD!=0 versions of
 293         instructions.
 294         (BEQZ, ..., SLT, SLTI, TLT, TLE, TLI, ...): Explicitly cast GPR to
 295         a signed value.
 296         (MTHI, MFHI): Disable code checking HI-LO.
 297
 298         * sim-main.h (dotrace,tracefh), interp.c: Make dotrace & tracefh
 299         global.
 300         (NULLIFY_NEXT_INSTRUCTION): Call dotrace.
 301
 302 Thu Nov  6 16:36:35 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 303
 304         * gencode.c (build_mips16_operands): Replace IPC with cia.
 305
 306         * interp.c (sim_monitor, signal_exception, cache_op, store_fpr,
 307         value_fpr, cop_ld, cop_lw, cop_sw, cop_sd, decode_coproc): Replace
 308         IPC to `cia'.
 309         (UndefinedResult): Replace function with macro/function
 310         combination.
 311         (sim_engine_run): Don't save PC in IPC.
 312
 313         * sim-main.h (IPC): Delete.
 314
 315         start-sanitize-vr5400
 316         * vr5400.igen (vr): Add missing cia argument to value_fpr.
 317         (do_select): Rename function select.
 318         end-sanitize-vr5400
 319
 320         * interp.c (signal_exception, store_word, load_word,
 321         address_translation, load_memory, store_memory, cache_op,
 322         prefetch, sync_operation, ifetch, value_fpr, store_fpr, convert,
 323         cop_lw, cop_ld, cop_sw, cop_sd, decode_coproc, sim_monitor): Add
 324         current instruction address - cia - argument.
 325         (sim_read, sim_write): Call address_translation directly.
 326         (sim_engine_run): Rename variable vaddr to cia.
 327         (signal_exception): Pass cia to sim_monitor
 328
 329         * sim-main.h (SignalException, LoadWord, StoreWord, CacheOp,
 330         Prefetch, SyncOperation, ValueFPR, StoreFPR, Convert, COP_LW,
 331         COP_LD, COP_SW, COP_SD, DecodeCoproc): Update.
 332
 333         * sim-main.h (SignalExceptionSimulatorFault): Delete definition.
 334         * interp.c (sim_open): Replace SignalExceptionSimulatorFault with
 335         SIM_ASSERT.
 336
 337         * interp.c (signal_exception): Pass restart address to
 338         sim_engine_restart.
 339
 340         * Makefile.in (semantics.o, engine.o, support.o, itable.o,
 341         idecode.o): Add dependency.
 342
 343         * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESUME_HOOK):
 344         Delete definitions
 345         (DELAY_SLOT): Update NIA not PC with branch address.
 346         (NULLIFY_NEXT_INSTRUCTION): Set NIA to instruction after next.
 347
 348         * mips.igen: Use CIA not PC in branch calculations.
 349         (illegal): Call SignalException.
 350         (BEQ, ADDIU): Fix assembler.
 351
 352 Wed Nov  5 12:19:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 353
 354         * m16.igen (JALX): Was missing.
 355
 356         * configure.in (enable-sim-igen): New configuration option.
 357         * configure: Re-generate.
 358
 359         * sim-main.h (MAX_INSNS, INSN_NAME): Define.
 360
 361         * interp.c (load_memory, store_memory): Delete parameter RAW.
 362         (sim_read, sim_write): Use sim_core_{read,write}_buffer directly
 363         bypassing {load,store}_memory.
 364
 365         * sim-main.h (ByteSwapMem): Delete definition.
 366
 367         * Makefile.in (SIM_OBJS): Add sim-memopt module.
 368
 369         * interp.c (sim_do_command, sim_commands): Delete mips specific
 370         commands.  Handled by module sim-options.
 371
 372         * sim-main.h (SIM_HAVE_FLATMEM): Undefine, use sim-core.o module.
 373         (WITH_MODULO_MEMORY): Define.
 374
 375         * interp.c (sim_info): Delete code printing memory size.
 376
 377         * interp.c (mips_size): Nee sim_size, delete function.
 378         (power2): Delete.
 379         (monitor, monitor_base, monitor_size): Delete global variables.
 380         (sim_open, sim_close): Delete code creating monitor and other
 381         memory regions.  Use sim-memopts module, via sim_do_commandf, to
 382         manage memory regions.
 383         (load_memory, store_memory): Use sim-core for memory model.
 384
 385         * interp.c (address_translation): Delete all memory map code
 386         except line forcing 32 bit addresses.
 387
 388 Wed Nov  5 11:21:11 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 389
 390         * sim-main.h (WITH_TRACE): Delete definition.  Enables common
 391         trace options.
 392
 393         * interp.c (logfh, logfile): Delete globals.
 394         (sim_open, sim_close): Delete code opening & closing log file.
 395         (mips_option_handler): Delete -l and -n options.
 396         (OPTION mips_options): Ditto.
 397
 398         * interp.c (OPTION mips_options): Rename option trace to dinero.
 399         (mips_option_handler): Update.
 400
 401 Wed Nov  5 09:35:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 402
 403         * interp.c (fetch_str): New function.
 404         (sim_monitor): Rewrite using sim_read & sim_write.
 405         (sim_open): Check magic number.
 406         (sim_open): Write monitor vectors into memory using sim_write.
 407         (MONITOR_BASE, MONITOR_SIZE, MEM_SIZE): Define.
 408         (sim_read, sim_write): Simplify - transfer data one byte at a
 409         time.
 410         (load_memory, store_memory): Clarify meaning of parameter RAW.
 411
 412         * sim-main.h (isHOST): Defete definition.
 413         (isTARGET): Mark as depreciated.
 414         (address_translation): Delete parameter HOST.
 415
 416         * interp.c (address_translation): Delete parameter HOST.
 417
 418 start-sanitize-tx49
 419 Wed Oct 29 14:21:32 1997  Gavin Koch  <gavin@cygnus.com>
 420
 421         * gencode.c: Add tx49 configury and insns.
 422         * configure.in: Add tx49 configury.
 423         * configure: Update.
 424
 425 end-sanitize-tx49
 426 Wed Oct 29 11:13:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 427
 428         * mips.igen:
 429
 430         * Makefile.in (IGEN_INCLUDE): Files included by mips.igen.
 431         (tmp-igen, tmp-m16): Depend on IGEN_INCLUDE.
 432
 433 Tue Oct 28 11:06:47 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 434
 435         * mips.igen: Add model filter field to records.
 436
 437 Mon Oct 27 17:53:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 438
 439         * Makefile.in (SIM_NO_CFLAGS): Define.  Define WITH_IGEN=0.
 440
 441         interp.c (sim_engine_run): Do not compile function sim_engine_run
 442         when WITH_IGEN == 1.
 443
 444         * configure.in (sim_igen_flags, sim_m16_flags): Set according to
 445         target architecture.
 446
 447         Makefile.in (tmp-igen, tmp-m16): Drop -F and -M options to
 448         igen. Replace with configuration variables sim_igen_flags /
 449         sim_m16_flags.
 450
 451         start-sanitize-r5900
 452         * r5900.igen: New file. Copy r5900 insns here.
 453         end-sanitize-r5900
 454         start-sanitize-vr5400
 455         * vr5400.igen: New file.
 456         end-sanitize-vr5400
 457         * m16.igen: New file.  Copy mips16 insns here.
 458         * mips.igen: From here.
 459
 460 Mon Oct 27 13:53:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 461
 462         start-sanitize-vr5400
 463         * mips.igen: Tag all mipsIV instructions with vr5400 model.
 464
 465         * configure.in: Add mips64vr5400 target.
 466         * configure: Re-generate.
 467
 468         end-sanitize-vr5400
 469         * Makefile.in (SIM_NO_OBJ): Define, move SIM_M16_OBJ, SIM_IGEN_OBJ
 470         to top.
 471         (tmp-igen, tmp-m16): Pass -I srcdir to igen.
 472
 473 Sat Oct 25 16:51:40 1997  Gavin Koch  <gavin@cygnus.com>
 474
 475         * gencode.c (build_instruction): Follow sim_write's lead in using
 476         BigEndianMem instead of !ByteSwapMem.
 477
 478 Fri Oct 24 17:41:49 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 479
 480         * configure.in (sim_gen): Dependent on target, select type of
 481         generator.  Always select old style generator.
 482
 483         configure: Re-generate.
 484
 485         Makefile.in (tmp-igen, tmp-m16, clean-m16, clean-igen): New
 486         targets.
 487         (SIM_M16_CFLAGS, SIM_M16_ALL, SIM_M16_OBJ, BUILT_SRC_FROM_M16,
 488         SIM_IGEN_CFLAGS, SIM_IGEN_ALL, SIM_IGEN_OBJ, BUILT_SRC_FROM_IGEN,
 489         IGEN_TRACE, IGEN_INSN, IGEN_DC): Define
 490         (SIM_EXTRA_CFLAGS, SIM_EXTRA_ALL, SIM_OBJS): Add member
 491         SIM_@sim_gen@_*, set by autoconf.
 492
 493 Wed Oct 22 12:52:06 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 494
 495         * sim-main.h (NULLIFY_NEXT_INSTRUCTION, DELAY_SLOT): Define.
 496
 497         * interp.c (ColdReset): Remove #ifdef HASFPU, check
 498         CURRENT_FLOATING_POINT instead.
 499
 500         * interp.c (ifetch32): New function. Fetch 32 bit instruction.
 501         (address_translation): Raise exception InstructionFetch when
 502         translation fails and isINSTRUCTION.
 503
 504         * interp.c (sim_open, sim_write, sim_monitor, store_word,
 505         sim_engine_run): Change type of of vaddr and paddr to
 506         address_word.
 507         (address_translation, prefetch, load_memory, store_memory,
 508         cache_op): Change type of vAddr and pAddr to address_word.
 509
 510         * gencode.c (build_instruction): Change type of vaddr and paddr to
 511         address_word.
 512
 513 Mon Oct 20 15:29:04 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 514
 515         * sim-main.h (ALU64_END, ALU32_END): Use ALU*_OVERFLOW_RESULT
 516         macro to obtain result of ALU op.
 517
 518 Tue Oct 21 17:39:14 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 519
 520         * interp.c (sim_info): Call profile_print.
 521
 522 Mon Oct 20 13:31:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 523
 524         * Makefile.in (SIM_OBJS): Add sim-profile.o module.
 525
 526         * sim-main.h (WITH_PROFILE): Do not define, defined in
 527         common/sim-config.h.  Use sim-profile module.
 528         (simPROFILE): Delete defintion.
 529
 530         * interp.c (PROFILE): Delete definition.
 531         (mips_option_handler): Delete 'p', 'y' and 'x' profile options.
 532         (sim_close): Delete code writing profile histogram.
 533         (mips_set_profile, mips_set_profile_size, writeout16, writeout32):
 534         Delete.
 535         (sim_engine_run): Delete code profiling the PC.
 536
 537 Mon Oct 20 13:31:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 538
 539         * sim-main.h (SIGNEXTEND): Force type of result to unsigned_word.
 540
 541         * interp.c (sim_monitor): Make register pointers of type
 542         unsigned_word*.
 543
 544         * sim-main.h: Make registers of type unsigned_word not
 545         signed_word.
 546
 547 Thu Oct 16 10:31:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 548
 549 start-sanitize-r5900
 550         * sim-main.h (BYTES_IN_MMI_REGS, ..., SUB_REG_FETCH, ..., GPR_SB,
 551         ...): Move to sim-main.h
 552
 553 end-sanitize-r5900
 554         * interp.c (sync_operation): Rename from SyncOperation, make
 555         global, add SD argument.
 556         (prefetch): Rename from Prefetch, make global, add SD argument.
 557         (decode_coproc): Make global.
 558
 559         * sim-main.h (SyncOperation, DecodeCoproc, Pefetch): Define.
 560
 561         * gencode.c (build_instruction): Generate DecodeCoproc not
 562         decode_coproc calls.
 563
 564         * interp.c (SETFCC, GETFCC, PREVCOC1): Move to sim-main.h
 565         (SizeFGR): Move to sim-main.h
 566         (simHALTEX, simHALTIN, simTRACE, simPROFILE, simDELAYSLOT,
 567         simSIGINT, simJALDELAYSLOT): Move to sim-main.h
 568         (FP_FLAGS, FP_ENABLE, FP_CAUSE, IR, UF, OF, DZ, IO, UO): Move to
 569         sim-main.h.
 570         (FP_FS, FP_MASK_RM, FP_SH_RM, FP_RM_NEAREST, FP_RM_TOPINF,
 571         FP_RM_TOMINF, GETRM): Move to sim-main.h.
 572         (Uncached, CachedNoncoherent, CachedCoherent, Cached,
 573         isINSTRUCTION, ..., AccessLength_BYTE, ...): Move to sim-main.h.
 574         (UserMode, BigEndianMem, ByteSwapMem, ReverseEndian,
 575         BigEndianCPU, status_KSU_mask, ...). Moved to sim-main.h
 576
 577         * sim-main.h (ALU32_END, ALU64_END): Define. When overflow raise
 578         exception.
 579         (sim-alu.h): Include.
 580         (NULLIFY_NIA, NULL_CIA, CPU_CIA): Define.
 581         (sim_cia): Typedef to instruction_address.
 582
 583 Thu Oct 16 10:31:41 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 584
 585         * Makefile.in (interp.o): Rename generated file engine.c to
 586         oengine.c.
 587
 588         * interp.c: Update.
 589
 590 Thu Oct 16 10:31:40 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 591
 592         * gencode.c (build_instruction): Use FPR_STATE not fpr_state.
 593
 594 Thu Oct 16 10:31:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 595
 596         * gencode.c (build_instruction): For "FPSQRT", output correct
 597         number of arguments to Recip.
 598
 599 Tue Oct 14 17:38:18 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 600
 601         * Makefile.in (interp.o): Depends on sim-main.h
 602
 603         * interp.c (mips16_entry, ColdReset,dotrace): Add SD argument. Use GPR not registers.
 604
 605         * sim-main.h (sim_cpu): Add registers, register_widths, fpr_state,
 606         ipc, dspc, pending_*, hiaccess, loaccess, state, dsstate fields.
 607         (REGISTERS, REGISTER_WIDTHS, FPR_STATE, IPC, DSPC, PENDING_*,
 608         STATE, DSSTATE): Define
 609         (GPR, FGRIDX, ..): Define.
 610
 611         * interp.c (registers, register_widths, fpr_state, ipc, dspc,
 612         pending_*, hiaccess, loaccess, state, dsstate): Delete globals.
 613         (GPR, FGRIDX, ...): Delete macros.
 614
 615         * interp.c: Update names to match defines from sim-main.h
 616
 617 Tue Oct 14 15:11:45 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 618
 619         * interp.c (sim_monitor): Add SD argument.
 620         (sim_warning): Delete.  Replace calls with calls to
 621         sim_io_eprintf.
 622         (sim_error): Delete. Replace calls with sim_io_error.
 623         (open_trace, writeout32, writeout16, getnum): Add SD argument.
 624         (mips_set_profile): Rename from sim_set_profile. Add SD argument.
 625         (mips_set_profile_size): Rename from sim_set_profile_size. Add SD
 626         argument.
 627         (mips_size): Rename from sim_size. Add SD argument.
 628
 629         * interp.c (simulator): Delete global variable.
 630         (callback): Delete global variable.
 631         (mips_option_handler, sim_open, sim_write, sim_read,
 632         sim_store_register, sim_fetch_register, sim_info, sim_do_command,
 633         sim_size,sim_monitor): Use sim_io_* not callback->*.
 634         (sim_open): ZALLOC simulator struct.
 635         (PROFILE): Do not define.
 636
 637 Tue Oct 14 13:35:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 638
 639         * interp.c (sim_open), support.h: Replace CHECKSIM macro found in
 640         support.h with corresponding code.
 641
 642         * sim-main.h (word64, uword64), support.h: Move definition to
 643         sim-main.h.
 644         (WORD64LO, WORD64HI, SET64LO, SET64HI, WORD64, UWORD64): Ditto.
 645
 646         * support.h: Delete
 647         * Makefile.in: Update dependencies
 648         * interp.c: Do not include.
 649
 650 Tue Oct 14 13:35:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 651
 652         * interp.c (address_translation, load_memory, store_memory,
 653         cache_op): Rename to from AddressTranslation et.al., make global,
 654         add SD argument
 655
 656         * sim-main.h (AddressTranslation, LoadMemory, StoreMemory,
 657         CacheOp): Define.
 658
 659         * interp.c (SignalException): Rename to signal_exception, make
 660         global.
 661
 662         * interp.c (Interrupt, ...): Move definitions to sim-main.h.
 663
 664         * sim-main.h (SignalException, SignalExceptionInterrupt,
 665         SignalExceptionInstructionFetch, SignalExceptionAddressStore,
 666         SignalExceptionAddressLoad, SignalExceptionSimulatorFault,
 667         SignalExceptionIntegerOverflow, SignalExceptionCoProcessorUnusable):
 668         Define.
 669
 670         * interp.c, support.h: Use.
 671
 672 Tue Oct 14 13:19:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 673
 674         * interp.c (ValueFPR, StoreFPR), sim-main.h: Make global, rename
 675         to value_fpr / store_fpr. Add SD argument.
 676         (NaN, Infinity, Less, Equal, AbsoluteValue, Negate, Add, Sub,
 677         Multiply, Divide, Recip, SquareRoot, Convert): Make global.
 678
 679         * sim-main.h (ValueFPR, StoreFPR): Define.
 680
 681 Tue Oct 14 13:06:55 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 682
 683         * interp.c (sim_engine_run): Check consistency between configure
 684         WITH_TARGET_WORD_BITSIZE and WITH_FLOATING_POINT and gensim GPRLEN
 685         and HASFPU.
 686
 687         * configure.in (mips_bitsize): Configure WITH_TARGET_WORD_BITSIZE.
 688         (mips_fpu): Configure WITH_FLOATING_POINT.
 689         (mips_endian): Configure WITH_TARGET_ENDIAN.
 690         * configure: Update.
 691
 692 Fri Oct  3 09:28:00 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 693
 694         * configure: Regenerated to track ../common/aclocal.m4 changes.
 695
 696 start-sanitize-r5900
 697 Mon Aug 25 19:11:15 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 698
 699         * interp.c (MAX_REG): Allow up-to 128 registers.
 700         (LO1, HI1): Define value that matches REGISTER_NAMES in gdb.
 701         (REGISTER_SA): Ditto.
 702         (sim_open): Initialize register_widths for r5900 specific
 703         registers.
 704         (sim_fetch_register, sim_store_register): Check for request of
 705         r5900 specific SA register.  Check for request for hi 64 bits of
 706         r5900 specific registers.
 707
 708 end-sanitize-r5900
 709 Mon Sep 29 14:45:00 1997  Bob Manson  <manson@charmed.cygnus.com>
 710
 711         * configure: Regenerated.
 712
 713 Fri Sep 26 12:48:18 1997  Mark Alexander  <marka@cygnus.com>
 714
 715         * interp.c: Allow Debug, DEPC, and EPC registers to be examined in GDB.
 716
 717 Thu Sep 25 11:15:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 718
 719         * gencode.c (print_igen_insn_models): Assume certain architectures
 720         include all mips* instructions.
 721         (print_igen_insn_format): Use data_size==-1 as marker for MIPS16
 722         instruction.
 723
 724         * Makefile.in (tmp.igen): Add target. Generate igen input from
 725         gencode file.
 726
 727         * gencode.c (FEATURE_IGEN): Define.
 728         (main): Add --igen option.  Generate output in igen format.
 729         (process_instructions): Format output according to igen option.
 730         (print_igen_insn_format): New function.
 731         (print_igen_insn_models): New function.
 732         (process_instructions): Only issue warnings and ignore
 733         instructions when no FEATURE_IGEN.
 734
 735 Wed Sep 24 17:38:57 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 736
 737         * interp.c (COP_SD, COP_LD): Add UNUSED to pacify GCC for some
 738         MIPS targets.
 739
 740 Tue Sep 23 11:04:38 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 741
 742         * configure: Regenerated to track ../common/aclocal.m4 changes.
 743
 744 Tue Sep 23 10:19:51 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 745
 746         * Makefile.in (SIM_ALIGNMENT, SIM_ENDIAN, SIM_HOSTENDIAN,
 747         SIM_RESERVED_BITS): Delete, moved to common.
 748         (SIM_EXTRA_CFLAGS): Update.
 749
 750 Mon Sep 22 11:46:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 751
 752         * configure.in: Configure non-strict memory alignment.
 753         * configure: Regenerated to track ../common/aclocal.m4 changes.
 754
 755 Fri Sep 19 17:45:25 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 756
 757         * configure: Regenerated to track ../common/aclocal.m4 changes.
 758
 759 Sat Sep 20 14:07:28 1997  Gavin Koch  <gavin@cygnus.com>
 760
 761         * gencode.c (SDBBP,DERET): Added (3900) insns.
 762         (RFE): Turn on for 3900.
 763         * interp.c (DebugBreakPoint,DEPC,Debug,Debug_*): Added.
 764         (dsstate): Made global.
 765         (SUBTARGET_R3900): Added.
 766         (CANCELDELAYSLOT): New.
 767         (SignalException): Ignore SystemCall rather than ignore and
 768         terminate.  Add DebugBreakPoint handling.
 769         (decode_coproc): New insns RFE, DERET; and new registers Debug
 770         and DEPC protected by SUBTARGET_R3900.
 771         (sim_engine_run): Use CANCELDELAYSLOT rather than clearing
 772         bits explicitly.
 773         * Makefile.in,configure.in: Add mips subtarget option.
 774         * configure: Update.
 775
 776 Fri Sep 19 09:33:27 1997  Gavin Koch  <gavin@cygnus.com>
 777
 778         * gencode.c: Add r3900 (tx39).
 779
 780 start-sanitize-tx19
 781         * gencode.c: Fix some configuration problems by improving
 782         the relationship between tx19 and tx39.
 783 end-sanitize-tx19
 784
 785 Tue Sep 16 15:52:04 1997  Gavin Koch  <gavin@cygnus.com>
 786
 787         * gencode.c (build_instruction): Don't need to subtract 4 for
 788         JALR, just 2.
 789
 790 Tue Sep 16 11:32:28 1997  Gavin Koch  <gavin@cygnus.com>
 791
 792         * interp.c: Correct some HASFPU problems.
 793
 794 Mon Sep 15 17:36:15 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 795
 796         * configure: Regenerated to track ../common/aclocal.m4 changes.
 797
 798 Fri Sep 12 12:01:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 799
 800         * interp.c (mips_options): Fix samples option short form, should
 801         be `x'.
 802
 803 Thu Sep 11 09:35:29 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 804
 805         * interp.c (sim_info): Enable info code.  Was just returning.
 806
 807 Tue Sep  9 17:30:57 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 808
 809         * interp.c (decode_coproc): Clarify warning about unsuported MTC0,
 810         MFC0.
 811
 812 Tue Sep  9 16:28:28 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 813
 814         * gencode.c (build_instruction): Use SIGNED64 for 64 bit
 815         constants.
 816         (build_instruction): Ditto for LL.
 817
 818 start-sanitize-tx19
 819 Sun Sep  7 16:05:46 1997  Gavin Koch  <gavin@cygnus.com>
 820
 821         * mips/configure.in, mips/gencode: Add tx19/r1900.
 822
 823 end-sanitize-tx19
 824 Thu Sep  4 17:21:23 1997  Doug Evans  <dje@seba>
 825
 826         * configure: Regenerated to track ../common/aclocal.m4 changes.
 827
 828 start-sanitize-r5900
 829 Mon Sep  1 18:43:30 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 830
 831         * gencode.c (build_instruction): For "pabsw" and "pabsh", check
 832         for overflow due to ABS of MININT, set result to MAXINT.
 833         (build_instruction): For "psrlvw", signextend bit 31.
 834
 835 end-sanitize-r5900
 836 Wed Aug 27 18:13:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 837
 838         * configure: Regenerated to track ../common/aclocal.m4 changes.
 839         * config.in: Ditto.
 840
 841 Wed Aug 27 14:12:27 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 842
 843         * interp.c (sim_open): Add call to sim_analyze_program, update
 844         call to sim_config.
 845
 846 Tue Aug 26 10:40:07 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 847
 848         * interp.c (sim_kill): Delete.
 849         (sim_create_inferior): Add ABFD argument. Set PC from same.
 850         (sim_load): Move code initializing trap handlers from here.
 851         (sim_open): To here.
 852         (sim_load): Delete, use sim-hload.c.
 853
 854         * Makefile.in (SIM_OBJS): Add sim-hload.o module.
 855
 856 Mon Aug 25 17:50:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 857
 858         * configure: Regenerated to track ../common/aclocal.m4 changes.
 859         * config.in: Ditto.
 860
 861 Mon Aug 25 15:59:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 862
 863         * interp.c (sim_open): Add ABFD argument.
 864         (sim_load): Move call to sim_config from here.
 865         (sim_open): To here.  Check return status.
 866
 867 start-sanitize-r5900
 868         * gencode.c (build_instruction): Do not define x8000000000000000,
 869         x7FFFFFFFFFFFFFFF, or xFFFFFFFF80000000.
 870
 871 end-sanitize-r5900
 872 start-sanitize-r5900
 873 Mon Jul 28 19:49:29 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 874
 875         * gencode.c (build_instruction): For "pdivw", "pdivbw" and
 876         "pdivuw" check for overflow due to signed divide by -1.
 877
 878 end-sanitize-r5900
 879 Fri Jul 25 15:00:45 1997  Gavin Koch  <gavin@cygnus.com>
 880
 881         * gencode.c (build_instruction): Two arg MADD should
 882         not assign result to $0.
 883
 884 start-sanitize-r5900
 885 Thu Jul 10 11:58:48 1997  Andrew Cagney  <cagney@critters.cygnus.com>
 886
 887         * gencode.c (build_instruction): For "ppac5" use unsigned
 888         arrithmetic so that the sign bit doesn't smear when right shifted.
 889         (build_instruction): For "pdiv" perform sign extension when
 890         storing results in HI and LO.
 891         (build_instructions): For "pdiv" and "pdivbw" check for
 892         divide-by-zero.
 893         (build_instruction): For "pmfhl.slw" update hi part of dest
 894         register as well as low part.
 895         (build_instruction): For "pmfhl" portably handle long long values.
 896         (build_instruction): For "pmfhl.sh" correctly negative values.
 897         Store half words 2 and three in the correct place.
 898         (build_instruction): For "psllvw", sign extend value after shift.
 899
 900 end-sanitize-r5900
 901 Thu Jun 26 12:13:17 1997  Angela Marie Thomas (angela@cygnus.com)
 902
 903         * sim/mips/configure: Change default_sim_endian to 0 (bi-endian)
 904         * sim/mips/configure.in: Regenerate.
 905
 906 Wed Jul  9 10:29:21 1997  Andrew Cagney  <cagney@critters.cygnus.com>
 907
 908         * interp.c (SUB_REG_UW, SUB_REG_SW, SUB_REG_*): Use more explicit
 909         signed8, unsigned8 et.al. types.
 910
 911 start-sanitize-r5900
 912         * gencode.c (build_instruction): For PMULTU* do not sign extend
 913         registers.  Make generated code easier to debug.
 914
 915 end-sanitize-r5900
 916         * interp.c (SUB_REG_FETCH): Handle both little and big endian
 917         hosts when selecting subreg.
 918
 919 start-sanitize-r5900
 920 Tue Jul  8 18:07:20 1997  Andrew Cagney  <cagney@andros.cygnus.com>
 921
 922         * gencode.c (type_for_data_len): For 32bit operations concerned
 923         with overflow, perform op using 64bits.
 924         (build_instruction): For PADD, always compute operation using type
 925         returned by type_for_data_len.
 926         (build_instruction): For PSUBU, when overflow, saturate to zero as
 927         actually underflow.
 928
 929 end-sanitize-r5900
 930 Wed Jul  2 11:54:10 1997  Jeffrey A Law  (law@cygnus.com)
 931
 932 start-sanitize-r5900
 933         * gencode.c (build_instruction): Handle "pext5" according to
 934         version 1.95 of the r5900 ISA.
 935
 936         * gencode.c (build_instruction): Handle "ppac5" according to
 937         version 1.95 of the r5900 ISA.
 938
 939 end-sanitize-r5900
 940         * interp.c (sim_engine_run): Reset the ZERO register to zero
 941         regardless of FEATURE_WARN_ZERO.
 942         * gencode.c (FEATURE_WARNINGS): Remove FEATURE_WARN_ZERO.
 943
 944 Wed Jun  4 10:43:14 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 945
 946         * interp.c (decode_coproc): Implement MTC0 N, CAUSE.
 947         (SignalException): For BreakPoints ignore any mode bits and just
 948         save the PC.
 949         (SignalException): Always set the CAUSE register.
 950
 951 Tue Jun  3 05:00:33 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 952
 953         * interp.c (SignalException): Clear the simDELAYSLOT flag when an
 954         exception has been taken.
 955
 956         * interp.c: Implement the ERET and mt/f sr instructions.
 957
 958 start-sanitize-r5900
 959 Mon Jun  2 23:28:19 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 960
 961         * gencode.c (build_instruction): For paddu, extract unsigned
 962         sub-fields.
 963
 964         * gencode.c (build_instruction): Saturate padds instead of padd
 965         instructions.
 966
 967 end-sanitize-r5900
 968 Sat May 31 00:44:16 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 969
 970         * interp.c (SignalException): Don't bother restarting an
 971         interrupt.
 972
 973 Fri May 30 23:41:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 974
 975         * interp.c (SignalException): Really take an interrupt.
 976         (interrupt_event): Only deliver interrupts when enabled.
 977
 978 Tue May 27 20:08:06 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 979
 980         * interp.c (sim_info): Only print info when verbose.
 981         (sim_info) Use sim_io_printf for output.
 982
 983 Tue May 27 14:22:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 984
 985         * interp.c (CoProcPresent): Add UNUSED attribute - not used by all
 986         mips architectures.
 987
 988 Tue May 27 14:22:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 989
 990         * interp.c (sim_do_command): Check for common commands if a
 991         simulator specific command fails.
 992
 993 Thu May 22 09:32:03 1997  Gavin Koch  <gavin@cygnus.com>
 994
 995         * interp.c (sim_engine_run): ifdef out uses of simSTOP, simSTEP
 996         and simBE when DEBUG is defined.
 997
 998 Wed May 21 09:08:10 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 999
1000         * interp.c (interrupt_event): New function.  Pass exception event
1001         onto exception handler.
1002
1003         * configure.in: Check for stdlib.h.
1004         * configure: Regenerate.
1005
1006         * gencode.c (build_instruction): Add UNUSED attribute to tempS
1007         variable declaration.
1008         (build_instruction): Initialize memval1.
1009         (build_instruction): Add UNUSED attribute to byte, bigend,
1010         reverse.
1011         (build_operands): Ditto.
1012
1013         * interp.c: Fix GCC warnings.
1014         (sim_get_quit_code): Delete.
1015
1016         * configure.in: Add INLINE, ENDIAN, HOSTENDIAN and WARNINGS.
1017         * Makefile.in: Ditto.
1018         * configure: Re-generate.
1019
1020         * Makefile.in (SIM_OBJS): Add sim-watch.o module.
1021
1022 Tue May 20 15:08:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1023
1024         * interp.c (mips_option_handler): New function parse argumes using
1025         sim-options.
1026         (myname): Replace with STATE_MY_NAME.
1027         (sim_open): Delete check for host endianness - performed by
1028         sim_config.
1029         (simHOSTBE, simBE): Delete, replaced by sim-endian flags.
1030         (sim_open): Move much of the initialization from here.
1031         (sim_load): To here.  After the image has been loaded and
1032         endianness set.
1033         (sim_open): Move ColdReset from here.
1034         (sim_create_inferior): To here.
1035         (sim_open): Make FP check less dependant on host endianness.
1036
1037         * Makefile.in (SIM_RUN_OBJS): Set to nrun.o - use new version or
1038         run.
1039         * interp.c (sim_set_callbacks): Delete.
1040
1041         * interp.c (membank, membank_base, membank_size): Replace with
1042         STATE_MEMORY, STATE_MEM_SIZE, STATE_MEM_BASE.
1043         (sim_open): Remove call to callback->init. gdb/run do this.
1044
1045         * interp.c: Update
1046
1047         * sim-main.h (SIM_HAVE_FLATMEM): Define.
1048
1049         * interp.c (big_endian_p): Delete, replaced by
1050         current_target_byte_order.
1051
1052 Tue May 20 13:55:00 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1053
1054         * interp.c (host_read_long, host_read_word, host_swap_word,
1055         host_swap_long): Delete. Using common sim-endian.
1056         (sim_fetch_register, sim_store_register): Use H2T.
1057         (pipeline_ticks): Delete.  Handled by sim-events.
1058         (sim_info): Update.
1059         (sim_engine_run): Update.
1060
1061 Tue May 20 13:42:03 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1062
1063         * interp.c (sim_stop_reason): Move code determining simEXCEPTION
1064         reason from here.
1065         (SignalException): To here. Signal using sim_engine_halt.
1066         (sim_stop_reason): Delete, moved to common.
1067
1068 Tue May 20 10:19:48 1997  Andrew Cagney  <cagney@b2.cygnus.com>
1069
1070         * interp.c (sim_open): Add callback argument.
1071         (sim_set_callbacks): Delete SIM_DESC argument.
1072         (sim_size): Ditto.
1073
1074 Mon May 19 18:20:38 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1075
1076         * Makefile.in (SIM_OBJS): Add common modules.
1077
1078         * interp.c (sim_set_callbacks): Also set SD callback.
1079         (set_endianness, xfer_*, swap_*): Delete.
1080         (host_read_word, host_read_long, host_swap_word, host_swap_long):
1081         Change to functions using sim-endian macros.
1082         (control_c, sim_stop): Delete, use common version.
1083         (simulate): Convert into.
1084         (sim_engine_run): This function.
1085         (sim_resume): Delete.
1086
1087         * interp.c (simulation): New variable - the simulator object.
1088         (sim_kind): Delete global - merged into simulation.
1089         (sim_load): Cleanup.  Move PC assignment from here.
1090         (sim_create_inferior): To here.
1091
1092         * sim-main.h: New file.
1093         * interp.c (sim-main.h): Include.
1094
1095 Thu Apr 24 00:39:51 1997  Doug Evans  <dje@canuck.cygnus.com>
1096
1097         * configure: Regenerated to track ../common/aclocal.m4 changes.
1098
1099 Wed Apr 23 17:32:19 1997  Doug Evans  <dje@canuck.cygnus.com>
1100
1101         * tconfig.in (SIM_HAVE_BIENDIAN): Define.
1102
1103 Mon Apr 21 17:16:13 1997  Gavin Koch  <gavin@cygnus.com>
1104
1105         * gencode.c (build_instruction): DIV instructions: check
1106         for division by zero and integer overflow before using
1107         host's division operation.
1108
1109 Thu Apr 17 03:18:14 1997  Doug Evans  <dje@canuck.cygnus.com>
1110
1111         * Makefile.in (SIM_OBJS): Add sim-load.o.
1112         * interp.c: #include bfd.h.
1113         (target_byte_order): Delete.
1114         (sim_kind, myname, big_endian_p): New static locals.
1115         (sim_open): Set sim_kind, myname.  Move call to set_endianness to
1116         after argument parsing.  Recognize -E arg, set endianness accordingly.
1117         (sim_load): Return SIM_RC.  New arg abfd.  Call sim_load_file to
1118         load file into simulator.  Set PC from bfd.
1119         (sim_create_inferior): Return SIM_RC.  Delete arg start_address.
1120         (set_endianness): Use big_endian_p instead of target_byte_order.
1121
1122 Wed Apr 16 17:55:37 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1123
1124         * interp.c (sim_size): Delete prototype - conflicts with
1125         definition in remote-sim.h.  Correct definition.
1126
1127 Mon Apr  7 15:45:02 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
1128
1129         * configure: Regenerated to track ../common/aclocal.m4 changes.
1130         * config.in: Ditto.
1131
1132 Wed Apr  2 15:06:28 1997  Doug Evans  <dje@canuck.cygnus.com>
1133
1134         * interp.c (sim_open): New arg `kind'.
1135
1136         * configure: Regenerated to track ../common/aclocal.m4 changes.
1137
1138 Wed Apr  2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1139
1140         * configure: Regenerated to track ../common/aclocal.m4 changes.
1141
1142 Tue Mar 25 11:38:22 1997  Doug Evans  <dje@canuck.cygnus.com>
1143
1144         * interp.c (sim_open): Set optind to 0 before calling getopt.
1145
1146 Wed Mar 19 01:14:00 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
1147
1148         * configure: Regenerated to track ../common/aclocal.m4 changes.
1149
1150 Mon Mar 17 10:52:59 1997  Gavin Koch  <gavin@cetus.cygnus.com>
1151
1152         * interp.c : Replace uses of pr_addr with pr_uword64
1153         where the bit length is always 64 independent of SIM_ADDR.
1154         (pr_uword64) : added.
1155
1156 Mon Mar 17 15:10:07 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
1157
1158         * configure: Re-generate.
1159
1160 Fri Mar 14 10:34:11 1997  Michael Meissner  <meissner@cygnus.com>
1161
1162         * configure: Regenerate to track ../common/aclocal.m4 changes.
1163
1164 Thu Mar 13 12:51:36 1997  Doug Evans  <dje@canuck.cygnus.com>
1165
1166         * interp.c (sim_open): New SIM_DESC result.  Argument is now
1167         in argv form.
1168         (other sim_*): New SIM_DESC argument.
1169
1170 start-sanitize-r5900
1171 Wed Feb 26 18:32:21 1997  Gavin Koch  <gavin@cygnus.com>
1172
1173         * gencode.c (POP_AND,POP_OR,POP_NOR,POP_XOR):
1174         Change values to avoid overloading DOUBLEWORD which is tested
1175         for all insns.
1176         * gencode.c: reinstate "offending code".
1177
1178 end-sanitize-r5900
1179 Mon Feb 24 22:47:14 1997  Dawn Perchik  <dawn@cygnus.com>
1180
1181         * interp.c: Fix printing of addresses for non-64-bit targets.
1182         (pr_addr): Add function to print address based on size.
1183 start-sanitize-r5900
1184         * gencode.c: #ifdef out offending code until a permanent fix
1185         can be added.  Code is causing build errors for non-5900 mips targets.
1186 end-sanitize-r5900
1187
1188 start-sanitize-r5900
1189 Thu Feb 20 10:40:24 1997  Gavin Koch  <gavin@cetus.cygnus.com>
1190
1191         * gencode.c (process_instructions): Correct test for ISA dependent
1192         architecture bits in isa field of MIPS_DECODE.
1193
1194 end-sanitize-r5900
1195 Wed Feb 19 14:42:09 1997  Mark Alexander  <marka@cygnus.com>
1196
1197         * interp.c (simopen): Add support for LSI MiniRISC PMON vectors.
1198
1199 start-sanitize-r5900
1200 Tue Feb 18 17:03:47 1997  Gavin Koch  <gavin@cygnus.com>
1201
1202         * gencode.c (MIPS_DECODE): Correct instruction feature flags for
1203         PMADDUW.
1204
1205 end-sanitize-r5900
1206 Thu Feb 13 14:08:30 1997  Ian Lance Taylor  <ian@cygnus.com>
1207
1208         * gencode.c (build_mips16_operands): Correct computation of base
1209         address for extended PC relative instruction.
1210
1211 start-sanitize-r5900
1212 Fri Feb  7 11:12:44 1997  Gavin Koch  <gavin@cygnus.com>
1213
1214         * Makefile.in, configure, configure.in, gencode.c,
1215         interp.c, support.h: add r5900.
1216
1217 end-sanitize-r5900
1218 Thu Feb  6 17:16:15 1997  Ian Lance Taylor  <ian@cygnus.com>
1219
1220         * interp.c (mips16_entry): Add support for floating point cases.
1221         (SignalException): Pass floating point cases to mips16_entry.
1222         (ValueFPR): Don't restrict fmt_single and fmt_word to even
1223         registers.
1224         (StoreFPR): Likewise.  Also, don't clobber fpr + 1 for fmt_single
1225         or fmt_word.
1226         (COP_LW): Pass fmt_word rather than fmt_uninterpreted to StoreFPR,
1227         and then set the state to fmt_uninterpreted.
1228         (COP_SW): Temporarily set the state to fmt_word while calling
1229         ValueFPR.
1230
1231 Tue Feb  4 16:48:25 1997  Ian Lance Taylor  <ian@cygnus.com>
1232
1233         * gencode.c (build_instruction): The high order may be set in the
1234         comparison flags at any ISA level, not just ISA 4.
1235
1236 Tue Feb  4 13:33:30 1997  Doug Evans  <dje@canuck.cygnus.com>
1237
1238         * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
1239         COMMON_{PRE,POST}_CONFIG_FRAG instead.
1240         * configure.in: sinclude ../common/aclocal.m4.
1241         * configure: Regenerated.
1242
1243 Fri Jan 31 11:11:45 1997  Ian Lance Taylor  <ian@cygnus.com>
1244
1245         * configure: Rebuild after change to aclocal.m4.
1246
1247 Thu Jan 23 11:46:23 1997  Stu Grossman  (grossman@critters.cygnus.com)
1248
1249         * configure configure.in Makefile.in:  Update to new configure
1250         scheme which is more compatible with WinGDB builds.
1251         * configure.in:  Improve comment on how to run autoconf.
1252         * configure:  Re-run autoconf to get new ../common/aclocal.m4.
1253         * Makefile.in:  Use autoconf substitution to install common
1254         makefile fragment.
1255
1256 Wed Jan  8 12:39:03 1997  Jim Wilson  <wilson@cygnus.com>
1257
1258         * gencode.c (build_instruction): Use BigEndianCPU instead of
1259         ByteSwapMem.
1260
1261 Thu Jan 02 22:23:04 1997  Mark Alexander  <marka@cygnus.com>
1262
1263         * interp.c (sim_monitor): Make output to stdout visible in
1264         wingdb's I/O log window.
1265
1266 Tue Dec 31 07:04:00 1996  Mark Alexander  <marka@cygnus.com>
1267
1268         * support.h: Undo previous change to SIGTRAP
1269         and SIGQUIT values.
1270
1271 Mon Dec 30 17:36:06 1996  Ian Lance Taylor  <ian@cygnus.com>
1272
1273         * interp.c (store_word, load_word): New static functions.
1274         (mips16_entry): New static function.
1275         (SignalException): Look for mips16 entry and exit instructions.
1276         (simulate): Use the correct index when setting fpr_state after
1277         doing a pending move.
1278
1279 Sun Dec 29 09:37:18 1996  Mark Alexander  <marka@cygnus.com>
1280
1281         * interp.c: Fix byte-swapping code throughout to work on
1282         both little- and big-endian hosts.
1283
1284 Sun Dec 29 09:18:32 1996  Mark Alexander  <marka@cygnus.com>
1285
1286         * support.h: Make definitions of SIGTRAP and SIGQUIT consistent
1287         with gdb/config/i386/xm-windows.h.
1288
1289 Fri Dec 27 22:48:51 1996  Mark Alexander  <marka@cygnus.com>
1290
1291         * gencode.c (build_instruction): Work around MSVC++ code gen bug
1292         that messes up arithmetic shifts.
1293
1294 Fri Dec 20 11:04:05 1996  Stu Grossman  (grossman@critters.cygnus.com)
1295
1296         * support.h:  Use _WIN32 instead of __WIN32__.  Also add defs for
1297         SIGTRAP and SIGQUIT for _WIN32.
1298
1299 Thu Dec 19 14:07:27 1996  Ian Lance Taylor  <ian@cygnus.com>
1300
1301         * gencode.c (build_instruction) [MUL]: Cast operands to word64, to
1302         force a 64 bit multiplication.
1303         (build_instruction) [OR]: In mips16 mode, don't do anything if the
1304         destination register is 0, since that is the default mips16 nop
1305         instruction.
1306
1307 Mon Dec 16 14:59:38 1996  Ian Lance Taylor  <ian@cygnus.com>
1308
1309         * gencode.c (MIPS16_DECODE): SWRASP is I8, not RI.
1310         (build_endian_shift): Don't check proc64.
1311         (build_instruction): Always set memval to uword64.  Cast op2 to
1312         uword64 when shifting it left in memory instructions.  Always use
1313         the same code for stores--don't special case proc64.
1314
1315         * gencode.c (build_mips16_operands): Fix base PC value for PC
1316         relative operands.
1317         (build_instruction): Call JALDELAYSLOT rather than DELAYSLOT for a
1318         jal instruction.
1319         * interp.c (simJALDELAYSLOT): Define.
1320         (JALDELAYSLOT): Define.
1321         (INDELAYSLOT, INJALDELAYSLOT): Define.
1322         (simulate): Clear simJALDELAYSLOT when simDELAYSLOT is cleared.
1323
1324 Tue Dec 24 22:11:20 1996  Angela Marie Thomas (angela@cygnus.com)
1325
1326         * interp.c (sim_open): add flush_cache as a PMON routine
1327         (sim_monitor): handle flush_cache by ignoring it
1328
1329 Wed Dec 11 13:53:51 1996  Jim Wilson  <wilson@cygnus.com>
1330
1331         * gencode.c (build_instruction): Use !ByteSwapMem instead of
1332         BigEndianMem.
1333         * interp.c (CONFIG, config_EP_{mask,shift,D,DxxDxx, config_BE): Delete.
1334         (BigEndianMem): Rename to ByteSwapMem and change sense.
1335         (BigEndianCPU, sim_write, LoadMemory, StoreMemory): Change
1336         BigEndianMem references to !ByteSwapMem.
1337         (set_endianness): New function, with prototype.
1338         (sim_open): Call set_endianness.
1339         (sim_info): Use simBE instead of BigEndianMem.
1340         (xfer_direct_word, xfer_direct_long, swap_direct_word,
1341         swap_direct_long, xfer_big_word, xfer_big_long, xfer_little_word,
1342         xfer_little_long, swap_word, swap_long): Delete unnecessary MSC_VER
1343         ifdefs, keeping the prototype declaration.
1344         (swap_word): Rewrite correctly.
1345         (ColdReset): Delete references to CONFIG.  Delete endianness related
1346         code; moved to set_endianness.
1347
1348 Tue Dec 10 11:32:04 1996  Jim Wilson  <wilson@cygnus.com>
1349
1350         * gencode.c (build_instruction, case JUMP): Truncate PC to 32 bits.
1351         * interp.c (CHECKHILO): Define away.
1352         (simSIGINT): New macro.
1353         (membank_size): Increase from 1MB to 2MB.
1354         (control_c): New function.
1355         (sim_resume): Rename parameter signal to signal_number.  Add local
1356         variable prev.  Call signal before and after simulate.
1357         (sim_stop_reason): Add simSIGINT support.
1358         (sim_warning, sim_error, dotrace, SignalException): Define as stdarg
1359         functions always.
1360         (sim_warning): Delete call to SignalException.  Do call printf_filtered
1361         if logfh is NULL.
1362         (AddressTranslation): Add #ifdef DEBUG around debugging message and
1363         a call to sim_warning.
1364
1365 Wed Nov 27 11:53:50 1996  Ian Lance Taylor  <ian@cygnus.com>
1366
1367         * gencode.c (process_instructions): If ! proc64, skip DOUBLEWORD
1368         16 bit instructions.
1369
1370 Tue Nov 26 11:53:12 1996  Ian Lance Taylor  <ian@cygnus.com>
1371
1372         Add support for mips16 (16 bit MIPS implementation):
1373         * gencode.c (inst_type): Add mips16 instruction encoding types.
1374         (GETDATASIZEINSN): Define.
1375         (MIPS_DECODE): Add REG flag to dsllv, dsrav, and dsrlv.  Add
1376         jalx.  Add LEFT flag to mfhi and mflo.  Add RIGHT flag to mthi and
1377         mtlo.
1378         (MIPS16_DECODE): New table, for mips16 instructions.
1379         (bitmap_val): New static function.
1380         (struct mips16_op): Define.
1381         (mips16_op_table): New table, for mips16 operands.
1382         (build_mips16_operands): New static function.
1383         (process_instructions): If PC is odd, decode a mips16
1384         instruction.  Break out instruction handling into new
1385         build_instruction function.
1386         (build_instruction): New static function, broken out of
1387         process_instructions.  Check modifiers rather than flags for SHIFT
1388         bit count and m[ft]{hi,lo} direction.
1389         (usage): Pass program name to fprintf.
1390         (main): Remove unused variable this_option_optind.  Change
1391         ``*loptarg++'' to ``loptarg++''.
1392         (my_strtoul): Parenthesize && within ||.
1393         * interp.c (LoadMemory): Accept a halfword pAddr if vAddr is odd.
1394         (simulate): If PC is odd, fetch a 16 bit instruction, and
1395         increment PC by 2 rather than 4.
1396         * configure.in: Add case for mips16*-*-*.
1397         * configure: Rebuild.
1398
1399 Fri Nov 22 08:49:36 1996  Mark Alexander  <marka@cygnus.com>
1400
1401         * interp.c: Allow -t to enable tracing in standalone simulator.
1402         Fix garbage output in trace file and error messages.
1403
1404 Wed Nov 20 01:54:37 1996  Doug Evans  <dje@canuck.cygnus.com>
1405
1406         * Makefile.in: Delete stuff moved to ../common/Make-common.in.
1407         (SIM_{OBJS,EXTRA_CFLAGS,EXTRA_CLEAN}): Define.
1408         * configure.in: Simplify using macros in ../common/aclocal.m4.
1409         * configure: Regenerated.
1410         * tconfig.in: New file.
1411
1412 Tue Nov 12 13:34:00 1996  Dawn Perchik  <dawn@cygnus.com>
1413
1414         * interp.c: Fix bugs in 64-bit port.
1415         Use ansi function declarations for msvc compiler.
1416         Initialize and test file pointer in trace code.
1417         Prevent duplicate definition of LAST_EMED_REGNUM.
1418
1419 Tue Oct 15 11:07:06 1996  Mark Alexander  <marka@cygnus.com>
1420
1421         * interp.c (xfer_big_long): Prevent unwanted sign extension.
1422
1423 Thu Sep 26 17:35:00 1996  James G. Smith  <jsmith@cygnus.co.uk>
1424
1425         * interp.c (SignalException): Check for explicit terminating
1426         breakpoint value.
1427         * gencode.c: Pass instruction value through SignalException()
1428         calls for Trap, Breakpoint and Syscall.
1429
1430 Thu Sep 26 11:35:17 1996  James G. Smith  <jsmith@cygnus.co.uk>
1431
1432         * interp.c (SquareRoot): Add HAVE_SQRT check to ensure sqrt() is
1433         only used on those hosts that provide it.
1434         * configure.in: Add sqrt() to list of functions to be checked for.
1435         * config.in: Re-generated.
1436         * configure: Re-generated.
1437
1438 Fri Sep 20 15:47:12 1996  Ian Lance Taylor  <ian@cygnus.com>
1439
1440         * gencode.c (process_instructions): Call build_endian_shift when
1441         expanding STORE RIGHT, to fix swr.
1442         * support.h (SIGNEXTEND): If the sign bit is not set, explicitly
1443         clear the high bits.
1444         * interp.c (Convert): Fix fmt_single to fmt_long to not truncate.
1445         Fix float to int conversions to produce signed values.
1446
1447 Thu Sep 19 15:34:17 1996  Ian Lance Taylor  <ian@cygnus.com>
1448
1449         * gencode.c (MIPS_DECODE): Set UNSIGNED for multu instruction.
1450         (process_instructions): Correct handling of nor instruction.
1451         Correct shift count for 32 bit shift instructions. Correct sign
1452         extension for arithmetic shifts to not shift the number of bits in
1453         the type.  Fix 64 bit multiply high word calculation.  Fix 32 bit
1454         unsigned multiply.  Fix ldxc1 and friends to use coprocessor 1.
1455         Fix madd.
1456         * interp.c (CHECKHILO): Don't set HIACCESS, LOACCESS, or HLPC.
1457         It's OK to have a mult follow a mult.  What's not OK is to have a
1458         mult follow an mfhi.
1459         (Convert): Comment out incorrect rounding code.
1460
1461 Mon Sep 16 11:38:16 1996  James G. Smith  <jsmith@cygnus.co.uk>
1462
1463         * interp.c (sim_monitor): Improved monitor printf
1464         simulation. Tidied up simulator warnings, and added "--log" option
1465         for directing warning message output.
1466         * gencode.c: Use sim_warning() rather than WARNING macro.
1467
1468 Thu Aug 22 15:03:12 1996  Ian Lance Taylor  <ian@cygnus.com>
1469
1470         * Makefile.in (gencode): Depend upon gencode.o, getopt.o, and
1471         getopt1.o, rather than on gencode.c.  Link objects together.
1472         Don't link against -liberty.
1473         (gencode.o, getopt.o, getopt1.o): New targets.
1474         * gencode.c: Include <ctype.h> and "ansidecl.h".
1475         (AND): Undefine after including "ansidecl.h".
1476         (ULONG_MAX): Define if not defined.
1477         (OP_*): Don't define macros; now defined in opcode/mips.h.
1478         (main): Call my_strtoul rather than strtoul.
1479         (my_strtoul): New static function.
1480
1481 Wed Jul 17 18:12:38 1996  Stu Grossman  (grossman@critters.cygnus.com)
1482
1483         * gencode.c (process_instructions):  Generate word64 and uword64
1484         instead of `long long' and `unsigned long long' data types.
1485         * interp.c:  #include sysdep.h to get signals, and define default
1486         for SIGBUS.
1487         * (Convert):  Work around for Visual-C++ compiler bug with type
1488         conversion.
1489         * support.h:  Make things compile under Visual-C++ by using
1490         __int64 instead of `long long'.  Change many refs to long long
1491         into word64/uword64 typedefs.
1492
1493 Wed Jun 26 12:24:55 1996  Jason Molenda  (crash@godzilla.cygnus.co.jp)
1494
1495         * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
1496         INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
1497         (docdir): Removed.
1498         * configure.in (AC_PREREQ): autoconf 2.5 or higher.
1499         (AC_PROG_INSTALL): Added.
1500         (AC_PROG_CC): Moved to before configure.host call.
1501         * configure: Rebuilt.
1502
1503 Wed Jun  5 08:28:13 1996  James G. Smith  <jsmith@cygnus.co.uk>
1504
1505         * configure.in: Define @SIMCONF@ depending on mips target.
1506         * configure: Rebuild.
1507         * Makefile.in (run): Add @SIMCONF@ to control simulator
1508         construction.
1509         * gencode.c: Change LOADDRMASK to 64bit memory model only.
1510         * interp.c: Remove some debugging, provide more detailed error
1511         messages, update memory accesses to use LOADDRMASK.
1512
1513 Mon Jun  3 11:55:03 1996  Ian Lance Taylor  <ian@cygnus.com>
1514
1515         * configure.in: Add calls to AC_CONFIG_HEADER, AC_CHECK_HEADERS,
1516         AC_CHECK_LIB, and AC_CHECK_FUNCS.  Change AC_OUTPUT to set
1517         stamp-h.
1518         * configure: Rebuild.
1519         * config.in: New file, generated by autoheader.
1520         * interp.c: Include "config.h".  Include <stdlib.h>, <string.h>,
1521         and <strings.h> if they exist.  Replace #ifdef sun with #ifdef
1522         HAVE_ANINT and HAVE_AINT, as appropriate.
1523         * Makefile.in (run): Use @LIBS@ rather than -lm.
1524         (interp.o): Depend upon config.h.
1525         (Makefile): Just rebuild Makefile.
1526         (clean): Remove stamp-h.
1527         (mostlyclean): Make the same as clean, not as distclean.
1528         (config.h, stamp-h): New targets.
1529
1530 Fri May 10 00:41:17 1996  James G. Smith  <jsmith@cygnus.co.uk>
1531
1532         * interp.c (ColdReset): Fix boolean test. Make all simulator
1533         globals static.
1534
1535 Wed May  8 15:12:58 1996  James G. Smith  <jsmith@cygnus.co.uk>
1536
1537         * interp.c (xfer_direct_word, xfer_direct_long,
1538         swap_direct_word, swap_direct_long, xfer_big_word,
1539         xfer_big_long, xfer_little_word, xfer_little_long,
1540         swap_word,swap_long): Added.
1541         * interp.c (ColdReset): Provide function indirection to
1542         host<->simulated_target transfer routines.
1543         * interp.c (sim_store_register, sim_fetch_register): Updated to
1544         make use of indirected transfer routines.
1545
1546 Fri Apr 19 15:48:24 1996  James G. Smith  <jsmith@cygnus.co.uk>
1547
1548         * gencode.c (process_instructions): Ensure FP ABS instruction
1549         recognised.
1550         * interp.c (AbsoluteValue): Add routine. Also provide simple PMON
1551         system call support.
1552
1553 Wed Apr 10 09:51:38 1996  James G. Smith  <jsmith@cygnus.co.uk>
1554
1555         * interp.c (sim_do_command): Complain if callback structure not
1556         initialised.
1557
1558 Thu Mar 28 13:50:51 1996  James G. Smith  <jsmith@cygnus.co.uk>
1559
1560         * interp.c (Convert): Provide round-to-nearest and round-to-zero
1561         support for Sun hosts.
1562         * Makefile.in (gencode): Ensure the host compiler and libraries
1563         used for cross-hosted build.
1564
1565 Wed Mar 27 14:42:12 1996  James G. Smith  <jsmith@cygnus.co.uk>
1566
1567         * interp.c, gencode.c: Some more (TODO) tidying.
1568
1569 Thu Mar  7 11:19:33 1996  James G. Smith  <jsmith@cygnus.co.uk>
1570
1571         * gencode.c, interp.c: Replaced explicit long long references with
1572         WORD64HI, WORD64LO, SET64HI and SET64LO macro calls.
1573         * support.h (SET64LO, SET64HI): Macros added.
1574
1575 Wed Feb 21 12:16:21 1996  Ian Lance Taylor  <ian@cygnus.com>
1576
1577         * configure: Regenerate with autoconf 2.7.
1578
1579 Tue Jan 30 08:48:18 1996  Fred Fish  <fnf@cygnus.com>
1580
1581         * interp.c (LoadMemory): Enclose text following #endif in /* */.
1582         * support.h: Remove superfluous "1" from #if.
1583         * support.h (CHECKSIM): Remove stray 'a' at end of line.
1584
1585 Mon Dec  4 11:44:40 1995  Jamie Smith  <jsmith@cygnus.com>
1586
1587         * interp.c (StoreFPR): Control UndefinedResult() call on
1588         WARN_RESULT manifest.
1589
1590 Fri Dec  1 16:37:19 1995  James G. Smith  <jsmith@cygnus.co.uk>
1591
1592         * gencode.c: Tidied instruction decoding, and added FP instruction
1593         support.
1594
1595         * interp.c: Added dineroIII, and BSD profiling support. Also
1596         run-time FP handling.
1597
1598 Sun Oct 22 00:57:18 1995  James G. Smith  <jsmith@pasanda.cygnus.co.uk>
1599
1600         * Changelog, Makefile.in, README.Cygnus, configure, configure.in,
1601         gencode.c, interp.c, support.h: created.