1 2006-05-15 Chao-ying Fu <fu@mips.com>
3 * dsp.igen (do_ph_shift, do_w_shra): Fix bugs for rounding instructions.
5 2006-04-18 Nick Clifton <nickc@redhat.com>
7 * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Add missing break
10 2006-03-29 Hans-Peter Nilsson <hp@axis.com>
12 * configure: Regenerate.
14 2005-12-14 Chao-ying Fu <fu@mips.com>
16 * Makefile.in (SIM_OBJS): Add dsp.o.
17 (dsp.o): New dependency.
18 (IGEN_INCLUDE): Add dsp.igen.
19 * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*, mipsisa64r2*-*-*,
20 mipsisa64*-*-*): Add dsp to sim_igen_machine.
21 * configure: Regenerate.
22 * mips.igen: Add dsp model and include dsp.igen.
23 (MFHI, MFLO, MTHI, MTLO): Remove mips32, mips32r2, mips64, mips64r2,
24 because these instructions are extended in DSP ASE.
25 * sim-main.h (LAST_EMBED_REGNUM): Change from 89 to 96 because of
26 adding 6 DSP accumulator registers and 1 DSP control register.
27 (AC0LOIDX, AC0HIIDX, AC1LOIDX, AC1HIIDX, AC2LOIDX, AC2HIIDX, AC3LOIDX,
28 AC3HIIDX, DSPLO, DSPHI, DSPCRIDX, DSPCR, DSPCR_POS_SHIFT,
29 DSPCR_POS_MASK, DSPCR_POS_SMASK, DSPCR_SCOUNT_SHIFT, DSPCR_SCOUNT_MASK,
30 DSPCR_SCOUNT_SMASK, DSPCR_CARRY_SHIFT, DSPCR_CARRY_MASK,
31 DSPCR_CARRY_SMASK, DSPCR_CARRY, DSPCR_EFI_SHIFT, DSPCR_EFI_MASK,
32 DSPCR_EFI_SMASK, DSPCR_EFI, DSPCR_OUFLAG_SHIFT, DSPCR_OUFLAG_MASK,
33 DSPCR_OUFLAG_SMASK, DSPCR_OUFLAG4, DSPCR_OUFLAG5, DSPCR_OUFLAG6,
34 DSPCR_OUFLAG7, DSPCR_CCOND_SHIFT, DSPCR_CCOND_MASK,
35 DSPCR_CCOND_SMASK): New define.
36 (DSPLO_REGNUM, DSPHI_REGNUM): New array for DSP accumulators.
37 * dsp.c, dsp.igen: New files for MIPS DSP ASE.
39 2005-07-08 Ian Lance Taylor <ian@airs.com>
41 * tconfig.in (SIM_QUIET_NAN_NEGATED): Define.
43 2005-06-16 David Ung <davidu@mips.com>
44 Nigel Stephens <nigel@mips.com>
46 * mips.igen: New mips16e model and include m16e.igen.
47 (check_u64): Add mips16e tag.
48 * m16e.igen: New file for MIPS16e instructions.
49 * configure.ac (mipsisa32*-*-*, mipsisa32r2*-*-*, mipsisa64*-*-*,
50 mipsisa64r2*-*-*): Change sim_gen to M16, add mips16 and mips16e
52 * configure: Regenerate.
54 2005-05-26 David Ung <davidu@mips.com>
56 * mips.igen (mips32r2, mips64r2): New ISA models. Add new model
57 tags to all instructions which are applicable to the new ISAs.
58 (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Add, moved from
60 * mips3264r2.igen: New file for MIPS 32/64 revision 2 specific
62 * vr.igen (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Move
64 * configure.ac (mipsisa32r2*-*-*, mipsisa64r2*-*-*): Add new targets.
65 * configure: Regenerate.
67 2005-03-23 Mark Kettenis <kettenis@gnu.org>
69 * configure: Regenerate.
71 2005-01-14 Andrew Cagney <cagney@gnu.org>
73 * configure.ac: Sinclude aclocal.m4 before common.m4. Add
74 explicit call to AC_CONFIG_HEADER.
75 * configure: Regenerate.
77 2005-01-12 Andrew Cagney <cagney@gnu.org>
79 * configure.ac: Update to use ../common/common.m4.
80 * configure: Re-generate.
82 2005-01-11 Andrew Cagney <cagney@localhost.localdomain>
84 * configure: Regenerated to track ../common/aclocal.m4 changes.
86 2005-01-07 Andrew Cagney <cagney@gnu.org>
88 * configure.ac: Rename configure.in, require autoconf 2.59.
89 * configure: Re-generate.
91 2004-12-08 Hans-Peter Nilsson <hp@axis.com>
93 * configure: Regenerate for ../common/aclocal.m4 update.
95 2004-09-24 Monika Chaddha <monika@acmet.com>
97 Committed by Andrew Cagney.
98 * m16.igen (CMP, CMPI): Fix assembler.
100 2004-08-18 Chris Demetriou <cgd@broadcom.com>
102 * configure.in (mipsisa64sb1*-*-*): Add mips3d to sim_igen_machine.
103 * configure: Regenerate.
105 2004-06-25 Chris Demetriou <cgd@broadcom.com>
107 * configure.in (sim_m16_machine): Include mipsIII.
108 * configure: Regenerate.
110 2004-05-11 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
112 * mips/interp.c (decode_coproc): Sign-extend the address retrieved
114 * mips/sim-main.h (COP0_BADVADDR): Remove a cast.
116 2004-04-10 Chris Demetriou <cgd@broadcom.com>
118 * sb1.igen (DIV.PS, RECIP.PS, RSQRT.PS, SQRT.PS): New.
120 2004-04-09 Chris Demetriou <cgd@broadcom.com>
122 * mips.igen (check_fmt): Remove.
123 (ABS.fmt, ADD.fmt, C.cond.fmta, C.cond.fmtb, CEIL.L.fmt, CEIL.W)
124 (CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt, FLOOR.L.fmt)
125 (FLOOR.W.fmt, MADD.fmt, MOV.fmt, MOVtf.fmt, MOVN.fmt, MOVZ.fmt)
126 (MSUB.fmt, MUL.fmt, NEG.fmt, NMADD.fmt, NMSUB.fmt, RECIP.fmt)
127 (ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt)
128 (TRUNC.L.fmt, TRUNC.W): Explicitly specify allowed FPU formats.
129 (check_fmt_p, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
130 (FLOOR.W.fmt, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt)
131 (SQRT.fmt, TRUNC.L.fmt, TRUNC.W): Remove all uses of check_fmt.
132 (C.cnd.fmta): Remove incorrect call to check_fmt_p.
134 2004-04-09 Chris Demetriou <cgd@broadcom.com>
136 * sb1.igen (check_sbx): New function.
137 (PABSDIFF.fmt, PABSDIFC.fmt, PAVG.fmt): Use check_sbx.
139 2004-03-29 Chris Demetriou <cgd@broadcom.com>
140 Richard Sandiford <rsandifo@redhat.com>
142 * sim-main.h (MIPS_MACH_HAS_MT_HILO_HAZARD)
143 (MIPS_MACH_HAS_MULT_HILO_HAZARD, MIPS_MACH_HAS_DIV_HILO_HAZARD): New.
144 * mips.igen (check_mt_hilo, check_mult_hilo, check_div_hilo): Provide
145 separate implementations for mipsIV and mipsV. Use new macros to
146 determine whether the restrictions apply.
148 2004-01-19 Chris Demetriou <cgd@broadcom.com>
150 * mips.igen (check_mf_cycles, check_mt_hilo, check_mf_hilo)
151 (check_mult_hilo): Improve comments.
152 (check_div_hilo): Likewise. Also, fork off a new version
153 to handle mips32/mips64 (since there are no hazards to check
156 2003-06-17 Richard Sandiford <rsandifo@redhat.com>
158 * mips.igen (do_dmultx): Fix check for negative operands.
160 2003-05-16 Ian Lance Taylor <ian@airs.com>
162 * Makefile.in (SHELL): Make sure this is defined.
163 (various): Use $(SHELL) whenever we invoke move-if-change.
165 2003-05-03 Chris Demetriou <cgd@broadcom.com>
167 * cp1.c: Tweak attribution slightly.
170 * mdmx.igen: Likewise.
171 * mips3d.igen: Likewise.
172 * sb1.igen: Likewise.
174 2003-04-15 Richard Sandiford <rsandifo@redhat.com>
176 * vr.igen (do_vr_mul_op): Zero-extend the low 32 bits of
179 2003-02-27 Andrew Cagney <cagney@redhat.com>
181 * interp.c (sim_open): Rename _bfd to bfd.
182 (sim_create_inferior): Ditto.
184 2003-01-14 Chris Demetriou <cgd@broadcom.com>
186 * mips.igen (LUXC1, SUXC1): New, for mipsV and mips64.
188 2003-01-14 Chris Demetriou <cgd@broadcom.com>
190 * mips.igen (EI, DI): Remove.
192 2003-01-05 Richard Sandiford <rsandifo@redhat.com>
194 * Makefile.in (tmp-run-multi): Fix mips16 filter.
196 2003-01-04 Richard Sandiford <rsandifo@redhat.com>
197 Andrew Cagney <ac131313@redhat.com>
198 Gavin Romig-Koch <gavin@redhat.com>
199 Graydon Hoare <graydon@redhat.com>
200 Aldy Hernandez <aldyh@redhat.com>
201 Dave Brolley <brolley@redhat.com>
202 Chris Demetriou <cgd@broadcom.com>
204 * configure.in (mips64vr*): Define TARGET_ENABLE_FR to 1.
205 (sim_mach_default): New variable.
206 (mips64vr-*-*, mips64vrel-*-*): New configurations.
207 Add a new simulator generator, MULTI.
208 * configure: Regenerate.
209 * Makefile.in (SIM_MULTI_OBJ, SIM_EXTRA_DISTCLEAN): New variables.
210 (multi-run.o): New dependency.
211 (SIM_MULTI_ALL, SIM_MULTI_IGEN_CONFIGS): New variables.
212 (tmp-mach-multi, tmp-itable-multi, tmp-run-multi): New rules.
213 (tmp-multi): Combine them.
214 (BUILT_SRC_FROM_MULTI): New variable. Depend on tmp-multi.
215 (clean-extra): Remove sources in BUILT_SRC_FROM_MULTI.
216 (distclean-extra): New rule.
217 * sim-main.h: Include bfd.h.
218 (MIPS_MACH): New macro.
219 * mips.igen (vr4120, vr5400, vr5500): New models.
220 (clo, clz, dclo, dclz, madd, maddu, msub, msub, mul): Add *vr5500.
221 * vr.igen: Replace with new version.
223 2003-01-04 Chris Demetriou <cgd@broadcom.com>
225 * configure.in: Use SIM_AC_OPTION_RESERVED_BITS(1).
226 * configure: Regenerate.
228 2002-12-31 Chris Demetriou <cgd@broadcom.com>
230 * sim-main.h (check_branch_bug, mark_branch_bug): Remove.
231 * mips.igen: Remove all invocations of check_branch_bug and
234 2002-12-16 Chris Demetriou <cgd@broadcom.com>
236 * tconfig.in: Include "gdb/callback.h" and "gdb/remote-sim.h".
238 2002-07-30 Chris Demetriou <cgd@broadcom.com>
240 * mips.igen (do_load_double, do_store_double): New functions.
241 (LDC1, SDC1): Rename to...
242 (LDC1b, SDC1b): respectively.
243 (LDC1a, SDC1a): New instructions for MIPS II and MIPS32 support.
245 2002-07-29 Michael Snyder <msnyder@redhat.com>
247 * cp1.c (fp_recip2): Modify initialization expression so that
248 GCC will recognize it as constant.
250 2002-06-18 Chris Demetriou <cgd@broadcom.com>
252 * mdmx.c (SD_): Delete.
253 (Unpredictable): Re-define, for now, to directly invoke
254 unpredictable_action().
255 (mdmx_acc_op): Fix error in .ob immediate handling.
257 2002-06-18 Andrew Cagney <cagney@redhat.com>
259 * interp.c (sim_firmware_command): Initialize `address'.
261 2002-06-16 Andrew Cagney <ac131313@redhat.com>
263 * configure: Regenerated to track ../common/aclocal.m4 changes.
265 2002-06-14 Chris Demetriou <cgd@broadcom.com>
266 Ed Satterthwaite <ehs@broadcom.com>
268 * mips3d.igen: New file which contains MIPS-3D ASE instructions.
269 * Makefile.in (IGEN_INCLUDE): Add mips3d.igen.
270 * mips.igen: Include mips3d.igen.
271 (mips3d): New model name for MIPS-3D ASE instructions.
272 (CVT.W.fmt): Don't use this instruction for word (source) format
274 * cp1.c (fp_binary_r, fp_add_r, fp_mul_r, fpu_inv1, fpu_inv1_32)
275 (fpu_inv1_64, fp_recip1, fp_recip2, fpu_inv_sqrt1, fpu_inv_sqrt1_32)
276 (fpu_inv_sqrt1_64, fp_rsqrt1, fp_rsqrt2): New functions.
277 (NR_FRAC_GUARD, IMPLICIT_1): New macros.
278 * sim-main.h (fmt_pw, CompareAbs, AddR, MultiplyR, Recip1, Recip2)
279 (RSquareRoot1, RSquareRoot2): New macros.
280 (fp_add_r, fp_mul_r, fp_recip1, fp_recip2, fp_rsqrt1)
281 (fp_rsqrt2): New functions.
282 * configure.in: Add MIPS-3D support to mipsisa64 simulator.
283 * configure: Regenerate.
285 2002-06-13 Chris Demetriou <cgd@broadcom.com>
286 Ed Satterthwaite <ehs@broadcom.com>
288 * cp1.c (FP_PS_upper, FP_PS_lower, FP_PS_cat, FPQNaN_PS): New macros.
289 (value_fpr, store_fpr, fp_cmp, fp_unary, fp_binary, fp_mac)
290 (fp_inv_sqrt, fpu_format_name): Add paired-single support.
291 (convert): Note that this function is not used for paired-single
293 (ps_lower, ps_upper, pack_ps, convert_ps): New functions.
294 * mips.igen (FMT, MOVtf.fmt): Add paired-single support.
295 (check_fmt_p): Enable paired-single support.
296 (ALNV.PS, CVT.PS.S, CVT.S.PL, CVT.S.PU, PLL.PS, PLU.PS, PUL.PS)
297 (PUU.PS): New instructions.
298 (CVT.S.fmt): Don't use this instruction for paired-single format
300 * sim-main.h (FP_formats): New value 'fmt_ps.'
301 (ps_lower, ps_upper, pack_ps, convert_ps): New prototypes.
302 (PSLower, PSUpper, PackPS, ConvertPS): New macros.
304 2002-06-12 Chris Demetriou <cgd@broadcom.com>
306 * mips.igen: Fix formatting of function calls in
309 2002-06-12 Chris Demetriou <cgd@broadcom.com>
311 * mips.igen (MOVN, MOVZ): Trace result.
312 (TNEI): Print "tnei" as the opcode name in traces.
313 (CEIL.W): Add disassembly string for traces.
314 (RSQRT.fmt): Make location of disassembly string consistent
315 with other instructions.
317 2002-06-12 Chris Demetriou <cgd@broadcom.com>
319 * mips.igen (X): Delete unused function.
321 2002-06-08 Andrew Cagney <cagney@redhat.com>
323 * interp.c: Include "gdb/callback.h" and "gdb/remote-sim.h".
325 2002-06-07 Chris Demetriou <cgd@broadcom.com>
326 Ed Satterthwaite <ehs@broadcom.com>
328 * cp1.c (inner_mac, fp_mac, inner_rsqrt, fp_inv_sqrt)
329 (fp_rsqrt, fp_madd, fp_msub, fp_nmadd, fp_nmsub): New functions.
330 * sim-main.h (fp_rsqrt, fp_madd, fp_msub, fp_nmadd)
331 (fp_nmsub): New prototypes.
332 (RSquareRoot, MultiplyAdd, MultiplySub, NegMultiplyAdd)
333 (NegMultiplySub): New defines.
334 * mips.igen (RSQRT.fmt): Use RSquareRoot().
335 (MADD.D, MADD.S): Replace with...
336 (MADD.fmt): New instruction.
337 (MSUB.D, MSUB.S): Replace with...
338 (MSUB.fmt): New instruction.
339 (NMADD.D, NMADD.S): Replace with...
340 (NMADD.fmt): New instruction.
341 (NMSUB.D, MSUB.S): Replace with...
342 (NMSUB.fmt): New instruction.
344 2002-06-07 Chris Demetriou <cgd@broadcom.com>
345 Ed Satterthwaite <ehs@broadcom.com>
347 * cp1.c: Fix more comment spelling and formatting.
348 (value_fcr, store_fcr): Use fenr_FS rather than hard-coding value.
349 (denorm_mode): New function.
350 (fpu_unary, fpu_binary): Round results after operation, collect
351 status from rounding operations, and update the FCSR.
352 (convert): Collect status from integer conversions and rounding
353 operations, and update the FCSR. Adjust NaN values that result
354 from conversions. Convert to use sim_io_eprintf rather than
355 fprintf, and remove some debugging code.
356 * cp1.h (fenr_FS): New define.
358 2002-06-07 Chris Demetriou <cgd@broadcom.com>
360 * cp1.c (convert): Remove unusable debugging code, and move MIPS
361 rounding mode to sim FP rounding mode flag conversion code into...
362 (rounding_mode): New function.
364 2002-06-07 Chris Demetriou <cgd@broadcom.com>
366 * cp1.c: Clean up formatting of a few comments.
367 (value_fpr): Reformat switch statement.
369 2002-06-06 Chris Demetriou <cgd@broadcom.com>
370 Ed Satterthwaite <ehs@broadcom.com>
373 * sim-main.h: Include cp1.h.
374 (SETFCC, GETFCC, IR, UF, OF, DX, IO, UO, FP_FLAGS, FP_ENABLE)
375 (FP_CAUSE, GETFS, FP_RM_NEAREST, FP_RM_TOZERO, FP_RM_TOPINF)
376 (FP_RM_TOMINF, GETRM): Remove. Moved to cp1.h.
377 (FP_FS, FP_MASK_RM, FP_SH_RM, Nan, Less, Equal): Remove.
378 (value_fcr, store_fcr, test_fcsr, fp_cmp): New prototypes.
379 (ValueFCR, StoreFCR, TestFCSR, Compare): New macros.
380 * cp1.c: Don't include sim-fpu.h; already included by
381 sim-main.h. Clean up formatting of some comments.
382 (NaN, Equal, Less): Remove.
383 (test_fcsr, value_fcr, store_fcr, update_fcsr, fp_test)
384 (fp_cmp): New functions.
385 * mips.igen (do_c_cond_fmt): Remove.
386 (C.cond.fmta, C.cond.fmtb): Replace uses of do_c_cond_fmt_a with
387 Compare. Add result tracing.
388 (CxC1): Remove, replace with...
389 (CFC1a, CFC1b, CFC1c, CTC1a, CTC1b, CTC1c): New instructions.
390 (DMxC1): Remove, replace with...
391 (DMFC1a, DMFC1b, DMTC1a, DMTC1b): New instructions.
392 (MxC1): Remove, replace with...
393 (MFC1a, MFC1b, MTC1a, MTC1b): New instructions.
395 2002-06-04 Chris Demetriou <cgd@broadcom.com>
397 * sim-main.h (FGRIDX): Remove, replace all uses with...
398 (FGR_BASE): New macro.
399 (FP0_REGNUM, FCRCS_REGNUM, FCRIR_REGNUM): New macros.
400 (_sim_cpu): Move 'fgr' member to be right before 'fpr_state' member.
401 (NR_FGR, FGR): Likewise.
402 * interp.c: Replace all uses of FGRIDX with FGR_BASE.
403 * mips.igen: Likewise.
405 2002-06-04 Chris Demetriou <cgd@broadcom.com>
407 * cp1.c: Add an FSF Copyright notice to this file.
409 2002-06-04 Chris Demetriou <cgd@broadcom.com>
410 Ed Satterthwaite <ehs@broadcom.com>
412 * cp1.c (Infinity): Remove.
413 * sim-main.h (Infinity): Likewise.
415 * cp1.c (fp_unary, fp_binary): New functions.
416 (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div, fp_recip)
417 (fp_sqrt): New functions, implemented in terms of the above.
418 (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
419 (Recip, SquareRoot): Remove (replaced by functions above).
420 * sim-main.h (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div)
421 (fp_recip, fp_sqrt): New prototypes.
422 (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
423 (Recip, SquareRoot): Replace prototypes with #defines which
424 invoke the functions above.
426 2002-06-03 Chris Demetriou <cgd@broadcom.com>
428 * sim-main.h (Nan, Infinity, Less, Equal, AbsoluteValue, Negate)
429 (Add, Sub, Multiply, Divide, Recip, SquareRoot): Move lower in
430 file, remove PARAMS from prototypes.
431 (value_fpr, store_fpr, convert): Likewise. Use SIM_STATE to provide
432 simulator state arguments.
433 (ValueFPR, StoreFPR, Convert): Move lower in file. Use SIM_ARGS to
434 pass simulator state arguments.
435 * cp1.c (SD): Redefine as CPU_STATE(cpu).
436 (store_fpr, convert): Remove 'sd' argument.
437 (value_fpr): Likewise. Convert to use 'SD' instead.
439 2002-06-03 Chris Demetriou <cgd@broadcom.com>
441 * cp1.c (Min, Max): Remove #if 0'd functions.
442 * sim-main.h (Min, Max): Remove.
444 2002-06-03 Chris Demetriou <cgd@broadcom.com>
446 * cp1.c: fix formatting of switch case and default labels.
447 * interp.c: Likewise.
448 * sim-main.c: Likewise.
450 2002-06-03 Chris Demetriou <cgd@broadcom.com>
452 * cp1.c: Clean up comments which describe FP formats.
453 (FPQNaN_DOUBLE, FPQNaN_LONG): Generate using UNSIGNED64.
455 2002-06-03 Chris Demetriou <cgd@broadcom.com>
456 Ed Satterthwaite <ehs@broadcom.com>
458 * configure.in (mipsisa64sb1*-*-*): New target for supporting
459 Broadcom SiByte SB-1 processor configurations.
460 * configure: Regenerate.
461 * sb1.igen: New file.
462 * mips.igen: Include sb1.igen.
464 * Makefile.in (IGEN_INCLUDE): Add sb1.igen.
465 * mdmx.igen: Add "sb1" model to all appropriate functions and
467 * mdmx.c (AbsDiffOB, AvgOB, AccAbsDiffOB): New functions.
468 (ob_func, ob_acc): Reference the above.
469 (qh_acc): Adjust to keep the same size as ob_acc.
470 * sim-main.h (status_SBX, MX_VECT_ABSD, MX_VECT_AVG, MX_AbsDiff)
471 (MX_Avg, MX_VECT_ABSDA, MX_AbsDiffC): New macros.
473 2002-06-03 Chris Demetriou <cgd@broadcom.com>
475 * Makefile.in (IGEN_INCLUDE): Add mdmx.igen.
477 2002-06-02 Chris Demetriou <cgd@broadcom.com>
478 Ed Satterthwaite <ehs@broadcom.com>
480 * mips.igen (mdmx): New (pseudo-)model.
481 * mdmx.c, mdmx.igen: New files.
482 * Makefile.in (SIM_OBJS): Add mdmx.o.
483 * sim-main.h (MDMX_accumulator, MX_fmtsel, signed24, signed48):
485 (ACC, MX_Add, MX_AddA, MX_AddL, MX_And, MX_C_EQ, MX_C_LT, MX_Comp)
486 (MX_FMT_OB, MX_FMT_QH, MX_Max, MX_Min, MX_Msgn, MX_Mul, MX_MulA)
487 (MX_MulL, MX_MulS, MX_MulSL, MX_Nor, MX_Or, MX_Pick, MX_RAC)
488 (MX_RAC_H, MX_RAC_L, MX_RAC_M, MX_RNAS, MX_RNAU, MX_RND_AS)
489 (MX_RND_AU, MX_RND_ES, MX_RND_EU, MX_RND_ZS, MX_RND_ZU, MX_RNES)
490 (MX_RNEU, MX_RZS, MX_RZU, MX_SHFL, MX_ShiftLeftLogical)
491 (MX_ShiftRightArith, MX_ShiftRightLogical, MX_Sub, MX_SubA, MX_SubL)
492 (MX_VECT_ADD, MX_VECT_ADDA, MX_VECT_ADDL, MX_VECT_AND)
493 (MX_VECT_MAX, MX_VECT_MIN, MX_VECT_MSGN, MX_VECT_MUL, MX_VECT_MULA)
494 (MX_VECT_MULL, MX_VECT_MULS, MX_VECT_MULSL, MX_VECT_NOR)
495 (MX_VECT_OR, MX_VECT_SLL, MX_VECT_SRA, MX_VECT_SRL, MX_VECT_SUB)
496 (MX_VECT_SUBA, MX_VECT_SUBL, MX_VECT_XOR, MX_WACH, MX_WACL, MX_Xor)
497 (SIM_ARGS, SIM_STATE, UnpredictableResult, fmt_mdmx, ob_fmtsel)
498 (qh_fmtsel): New macros.
499 (_sim_cpu): New member "acc".
500 (mdmx_acc_op, mdmx_cc_op, mdmx_cpr_op, mdmx_pick_op, mdmx_rac_op)
501 (mdmx_round_op, mdmx_shuffle, mdmx_wach, mdmx_wacl): New functions.
503 2002-05-01 Chris Demetriou <cgd@broadcom.com>
505 * interp.c: Use 'deprecated' rather than 'depreciated.'
506 * sim-main.h: Likewise.
508 2002-05-01 Chris Demetriou <cgd@broadcom.com>
510 * cp1.c (store_fpr): Remove #ifdef'd out call to UndefinedResult
511 which wouldn't compile anyway.
512 * sim-main.h (unpredictable_action): New function prototype.
513 (Unpredictable): Define to call igen function unpredictable().
514 (NotWordValue): New macro to call igen function not_word_value().
515 (UndefinedResult): Remove.
516 * interp.c (undefined_result): Remove.
517 (unpredictable_action): New function.
518 * mips.igen (not_word_value, unpredictable): New functions.
519 (ADD, ADDI, do_addiu, do_addu, BGEZAL, BGEZALL, BLTZAL, BLTZALL)
520 (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, do_mult, do_multu)
521 (do_sra, do_srav, do_srl, do_srlv, SUB, do_subu): Invoke
522 NotWordValue() to check for unpredictable inputs, then
523 Unpredictable() to handle them.
525 2002-02-24 Chris Demetriou <cgd@broadcom.com>
527 * mips.igen: Fix formatting of calls to Unpredictable().
529 2002-04-20 Andrew Cagney <ac131313@redhat.com>
531 * interp.c (sim_open): Revert previous change.
533 2002-04-18 Alexandre Oliva <aoliva@redhat.com>
535 * interp.c (sim_open): Disable chunk of code that wrote code in
536 vector table entries.
538 2002-03-19 Chris Demetriou <cgd@broadcom.com>
540 * cp1.c (FP_S_s, FP_D_s, FP_S_be, FP_D_be, FP_S_e, FP_D_e, FP_S_f)
541 (FP_D_f, FP_S_fb, FP_D_fb, FPINF_SINGLE, FPINF_DOUBLE): Remove
544 2002-03-19 Chris Demetriou <cgd@broadcom.com>
546 * cp1.c: Fix many formatting issues.
548 2002-03-19 Chris G. Demetriou <cgd@broadcom.com>
550 * cp1.c (fpu_format_name): New function to replace...
551 (DOFMT): This. Delete, and update all callers.
552 (fpu_rounding_mode_name): New function to replace...
553 (RMMODE): This. Delete, and update all callers.
555 2002-03-19 Chris G. Demetriou <cgd@broadcom.com>
557 * interp.c: Move FPU support routines from here to...
558 * cp1.c: Here. New file.
559 * Makefile.in (SIM_OBJS): Add cp1.o to object list.
562 2002-03-12 Chris Demetriou <cgd@broadcom.com>
564 * configure.in (mipsisa32*-*-*, mipsisa64*-*-*): New targets.
565 * mips.igen (mips32, mips64): New models, add to all instructions
566 and functions as appropriate.
567 (loadstore_ea, check_u64): New variant for model mips64.
568 (check_fmt_p): New variant for models mipsV and mips64, remove
569 mipsV model marking fro other variant.
572 (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, SLLb): New instructions
573 for mips32 and mips64.
574 (DCLO, DCLZ): New instructions for mips64.
576 2002-03-07 Chris Demetriou <cgd@broadcom.com>
578 * mips.igen (BREAK, LUI, ORI, SYSCALL, XORI): Print
579 immediate or code as a hex value with the "%#lx" format.
580 (ANDI): Likewise, and fix printed instruction name.
582 2002-03-05 Chris Demetriou <cgd@broadcom.com>
584 * sim-main.h (UndefinedResult, Unpredictable): New macros
585 which currently do nothing.
587 2002-03-05 Chris Demetriou <cgd@broadcom.com>
589 * sim-main.h (status_UX, status_SX, status_KX, status_TS)
590 (status_PX, status_MX, status_CU0, status_CU1, status_CU2)
591 (status_CU3): New definitions.
593 * sim-main.h (ExceptionCause): Add new values for MIPS32
594 and MIPS64: MDMX, MCheck, CacheErr. Update comments
595 for DebugBreakPoint and NMIReset to note their status in
597 (SignalExceptionMDMX, SignalExceptionWatch, SignalExceptionMCheck)
598 (SignalExceptionCacheErr): New exception macros.
600 2002-03-05 Chris Demetriou <cgd@broadcom.com>
602 * mips.igen (check_fpu): Enable check for coprocessor 1 usability.
603 * sim-main.h (COP_Usable): Define, but for now coprocessor 1
605 (SignalExceptionCoProcessorUnusable): Take as argument the
606 unusable coprocessor number.
608 2002-03-05 Chris Demetriou <cgd@broadcom.com>
610 * mips.igen: Fix formatting of all SignalException calls.
612 2002-03-05 Chris Demetriou <cgd@broadcom.com>
614 * sim-main.h (SIGNEXTEND): Remove.
616 2002-03-04 Chris Demetriou <cgd@broadcom.com>
618 * mips.igen: Remove gencode comment from top of file, fix
619 spelling in another comment.
621 2002-03-04 Chris Demetriou <cgd@broadcom.com>
623 * mips.igen (check_fmt, check_fmt_p): New functions to check
624 whether specific floating point formats are usable.
625 (ABS.fmt, ADD.fmt, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
626 (FLOOR.W.fmt, MOV.fmt, MUL.fmt, NEG.fmt, RECIP.fmt, ROUND.L.fmt)
627 (ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt, TRUNC.L.fmt, TRUNC.W):
628 Use the new functions.
629 (do_c_cond_fmt): Remove format checks...
630 (C.cond.fmta, C.cond.fmtb): And move them into all callers.
632 2002-03-03 Chris Demetriou <cgd@broadcom.com>
634 * mips.igen: Fix formatting of check_fpu calls.
636 2002-03-03 Chris Demetriou <cgd@broadcom.com>
638 * mips.igen (FLOOR.L.fmt): Store correct destination register.
640 2002-03-03 Chris Demetriou <cgd@broadcom.com>
642 * mips.igen: Remove whitespace at end of lines.
644 2002-03-02 Chris Demetriou <cgd@broadcom.com>
646 * mips.igen (loadstore_ea): New function to do effective
647 address calculations.
648 (do_load, do_load_left, do_load_right, LL, LDD, PREF, do_store,
649 do_store_left, do_store_right, SC, SCD, PREFX, SWC1, SWXC1,
650 CACHE): Use loadstore_ea to do effective address computations.
652 2002-03-02 Chris Demetriou <cgd@broadcom.com>
654 * interp.c (load_word): Use EXTEND32 rather than SIGNEXTEND.
655 * mips.igen (LL, CxC1, MxC1): Likewise.
657 2002-03-02 Chris Demetriou <cgd@broadcom.com>
659 * mips.igen (LL, LLD, PREF, SC, SCD, ABS.fmt, ADD.fmt, CEIL.L.fmt,
660 CEIL.W, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt,
661 FLOOR.L.fmt, FLOOR.W.fmt, MADD.D, MADD.S, MOV.fmt, MOVtf.fmt,
662 MSUB.D, MSUB.S, MUL.fmt, NEG.fmt, NMADD.D, NMADD.S, NMSUB.D,
663 NMSUB.S, PREFX, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt,
664 SQRT.fmt, SUB.fmt, SWC1, SWXC1, TRUNC.L.fmt, TRUNC.W, CACHE):
665 Don't split opcode fields by hand, use the opcode field values
668 2002-03-01 Chris Demetriou <cgd@broadcom.com>
670 * mips.igen (do_divu): Fix spacing.
672 * mips.igen (do_dsllv): Move to be right before DSLLV,
673 to match the rest of the do_<shift> functions.
675 2002-03-01 Chris Demetriou <cgd@broadcom.com>
677 * mips.igen (do_dsll, do_dsllv, DSLL32, do_dsra, DSRA32, do_dsrl,
678 DSRL32, do_dsrlv): Trace inputs and results.
680 2002-03-01 Chris Demetriou <cgd@broadcom.com>
682 * mips.igen (CACHE): Provide instruction-printing string.
684 * interp.c (signal_exception): Comment tokens after #endif.
686 2002-02-28 Chris Demetriou <cgd@broadcom.com>
688 * mips.igen (LWXC1): Mark with filter "64,f", rather than just "32".
689 (MOVtf, MxC1, MxC1, DMxC1, DMxC1, CxC1, CxC1, SQRT.fmt, MOV.fmt,
690 NEG.fmt, ROUND.L.fmt, TRUNC.L.fmt, CEIL.L.fmt, FLOOR.L.fmt,
691 ROUND.W.fmt, TRUNC.W, CEIL.W, FLOOR.W.fmt, RECIP.fmt, RSQRT.fmt,
692 CVT.S.fmt, CVT.D.fmt, CVT.W.fmt, CVT.L.fmt, MOVtf.fmt, C.cond.fmta,
693 C.cond.fmtb, SUB.fmt, MUL.fmt, DIV.fmt, MOVZ.fmt, MOVN.fmt, LDXC1,
694 SWXC1, SDXC1, MSUB.D, MSUB.S, NMADD.S, NMADD.D, NMSUB.S, NMSUB.D,
695 LWC1, SWC1): Add "f" to filter, since these are FP instructions.
697 2002-02-28 Chris Demetriou <cgd@broadcom.com>
699 * mips.igen (DSRA32, DSRAV): Fix order of arguments in
700 instruction-printing string.
701 (LWU): Use '64' as the filter flag.
703 2002-02-28 Chris Demetriou <cgd@broadcom.com>
705 * mips.igen (SDXC1): Fix instruction-printing string.
707 2002-02-28 Chris Demetriou <cgd@broadcom.com>
709 * mips.igen (LDC1, SDC1): Remove mipsI model, and mark with
712 2002-02-27 Chris Demetriou <cgd@broadcom.com>
714 * mips.igen (PREFX): This is a 64-bit instruction, use '64'
717 2002-02-27 Chris Demetriou <cgd@broadcom.com>
719 * mips.igen (PREFX): Tweak instruction opcode fields (i.e.,
720 add a comma) so that it more closely match the MIPS ISA
721 documentation opcode partitioning.
722 (PREF): Put useful names on opcode fields, and include
723 instruction-printing string.
725 2002-02-27 Chris Demetriou <cgd@broadcom.com>
727 * mips.igen (check_u64): New function which in the future will
728 check whether 64-bit instructions are usable and signal an
729 exception if not. Currently a no-op.
730 (DADD, DADDI, DADDIU, DADDU, DDIV, DDIVU, DMULT, DMULTU, DSLL,
731 DSLL32, DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB,
732 DSUBU, LD, LDL, LDR, LLD, LWU, SCD, SD, SDL, SDR, DMxC1, LDXC1,
733 LWXC1, SDXC1, SWXC1, DMFC0, DMTC0): Use check_u64.
735 * mips.igen (check_fpu): New function which in the future will
736 check whether FPU instructions are usable and signal an exception
737 if not. Currently a no-op.
738 (ABS.fmt, ADD.fmt, BC1a, BC1b, C.cond.fmta, C.cond.fmtb,
739 CEIL.L.fmt, CEIL.W, CxC1, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt,
740 CVT.W.fmt, DIV.fmt, DMxC1, DMxC1, FLOOR.L.fmt, FLOOR.W.fmt, LDC1,
741 LDXC1, LWC1, LWXC1, MADD.D, MADD.S, MxC1, MOV.fmt, MOVtf,
742 MOVtf.fmt, MOVN.fmt, MOVZ.fmt, MSUB.D, MSUB.S, MUL.fmt, NEG.fmt,
743 NMADD.D, NMADD.S, NMSUB.D, NMSUB.S, RECIP.fmt, ROUND.L.fmt,
744 ROUND.W.fmt, RSQRT.fmt, SDC1, SDXC1, SQRT.fmt, SUB.fmt, SWC1,
745 SWXC1, TRUNC.L.fmt, TRUNC.W): Use check_fpu.
747 2002-02-27 Chris Demetriou <cgd@broadcom.com>
749 * mips.igen (do_load_left, do_load_right): Move to be immediately
751 (do_store_left, do_store_right): Move to be immediately following
754 2002-02-27 Chris Demetriou <cgd@broadcom.com>
756 * mips.igen (mipsV): New model name. Also, add it to
757 all instructions and functions where it is appropriate.
759 2002-02-18 Chris Demetriou <cgd@broadcom.com>
761 * mips.igen: For all functions and instructions, list model
762 names that support that instruction one per line.
764 2002-02-11 Chris Demetriou <cgd@broadcom.com>
766 * mips.igen: Add some additional comments about supported
767 models, and about which instructions go where.
768 (BC1b, MFC0, MTC0, RFE): Sort supported models in the same
769 order as is used in the rest of the file.
771 2002-02-11 Chris Demetriou <cgd@broadcom.com>
773 * mips.igen (ADD, ADDI, DADDI, DSUB, SUB): Add comment
774 indicating that ALU32_END or ALU64_END are there to check
776 (DADD): Likewise, but also remove previous comment about
779 2002-02-10 Chris Demetriou <cgd@broadcom.com>
781 * mips.igen (DDIV, DIV, DIVU, DMULT, DMULTU, DSLL, DSLL32,
782 DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB, DSUBU,
783 JALR, JR, MOVN, MOVZ, MTLO, MULT, MULTU, SLL, SLLV, SLT, SLTU,
784 SRAV, SRLV, SUB, SUBU, SYNC, XOR, MOVtf, DI, DMFC0, DMTC0, EI,
785 ERET, RFE, TLBP, TLBR, TLBWI, TLBWR): Tweak instruction opcode
786 fields (i.e., add and move commas) so that they more closely
787 match the MIPS ISA documentation opcode partitioning.
789 2002-02-10 Chris Demetriou <cgd@broadcom.com>
791 * mips.igen (ADDI): Print immediate value.
793 (DADDIU, DSRAV, DSRLV): Print correct instruction name.
794 (SLL): Print "nop" specially, and don't run the code
795 that does the shift for the "nop" case.
797 2001-11-17 Fred Fish <fnf@redhat.com>
799 * sim-main.h (float_operation): Move enum declaration outside
800 of _sim_cpu struct declaration.
802 2001-04-12 Jim Blandy <jimb@redhat.com>
804 * mips.igen (CFC1, CTC1): Pass the correct register numbers to
805 PENDING_FILL. Use PENDING_SCHED directly to handle the pending
807 * sim-main.h (COCIDX): Remove definition; this isn't supported by
808 PENDING_FILL, and you can get the intended effect gracefully by
809 calling PENDING_SCHED directly.
811 2001-02-23 Ben Elliston <bje@redhat.com>
813 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Only define if not
814 already defined elsewhere.
816 2001-02-19 Ben Elliston <bje@redhat.com>
818 * sim-main.h (sim_monitor): Return an int.
819 * interp.c (sim_monitor): Add return values.
820 (signal_exception): Handle error conditions from sim_monitor.
822 2001-02-08 Ben Elliston <bje@redhat.com>
824 * sim-main.c (load_memory): Pass cia to sim_core_read* functions.
825 (store_memory): Likewise, pass cia to sim_core_write*.
827 2000-10-19 Frank Ch. Eigler <fche@redhat.com>
829 On advice from Chris G. Demetriou <cgd@sibyte.com>:
830 * sim-main.h (GPR_CLEAR): Remove unused alternative macro.
832 Thu Jul 27 22:02:05 2000 Andrew Cagney <cagney@b1.cygnus.com>
834 From Maciej W. Rozycki <macro@ds2.pg.gda.pl>:
835 * Makefile.in: Don't delete *.igen when cleaning directory.
837 Wed Jul 19 18:50:51 2000 Andrew Cagney <cagney@b1.cygnus.com>
839 * m16.igen (break): Call SignalException not sim_engine_halt.
841 Mon Jul 3 11:13:20 2000 Andrew Cagney <cagney@b1.cygnus.com>
844 * mips.igen (MOVZ.fmt, MOVN.fmt): Move conditional on GPR[RT].
846 Tue Jun 13 20:52:07 2000 Andrew Cagney <cagney@b1.cygnus.com>
848 * mips.igen (MxC1, DMxC1): Fix printf formatting.
850 2000-05-24 Michael Hayes <mhayes@cygnus.com>
852 * mips.igen (do_dmultx): Fix typo.
854 Tue May 23 21:39:23 2000 Andrew Cagney <cagney@b1.cygnus.com>
856 * configure: Regenerated to track ../common/aclocal.m4 changes.
858 Fri Apr 28 20:48:36 2000 Andrew Cagney <cagney@b1.cygnus.com>
860 * mips.igen (DMxC1): Fix format arguments for sim_io_eprintf call.
862 2000-04-12 Frank Ch. Eigler <fche@redhat.com>
864 * sim-main.h (GPR_CLEAR): Define macro.
866 Mon Apr 10 00:07:09 2000 Andrew Cagney <cagney@b1.cygnus.com>
868 * interp.c (decode_coproc): Output long using %lx and not %s.
870 2000-03-21 Frank Ch. Eigler <fche@redhat.com>
872 * interp.c (sim_open): Sort & extend dummy memory regions for
873 --board=jmr3904 for eCos.
875 2000-03-02 Frank Ch. Eigler <fche@redhat.com>
877 * configure: Regenerated.
879 Tue Feb 8 18:35:01 2000 Donald Lindsay <dlindsay@hound.cygnus.com>
881 * interp.c, mips.igen: all 5 DEADC0DE situations now have sim_io_eprintf
882 calls, conditional on the simulator being in verbose mode.
884 Fri Feb 4 09:45:15 2000 Donald Lindsay <dlindsay@cygnus.com>
886 * sim-main.c (cache_op): Added case arm so that CACHE ops to a secondary
887 cache don't get ReservedInstruction traps.
889 1999-11-29 Mark Salter <msalter@cygnus.com>
891 * dv-tx3904sio.c (tx3904sio_io_write_buffer): Use write value as a mask
892 to clear status bits in sdisr register. This is how the hardware works.
894 * interp.c (sim_open): Added more memory aliases for jmr3904 hardware
895 being used by cygmon.
897 1999-11-11 Andrew Haley <aph@cygnus.com>
899 * interp.c (decode_coproc): Correctly handle DMFC0 and DMTC0
902 Thu Sep 9 15:12:08 1999 Geoffrey Keating <geoffk@cygnus.com>
904 * mips.igen (MULT): Correct previous mis-applied patch.
906 Tue Sep 7 13:34:54 1999 Geoffrey Keating <geoffk@cygnus.com>
908 * mips.igen (delayslot32): Handle sequence like
909 mtc1 $at,$f12 ; jal fp_add ; mov.s $f13,$f12
910 correctly by calling ENGINE_ISSUE_PREFIX_HOOK() before issue.
911 (MULT): Actually pass the third register...
913 1999-09-03 Mark Salter <msalter@cygnus.com>
915 * interp.c (sim_open): Added more memory aliases for additional
916 hardware being touched by cygmon on jmr3904 board.
918 Thu Sep 2 18:15:53 1999 Andrew Cagney <cagney@b1.cygnus.com>
920 * configure: Regenerated to track ../common/aclocal.m4 changes.
922 Tue Jul 27 16:36:51 1999 Andrew Cagney <cagney@amy.cygnus.com>
924 * interp.c (sim_store_register): Handle case where client - GDB -
925 specifies that a 4 byte register is 8 bytes in size.
926 (sim_fetch_register): Ditto.
928 1999-07-14 Frank Ch. Eigler <fche@cygnus.com>
930 Implement "sim firmware" option, inspired by jimb's version of 1998-01.
931 * interp.c (firmware_option_p): New global flag: "sim firmware" given.
932 (idt_monitor_base): Base address for IDT monitor traps.
933 (pmon_monitor_base): Ditto for PMON.
934 (lsipmon_monitor_base): Ditto for LSI PMON.
935 (MONITOR_BASE, MONITOR_SIZE): Removed macros.
936 (mips_option): Add "firmware" option with new OPTION_FIRMWARE key.
937 (sim_firmware_command): New function.
938 (mips_option_handler): Call it for OPTION_FIRMWARE.
939 (sim_open): Allocate memory for idt_monitor region. If "--board"
940 option was given, add no monitor by default. Add BREAK hooks only if
941 monitors are also there.
943 Mon Jul 12 00:02:27 1999 Andrew Cagney <cagney@amy.cygnus.com>
945 * interp.c (sim_monitor): Flush output before reading input.
947 Sun Jul 11 19:28:11 1999 Andrew Cagney <cagney@b1.cygnus.com>
949 * tconfig.in (SIM_HANDLES_LMA): Always define.
951 Thu Jul 8 16:06:59 1999 Andrew Cagney <cagney@b1.cygnus.com>
953 From Mark Salter <msalter@cygnus.com>:
954 * interp.c (BOARD_BSP): Define. Add to list of possible boards.
955 (sim_open): Add setup for BSP board.
957 Wed Jul 7 12:45:58 1999 Andrew Cagney <cagney@b1.cygnus.com>
959 * mips.igen (MULT, MULTU): Add syntax for two operand version.
960 (DMFC0, DMTC0): Recognize. Call DecodeCoproc which will report
961 them as unimplemented.
963 1999-05-08 Felix Lee <flee@cygnus.com>
965 * configure: Regenerated to track ../common/aclocal.m4 changes.
967 1999-04-21 Frank Ch. Eigler <fche@cygnus.com>
969 * mips.igen (bc0f): For the TX39 only, decode this as a no-op stub.
971 Thu Apr 15 14:15:17 1999 Andrew Cagney <cagney@amy.cygnus.com>
973 * configure.in: Any mips64vr5*-*-* target should have
974 -DTARGET_ENABLE_FR=1.
975 (default_endian): Any mips64vr*el-*-* target should default to
977 * configure: Re-generate.
979 1999-02-19 Gavin Romig-Koch <gavin@cygnus.com>
981 * mips.igen (ldl): Extend from _16_, not 32.
983 Wed Jan 27 18:51:38 1999 Andrew Cagney <cagney@chook.cygnus.com>
985 * interp.c (sim_store_register): Force registers written to by GDB
986 into an un-interpreted state.
988 1999-02-05 Frank Ch. Eigler <fche@cygnus.com>
990 * dv-tx3904sio.c (tx3904sio_tickle): After a polled I/O from the
991 CPU, start periodic background I/O polls.
992 (tx3904sio_poll): New function: periodic I/O poller.
994 1998-12-30 Frank Ch. Eigler <fche@cygnus.com>
996 * mips.igen (BREAK): Call signal_exception instead of sim_engine_halt.
998 Tue Dec 29 16:03:53 1998 Rainer Orth <ro@TechFak.Uni-Bielefeld.DE>
1000 * configure.in, configure (mips64vr5*-*-*): Added missing ;; in
1003 1998-12-29 Frank Ch. Eigler <fche@cygnus.com>
1005 * interp.c (sim_open): Allocate jm3904 memory in smaller chunks.
1006 (load_word): Call SIM_CORE_SIGNAL hook on error.
1007 (signal_exception): Call SIM_CPU_EXCEPTION_TRIGGER hook before
1008 starting. For exception dispatching, pass PC instead of NULL_CIA.
1009 (decode_coproc): Use COP0_BADVADDR to store faulting address.
1010 * sim-main.h (COP0_BADVADDR): Define.
1011 (SIM_CORE_SIGNAL): Define hook to call mips_core_signal.
1012 (SIM_CPU_EXCEPTION*): Define hooks to call mips_cpu_exception*().
1013 (_sim_cpu): Add exc_* fields to store register value snapshots.
1014 * mips.igen (*): Replace memory-related SignalException* calls
1015 with references to SIM_CORE_SIGNAL hook.
1017 * dv-tx3904irc.c (tx3904irc_port_event): printf format warning
1019 * sim-main.c (*): Minor warning cleanups.
1021 1998-12-24 Gavin Romig-Koch <gavin@cygnus.com>
1023 * m16.igen (DADDIU5): Correct type-o.
1025 Mon Dec 21 10:34:48 1998 Andrew Cagney <cagney@chook>
1027 * mips.igen (do_ddiv, do_ddivu): Pacify GCC. Update hi/lo via tmp
1030 Wed Dec 16 18:20:28 1998 Andrew Cagney <cagney@chook>
1032 * Makefile.in (SIM_EXTRA_CFLAGS): No longer need to add .../newlib
1034 (interp.o): Add dependency on itable.h
1035 (oengine.c, gencode): Delete remaining references.
1036 (BUILT_SRC_FROM_GEN): Clean up.
1038 1998-12-16 Gavin Romig-Koch <gavin@cygnus.com>
1041 * Makefile.in (SIM_HACK_OBJ,HACK_OBJS,HACK_GEN_SRCS,libhack.a,
1042 tmp-hack,tmp-m32-hack,tmp-m16-hack,tmp-itable-hack,
1043 tmp-run-hack) : New.
1044 * m16.igen (LD,DADDIU,DADDUI5,DADJSP,DADDIUSP,DADDI,DADDU,DSUBU,
1045 DSLL,DSRL,DSRA,DSLLV,DSRAV,DMULT,DMULTU,DDIV,DDIVU,JALX32,JALX):
1046 Drop the "64" qualifier to get the HACK generator working.
1047 Use IMMEDIATE rather than IMMED. Use SHAMT rather than SHIFT.
1048 * mips.igen (do_daddiu,do_ddiv,do_divu): Remove the 64-only
1049 qualifier to get the hack generator working.
1050 (do_dsll,do_dsllv,do_dsra,do_dsrl,do_dsrlv): New.
1051 (DSLL): Use do_dsll.
1052 (DSLLV): Use do_dsllv.
1053 (DSRA): Use do_dsra.
1054 (DSRL): Use do_dsrl.
1055 (DSRLV): Use do_dsrlv.
1056 (BC1): Move *vr4100 to get the HACK generator working.
1057 (CxC1, DMxC1, MxC1,MACCU,MACCHI,MACCHIU): Rename to
1058 get the HACK generator working.
1059 (MACC) Rename to get the HACK generator working.
1060 (DMACC,MACCS,DMACCS): Add the 64.
1062 1998-12-12 Gavin Romig-Koch <gavin@cygnus.com>
1064 * mips.igen (BC1): Renamed to BC1a and BC1b to avoid conflicts.
1065 * sim-main.h (SizeFGR): Handle TARGET_ENABLE_FR.
1067 1998-12-11 Gavin Romig-Koch <gavin@cygnus.com>
1069 * mips/interp.c (DEBUG): Cleanups.
1071 1998-12-10 Frank Ch. Eigler <fche@cygnus.com>
1073 * dv-tx3904sio.c (tx3904sio_io_read_buffer): Endianness fixes.
1074 (tx3904sio_tickle): fflush after a stdout character output.
1076 1998-12-03 Frank Ch. Eigler <fche@cygnus.com>
1078 * interp.c (sim_close): Uninstall modules.
1080 Wed Nov 25 13:41:03 1998 Andrew Cagney <cagney@b1.cygnus.com>
1082 * sim-main.h, interp.c (sim_monitor): Change to global
1085 Wed Nov 25 17:33:24 1998 Andrew Cagney <cagney@b1.cygnus.com>
1087 * configure.in (vr4100): Only include vr4100 instructions in
1089 * configure: Re-generate.
1090 * m16.igen (*): Tag all mips16 instructions as also being vr4100.
1092 Mon Nov 23 18:20:36 1998 Andrew Cagney <cagney@b1.cygnus.com>
1094 * Makefile.in (SIM_CFLAGS): Do not define WITH_IGEN.
1095 * sim-main.h, sim-main.c, interp.c: Delete #if WITH_IGEN keeping
1098 * configure.in (sim_default_gen, sim_use_gen): Replace with
1100 (--enable-sim-igen): Delete config option. Always using IGEN.
1101 * configure: Re-generate.
1103 * Makefile.in (gencode): Kill, kill, kill.
1106 Mon Nov 23 18:07:36 1998 Andrew Cagney <cagney@b1.cygnus.com>
1108 * configure.in: Configure mips64vr4100-elf nee mips64vr41* as a 64
1109 bit mips16 igen simulator.
1110 * configure: Re-generate.
1112 * mips.igen (check_div_hilo, check_mult_hilo, check_mf_hilo): Mark
1113 as part of vr4100 ISA.
1114 * vr.igen: Mark all instructions as 64 bit only.
1116 Mon Nov 23 17:07:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
1118 * interp.c (get_cell, sim_monitor, fetch_str, CoProcPresent):
1121 Mon Nov 23 13:23:40 1998 Andrew Cagney <cagney@b1.cygnus.com>
1123 * configure.in: Configure mips-lsi-elf nee mips*lsi* as a
1124 mipsIII/mips16 igen simulator. Fix sim_gen VS sim_igen typos.
1125 * configure: Re-generate.
1127 * m16.igen (BREAK): Define breakpoint instruction.
1128 (JALX32): Mark instruction as mips16 and not r3900.
1129 * mips.igen (C.cond.fmt): Fix typo in instruction format.
1131 * sim-main.h (PENDING_FILL): Wrap C statements in do/while.
1133 Sat Nov 7 09:54:38 1998 Andrew Cagney <cagney@b1.cygnus.com>
1135 * gencode.c (build_instruction - BREAK): For MIPS16, handle BREAK
1136 insn as a debug breakpoint.
1138 * sim-main.h (PENDING_SLOT_BIT): Fix, was incorrectly defined as
1140 (PENDING_SCHED): Clean up trace statement.
1141 (PENDING_SCHED): Increment PENDING_IN and PENDING_TOTAL.
1142 (PENDING_FILL): Delay write by only one cycle.
1143 (PENDING_FILL): For FSRs, write fmt_uninterpreted to FPR_STATE.
1145 * sim-main.c (pending_tick): Clean up trace statements. Add trace
1147 (pending_tick): Fix sizes in switch statements, 4 & 8 instead of
1149 (pending_tick): Move incrementing of index to FOR statement.
1150 (pending_tick): Only update PENDING_OUT after a write has occured.
1152 * configure.in: Add explicit mips-lsi-* target. Use gencode to
1154 * configure: Re-generate.
1156 * interp.c (sim_engine_run OLD): Delete explicit call to
1157 PENDING_TICK. Now called via ENGINE_ISSUE_PREFIX_HOOK.
1159 Sat Oct 30 09:49:10 1998 Frank Ch. Eigler <fche@cygnus.com>
1161 * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Add dummy
1162 interrupt level number to match changed SignalExceptionInterrupt
1165 Fri Oct 9 18:02:25 1998 Doug Evans <devans@canuck.cygnus.com>
1167 * interp.c: #include "itable.h" if WITH_IGEN.
1168 (get_insn_name): New function.
1169 (sim_open): Initialize CPU_INSN_NAME,CPU_MAX_INSNS.
1170 * sim-main.h (MAX_INSNS,INSN_NAME): Delete.
1172 Mon Sep 14 12:36:44 1998 Frank Ch. Eigler <fche@cygnus.com>
1174 * configure: Rebuilt to inhale new common/aclocal.m4.
1176 Tue Sep 1 15:39:18 1998 Frank Ch. Eigler <fche@cygnus.com>
1178 * dv-tx3904sio.c: Include sim-assert.h.
1180 Tue Aug 25 12:49:46 1998 Frank Ch. Eigler <fche@cygnus.com>
1182 * dv-tx3904sio.c: New file: tx3904 serial I/O module.
1183 * configure.in: Add dv-tx3904sio, dv-sockser for tx39 target.
1184 Reorganize target-specific sim-hardware checks.
1185 * configure: rebuilt.
1186 * interp.c (sim_open): For tx39 target boards, set
1187 OPERATING_ENVIRONMENT, add tx3904sio devices.
1188 * tconfig.in: For tx39 target, set SIM_HANDLES_LMA for loading
1189 ROM executables. Install dv-sockser into sim-modules list.
1191 * dv-tx3904irc.c: Compiler warning clean-up.
1192 * dv-tx3904tmr.c: Compiler warning clean-up. Remove particularly
1193 frequent hw-trace messages.
1195 Fri Jul 31 18:14:16 1998 Andrew Cagney <cagney@b1.cygnus.com>
1197 * vr.igen (MulAcc): Identify as a vr4100 specific function.
1199 Sat Jul 25 16:03:14 1998 Andrew Cagney <cagney@b1.cygnus.com>
1201 * Makefile.in (IGEN_INCLUDE): Add vr.igen.
1203 * vr.igen: New file.
1204 (MAC/MADD16, DMAC/DMADD16): Implement using code from gencode.c.
1205 * mips.igen: Define vr4100 model. Include vr.igen.
1206 Mon Jun 29 09:21:07 1998 Gavin Koch <gavin@cygnus.com>
1208 * mips.igen (check_mf_hilo): Correct check.
1210 Wed Jun 17 12:20:49 1998 Andrew Cagney <cagney@b1.cygnus.com>
1212 * sim-main.h (interrupt_event): Add prototype.
1214 * dv-tx3904tmr.c (tx3904tmr_io_write_buffer): Delete unused
1215 register_ptr, register_value.
1216 (deliver_tx3904tmr_tick): Fix types passed to printf fmt.
1218 * sim-main.h (tracefh): Make extern.
1220 Tue Jun 16 14:39:00 1998 Frank Ch. Eigler <fche@cygnus.com>
1222 * dv-tx3904tmr.c: Deschedule timer event after dispatching.
1223 Reduce unnecessarily high timer event frequency.
1224 * dv-tx3904cpu.c: Ditto for interrupt event.
1226 Wed Jun 10 13:22:32 1998 Frank Ch. Eigler <fche@cygnus.com>
1228 * interp.c (decode_coproc): For TX39, add stub COP0 register #7,
1230 (interrupt_event): Made non-static.
1232 * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Correct accidental
1233 interchange of configuration values for external vs. internal
1236 Tue Jun 9 12:46:24 1998 Ian Carmichael <iancarm@cygnus.com>
1238 * mips.igen (BREAK): Moved code to here for
1239 simulator-reserved break instructions.
1240 * gencode.c (build_instruction): Ditto.
1241 * interp.c (signal_exception): Code moved from here. Non-
1242 reserved instructions now use exception vector, rather
1244 * sim-main.h: Moved magic constants to here.
1246 Tue Jun 9 12:29:50 1998 Frank Ch. Eigler <fche@cygnus.com>
1248 * dv-tx3904cpu.c (deliver_*_interrupt,*_port_event): Set the CAUSE
1249 register upon non-zero interrupt event level, clear upon zero
1251 * dv-tx3904irc.c (*_port_event): Handle deactivated interrupt signal
1252 by passing zero event value.
1253 (*_io_{read,write}_buffer): Endianness fixes.
1254 * dv-tx3904tmr.c (*_io_{read,write}_buffer): Endianness fixes.
1255 (deliver_*_tick): Reduce sim event interval to 75% of count interval.
1257 * interp.c (sim_open): Added jmr3904pal board type that adds PAL-based
1258 serial I/O and timer module at base address 0xFFFF0000.
1260 Tue Jun 9 11:52:29 1998 Gavin Koch <gavin@cygnus.com>
1262 * mips.igen (SWC1) : Correct the handling of ReverseEndian
1265 Tue Jun 9 11:40:57 1998 Gavin Koch <gavin@cygnus.com>
1267 * configure.in (mips_fpu_bitsize) : Set this correctly for 32-bit mips
1269 * configure: Update.
1271 Thu Jun 4 15:37:33 1998 Frank Ch. Eigler <fche@cygnus.com>
1273 * dv-tx3904tmr.c: New file - implements tx3904 timer.
1274 * dv-tx3904{irc,cpu}.c: Mild reformatting.
1275 * configure.in: Include tx3904tmr in hw_device list.
1276 * configure: Rebuilt.
1277 * interp.c (sim_open): Instantiate three timer instances.
1278 Fix address typo of tx3904irc instance.
1280 Tue Jun 2 15:48:02 1998 Ian Carmichael <iancarm@cygnus.com>
1282 * interp.c (signal_exception): SystemCall exception now uses
1283 the exception vector.
1285 Mon Jun 1 18:18:26 1998 Frank Ch. Eigler <fche@cygnus.com>
1287 * interp.c (decode_coproc): For TX39, add stub COP0 register #3,
1290 Fri May 29 11:40:39 1998 Andrew Cagney <cagney@b1.cygnus.com>
1292 * configure.in (sim_igen_filter): Match mips*tx39 not mipst*tx39.
1294 Mon May 25 20:47:45 1998 Andrew Cagney <cagney@b1.cygnus.com>
1296 * dv-tx3904cpu.c, dv-tx3904irc.c: Rename *_callback to *_method.
1298 * dv-tx3904cpu.c, dv-tx3904irc.c: Include hw-main.h and
1299 sim-main.h. Declare a struct hw_descriptor instead of struct
1300 hw_device_descriptor.
1302 Mon May 25 12:41:38 1998 Andrew Cagney <cagney@b1.cygnus.com>
1304 * mips.igen (do_store_left, do_load_left): Compute nr of left and
1305 right bits and then re-align left hand bytes to correct byte
1306 lanes. Fix incorrect computation in do_store_left when loading
1307 bytes from second word.
1309 Fri May 22 13:34:20 1998 Andrew Cagney <cagney@b1.cygnus.com>
1311 * configure.in (SIM_AC_OPTION_HARDWARE): Only enable when tx3904.
1312 * interp.c (sim_open): Only create a device tree when HW is
1315 * dv-tx3904irc.c (tx3904irc_finish): Pacify GCC.
1316 * interp.c (signal_exception): Ditto.
1318 Thu May 21 14:24:11 1998 Gavin Koch <gavin@cygnus.com>
1320 * gencode.c: Mark BEGEZALL as LIKELY.
1322 Thu May 21 18:57:19 1998 Andrew Cagney <cagney@b1.cygnus.com>
1324 * sim-main.h (ALU32_END): Sign extend 32 bit results.
1325 * mips.igen (ADD, SUB, ADDI, DADD, DSUB): Trace.
1327 Mon May 18 18:22:42 1998 Frank Ch. Eigler <fche@cygnus.com>
1329 * configure.in (SIM_AC_OPTION_HARDWARE): Added common hardware
1330 modules. Recognize TX39 target with "mips*tx39" pattern.
1331 * configure: Rebuilt.
1332 * sim-main.h (*): Added many macros defining bits in
1333 TX39 control registers.
1334 (SignalInterrupt): Send actual PC instead of NULL.
1335 (SignalNMIReset): New exception type.
1336 * interp.c (board): New variable for future use to identify
1337 a particular board being simulated.
1338 (mips_option_handler,mips_options): Added "--board" option.
1339 (interrupt_event): Send actual PC.
1340 (sim_open): Make memory layout conditional on board setting.
1341 (signal_exception): Initial implementation of hardware interrupt
1342 handling. Accept another break instruction variant for simulator
1344 (decode_coproc): Implement RFE instruction for TX39.
1345 (mips.igen): Decode RFE instruction as such.
1346 * configure.in (tx3904cpu,tx3904irc): Added devices for tx3904.
1347 * interp.c: Define "jmr3904" and "jmr3904debug" board types and
1348 bbegin to implement memory map.
1349 * dv-tx3904cpu.c: New file.
1350 * dv-tx3904irc.c: New file.
1352 Wed May 13 14:40:11 1998 Gavin Koch <gavin@cygnus.com>
1354 * mips.igen (check_mt_hilo): Create a separate r3900 version.
1356 Wed May 13 14:11:46 1998 Gavin Koch <gavin@cygnus.com>
1358 * tx.igen (madd,maddu): Replace calls to check_op_hilo
1359 with calls to check_div_hilo.
1361 Wed May 13 09:59:27 1998 Gavin Koch <gavin@cygnus.com>
1363 * mips/mips.igen (check_op_hilo,check_mult_hilo,check_div_hilo):
1364 Replace check_op_hilo with check_mult_hilo and check_div_hilo.
1365 Add special r3900 version of do_mult_hilo.
1366 (do_dmultx,do_mult,do_multu): Replace calls to check_op_hilo
1367 with calls to check_mult_hilo.
1368 (do_ddiv,do_ddivu,do_div,do_divu): Replace calls to check_op_hilo
1369 with calls to check_div_hilo.
1371 Tue May 12 15:22:11 1998 Andrew Cagney <cagney@b1.cygnus.com>
1373 * configure.in (SUBTARGET_R3900): Define for mipstx39 target.
1374 Document a replacement.
1376 Fri May 8 17:48:19 1998 Ian Carmichael <iancarm@cygnus.com>
1378 * interp.c (sim_monitor): Make mon_printf work.
1380 Wed May 6 19:42:19 1998 Doug Evans <devans@canuck.cygnus.com>
1382 * sim-main.h (INSN_NAME): New arg `cpu'.
1384 Tue Apr 28 18:33:31 1998 Geoffrey Noer <noer@cygnus.com>
1386 * configure: Regenerated to track ../common/aclocal.m4 changes.
1388 Sun Apr 26 15:31:55 1998 Tom Tromey <tromey@creche>
1390 * configure: Regenerated to track ../common/aclocal.m4 changes.
1393 Sun Apr 26 15:20:01 1998 Tom Tromey <tromey@cygnus.com>
1395 * acconfig.h: New file.
1396 * configure.in: Reverted change of Apr 24; use sinclude again.
1398 Fri Apr 24 14:16:40 1998 Tom Tromey <tromey@creche>
1400 * configure: Regenerated to track ../common/aclocal.m4 changes.
1403 Fri Apr 24 11:19:20 1998 Tom Tromey <tromey@cygnus.com>
1405 * configure.in: Don't call sinclude.
1407 Fri Apr 24 11:35:01 1998 Andrew Cagney <cagney@chook.cygnus.com>
1409 * mips.igen (do_store_left): Pass 0 not NULL to store_memory.
1411 Tue Apr 21 11:59:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
1413 * mips.igen (ERET): Implement.
1415 * interp.c (decode_coproc): Return sign-extended EPC.
1417 * mips.igen (ANDI, LUI, MFC0): Add tracing code.
1419 * interp.c (signal_exception): Do not ignore Trap.
1420 (signal_exception): On TRAP, restart at exception address.
1421 (HALT_INSTRUCTION, HALT_INSTRUCTION_MASK): Define.
1422 (signal_exception): Update.
1423 (sim_open): Patch V_COMMON interrupt vector with an abort sequence
1424 so that TRAP instructions are caught.
1426 Mon Apr 20 11:26:55 1998 Andrew Cagney <cagney@b1.cygnus.com>
1428 * sim-main.h (struct hilo_access, struct hilo_history): Define,
1429 contains HI/LO access history.
1430 (struct _sim_cpu): Make hiaccess and loaccess of type hilo_access.
1431 (HIACCESS, LOACCESS): Delete, replace with
1432 (HIHISTORY, LOHISTORY): New macros.
1433 (CHECKHILO): Delete all, moved to mips.igen
1435 * gencode.c (build_instruction): Do not generate checks for
1436 correct HI/LO register usage.
1438 * interp.c (old_engine_run): Delete checks for correct HI/LO
1441 * mips.igen (check_mt_hilo, check_mf_hilo, check_op_hilo,
1442 check_mf_cycles): New functions.
1443 (do_mfhi, do_mflo, "mthi", "mtlo", do_ddiv, do_ddivu, do_div,
1444 do_divu, domultx, do_mult, do_multu): Use.
1446 * tx.igen ("madd", "maddu"): Use.
1448 Wed Apr 15 18:31:54 1998 Andrew Cagney <cagney@b1.cygnus.com>
1450 * mips.igen (DSRAV): Use function do_dsrav.
1451 (SRAV): Use new function do_srav.
1453 * m16.igen (BEQZ, BNEZ): Compare GPR[TRX] not GPR[RX].
1454 (B): Sign extend 11 bit immediate.
1455 (EXT-B*): Shift 16 bit immediate left by 1.
1456 (ADDIU*): Don't sign extend immediate value.
1458 Wed Apr 15 10:32:15 1998 Andrew Cagney <cagney@b1.cygnus.com>
1460 * m16run.c (sim_engine_run): Restore CIA after handling an event.
1462 * sim-main.h (DELAY_SLOT, NULLIFY_NEXT_INSTRUCTION): For IGEN, use
1465 * mips.igen (delayslot32, nullify_next_insn): New functions.
1466 (m16.igen): Always include.
1467 (do_*): Add more tracing.
1469 * m16.igen (delayslot16): Add NIA argument, could be called by a
1470 32 bit MIPS16 instruction.
1472 * interp.c (ifetch16): Move function from here.
1473 * sim-main.c (ifetch16): To here.
1475 * sim-main.c (ifetch16, ifetch32): Update to match current
1476 implementations of LH, LW.
1477 (signal_exception): Don't print out incorrect hex value of illegal
1480 Wed Apr 15 00:17:25 1998 Andrew Cagney <cagney@b1.cygnus.com>
1482 * m16run.c (sim_engine_run): Use IMEM16 and IMEM32 to fetch an
1485 * m16.igen: Implement MIPS16 instructions.
1487 * mips.igen (do_addiu, do_addu, do_and, do_daddiu, do_daddu,
1488 do_ddiv, do_ddivu, do_div, do_divu, do_dmultx, do_dmultu, do_srav,
1489 do_dsubu, do_mfhi, do_mflo, do_mult, do_multu, do_nor, do_or,
1490 do_sll, do_sllv, do_slt, do_slti, do_sltiu, do_sltu, do_sra,
1491 do_srl, do_srlv, do_subu, do_xor, do_xori): New functions. Move
1492 bodies of corresponding code from 32 bit insn to these. Also used
1493 by MIPS16 versions of functions.
1495 * sim-main.h (RAIDX, T8IDX, T8, SPIDX): Define.
1496 (IMEM16): Drop NR argument from macro.
1498 Sat Apr 4 22:39:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
1500 * Makefile.in (SIM_OBJS): Add sim-main.o.
1502 * sim-main.h (address_translation, load_memory, store_memory,
1503 cache_op, sync_operation, prefetch, ifetch32, pending_tick): Mark
1505 (pr_addr, pr_uword64): Declare.
1506 (sim-main.c): Include when H_REVEALS_MODULE_P.
1508 * interp.c (address_translation, load_memory, store_memory,
1509 cache_op, sync_operation, prefetch, ifetch32, pending_tick): Move
1511 * sim-main.c: To here. Fix compilation problems.
1513 * configure.in: Enable inlining.
1514 * configure: Re-config.
1516 Sat Apr 4 20:36:25 1998 Andrew Cagney <cagney@b1.cygnus.com>
1518 * configure: Regenerated to track ../common/aclocal.m4 changes.
1520 Fri Apr 3 04:32:35 1998 Andrew Cagney <cagney@b1.cygnus.com>
1522 * mips.igen: Include tx.igen.
1523 * Makefile.in (IGEN_INCLUDE): Add tx.igen.
1524 * tx.igen: New file, contains MADD and MADDU.
1526 * interp.c (load_memory): When shifting bytes, use LOADDRMASK not
1527 the hardwired constant `7'.
1528 (store_memory): Ditto.
1529 (LOADDRMASK): Move definition to sim-main.h.
1531 mips.igen (MTC0): Enable for r3900.
1534 mips.igen (do_load_byte): Delete.
1535 (do_load, do_store, do_load_left, do_load_write, do_store_left,
1536 do_store_right): New functions.
1537 (SW*, LW*, SD*, LD*, SH, LH, SB, LB): Use.
1539 configure.in: Let the tx39 use igen again.
1542 Thu Apr 2 10:59:39 1998 Andrew Cagney <cagney@b1.cygnus.com>
1544 * interp.c (sim_monitor): get_mem_info returns a 4 byte quantity,
1545 not an address sized quantity. Return zero for cache sizes.
1547 Wed Apr 1 23:47:53 1998 Andrew Cagney <cagney@b1.cygnus.com>
1549 * mips.igen (r3900): r3900 does not support 64 bit integer
1552 Mon Mar 30 14:46:05 1998 Gavin Koch <gavin@cygnus.com>
1554 * configure.in (mipstx39*-*-*): Use gencode simulator rather
1556 * configure : Rebuild.
1558 Fri Mar 27 16:15:52 1998 Andrew Cagney <cagney@b1.cygnus.com>
1560 * configure: Regenerated to track ../common/aclocal.m4 changes.
1562 Fri Mar 27 15:01:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
1564 * interp.c (mips_option_handler): Iterate over MAX_NR_PROCESSORS.
1566 Wed Mar 25 16:44:27 1998 Ian Carmichael <iancarm@cygnus.com>
1568 * configure: Regenerated to track ../common/aclocal.m4 changes.
1569 * config.in: Regenerated to track ../common/aclocal.m4 changes.
1571 Wed Mar 25 12:35:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
1573 * configure: Regenerated to track ../common/aclocal.m4 changes.
1575 Wed Mar 25 10:05:46 1998 Andrew Cagney <cagney@b1.cygnus.com>
1577 * interp.c (Max, Min): Comment out functions. Not yet used.
1579 Wed Mar 18 12:38:12 1998 Andrew Cagney <cagney@b1.cygnus.com>
1581 * configure: Regenerated to track ../common/aclocal.m4 changes.
1583 Tue Mar 17 19:05:20 1998 Frank Ch. Eigler <fche@cygnus.com>
1585 * Makefile.in (MIPS_EXTRA_LIBS, SIM_EXTRA_LIBS): Added
1586 configurable settings for stand-alone simulator.
1588 * configure.in: Added X11 search, just in case.
1590 * configure: Regenerated.
1592 Wed Mar 11 14:09:10 1998 Andrew Cagney <cagney@b1.cygnus.com>
1594 * interp.c (sim_write, sim_read, load_memory, store_memory):
1595 Replace sim_core_*_map with read_map, write_map, exec_map resp.
1597 Tue Mar 3 13:58:43 1998 Andrew Cagney <cagney@b1.cygnus.com>
1599 * sim-main.h (GETFCC): Return an unsigned value.
1601 Tue Mar 3 13:21:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
1603 * mips.igen (DIV): Fix check for -1 / MIN_INT.
1604 (DADD): Result destination is RD not RT.
1606 Fri Feb 27 13:49:49 1998 Andrew Cagney <cagney@b1.cygnus.com>
1608 * sim-main.h (HIACCESS, LOACCESS): Always define.
1610 * mdmx.igen (Maxi, Mini): Rename Max, Min.
1612 * interp.c (sim_info): Delete.
1614 Fri Feb 27 18:41:01 1998 Doug Evans <devans@canuck.cygnus.com>
1616 * interp.c (DECLARE_OPTION_HANDLER): Use it.
1617 (mips_option_handler): New argument `cpu'.
1618 (sim_open): Update call to sim_add_option_table.
1620 Wed Feb 25 18:56:22 1998 Andrew Cagney <cagney@b1.cygnus.com>
1622 * mips.igen (CxC1): Add tracing.
1624 Fri Feb 20 17:43:21 1998 Andrew Cagney <cagney@b1.cygnus.com>
1626 * sim-main.h (Max, Min): Declare.
1628 * interp.c (Max, Min): New functions.
1630 * mips.igen (BC1): Add tracing.
1632 Thu Feb 19 14:50:00 1998 John Metzler <jmetzler@cygnus.com>
1634 * interp.c Added memory map for stack in vr4100
1636 Thu Feb 19 10:21:21 1998 Gavin Koch <gavin@cygnus.com>
1638 * interp.c (load_memory): Add missing "break"'s.
1640 Tue Feb 17 12:45:35 1998 Andrew Cagney <cagney@b1.cygnus.com>
1642 * interp.c (sim_store_register, sim_fetch_register): Pass in
1643 length parameter. Return -1.
1645 Tue Feb 10 11:57:40 1998 Ian Carmichael <iancarm@cygnus.com>
1647 * interp.c: Added hardware init hook, fixed warnings.
1649 Sat Feb 7 17:16:20 1998 Andrew Cagney <cagney@b1.cygnus.com>
1651 * Makefile.in (itable.h itable.c): Depend on SIM_@sim_gen@_ALL.
1653 Tue Feb 3 11:36:02 1998 Andrew Cagney <cagney@b1.cygnus.com>
1655 * interp.c (ifetch16): New function.
1657 * sim-main.h (IMEM32): Rename IMEM.
1658 (IMEM16_IMMED): Define.
1660 (DELAY_SLOT): Update.
1662 * m16run.c (sim_engine_run): New file.
1664 * m16.igen: All instructions except LB.
1665 (LB): Call do_load_byte.
1666 * mips.igen (do_load_byte): New function.
1667 (LB): Call do_load_byte.
1669 * mips.igen: Move spec for insn bit size and high bit from here.
1670 * Makefile.in (tmp-igen, tmp-m16): To here.
1672 * m16.dc: New file, decode mips16 instructions.
1674 * Makefile.in (SIM_NO_ALL): Define.
1675 (tmp-m16): Generate both 16 bit and 32 bit simulator engines.
1677 Tue Feb 3 11:28:00 1998 Andrew Cagney <cagney@b1.cygnus.com>
1679 * configure.in (mips_fpu_bitsize): For tx39, restrict floating
1680 point unit to 32 bit registers.
1681 * configure: Re-generate.
1683 Sun Feb 1 15:47:14 1998 Andrew Cagney <cagney@b1.cygnus.com>
1685 * configure.in (sim_use_gen): Make IGEN the default simulator
1686 generator for generic 32 and 64 bit mips targets.
1687 * configure: Re-generate.
1689 Sun Feb 1 16:52:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
1691 * sim-main.h (SizeFGR): Determine from floating-point and not gpr
1694 * interp.c (sim_fetch_register, sim_store_register): Read/write
1695 FGR from correct location.
1696 (sim_open): Set size of FGR's according to
1697 WITH_TARGET_FLOATING_POINT_BITSIZE.
1699 * sim-main.h (FGR): Store floating point registers in a separate
1702 Sun Feb 1 16:47:51 1998 Andrew Cagney <cagney@b1.cygnus.com>
1704 * configure: Regenerated to track ../common/aclocal.m4 changes.
1706 Tue Feb 3 00:10:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
1708 * interp.c (ColdReset): Call PENDING_INVALIDATE.
1710 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Call PENDING_TICK.
1712 * interp.c (pending_tick): New function. Deliver pending writes.
1714 * sim-main.h (PENDING_FILL, PENDING_TICK, PENDING_SCHED,
1715 PENDING_BIT, PENDING_INVALIDATE): Re-write pipeline code so that
1716 it can handle mixed sized quantites and single bits.
1718 Mon Feb 2 17:43:15 1998 Andrew Cagney <cagney@b1.cygnus.com>
1720 * interp.c (oengine.h): Do not include when building with IGEN.
1721 (sim_open): Replace GPRLEN by WITH_TARGET_WORD_BITSIZE.
1722 (sim_info): Ditto for PROCESSOR_64BIT.
1723 (sim_monitor): Replace ut_reg with unsigned_word.
1724 (*): Ditto for t_reg.
1725 (LOADDRMASK): Define.
1726 (sim_open): Remove defunct check that host FP is IEEE compliant,
1727 using software to emulate floating point.
1728 (value_fpr, ...): Always compile, was conditional on HASFPU.
1730 Sun Feb 1 11:15:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
1732 * sim-main.h (sim_state): Make the cpu array MAX_NR_PROCESSORS in
1735 * interp.c (SD, CPU): Define.
1736 (mips_option_handler): Set flags in each CPU.
1737 (interrupt_event): Assume CPU 0 is the one being iterrupted.
1738 (sim_close): Do not clear STATE, deleted anyway.
1739 (sim_write, sim_read): Assume CPU zero's vm should be used for
1741 (sim_create_inferior): Set the PC for all processors.
1742 (sim_monitor, store_word, load_word, mips16_entry): Add cpu
1744 (mips16_entry): Pass correct nr of args to store_word, load_word.
1745 (ColdReset): Cold reset all cpu's.
1746 (signal_exception): Pass cpu to sim_monitor & mips16_entry.
1747 (sim_monitor, load_memory, store_memory, signal_exception): Use
1748 `CPU' instead of STATE_CPU.
1751 * sim-main.h: Replace uses of STATE_CPU with CPU. Replace sd with
1754 * sim-main.h (signal_exception): Add sim_cpu arg.
1755 (SignalException*): Pass both SD and CPU to signal_exception.
1756 * interp.c (signal_exception): Update.
1758 * sim-main.h (value_fpr, store_fpr, dotrace, ifetch32), interp.c:
1760 (sync_operation, prefetch, cache_op, store_memory, load_memory,
1761 address_translation): Ditto
1762 (decode_coproc, cop_lw, cop_ld, cop_sw, cop_sd): Ditto.
1764 Sat Jan 31 18:15:41 1998 Andrew Cagney <cagney@b1.cygnus.com>
1766 * configure: Regenerated to track ../common/aclocal.m4 changes.
1768 Sat Jan 31 14:49:24 1998 Andrew Cagney <cagney@b1.cygnus.com>
1770 * interp.c (sim_engine_run): Add `nr_cpus' argument.
1772 * mips.igen (model): Map processor names onto BFD name.
1774 * sim-main.h (CPU_CIA): Delete.
1775 (SET_CIA, GET_CIA): Define
1777 Wed Jan 21 16:16:27 1998 Andrew Cagney <cagney@b1.cygnus.com>
1779 * sim-main.h (GPR_SET): Define, used by igen when zeroing a
1782 * configure.in (default_endian): Configure a big-endian simulator
1784 * configure: Re-generate.
1786 Mon Jan 19 22:26:29 1998 Doug Evans <devans@seba>
1788 * configure: Regenerated to track ../common/aclocal.m4 changes.
1790 Mon Jan 5 20:38:54 1998 Mark Alexander <marka@cygnus.com>
1792 * interp.c (sim_monitor): Handle Densan monitor outbyte
1793 and inbyte functions.
1795 1997-12-29 Felix Lee <flee@cygnus.com>
1797 * interp.c (sim_engine_run): msvc cpp barfs on #if (a==b!=c).
1799 Wed Dec 17 14:48:20 1997 Jeffrey A Law (law@cygnus.com)
1801 * Makefile.in (tmp-igen): Arrange for $zero to always be
1802 reset to zero after every instruction.
1804 Mon Dec 15 23:17:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
1806 * configure: Regenerated to track ../common/aclocal.m4 changes.
1809 Wed Dec 10 17:10:45 1997 Jeffrey A Law (law@cygnus.com)
1811 * mips.igen (MSUB): Fix to work like MADD.
1812 * gencode.c (MSUB): Similarly.
1814 Thu Dec 4 09:21:05 1997 Doug Evans <devans@canuck.cygnus.com>
1816 * configure: Regenerated to track ../common/aclocal.m4 changes.
1818 Wed Nov 26 11:00:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
1820 * mips.igen (LWC1): Correct assembler - lwc1 not swc1.
1822 Sun Nov 23 01:45:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
1824 * sim-main.h (sim-fpu.h): Include.
1826 * interp.c (convert, SquareRoot, Recip, Divide, Multiply, Sub,
1827 Add, Negate, AbsoluteValue, Equal, Less, Infinity, NaN): Rewrite
1828 using host independant sim_fpu module.
1830 Thu Nov 20 19:56:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
1832 * interp.c (signal_exception): Report internal errors with SIGABRT
1835 * sim-main.h (C0_CONFIG): New register.
1836 (signal.h): No longer include.
1838 * interp.c (decode_coproc): Allow access C0_CONFIG to register.
1840 Tue Nov 18 15:33:48 1997 Doug Evans <devans@canuck.cygnus.com>
1842 * Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS).
1844 Fri Nov 14 11:56:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
1846 * mips.igen: Tag vr5000 instructions.
1847 (ANDI): Was missing mipsIV model, fix assembler syntax.
1848 (do_c_cond_fmt): New function.
1849 (C.cond.fmt): Handle mips I-III which do not support CC field
1851 (bc1): Handle mips IV which do not have a delaed FCC separatly.
1852 (SDR): Mask paddr when BigEndianMem, not the converse as specified
1854 (DMULT, DMULTU): Force use of hosts 64bit multiplication. Handle
1855 vr5000 which saves LO in a GPR separatly.
1857 * configure.in (enable-sim-igen): For vr5000, select vr5000
1858 specific instructions.
1859 * configure: Re-generate.
1861 Wed Nov 12 14:42:52 1997 Andrew Cagney <cagney@b1.cygnus.com>
1863 * Makefile.in (SIM_OBJS): Add sim-fpu module.
1865 * interp.c (store_fpr), sim-main.h: Add separate fmt_uninterpreted_32 and
1866 fmt_uninterpreted_64 bit cases to switch. Convert to
1869 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Define,
1871 * mips.igen (SWR): Mask paddr when BigEndianMem, not the converse
1872 as specified in IV3.2 spec.
1873 (MTC1, DMTC1): Call StoreFPR to store the GPR in the FPR.
1875 Tue Nov 11 12:38:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
1877 * mips.igen: Delay slot branches add OFFSET to NIA not CIA.
1878 (MFC0, MTC0, SWC1, LWC1, SDC1, LDC1): Implement.
1879 (MTC1, MFC1, DMTC1, DMFC1, CFC1, CTC1): Implement separate non
1880 PENDING_FILL versions of instructions. Simplify.
1882 (MULT, MULTU): Implement separate RD==0 and RD!=0 versions of
1884 (BEQZ, ..., SLT, SLTI, TLT, TLE, TLI, ...): Explicitly cast GPR to
1886 (MTHI, MFHI): Disable code checking HI-LO.
1888 * sim-main.h (dotrace,tracefh), interp.c: Make dotrace & tracefh
1890 (NULLIFY_NEXT_INSTRUCTION): Call dotrace.
1892 Thu Nov 6 16:36:35 1997 Andrew Cagney <cagney@b1.cygnus.com>
1894 * gencode.c (build_mips16_operands): Replace IPC with cia.
1896 * interp.c (sim_monitor, signal_exception, cache_op, store_fpr,
1897 value_fpr, cop_ld, cop_lw, cop_sw, cop_sd, decode_coproc): Replace
1899 (UndefinedResult): Replace function with macro/function
1901 (sim_engine_run): Don't save PC in IPC.
1903 * sim-main.h (IPC): Delete.
1906 * interp.c (signal_exception, store_word, load_word,
1907 address_translation, load_memory, store_memory, cache_op,
1908 prefetch, sync_operation, ifetch, value_fpr, store_fpr, convert,
1909 cop_lw, cop_ld, cop_sw, cop_sd, decode_coproc, sim_monitor): Add
1910 current instruction address - cia - argument.
1911 (sim_read, sim_write): Call address_translation directly.
1912 (sim_engine_run): Rename variable vaddr to cia.
1913 (signal_exception): Pass cia to sim_monitor
1915 * sim-main.h (SignalException, LoadWord, StoreWord, CacheOp,
1916 Prefetch, SyncOperation, ValueFPR, StoreFPR, Convert, COP_LW,
1917 COP_LD, COP_SW, COP_SD, DecodeCoproc): Update.
1919 * sim-main.h (SignalExceptionSimulatorFault): Delete definition.
1920 * interp.c (sim_open): Replace SignalExceptionSimulatorFault with
1923 * interp.c (signal_exception): Pass restart address to
1926 * Makefile.in (semantics.o, engine.o, support.o, itable.o,
1927 idecode.o): Add dependency.
1929 * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESUME_HOOK):
1931 (DELAY_SLOT): Update NIA not PC with branch address.
1932 (NULLIFY_NEXT_INSTRUCTION): Set NIA to instruction after next.
1934 * mips.igen: Use CIA not PC in branch calculations.
1935 (illegal): Call SignalException.
1936 (BEQ, ADDIU): Fix assembler.
1938 Wed Nov 5 12:19:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
1940 * m16.igen (JALX): Was missing.
1942 * configure.in (enable-sim-igen): New configuration option.
1943 * configure: Re-generate.
1945 * sim-main.h (MAX_INSNS, INSN_NAME): Define.
1947 * interp.c (load_memory, store_memory): Delete parameter RAW.
1948 (sim_read, sim_write): Use sim_core_{read,write}_buffer directly
1949 bypassing {load,store}_memory.
1951 * sim-main.h (ByteSwapMem): Delete definition.
1953 * Makefile.in (SIM_OBJS): Add sim-memopt module.
1955 * interp.c (sim_do_command, sim_commands): Delete mips specific
1956 commands. Handled by module sim-options.
1958 * sim-main.h (SIM_HAVE_FLATMEM): Undefine, use sim-core.o module.
1959 (WITH_MODULO_MEMORY): Define.
1961 * interp.c (sim_info): Delete code printing memory size.
1963 * interp.c (mips_size): Nee sim_size, delete function.
1965 (monitor, monitor_base, monitor_size): Delete global variables.
1966 (sim_open, sim_close): Delete code creating monitor and other
1967 memory regions. Use sim-memopts module, via sim_do_commandf, to
1968 manage memory regions.
1969 (load_memory, store_memory): Use sim-core for memory model.
1971 * interp.c (address_translation): Delete all memory map code
1972 except line forcing 32 bit addresses.
1974 Wed Nov 5 11:21:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
1976 * sim-main.h (WITH_TRACE): Delete definition. Enables common
1979 * interp.c (logfh, logfile): Delete globals.
1980 (sim_open, sim_close): Delete code opening & closing log file.
1981 (mips_option_handler): Delete -l and -n options.
1982 (OPTION mips_options): Ditto.
1984 * interp.c (OPTION mips_options): Rename option trace to dinero.
1985 (mips_option_handler): Update.
1987 Wed Nov 5 09:35:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
1989 * interp.c (fetch_str): New function.
1990 (sim_monitor): Rewrite using sim_read & sim_write.
1991 (sim_open): Check magic number.
1992 (sim_open): Write monitor vectors into memory using sim_write.
1993 (MONITOR_BASE, MONITOR_SIZE, MEM_SIZE): Define.
1994 (sim_read, sim_write): Simplify - transfer data one byte at a
1996 (load_memory, store_memory): Clarify meaning of parameter RAW.
1998 * sim-main.h (isHOST): Defete definition.
1999 (isTARGET): Mark as depreciated.
2000 (address_translation): Delete parameter HOST.
2002 * interp.c (address_translation): Delete parameter HOST.
2004 Wed Oct 29 11:13:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
2008 * Makefile.in (IGEN_INCLUDE): Files included by mips.igen.
2009 (tmp-igen, tmp-m16): Depend on IGEN_INCLUDE.
2011 Tue Oct 28 11:06:47 1997 Andrew Cagney <cagney@b1.cygnus.com>
2013 * mips.igen: Add model filter field to records.
2015 Mon Oct 27 17:53:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
2017 * Makefile.in (SIM_NO_CFLAGS): Define. Define WITH_IGEN=0.
2019 interp.c (sim_engine_run): Do not compile function sim_engine_run
2020 when WITH_IGEN == 1.
2022 * configure.in (sim_igen_flags, sim_m16_flags): Set according to
2023 target architecture.
2025 Makefile.in (tmp-igen, tmp-m16): Drop -F and -M options to
2026 igen. Replace with configuration variables sim_igen_flags /
2029 * m16.igen: New file. Copy mips16 insns here.
2030 * mips.igen: From here.
2032 Mon Oct 27 13:53:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
2034 * Makefile.in (SIM_NO_OBJ): Define, move SIM_M16_OBJ, SIM_IGEN_OBJ
2036 (tmp-igen, tmp-m16): Pass -I srcdir to igen.
2038 Sat Oct 25 16:51:40 1997 Gavin Koch <gavin@cygnus.com>
2040 * gencode.c (build_instruction): Follow sim_write's lead in using
2041 BigEndianMem instead of !ByteSwapMem.
2043 Fri Oct 24 17:41:49 1997 Andrew Cagney <cagney@b1.cygnus.com>
2045 * configure.in (sim_gen): Dependent on target, select type of
2046 generator. Always select old style generator.
2048 configure: Re-generate.
2050 Makefile.in (tmp-igen, tmp-m16, clean-m16, clean-igen): New
2052 (SIM_M16_CFLAGS, SIM_M16_ALL, SIM_M16_OBJ, BUILT_SRC_FROM_M16,
2053 SIM_IGEN_CFLAGS, SIM_IGEN_ALL, SIM_IGEN_OBJ, BUILT_SRC_FROM_IGEN,
2054 IGEN_TRACE, IGEN_INSN, IGEN_DC): Define
2055 (SIM_EXTRA_CFLAGS, SIM_EXTRA_ALL, SIM_OBJS): Add member
2056 SIM_@sim_gen@_*, set by autoconf.
2058 Wed Oct 22 12:52:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
2060 * sim-main.h (NULLIFY_NEXT_INSTRUCTION, DELAY_SLOT): Define.
2062 * interp.c (ColdReset): Remove #ifdef HASFPU, check
2063 CURRENT_FLOATING_POINT instead.
2065 * interp.c (ifetch32): New function. Fetch 32 bit instruction.
2066 (address_translation): Raise exception InstructionFetch when
2067 translation fails and isINSTRUCTION.
2069 * interp.c (sim_open, sim_write, sim_monitor, store_word,
2070 sim_engine_run): Change type of of vaddr and paddr to
2072 (address_translation, prefetch, load_memory, store_memory,
2073 cache_op): Change type of vAddr and pAddr to address_word.
2075 * gencode.c (build_instruction): Change type of vaddr and paddr to
2078 Mon Oct 20 15:29:04 1997 Andrew Cagney <cagney@b1.cygnus.com>
2080 * sim-main.h (ALU64_END, ALU32_END): Use ALU*_OVERFLOW_RESULT
2081 macro to obtain result of ALU op.
2083 Tue Oct 21 17:39:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
2085 * interp.c (sim_info): Call profile_print.
2087 Mon Oct 20 13:31:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2089 * Makefile.in (SIM_OBJS): Add sim-profile.o module.
2091 * sim-main.h (WITH_PROFILE): Do not define, defined in
2092 common/sim-config.h. Use sim-profile module.
2093 (simPROFILE): Delete defintion.
2095 * interp.c (PROFILE): Delete definition.
2096 (mips_option_handler): Delete 'p', 'y' and 'x' profile options.
2097 (sim_close): Delete code writing profile histogram.
2098 (mips_set_profile, mips_set_profile_size, writeout16, writeout32):
2100 (sim_engine_run): Delete code profiling the PC.
2102 Mon Oct 20 13:31:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2104 * sim-main.h (SIGNEXTEND): Force type of result to unsigned_word.
2106 * interp.c (sim_monitor): Make register pointers of type
2109 * sim-main.h: Make registers of type unsigned_word not
2112 Thu Oct 16 10:31:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
2114 * interp.c (sync_operation): Rename from SyncOperation, make
2115 global, add SD argument.
2116 (prefetch): Rename from Prefetch, make global, add SD argument.
2117 (decode_coproc): Make global.
2119 * sim-main.h (SyncOperation, DecodeCoproc, Pefetch): Define.
2121 * gencode.c (build_instruction): Generate DecodeCoproc not
2122 decode_coproc calls.
2124 * interp.c (SETFCC, GETFCC, PREVCOC1): Move to sim-main.h
2125 (SizeFGR): Move to sim-main.h
2126 (simHALTEX, simHALTIN, simTRACE, simPROFILE, simDELAYSLOT,
2127 simSIGINT, simJALDELAYSLOT): Move to sim-main.h
2128 (FP_FLAGS, FP_ENABLE, FP_CAUSE, IR, UF, OF, DZ, IO, UO): Move to
2130 (FP_FS, FP_MASK_RM, FP_SH_RM, FP_RM_NEAREST, FP_RM_TOPINF,
2131 FP_RM_TOMINF, GETRM): Move to sim-main.h.
2132 (Uncached, CachedNoncoherent, CachedCoherent, Cached,
2133 isINSTRUCTION, ..., AccessLength_BYTE, ...): Move to sim-main.h.
2134 (UserMode, BigEndianMem, ByteSwapMem, ReverseEndian,
2135 BigEndianCPU, status_KSU_mask, ...). Moved to sim-main.h
2137 * sim-main.h (ALU32_END, ALU64_END): Define. When overflow raise
2139 (sim-alu.h): Include.
2140 (NULLIFY_NIA, NULL_CIA, CPU_CIA): Define.
2141 (sim_cia): Typedef to instruction_address.
2143 Thu Oct 16 10:31:41 1997 Andrew Cagney <cagney@b1.cygnus.com>
2145 * Makefile.in (interp.o): Rename generated file engine.c to
2150 Thu Oct 16 10:31:40 1997 Andrew Cagney <cagney@b1.cygnus.com>
2152 * gencode.c (build_instruction): Use FPR_STATE not fpr_state.
2154 Thu Oct 16 10:31:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
2156 * gencode.c (build_instruction): For "FPSQRT", output correct
2157 number of arguments to Recip.
2159 Tue Oct 14 17:38:18 1997 Andrew Cagney <cagney@b1.cygnus.com>
2161 * Makefile.in (interp.o): Depends on sim-main.h
2163 * interp.c (mips16_entry, ColdReset,dotrace): Add SD argument. Use GPR not registers.
2165 * sim-main.h (sim_cpu): Add registers, register_widths, fpr_state,
2166 ipc, dspc, pending_*, hiaccess, loaccess, state, dsstate fields.
2167 (REGISTERS, REGISTER_WIDTHS, FPR_STATE, IPC, DSPC, PENDING_*,
2168 STATE, DSSTATE): Define
2169 (GPR, FGRIDX, ..): Define.
2171 * interp.c (registers, register_widths, fpr_state, ipc, dspc,
2172 pending_*, hiaccess, loaccess, state, dsstate): Delete globals.
2173 (GPR, FGRIDX, ...): Delete macros.
2175 * interp.c: Update names to match defines from sim-main.h
2177 Tue Oct 14 15:11:45 1997 Andrew Cagney <cagney@b1.cygnus.com>
2179 * interp.c (sim_monitor): Add SD argument.
2180 (sim_warning): Delete. Replace calls with calls to
2182 (sim_error): Delete. Replace calls with sim_io_error.
2183 (open_trace, writeout32, writeout16, getnum): Add SD argument.
2184 (mips_set_profile): Rename from sim_set_profile. Add SD argument.
2185 (mips_set_profile_size): Rename from sim_set_profile_size. Add SD
2187 (mips_size): Rename from sim_size. Add SD argument.
2189 * interp.c (simulator): Delete global variable.
2190 (callback): Delete global variable.
2191 (mips_option_handler, sim_open, sim_write, sim_read,
2192 sim_store_register, sim_fetch_register, sim_info, sim_do_command,
2193 sim_size,sim_monitor): Use sim_io_* not callback->*.
2194 (sim_open): ZALLOC simulator struct.
2195 (PROFILE): Do not define.
2197 Tue Oct 14 13:35:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2199 * interp.c (sim_open), support.h: Replace CHECKSIM macro found in
2200 support.h with corresponding code.
2202 * sim-main.h (word64, uword64), support.h: Move definition to
2204 (WORD64LO, WORD64HI, SET64LO, SET64HI, WORD64, UWORD64): Ditto.
2207 * Makefile.in: Update dependencies
2208 * interp.c: Do not include.
2210 Tue Oct 14 13:35:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2212 * interp.c (address_translation, load_memory, store_memory,
2213 cache_op): Rename to from AddressTranslation et.al., make global,
2216 * sim-main.h (AddressTranslation, LoadMemory, StoreMemory,
2219 * interp.c (SignalException): Rename to signal_exception, make
2222 * interp.c (Interrupt, ...): Move definitions to sim-main.h.
2224 * sim-main.h (SignalException, SignalExceptionInterrupt,
2225 SignalExceptionInstructionFetch, SignalExceptionAddressStore,
2226 SignalExceptionAddressLoad, SignalExceptionSimulatorFault,
2227 SignalExceptionIntegerOverflow, SignalExceptionCoProcessorUnusable):
2230 * interp.c, support.h: Use.
2232 Tue Oct 14 13:19:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2234 * interp.c (ValueFPR, StoreFPR), sim-main.h: Make global, rename
2235 to value_fpr / store_fpr. Add SD argument.
2236 (NaN, Infinity, Less, Equal, AbsoluteValue, Negate, Add, Sub,
2237 Multiply, Divide, Recip, SquareRoot, Convert): Make global.
2239 * sim-main.h (ValueFPR, StoreFPR): Define.
2241 Tue Oct 14 13:06:55 1997 Andrew Cagney <cagney@b1.cygnus.com>
2243 * interp.c (sim_engine_run): Check consistency between configure
2244 WITH_TARGET_WORD_BITSIZE and WITH_FLOATING_POINT and gensim GPRLEN
2247 * configure.in (mips_bitsize): Configure WITH_TARGET_WORD_BITSIZE.
2248 (mips_fpu): Configure WITH_FLOATING_POINT.
2249 (mips_endian): Configure WITH_TARGET_ENDIAN.
2250 * configure: Update.
2252 Fri Oct 3 09:28:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
2254 * configure: Regenerated to track ../common/aclocal.m4 changes.
2256 Mon Sep 29 14:45:00 1997 Bob Manson <manson@charmed.cygnus.com>
2258 * configure: Regenerated.
2260 Fri Sep 26 12:48:18 1997 Mark Alexander <marka@cygnus.com>
2262 * interp.c: Allow Debug, DEPC, and EPC registers to be examined in GDB.
2264 Thu Sep 25 11:15:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
2266 * gencode.c (print_igen_insn_models): Assume certain architectures
2267 include all mips* instructions.
2268 (print_igen_insn_format): Use data_size==-1 as marker for MIPS16
2271 * Makefile.in (tmp.igen): Add target. Generate igen input from
2274 * gencode.c (FEATURE_IGEN): Define.
2275 (main): Add --igen option. Generate output in igen format.
2276 (process_instructions): Format output according to igen option.
2277 (print_igen_insn_format): New function.
2278 (print_igen_insn_models): New function.
2279 (process_instructions): Only issue warnings and ignore
2280 instructions when no FEATURE_IGEN.
2282 Wed Sep 24 17:38:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
2284 * interp.c (COP_SD, COP_LD): Add UNUSED to pacify GCC for some
2287 Tue Sep 23 11:04:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
2289 * configure: Regenerated to track ../common/aclocal.m4 changes.
2291 Tue Sep 23 10:19:51 1997 Andrew Cagney <cagney@b1.cygnus.com>
2293 * Makefile.in (SIM_ALIGNMENT, SIM_ENDIAN, SIM_HOSTENDIAN,
2294 SIM_RESERVED_BITS): Delete, moved to common.
2295 (SIM_EXTRA_CFLAGS): Update.
2297 Mon Sep 22 11:46:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2299 * configure.in: Configure non-strict memory alignment.
2300 * configure: Regenerated to track ../common/aclocal.m4 changes.
2302 Fri Sep 19 17:45:25 1997 Andrew Cagney <cagney@b1.cygnus.com>
2304 * configure: Regenerated to track ../common/aclocal.m4 changes.
2306 Sat Sep 20 14:07:28 1997 Gavin Koch <gavin@cygnus.com>
2308 * gencode.c (SDBBP,DERET): Added (3900) insns.
2309 (RFE): Turn on for 3900.
2310 * interp.c (DebugBreakPoint,DEPC,Debug,Debug_*): Added.
2311 (dsstate): Made global.
2312 (SUBTARGET_R3900): Added.
2313 (CANCELDELAYSLOT): New.
2314 (SignalException): Ignore SystemCall rather than ignore and
2315 terminate. Add DebugBreakPoint handling.
2316 (decode_coproc): New insns RFE, DERET; and new registers Debug
2317 and DEPC protected by SUBTARGET_R3900.
2318 (sim_engine_run): Use CANCELDELAYSLOT rather than clearing
2320 * Makefile.in,configure.in: Add mips subtarget option.
2321 * configure: Update.
2323 Fri Sep 19 09:33:27 1997 Gavin Koch <gavin@cygnus.com>
2325 * gencode.c: Add r3900 (tx39).
2328 Tue Sep 16 15:52:04 1997 Gavin Koch <gavin@cygnus.com>
2330 * gencode.c (build_instruction): Don't need to subtract 4 for
2333 Tue Sep 16 11:32:28 1997 Gavin Koch <gavin@cygnus.com>
2335 * interp.c: Correct some HASFPU problems.
2337 Mon Sep 15 17:36:15 1997 Andrew Cagney <cagney@b1.cygnus.com>
2339 * configure: Regenerated to track ../common/aclocal.m4 changes.
2341 Fri Sep 12 12:01:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
2343 * interp.c (mips_options): Fix samples option short form, should
2346 Thu Sep 11 09:35:29 1997 Andrew Cagney <cagney@b1.cygnus.com>
2348 * interp.c (sim_info): Enable info code. Was just returning.
2350 Tue Sep 9 17:30:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
2352 * interp.c (decode_coproc): Clarify warning about unsuported MTC0,
2355 Tue Sep 9 16:28:28 1997 Andrew Cagney <cagney@b1.cygnus.com>
2357 * gencode.c (build_instruction): Use SIGNED64 for 64 bit
2359 (build_instruction): Ditto for LL.
2361 Thu Sep 4 17:21:23 1997 Doug Evans <dje@seba>
2363 * configure: Regenerated to track ../common/aclocal.m4 changes.
2365 Wed Aug 27 18:13:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
2367 * configure: Regenerated to track ../common/aclocal.m4 changes.
2370 Wed Aug 27 14:12:27 1997 Andrew Cagney <cagney@b1.cygnus.com>
2372 * interp.c (sim_open): Add call to sim_analyze_program, update
2375 Tue Aug 26 10:40:07 1997 Andrew Cagney <cagney@b1.cygnus.com>
2377 * interp.c (sim_kill): Delete.
2378 (sim_create_inferior): Add ABFD argument. Set PC from same.
2379 (sim_load): Move code initializing trap handlers from here.
2380 (sim_open): To here.
2381 (sim_load): Delete, use sim-hload.c.
2383 * Makefile.in (SIM_OBJS): Add sim-hload.o module.
2385 Mon Aug 25 17:50:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
2387 * configure: Regenerated to track ../common/aclocal.m4 changes.
2390 Mon Aug 25 15:59:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2392 * interp.c (sim_open): Add ABFD argument.
2393 (sim_load): Move call to sim_config from here.
2394 (sim_open): To here. Check return status.
2396 Fri Jul 25 15:00:45 1997 Gavin Koch <gavin@cygnus.com>
2398 * gencode.c (build_instruction): Two arg MADD should
2399 not assign result to $0.
2401 Thu Jun 26 12:13:17 1997 Angela Marie Thomas (angela@cygnus.com)
2403 * sim/mips/configure: Change default_sim_endian to 0 (bi-endian)
2404 * sim/mips/configure.in: Regenerate.
2406 Wed Jul 9 10:29:21 1997 Andrew Cagney <cagney@critters.cygnus.com>
2408 * interp.c (SUB_REG_UW, SUB_REG_SW, SUB_REG_*): Use more explicit
2409 signed8, unsigned8 et.al. types.
2411 * interp.c (SUB_REG_FETCH): Handle both little and big endian
2412 hosts when selecting subreg.
2414 Wed Jul 2 11:54:10 1997 Jeffrey A Law (law@cygnus.com)
2416 * interp.c (sim_engine_run): Reset the ZERO register to zero
2417 regardless of FEATURE_WARN_ZERO.
2418 * gencode.c (FEATURE_WARNINGS): Remove FEATURE_WARN_ZERO.
2420 Wed Jun 4 10:43:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
2422 * interp.c (decode_coproc): Implement MTC0 N, CAUSE.
2423 (SignalException): For BreakPoints ignore any mode bits and just
2425 (SignalException): Always set the CAUSE register.
2427 Tue Jun 3 05:00:33 1997 Andrew Cagney <cagney@b1.cygnus.com>
2429 * interp.c (SignalException): Clear the simDELAYSLOT flag when an
2430 exception has been taken.
2432 * interp.c: Implement the ERET and mt/f sr instructions.
2434 Sat May 31 00:44:16 1997 Andrew Cagney <cagney@b1.cygnus.com>
2436 * interp.c (SignalException): Don't bother restarting an
2439 Fri May 30 23:41:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2441 * interp.c (SignalException): Really take an interrupt.
2442 (interrupt_event): Only deliver interrupts when enabled.
2444 Tue May 27 20:08:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
2446 * interp.c (sim_info): Only print info when verbose.
2447 (sim_info) Use sim_io_printf for output.
2449 Tue May 27 14:22:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
2451 * interp.c (CoProcPresent): Add UNUSED attribute - not used by all
2454 Tue May 27 14:22:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
2456 * interp.c (sim_do_command): Check for common commands if a
2457 simulator specific command fails.
2459 Thu May 22 09:32:03 1997 Gavin Koch <gavin@cygnus.com>
2461 * interp.c (sim_engine_run): ifdef out uses of simSTOP, simSTEP
2462 and simBE when DEBUG is defined.
2464 Wed May 21 09:08:10 1997 Andrew Cagney <cagney@b1.cygnus.com>
2466 * interp.c (interrupt_event): New function. Pass exception event
2467 onto exception handler.
2469 * configure.in: Check for stdlib.h.
2470 * configure: Regenerate.
2472 * gencode.c (build_instruction): Add UNUSED attribute to tempS
2473 variable declaration.
2474 (build_instruction): Initialize memval1.
2475 (build_instruction): Add UNUSED attribute to byte, bigend,
2477 (build_operands): Ditto.
2479 * interp.c: Fix GCC warnings.
2480 (sim_get_quit_code): Delete.
2482 * configure.in: Add INLINE, ENDIAN, HOSTENDIAN and WARNINGS.
2483 * Makefile.in: Ditto.
2484 * configure: Re-generate.
2486 * Makefile.in (SIM_OBJS): Add sim-watch.o module.
2488 Tue May 20 15:08:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
2490 * interp.c (mips_option_handler): New function parse argumes using
2492 (myname): Replace with STATE_MY_NAME.
2493 (sim_open): Delete check for host endianness - performed by
2495 (simHOSTBE, simBE): Delete, replaced by sim-endian flags.
2496 (sim_open): Move much of the initialization from here.
2497 (sim_load): To here. After the image has been loaded and
2499 (sim_open): Move ColdReset from here.
2500 (sim_create_inferior): To here.
2501 (sim_open): Make FP check less dependant on host endianness.
2503 * Makefile.in (SIM_RUN_OBJS): Set to nrun.o - use new version or
2505 * interp.c (sim_set_callbacks): Delete.
2507 * interp.c (membank, membank_base, membank_size): Replace with
2508 STATE_MEMORY, STATE_MEM_SIZE, STATE_MEM_BASE.
2509 (sim_open): Remove call to callback->init. gdb/run do this.
2513 * sim-main.h (SIM_HAVE_FLATMEM): Define.
2515 * interp.c (big_endian_p): Delete, replaced by
2516 current_target_byte_order.
2518 Tue May 20 13:55:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
2520 * interp.c (host_read_long, host_read_word, host_swap_word,
2521 host_swap_long): Delete. Using common sim-endian.
2522 (sim_fetch_register, sim_store_register): Use H2T.
2523 (pipeline_ticks): Delete. Handled by sim-events.
2525 (sim_engine_run): Update.
2527 Tue May 20 13:42:03 1997 Andrew Cagney <cagney@b1.cygnus.com>
2529 * interp.c (sim_stop_reason): Move code determining simEXCEPTION
2531 (SignalException): To here. Signal using sim_engine_halt.
2532 (sim_stop_reason): Delete, moved to common.
2534 Tue May 20 10:19:48 1997 Andrew Cagney <cagney@b2.cygnus.com>
2536 * interp.c (sim_open): Add callback argument.
2537 (sim_set_callbacks): Delete SIM_DESC argument.
2540 Mon May 19 18:20:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
2542 * Makefile.in (SIM_OBJS): Add common modules.
2544 * interp.c (sim_set_callbacks): Also set SD callback.
2545 (set_endianness, xfer_*, swap_*): Delete.
2546 (host_read_word, host_read_long, host_swap_word, host_swap_long):
2547 Change to functions using sim-endian macros.
2548 (control_c, sim_stop): Delete, use common version.
2549 (simulate): Convert into.
2550 (sim_engine_run): This function.
2551 (sim_resume): Delete.
2553 * interp.c (simulation): New variable - the simulator object.
2554 (sim_kind): Delete global - merged into simulation.
2555 (sim_load): Cleanup. Move PC assignment from here.
2556 (sim_create_inferior): To here.
2558 * sim-main.h: New file.
2559 * interp.c (sim-main.h): Include.
2561 Thu Apr 24 00:39:51 1997 Doug Evans <dje@canuck.cygnus.com>
2563 * configure: Regenerated to track ../common/aclocal.m4 changes.
2565 Wed Apr 23 17:32:19 1997 Doug Evans <dje@canuck.cygnus.com>
2567 * tconfig.in (SIM_HAVE_BIENDIAN): Define.
2569 Mon Apr 21 17:16:13 1997 Gavin Koch <gavin@cygnus.com>
2571 * gencode.c (build_instruction): DIV instructions: check
2572 for division by zero and integer overflow before using
2573 host's division operation.
2575 Thu Apr 17 03:18:14 1997 Doug Evans <dje@canuck.cygnus.com>
2577 * Makefile.in (SIM_OBJS): Add sim-load.o.
2578 * interp.c: #include bfd.h.
2579 (target_byte_order): Delete.
2580 (sim_kind, myname, big_endian_p): New static locals.
2581 (sim_open): Set sim_kind, myname. Move call to set_endianness to
2582 after argument parsing. Recognize -E arg, set endianness accordingly.
2583 (sim_load): Return SIM_RC. New arg abfd. Call sim_load_file to
2584 load file into simulator. Set PC from bfd.
2585 (sim_create_inferior): Return SIM_RC. Delete arg start_address.
2586 (set_endianness): Use big_endian_p instead of target_byte_order.
2588 Wed Apr 16 17:55:37 1997 Andrew Cagney <cagney@b1.cygnus.com>
2590 * interp.c (sim_size): Delete prototype - conflicts with
2591 definition in remote-sim.h. Correct definition.
2593 Mon Apr 7 15:45:02 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
2595 * configure: Regenerated to track ../common/aclocal.m4 changes.
2598 Wed Apr 2 15:06:28 1997 Doug Evans <dje@canuck.cygnus.com>
2600 * interp.c (sim_open): New arg `kind'.
2602 * configure: Regenerated to track ../common/aclocal.m4 changes.
2604 Wed Apr 2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
2606 * configure: Regenerated to track ../common/aclocal.m4 changes.
2608 Tue Mar 25 11:38:22 1997 Doug Evans <dje@canuck.cygnus.com>
2610 * interp.c (sim_open): Set optind to 0 before calling getopt.
2612 Wed Mar 19 01:14:00 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
2614 * configure: Regenerated to track ../common/aclocal.m4 changes.
2616 Mon Mar 17 10:52:59 1997 Gavin Koch <gavin@cetus.cygnus.com>
2618 * interp.c : Replace uses of pr_addr with pr_uword64
2619 where the bit length is always 64 independent of SIM_ADDR.
2620 (pr_uword64) : added.
2622 Mon Mar 17 15:10:07 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
2624 * configure: Re-generate.
2626 Fri Mar 14 10:34:11 1997 Michael Meissner <meissner@cygnus.com>
2628 * configure: Regenerate to track ../common/aclocal.m4 changes.
2630 Thu Mar 13 12:51:36 1997 Doug Evans <dje@canuck.cygnus.com>
2632 * interp.c (sim_open): New SIM_DESC result. Argument is now
2634 (other sim_*): New SIM_DESC argument.
2636 Mon Feb 24 22:47:14 1997 Dawn Perchik <dawn@cygnus.com>
2638 * interp.c: Fix printing of addresses for non-64-bit targets.
2639 (pr_addr): Add function to print address based on size.
2641 Wed Feb 19 14:42:09 1997 Mark Alexander <marka@cygnus.com>
2643 * interp.c (simopen): Add support for LSI MiniRISC PMON vectors.
2645 Thu Feb 13 14:08:30 1997 Ian Lance Taylor <ian@cygnus.com>
2647 * gencode.c (build_mips16_operands): Correct computation of base
2648 address for extended PC relative instruction.
2650 Thu Feb 6 17:16:15 1997 Ian Lance Taylor <ian@cygnus.com>
2652 * interp.c (mips16_entry): Add support for floating point cases.
2653 (SignalException): Pass floating point cases to mips16_entry.
2654 (ValueFPR): Don't restrict fmt_single and fmt_word to even
2656 (StoreFPR): Likewise. Also, don't clobber fpr + 1 for fmt_single
2658 (COP_LW): Pass fmt_word rather than fmt_uninterpreted to StoreFPR,
2659 and then set the state to fmt_uninterpreted.
2660 (COP_SW): Temporarily set the state to fmt_word while calling
2663 Tue Feb 4 16:48:25 1997 Ian Lance Taylor <ian@cygnus.com>
2665 * gencode.c (build_instruction): The high order may be set in the
2666 comparison flags at any ISA level, not just ISA 4.
2668 Tue Feb 4 13:33:30 1997 Doug Evans <dje@canuck.cygnus.com>
2670 * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
2671 COMMON_{PRE,POST}_CONFIG_FRAG instead.
2672 * configure.in: sinclude ../common/aclocal.m4.
2673 * configure: Regenerated.
2675 Fri Jan 31 11:11:45 1997 Ian Lance Taylor <ian@cygnus.com>
2677 * configure: Rebuild after change to aclocal.m4.
2679 Thu Jan 23 11:46:23 1997 Stu Grossman (grossman@critters.cygnus.com)
2681 * configure configure.in Makefile.in: Update to new configure
2682 scheme which is more compatible with WinGDB builds.
2683 * configure.in: Improve comment on how to run autoconf.
2684 * configure: Re-run autoconf to get new ../common/aclocal.m4.
2685 * Makefile.in: Use autoconf substitution to install common
2688 Wed Jan 8 12:39:03 1997 Jim Wilson <wilson@cygnus.com>
2690 * gencode.c (build_instruction): Use BigEndianCPU instead of
2693 Thu Jan 02 22:23:04 1997 Mark Alexander <marka@cygnus.com>
2695 * interp.c (sim_monitor): Make output to stdout visible in
2696 wingdb's I/O log window.
2698 Tue Dec 31 07:04:00 1996 Mark Alexander <marka@cygnus.com>
2700 * support.h: Undo previous change to SIGTRAP
2703 Mon Dec 30 17:36:06 1996 Ian Lance Taylor <ian@cygnus.com>
2705 * interp.c (store_word, load_word): New static functions.
2706 (mips16_entry): New static function.
2707 (SignalException): Look for mips16 entry and exit instructions.
2708 (simulate): Use the correct index when setting fpr_state after
2709 doing a pending move.
2711 Sun Dec 29 09:37:18 1996 Mark Alexander <marka@cygnus.com>
2713 * interp.c: Fix byte-swapping code throughout to work on
2714 both little- and big-endian hosts.
2716 Sun Dec 29 09:18:32 1996 Mark Alexander <marka@cygnus.com>
2718 * support.h: Make definitions of SIGTRAP and SIGQUIT consistent
2719 with gdb/config/i386/xm-windows.h.
2721 Fri Dec 27 22:48:51 1996 Mark Alexander <marka@cygnus.com>
2723 * gencode.c (build_instruction): Work around MSVC++ code gen bug
2724 that messes up arithmetic shifts.
2726 Fri Dec 20 11:04:05 1996 Stu Grossman (grossman@critters.cygnus.com)
2728 * support.h: Use _WIN32 instead of __WIN32__. Also add defs for
2729 SIGTRAP and SIGQUIT for _WIN32.
2731 Thu Dec 19 14:07:27 1996 Ian Lance Taylor <ian@cygnus.com>
2733 * gencode.c (build_instruction) [MUL]: Cast operands to word64, to
2734 force a 64 bit multiplication.
2735 (build_instruction) [OR]: In mips16 mode, don't do anything if the
2736 destination register is 0, since that is the default mips16 nop
2739 Mon Dec 16 14:59:38 1996 Ian Lance Taylor <ian@cygnus.com>
2741 * gencode.c (MIPS16_DECODE): SWRASP is I8, not RI.
2742 (build_endian_shift): Don't check proc64.
2743 (build_instruction): Always set memval to uword64. Cast op2 to
2744 uword64 when shifting it left in memory instructions. Always use
2745 the same code for stores--don't special case proc64.
2747 * gencode.c (build_mips16_operands): Fix base PC value for PC
2749 (build_instruction): Call JALDELAYSLOT rather than DELAYSLOT for a
2751 * interp.c (simJALDELAYSLOT): Define.
2752 (JALDELAYSLOT): Define.
2753 (INDELAYSLOT, INJALDELAYSLOT): Define.
2754 (simulate): Clear simJALDELAYSLOT when simDELAYSLOT is cleared.
2756 Tue Dec 24 22:11:20 1996 Angela Marie Thomas (angela@cygnus.com)
2758 * interp.c (sim_open): add flush_cache as a PMON routine
2759 (sim_monitor): handle flush_cache by ignoring it
2761 Wed Dec 11 13:53:51 1996 Jim Wilson <wilson@cygnus.com>
2763 * gencode.c (build_instruction): Use !ByteSwapMem instead of
2765 * interp.c (CONFIG, config_EP_{mask,shift,D,DxxDxx, config_BE): Delete.
2766 (BigEndianMem): Rename to ByteSwapMem and change sense.
2767 (BigEndianCPU, sim_write, LoadMemory, StoreMemory): Change
2768 BigEndianMem references to !ByteSwapMem.
2769 (set_endianness): New function, with prototype.
2770 (sim_open): Call set_endianness.
2771 (sim_info): Use simBE instead of BigEndianMem.
2772 (xfer_direct_word, xfer_direct_long, swap_direct_word,
2773 swap_direct_long, xfer_big_word, xfer_big_long, xfer_little_word,
2774 xfer_little_long, swap_word, swap_long): Delete unnecessary MSC_VER
2775 ifdefs, keeping the prototype declaration.
2776 (swap_word): Rewrite correctly.
2777 (ColdReset): Delete references to CONFIG. Delete endianness related
2778 code; moved to set_endianness.
2780 Tue Dec 10 11:32:04 1996 Jim Wilson <wilson@cygnus.com>
2782 * gencode.c (build_instruction, case JUMP): Truncate PC to 32 bits.
2783 * interp.c (CHECKHILO): Define away.
2784 (simSIGINT): New macro.
2785 (membank_size): Increase from 1MB to 2MB.
2786 (control_c): New function.
2787 (sim_resume): Rename parameter signal to signal_number. Add local
2788 variable prev. Call signal before and after simulate.
2789 (sim_stop_reason): Add simSIGINT support.
2790 (sim_warning, sim_error, dotrace, SignalException): Define as stdarg
2792 (sim_warning): Delete call to SignalException. Do call printf_filtered
2794 (AddressTranslation): Add #ifdef DEBUG around debugging message and
2795 a call to sim_warning.
2797 Wed Nov 27 11:53:50 1996 Ian Lance Taylor <ian@cygnus.com>
2799 * gencode.c (process_instructions): If ! proc64, skip DOUBLEWORD
2800 16 bit instructions.
2802 Tue Nov 26 11:53:12 1996 Ian Lance Taylor <ian@cygnus.com>
2804 Add support for mips16 (16 bit MIPS implementation):
2805 * gencode.c (inst_type): Add mips16 instruction encoding types.
2806 (GETDATASIZEINSN): Define.
2807 (MIPS_DECODE): Add REG flag to dsllv, dsrav, and dsrlv. Add
2808 jalx. Add LEFT flag to mfhi and mflo. Add RIGHT flag to mthi and
2810 (MIPS16_DECODE): New table, for mips16 instructions.
2811 (bitmap_val): New static function.
2812 (struct mips16_op): Define.
2813 (mips16_op_table): New table, for mips16 operands.
2814 (build_mips16_operands): New static function.
2815 (process_instructions): If PC is odd, decode a mips16
2816 instruction. Break out instruction handling into new
2817 build_instruction function.
2818 (build_instruction): New static function, broken out of
2819 process_instructions. Check modifiers rather than flags for SHIFT
2820 bit count and m[ft]{hi,lo} direction.
2821 (usage): Pass program name to fprintf.
2822 (main): Remove unused variable this_option_optind. Change
2823 ``*loptarg++'' to ``loptarg++''.
2824 (my_strtoul): Parenthesize && within ||.
2825 * interp.c (LoadMemory): Accept a halfword pAddr if vAddr is odd.
2826 (simulate): If PC is odd, fetch a 16 bit instruction, and
2827 increment PC by 2 rather than 4.
2828 * configure.in: Add case for mips16*-*-*.
2829 * configure: Rebuild.
2831 Fri Nov 22 08:49:36 1996 Mark Alexander <marka@cygnus.com>
2833 * interp.c: Allow -t to enable tracing in standalone simulator.
2834 Fix garbage output in trace file and error messages.
2836 Wed Nov 20 01:54:37 1996 Doug Evans <dje@canuck.cygnus.com>
2838 * Makefile.in: Delete stuff moved to ../common/Make-common.in.
2839 (SIM_{OBJS,EXTRA_CFLAGS,EXTRA_CLEAN}): Define.
2840 * configure.in: Simplify using macros in ../common/aclocal.m4.
2841 * configure: Regenerated.
2842 * tconfig.in: New file.
2844 Tue Nov 12 13:34:00 1996 Dawn Perchik <dawn@cygnus.com>
2846 * interp.c: Fix bugs in 64-bit port.
2847 Use ansi function declarations for msvc compiler.
2848 Initialize and test file pointer in trace code.
2849 Prevent duplicate definition of LAST_EMED_REGNUM.
2851 Tue Oct 15 11:07:06 1996 Mark Alexander <marka@cygnus.com>
2853 * interp.c (xfer_big_long): Prevent unwanted sign extension.
2855 Thu Sep 26 17:35:00 1996 James G. Smith <jsmith@cygnus.co.uk>
2857 * interp.c (SignalException): Check for explicit terminating
2859 * gencode.c: Pass instruction value through SignalException()
2860 calls for Trap, Breakpoint and Syscall.
2862 Thu Sep 26 11:35:17 1996 James G. Smith <jsmith@cygnus.co.uk>
2864 * interp.c (SquareRoot): Add HAVE_SQRT check to ensure sqrt() is
2865 only used on those hosts that provide it.
2866 * configure.in: Add sqrt() to list of functions to be checked for.
2867 * config.in: Re-generated.
2868 * configure: Re-generated.
2870 Fri Sep 20 15:47:12 1996 Ian Lance Taylor <ian@cygnus.com>
2872 * gencode.c (process_instructions): Call build_endian_shift when
2873 expanding STORE RIGHT, to fix swr.
2874 * support.h (SIGNEXTEND): If the sign bit is not set, explicitly
2875 clear the high bits.
2876 * interp.c (Convert): Fix fmt_single to fmt_long to not truncate.
2877 Fix float to int conversions to produce signed values.
2879 Thu Sep 19 15:34:17 1996 Ian Lance Taylor <ian@cygnus.com>
2881 * gencode.c (MIPS_DECODE): Set UNSIGNED for multu instruction.
2882 (process_instructions): Correct handling of nor instruction.
2883 Correct shift count for 32 bit shift instructions. Correct sign
2884 extension for arithmetic shifts to not shift the number of bits in
2885 the type. Fix 64 bit multiply high word calculation. Fix 32 bit
2886 unsigned multiply. Fix ldxc1 and friends to use coprocessor 1.
2888 * interp.c (CHECKHILO): Don't set HIACCESS, LOACCESS, or HLPC.
2889 It's OK to have a mult follow a mult. What's not OK is to have a
2890 mult follow an mfhi.
2891 (Convert): Comment out incorrect rounding code.
2893 Mon Sep 16 11:38:16 1996 James G. Smith <jsmith@cygnus.co.uk>
2895 * interp.c (sim_monitor): Improved monitor printf
2896 simulation. Tidied up simulator warnings, and added "--log" option
2897 for directing warning message output.
2898 * gencode.c: Use sim_warning() rather than WARNING macro.
2900 Thu Aug 22 15:03:12 1996 Ian Lance Taylor <ian@cygnus.com>
2902 * Makefile.in (gencode): Depend upon gencode.o, getopt.o, and
2903 getopt1.o, rather than on gencode.c. Link objects together.
2904 Don't link against -liberty.
2905 (gencode.o, getopt.o, getopt1.o): New targets.
2906 * gencode.c: Include <ctype.h> and "ansidecl.h".
2907 (AND): Undefine after including "ansidecl.h".
2908 (ULONG_MAX): Define if not defined.
2909 (OP_*): Don't define macros; now defined in opcode/mips.h.
2910 (main): Call my_strtoul rather than strtoul.
2911 (my_strtoul): New static function.
2913 Wed Jul 17 18:12:38 1996 Stu Grossman (grossman@critters.cygnus.com)
2915 * gencode.c (process_instructions): Generate word64 and uword64
2916 instead of `long long' and `unsigned long long' data types.
2917 * interp.c: #include sysdep.h to get signals, and define default
2919 * (Convert): Work around for Visual-C++ compiler bug with type
2921 * support.h: Make things compile under Visual-C++ by using
2922 __int64 instead of `long long'. Change many refs to long long
2923 into word64/uword64 typedefs.
2925 Wed Jun 26 12:24:55 1996 Jason Molenda (crash@godzilla.cygnus.co.jp)
2927 * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
2928 INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
2930 * configure.in (AC_PREREQ): autoconf 2.5 or higher.
2931 (AC_PROG_INSTALL): Added.
2932 (AC_PROG_CC): Moved to before configure.host call.
2933 * configure: Rebuilt.
2935 Wed Jun 5 08:28:13 1996 James G. Smith <jsmith@cygnus.co.uk>
2937 * configure.in: Define @SIMCONF@ depending on mips target.
2938 * configure: Rebuild.
2939 * Makefile.in (run): Add @SIMCONF@ to control simulator
2941 * gencode.c: Change LOADDRMASK to 64bit memory model only.
2942 * interp.c: Remove some debugging, provide more detailed error
2943 messages, update memory accesses to use LOADDRMASK.
2945 Mon Jun 3 11:55:03 1996 Ian Lance Taylor <ian@cygnus.com>
2947 * configure.in: Add calls to AC_CONFIG_HEADER, AC_CHECK_HEADERS,
2948 AC_CHECK_LIB, and AC_CHECK_FUNCS. Change AC_OUTPUT to set
2950 * configure: Rebuild.
2951 * config.in: New file, generated by autoheader.
2952 * interp.c: Include "config.h". Include <stdlib.h>, <string.h>,
2953 and <strings.h> if they exist. Replace #ifdef sun with #ifdef
2954 HAVE_ANINT and HAVE_AINT, as appropriate.
2955 * Makefile.in (run): Use @LIBS@ rather than -lm.
2956 (interp.o): Depend upon config.h.
2957 (Makefile): Just rebuild Makefile.
2958 (clean): Remove stamp-h.
2959 (mostlyclean): Make the same as clean, not as distclean.
2960 (config.h, stamp-h): New targets.
2962 Fri May 10 00:41:17 1996 James G. Smith <jsmith@cygnus.co.uk>
2964 * interp.c (ColdReset): Fix boolean test. Make all simulator
2967 Wed May 8 15:12:58 1996 James G. Smith <jsmith@cygnus.co.uk>
2969 * interp.c (xfer_direct_word, xfer_direct_long,
2970 swap_direct_word, swap_direct_long, xfer_big_word,
2971 xfer_big_long, xfer_little_word, xfer_little_long,
2972 swap_word,swap_long): Added.
2973 * interp.c (ColdReset): Provide function indirection to
2974 host<->simulated_target transfer routines.
2975 * interp.c (sim_store_register, sim_fetch_register): Updated to
2976 make use of indirected transfer routines.
2978 Fri Apr 19 15:48:24 1996 James G. Smith <jsmith@cygnus.co.uk>
2980 * gencode.c (process_instructions): Ensure FP ABS instruction
2982 * interp.c (AbsoluteValue): Add routine. Also provide simple PMON
2983 system call support.
2985 Wed Apr 10 09:51:38 1996 James G. Smith <jsmith@cygnus.co.uk>
2987 * interp.c (sim_do_command): Complain if callback structure not
2990 Thu Mar 28 13:50:51 1996 James G. Smith <jsmith@cygnus.co.uk>
2992 * interp.c (Convert): Provide round-to-nearest and round-to-zero
2993 support for Sun hosts.
2994 * Makefile.in (gencode): Ensure the host compiler and libraries
2995 used for cross-hosted build.
2997 Wed Mar 27 14:42:12 1996 James G. Smith <jsmith@cygnus.co.uk>
2999 * interp.c, gencode.c: Some more (TODO) tidying.
3001 Thu Mar 7 11:19:33 1996 James G. Smith <jsmith@cygnus.co.uk>
3003 * gencode.c, interp.c: Replaced explicit long long references with
3004 WORD64HI, WORD64LO, SET64HI and SET64LO macro calls.
3005 * support.h (SET64LO, SET64HI): Macros added.
3007 Wed Feb 21 12:16:21 1996 Ian Lance Taylor <ian@cygnus.com>
3009 * configure: Regenerate with autoconf 2.7.
3011 Tue Jan 30 08:48:18 1996 Fred Fish <fnf@cygnus.com>
3013 * interp.c (LoadMemory): Enclose text following #endif in /* */.
3014 * support.h: Remove superfluous "1" from #if.
3015 * support.h (CHECKSIM): Remove stray 'a' at end of line.
3017 Mon Dec 4 11:44:40 1995 Jamie Smith <jsmith@cygnus.com>
3019 * interp.c (StoreFPR): Control UndefinedResult() call on
3020 WARN_RESULT manifest.
3022 Fri Dec 1 16:37:19 1995 James G. Smith <jsmith@cygnus.co.uk>
3024 * gencode.c: Tidied instruction decoding, and added FP instruction
3027 * interp.c: Added dineroIII, and BSD profiling support. Also
3028 run-time FP handling.
3030 Sun Oct 22 00:57:18 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
3032 * Changelog, Makefile.in, README.Cygnus, configure, configure.in,
3033 gencode.c, interp.c, support.h: created.