1 Tue Nov 11 12:38:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
3 * mips.igen: Delay slot branches add OFFSET to NIA not CIA.
4 (MFC0, MTC0, SWC1, LWC1, SDC1, LDC1): Implement.
5 (start-sanitize-r5900):
6 (LWXC1, SWXC1): Delete from r5900 instruction set.
8 (MTC1, MFC1, DMTC1, DMFC1, CFC1, CTC1): Implement separate non
9 PENDING_FILL versions of instructions. Simplify.
11 (MULT, MULTU): Implement separate RD==0 and RD!=0 versions of
13 (BEQZ, ..., SLT, SLTI, TLT, TLE, TLI, ...): Explicitly cast GPR to
15 (MTHI, MFHI): Disable code checking HI-LO.
17 * sim-main.h (dotrace,tracefh), interp.c: Make dotrace & tracefh
19 (NULLIFY_NEXT_INSTRUCTION): Call dotrace.
21 Thu Nov 6 16:36:35 1997 Andrew Cagney <cagney@b1.cygnus.com>
23 * gencode.c (build_mips16_operands): Replace IPC with cia.
25 * interp.c (sim_monitor, signal_exception, cache_op, store_fpr,
26 value_fpr, cop_ld, cop_lw, cop_sw, cop_sd, decode_coproc): Replace
28 (UndefinedResult): Replace function with macro/function
30 (sim_engine_run): Don't save PC in IPC.
32 * sim-main.h (IPC): Delete.
35 * vr5400.igen (vr): Add missing cia argument to value_fpr.
36 (do_select): Rename function select.
39 * interp.c (signal_exception, store_word, load_word,
40 address_translation, load_memory, store_memory, cache_op,
41 prefetch, sync_operation, ifetch, value_fpr, store_fpr, convert,
42 cop_lw, cop_ld, cop_sw, cop_sd, decode_coproc, sim_monitor): Add
43 current instruction address - cia - argument.
44 (sim_read, sim_write): Call address_translation directly.
45 (sim_engine_run): Rename variable vaddr to cia.
46 (signal_exception): Pass cia to sim_monitor
48 * sim-main.h (SignalException, LoadWord, StoreWord, CacheOp,
49 Prefetch, SyncOperation, ValueFPR, StoreFPR, Convert, COP_LW,
50 COP_LD, COP_SW, COP_SD, DecodeCoproc): Update.
52 * sim-main.h (SignalExceptionSimulatorFault): Delete definition.
53 * interp.c (sim_open): Replace SignalExceptionSimulatorFault with
56 * interp.c (signal_exception): Pass restart address to
59 * Makefile.in (semantics.o, engine.o, support.o, itable.o,
60 idecode.o): Add dependency.
62 * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESUME_HOOK):
64 (DELAY_SLOT): Update NIA not PC with branch address.
65 (NULLIFY_NEXT_INSTRUCTION): Set NIA to instruction after next.
67 * mips.igen: Use CIA not PC in branch calculations.
68 (illegal): Call SignalException.
69 (BEQ, ADDIU): Fix assembler.
71 Wed Nov 5 12:19:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
73 * m16.igen (JALX): Was missing.
75 * configure.in (enable-sim-igen): New configuration option.
76 * configure: Re-generate.
78 * sim-main.h (MAX_INSNS, INSN_NAME): Define.
80 * interp.c (load_memory, store_memory): Delete parameter RAW.
81 (sim_read, sim_write): Use sim_core_{read,write}_buffer directly
82 bypassing {load,store}_memory.
84 * sim-main.h (ByteSwapMem): Delete definition.
86 * Makefile.in (SIM_OBJS): Add sim-memopt module.
88 * interp.c (sim_do_command, sim_commands): Delete mips specific
89 commands. Handled by module sim-options.
91 * sim-main.h (SIM_HAVE_FLATMEM): Undefine, use sim-core.o module.
92 (WITH_MODULO_MEMORY): Define.
94 * interp.c (sim_info): Delete code printing memory size.
96 * interp.c (mips_size): Nee sim_size, delete function.
98 (monitor, monitor_base, monitor_size): Delete global variables.
99 (sim_open, sim_close): Delete code creating monitor and other
100 memory regions. Use sim-memopts module, via sim_do_commandf, to
101 manage memory regions.
102 (load_memory, store_memory): Use sim-core for memory model.
104 * interp.c (address_translation): Delete all memory map code
105 except line forcing 32 bit addresses.
107 Wed Nov 5 11:21:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
109 * sim-main.h (WITH_TRACE): Delete definition. Enables common
112 * interp.c (logfh, logfile): Delete globals.
113 (sim_open, sim_close): Delete code opening & closing log file.
114 (mips_option_handler): Delete -l and -n options.
115 (OPTION mips_options): Ditto.
117 * interp.c (OPTION mips_options): Rename option trace to dinero.
118 (mips_option_handler): Update.
120 Wed Nov 5 09:35:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
122 * interp.c (fetch_str): New function.
123 (sim_monitor): Rewrite using sim_read & sim_write.
124 (sim_open): Check magic number.
125 (sim_open): Write monitor vectors into memory using sim_write.
126 (MONITOR_BASE, MONITOR_SIZE, MEM_SIZE): Define.
127 (sim_read, sim_write): Simplify - transfer data one byte at a
129 (load_memory, store_memory): Clarify meaning of parameter RAW.
131 * sim-main.h (isHOST): Defete definition.
132 (isTARGET): Mark as depreciated.
133 (address_translation): Delete parameter HOST.
135 * interp.c (address_translation): Delete parameter HOST.
138 Wed Oct 29 14:21:32 1997 Gavin Koch <gavin@cygnus.com>
140 * gencode.c: Add tx49 configury and insns.
141 * configure.in: Add tx49 configury.
145 Wed Oct 29 11:13:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
149 * Makefile.in (IGEN_INCLUDE): Files included by mips.igen.
150 (tmp-igen, tmp-m16): Depend on IGEN_INCLUDE.
152 Tue Oct 28 11:06:47 1997 Andrew Cagney <cagney@b1.cygnus.com>
154 * mips.igen: Add model filter field to records.
156 Mon Oct 27 17:53:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
158 * Makefile.in (SIM_NO_CFLAGS): Define. Define WITH_IGEN=0.
160 interp.c (sim_engine_run): Do not compile function sim_engine_run
163 * configure.in (sim_igen_flags, sim_m16_flags): Set according to
166 Makefile.in (tmp-igen, tmp-m16): Drop -F and -M options to
167 igen. Replace with configuration variables sim_igen_flags /
171 * r5900.igen: New file. Copy v5900 insns here.
174 * vr5400.igen: New file.
175 start-sanitize-vr5400
176 * m16.igen: New file. Copy mips16 insns here.
177 * mips.igen: From here.
179 Mon Oct 27 13:53:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
181 start-sanitize-vr5400
182 * mips.igen: Tag all mipsIV instructions with vr5400 model.
184 * configure.in: Add mips64vr5400 target.
185 * configure: Re-generate.
188 * Makefile.in (SIM_NO_OBJ): Define, move SIM_M16_OBJ, SIM_IGEN_OBJ
190 (tmp-igen, tmp-m16): Pass -I srcdir to igen.
192 Sat Oct 25 16:51:40 1997 Gavin Koch <gavin@cygnus.com>
194 * gencode.c (build_instruction): Follow sim_write's lead in using
195 BigEndianMem instead of !ByteSwapMem.
197 Fri Oct 24 17:41:49 1997 Andrew Cagney <cagney@b1.cygnus.com>
199 * configure.in (sim_gen): Dependent on target, select type of
200 generator. Always select old style generator.
202 configure: Re-generate.
204 Makefile.in (tmp-igen, tmp-m16, clean-m16, clean-igen): New
206 (SIM_M16_CFLAGS, SIM_M16_ALL, SIM_M16_OBJ, BUILT_SRC_FROM_M16,
207 SIM_IGEN_CFLAGS, SIM_IGEN_ALL, SIM_IGEN_OBJ, BUILT_SRC_FROM_IGEN,
208 IGEN_TRACE, IGEN_INSN, IGEN_DC): Define
209 (SIM_EXTRA_CFLAGS, SIM_EXTRA_ALL, SIM_OBJS): Add member
210 SIM_@sim_gen@_*, set by autoconf.
212 Wed Oct 22 12:52:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
214 * sim-main.h (NULLIFY_NEXT_INSTRUCTION, DELAY_SLOT): Define.
216 * interp.c (ColdReset): Remove #ifdef HASFPU, check
217 CURRENT_FLOATING_POINT instead.
219 * interp.c (ifetch32): New function. Fetch 32 bit instruction.
220 (address_translation): Raise exception InstructionFetch when
221 translation fails and isINSTRUCTION.
223 * interp.c (sim_open, sim_write, sim_monitor, store_word,
224 sim_engine_run): Change type of of vaddr and paddr to
226 (address_translation, prefetch, load_memory, store_memory,
227 cache_op): Change type of vAddr and pAddr to address_word.
229 * gencode.c (build_instruction): Change type of vaddr and paddr to
232 Mon Oct 20 15:29:04 1997 Andrew Cagney <cagney@b1.cygnus.com>
234 * sim-main.h (ALU64_END, ALU32_END): Use ALU*_OVERFLOW_RESULT
235 macro to obtain result of ALU op.
237 Tue Oct 21 17:39:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
239 * interp.c (sim_info): Call profile_print.
241 Mon Oct 20 13:31:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
243 * Makefile.in (SIM_OBJS): Add sim-profile.o module.
245 * sim-main.h (WITH_PROFILE): Do not define, defined in
246 common/sim-config.h. Use sim-profile module.
247 (simPROFILE): Delete defintion.
249 * interp.c (PROFILE): Delete definition.
250 (mips_option_handler): Delete 'p', 'y' and 'x' profile options.
251 (sim_close): Delete code writing profile histogram.
252 (mips_set_profile, mips_set_profile_size, writeout16, writeout32):
254 (sim_engine_run): Delete code profiling the PC.
256 Mon Oct 20 13:31:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
258 * sim-main.h (SIGNEXTEND): Force type of result to unsigned_word.
260 * interp.c (sim_monitor): Make register pointers of type
263 * sim-main.h: Make registers of type unsigned_word not
266 Thu Oct 16 10:31:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
269 * sim-main.h (BYTES_IN_MMI_REGS, ..., SUB_REG_FETCH, ..., GPR_SB,
270 ...): Move to sim-main.h
273 * interp.c (sync_operation): Rename from SyncOperation, make
274 global, add SD argument.
275 (prefetch): Rename from Prefetch, make global, add SD argument.
276 (decode_coproc): Make global.
278 * sim-main.h (SyncOperation, DecodeCoproc, Pefetch): Define.
280 * gencode.c (build_instruction): Generate DecodeCoproc not
283 * interp.c (SETFCC, GETFCC, PREVCOC1): Move to sim-main.h
284 (SizeFGR): Move to sim-main.h
285 (simHALTEX, simHALTIN, simTRACE, simPROFILE, simDELAYSLOT,
286 simSIGINT, simJALDELAYSLOT): Move to sim-main.h
287 (FP_FLAGS, FP_ENABLE, FP_CAUSE, IR, UF, OF, DZ, IO, UO): Move to
289 (FP_FS, FP_MASK_RM, FP_SH_RM, FP_RM_NEAREST, FP_RM_TOPINF,
290 FP_RM_TOMINF, GETRM): Move to sim-main.h.
291 (Uncached, CachedNoncoherent, CachedCoherent, Cached,
292 isINSTRUCTION, ..., AccessLength_BYTE, ...): Move to sim-main.h.
293 (UserMode, BigEndianMem, ByteSwapMem, ReverseEndian,
294 BigEndianCPU, status_KSU_mask, ...). Moved to sim-main.h
296 * sim-main.h (ALU32_END, ALU64_END): Define. When overflow raise
298 (sim-alu.h): Include.
299 (NULLIFY_NIA, NULL_CIA, CPU_CIA): Define.
300 (sim_cia): Typedef to instruction_address.
302 Thu Oct 16 10:31:41 1997 Andrew Cagney <cagney@b1.cygnus.com>
304 * Makefile.in (interp.o): Rename generated file engine.c to
309 Thu Oct 16 10:31:40 1997 Andrew Cagney <cagney@b1.cygnus.com>
311 * gencode.c (build_instruction): Use FPR_STATE not fpr_state.
313 Thu Oct 16 10:31:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
315 * gencode.c (build_instruction): For "FPSQRT", output correct
316 number of arguments to Recip.
318 Tue Oct 14 17:38:18 1997 Andrew Cagney <cagney@b1.cygnus.com>
320 * Makefile.in (interp.o): Depends on sim-main.h
322 * interp.c (mips16_entry, ColdReset,dotrace): Add SD argument. Use GPR not registers.
324 * sim-main.h (sim_cpu): Add registers, register_widths, fpr_state,
325 ipc, dspc, pending_*, hiaccess, loaccess, state, dsstate fields.
326 (REGISTERS, REGISTER_WIDTHS, FPR_STATE, IPC, DSPC, PENDING_*,
327 STATE, DSSTATE): Define
328 (GPR, FGRIDX, ..): Define.
330 * interp.c (registers, register_widths, fpr_state, ipc, dspc,
331 pending_*, hiaccess, loaccess, state, dsstate): Delete globals.
332 (GPR, FGRIDX, ...): Delete macros.
334 * interp.c: Update names to match defines from sim-main.h
336 Tue Oct 14 15:11:45 1997 Andrew Cagney <cagney@b1.cygnus.com>
338 * interp.c (sim_monitor): Add SD argument.
339 (sim_warning): Delete. Replace calls with calls to
341 (sim_error): Delete. Replace calls with sim_io_error.
342 (open_trace, writeout32, writeout16, getnum): Add SD argument.
343 (mips_set_profile): Rename from sim_set_profile. Add SD argument.
344 (mips_set_profile_size): Rename from sim_set_profile_size. Add SD
346 (mips_size): Rename from sim_size. Add SD argument.
348 * interp.c (simulator): Delete global variable.
349 (callback): Delete global variable.
350 (mips_option_handler, sim_open, sim_write, sim_read,
351 sim_store_register, sim_fetch_register, sim_info, sim_do_command,
352 sim_size,sim_monitor): Use sim_io_* not callback->*.
353 (sim_open): ZALLOC simulator struct.
354 (PROFILE): Do not define.
356 Tue Oct 14 13:35:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
358 * interp.c (sim_open), support.h: Replace CHECKSIM macro found in
359 support.h with corresponding code.
361 * sim-main.h (word64, uword64), support.h: Move definition to
363 (WORD64LO, WORD64HI, SET64LO, SET64HI, WORD64, UWORD64): Ditto.
366 * Makefile.in: Update dependencies
367 * interp.c: Do not include.
369 Tue Oct 14 13:35:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
371 * interp.c (address_translation, load_memory, store_memory,
372 cache_op): Rename to from AddressTranslation et.al., make global,
375 * sim-main.h (AddressTranslation, LoadMemory, StoreMemory,
378 * interp.c (SignalException): Rename to signal_exception, make
381 * interp.c (Interrupt, ...): Move definitions to sim-main.h.
383 * sim-main.h (SignalException, SignalExceptionInterrupt,
384 SignalExceptionInstructionFetch, SignalExceptionAddressStore,
385 SignalExceptionAddressLoad, SignalExceptionSimulatorFault,
386 SignalExceptionIntegerOverflow, SignalExceptionCoProcessorUnusable):
389 * interp.c, support.h: Use.
391 Tue Oct 14 13:19:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
393 * interp.c (ValueFPR, StoreFPR), sim-main.h: Make global, rename
394 to value_fpr / store_fpr. Add SD argument.
395 (NaN, Infinity, Less, Equal, AbsoluteValue, Negate, Add, Sub,
396 Multiply, Divide, Recip, SquareRoot, Convert): Make global.
398 * sim-main.h (ValueFPR, StoreFPR): Define.
400 Tue Oct 14 13:06:55 1997 Andrew Cagney <cagney@b1.cygnus.com>
402 * interp.c (sim_engine_run): Check consistency between configure
403 WITH_TARGET_WORD_BITSIZE and WITH_FLOATING_POINT and gensim GPRLEN
406 * configure.in (mips_bitsize): Configure WITH_TARGET_WORD_BITSIZE.
407 (mips_fpu): Configure WITH_FLOATING_POINT.
408 (mips_endian): Configure WITH_TARGET_ENDIAN.
411 Fri Oct 3 09:28:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
413 * configure: Regenerated to track ../common/aclocal.m4 changes.
416 Mon Aug 25 19:11:15 1997 Andrew Cagney <cagney@b1.cygnus.com>
418 * interp.c (MAX_REG): Allow up-to 128 registers.
419 (LO1, HI1): Define value that matches REGISTER_NAMES in gdb.
420 (REGISTER_SA): Ditto.
421 (sim_open): Initialize register_widths for r5900 specific
423 (sim_fetch_register, sim_store_register): Check for request of
424 r5900 specific SA register. Check for request for hi 64 bits of
425 r5900 specific registers.
428 Mon Sep 29 14:45:00 1997 Bob Manson <manson@charmed.cygnus.com>
430 * configure: Regenerated.
432 Fri Sep 26 12:48:18 1997 Mark Alexander <marka@cygnus.com>
434 * interp.c: Allow Debug, DEPC, and EPC registers to be examined in GDB.
436 Thu Sep 25 11:15:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
438 * gencode.c (print_igen_insn_models): Assume certain architectures
439 include all mips* instructions.
440 (print_igen_insn_format): Use data_size==-1 as marker for MIPS16
443 * Makefile.in (tmp.igen): Add target. Generate igen input from
446 * gencode.c (FEATURE_IGEN): Define.
447 (main): Add --igen option. Generate output in igen format.
448 (process_instructions): Format output according to igen option.
449 (print_igen_insn_format): New function.
450 (print_igen_insn_models): New function.
451 (process_instructions): Only issue warnings and ignore
452 instructions when no FEATURE_IGEN.
454 Wed Sep 24 17:38:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
456 * interp.c (COP_SD, COP_LD): Add UNUSED to pacify GCC for some
459 Tue Sep 23 11:04:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
461 * configure: Regenerated to track ../common/aclocal.m4 changes.
463 Tue Sep 23 10:19:51 1997 Andrew Cagney <cagney@b1.cygnus.com>
465 * Makefile.in (SIM_ALIGNMENT, SIM_ENDIAN, SIM_HOSTENDIAN,
466 SIM_RESERVED_BITS): Delete, moved to common.
467 (SIM_EXTRA_CFLAGS): Update.
469 Mon Sep 22 11:46:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
471 * configure.in: Configure non-strict memory alignment.
472 * configure: Regenerated to track ../common/aclocal.m4 changes.
474 Fri Sep 19 17:45:25 1997 Andrew Cagney <cagney@b1.cygnus.com>
476 * configure: Regenerated to track ../common/aclocal.m4 changes.
478 Sat Sep 20 14:07:28 1997 Gavin Koch <gavin@cygnus.com>
480 * gencode.c (SDBBP,DERET): Added (3900) insns.
481 (RFE): Turn on for 3900.
482 * interp.c (DebugBreakPoint,DEPC,Debug,Debug_*): Added.
483 (dsstate): Made global.
484 (SUBTARGET_R3900): Added.
485 (CANCELDELAYSLOT): New.
486 (SignalException): Ignore SystemCall rather than ignore and
487 terminate. Add DebugBreakPoint handling.
488 (decode_coproc): New insns RFE, DERET; and new registers Debug
489 and DEPC protected by SUBTARGET_R3900.
490 (sim_engine_run): Use CANCELDELAYSLOT rather than clearing
492 * Makefile.in,configure.in: Add mips subtarget option.
495 Fri Sep 19 09:33:27 1997 Gavin Koch <gavin@cygnus.com>
497 * gencode.c: Add r3900 (tx39).
500 * gencode.c: Fix some configuration problems by improving
501 the relationship between tx19 and tx39.
504 Tue Sep 16 15:52:04 1997 Gavin Koch <gavin@cygnus.com>
506 * gencode.c (build_instruction): Don't need to subtract 4 for
509 Tue Sep 16 11:32:28 1997 Gavin Koch <gavin@cygnus.com>
511 * interp.c: Correct some HASFPU problems.
513 Mon Sep 15 17:36:15 1997 Andrew Cagney <cagney@b1.cygnus.com>
515 * configure: Regenerated to track ../common/aclocal.m4 changes.
517 Fri Sep 12 12:01:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
519 * interp.c (mips_options): Fix samples option short form, should
522 Thu Sep 11 09:35:29 1997 Andrew Cagney <cagney@b1.cygnus.com>
524 * interp.c (sim_info): Enable info code. Was just returning.
526 Tue Sep 9 17:30:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
528 * interp.c (decode_coproc): Clarify warning about unsuported MTC0,
531 Tue Sep 9 16:28:28 1997 Andrew Cagney <cagney@b1.cygnus.com>
533 * gencode.c (build_instruction): Use SIGNED64 for 64 bit
535 (build_instruction): Ditto for LL.
538 Sun Sep 7 16:05:46 1997 Gavin Koch <gavin@cygnus.com>
540 * mips/configure.in, mips/gencode: Add tx19/r1900.
543 Thu Sep 4 17:21:23 1997 Doug Evans <dje@seba>
545 * configure: Regenerated to track ../common/aclocal.m4 changes.
548 Mon Sep 1 18:43:30 1997 Andrew Cagney <cagney@b1.cygnus.com>
550 * gencode.c (build_instruction): For "pabsw" and "pabsh", check
551 for overflow due to ABS of MININT, set result to MAXINT.
552 (build_instruction): For "psrlvw", signextend bit 31.
555 Wed Aug 27 18:13:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
557 * configure: Regenerated to track ../common/aclocal.m4 changes.
560 Wed Aug 27 14:12:27 1997 Andrew Cagney <cagney@b1.cygnus.com>
562 * interp.c (sim_open): Add call to sim_analyze_program, update
565 Tue Aug 26 10:40:07 1997 Andrew Cagney <cagney@b1.cygnus.com>
567 * interp.c (sim_kill): Delete.
568 (sim_create_inferior): Add ABFD argument. Set PC from same.
569 (sim_load): Move code initializing trap handlers from here.
571 (sim_load): Delete, use sim-hload.c.
573 * Makefile.in (SIM_OBJS): Add sim-hload.o module.
575 Mon Aug 25 17:50:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
577 * configure: Regenerated to track ../common/aclocal.m4 changes.
580 Mon Aug 25 15:59:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
582 * interp.c (sim_open): Add ABFD argument.
583 (sim_load): Move call to sim_config from here.
584 (sim_open): To here. Check return status.
587 * gencode.c (build_instruction): Do not define x8000000000000000,
588 x7FFFFFFFFFFFFFFF, or xFFFFFFFF80000000.
592 Mon Jul 28 19:49:29 1997 Andrew Cagney <cagney@b1.cygnus.com>
594 * gencode.c (build_instruction): For "pdivw", "pdivbw" and
595 "pdivuw" check for overflow due to signed divide by -1.
598 Fri Jul 25 15:00:45 1997 Gavin Koch <gavin@cygnus.com>
600 * gencode.c (build_instruction): Two arg MADD should
601 not assign result to $0.
604 Thu Jul 10 11:58:48 1997 Andrew Cagney <cagney@critters.cygnus.com>
606 * gencode.c (build_instruction): For "ppac5" use unsigned
607 arrithmetic so that the sign bit doesn't smear when right shifted.
608 (build_instruction): For "pdiv" perform sign extension when
609 storing results in HI and LO.
610 (build_instructions): For "pdiv" and "pdivbw" check for
612 (build_instruction): For "pmfhl.slw" update hi part of dest
613 register as well as low part.
614 (build_instruction): For "pmfhl" portably handle long long values.
615 (build_instruction): For "pmfhl.sh" correctly negative values.
616 Store half words 2 and three in the correct place.
617 (build_instruction): For "psllvw", sign extend value after shift.
620 Thu Jun 26 12:13:17 1997 Angela Marie Thomas (angela@cygnus.com)
622 * sim/mips/configure: Change default_sim_endian to 0 (bi-endian)
623 * sim/mips/configure.in: Regenerate.
625 Wed Jul 9 10:29:21 1997 Andrew Cagney <cagney@critters.cygnus.com>
627 * interp.c (SUB_REG_UW, SUB_REG_SW, SUB_REG_*): Use more explicit
628 signed8, unsigned8 et.al. types.
631 * gencode.c (build_instruction): For PMULTU* do not sign extend
632 registers. Make generated code easier to debug.
635 * interp.c (SUB_REG_FETCH): Handle both little and big endian
636 hosts when selecting subreg.
639 Tue Jul 8 18:07:20 1997 Andrew Cagney <cagney@andros.cygnus.com>
641 * gencode.c (type_for_data_len): For 32bit operations concerned
642 with overflow, perform op using 64bits.
643 (build_instruction): For PADD, always compute operation using type
644 returned by type_for_data_len.
645 (build_instruction): For PSUBU, when overflow, saturate to zero as
649 Wed Jul 2 11:54:10 1997 Jeffrey A Law (law@cygnus.com)
652 * gencode.c (build_instruction): Handle "pext5" according to
653 version 1.95 of the r5900 ISA.
655 * gencode.c (build_instruction): Handle "ppac5" according to
656 version 1.95 of the r5900 ISA.
659 * interp.c (sim_engine_run): Reset the ZERO register to zero
660 regardless of FEATURE_WARN_ZERO.
661 * gencode.c (FEATURE_WARNINGS): Remove FEATURE_WARN_ZERO.
663 Wed Jun 4 10:43:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
665 * interp.c (decode_coproc): Implement MTC0 N, CAUSE.
666 (SignalException): For BreakPoints ignore any mode bits and just
668 (SignalException): Always set the CAUSE register.
670 Tue Jun 3 05:00:33 1997 Andrew Cagney <cagney@b1.cygnus.com>
672 * interp.c (SignalException): Clear the simDELAYSLOT flag when an
673 exception has been taken.
675 * interp.c: Implement the ERET and mt/f sr instructions.
678 Mon Jun 2 23:28:19 1997 Andrew Cagney <cagney@b1.cygnus.com>
680 * gencode.c (build_instruction): For paddu, extract unsigned
683 * gencode.c (build_instruction): Saturate padds instead of padd
687 Sat May 31 00:44:16 1997 Andrew Cagney <cagney@b1.cygnus.com>
689 * interp.c (SignalException): Don't bother restarting an
692 Fri May 30 23:41:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
694 * interp.c (SignalException): Really take an interrupt.
695 (interrupt_event): Only deliver interrupts when enabled.
697 Tue May 27 20:08:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
699 * interp.c (sim_info): Only print info when verbose.
700 (sim_info) Use sim_io_printf for output.
702 Tue May 27 14:22:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
704 * interp.c (CoProcPresent): Add UNUSED attribute - not used by all
707 Tue May 27 14:22:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
709 * interp.c (sim_do_command): Check for common commands if a
710 simulator specific command fails.
712 Thu May 22 09:32:03 1997 Gavin Koch <gavin@cygnus.com>
714 * interp.c (sim_engine_run): ifdef out uses of simSTOP, simSTEP
715 and simBE when DEBUG is defined.
717 Wed May 21 09:08:10 1997 Andrew Cagney <cagney@b1.cygnus.com>
719 * interp.c (interrupt_event): New function. Pass exception event
720 onto exception handler.
722 * configure.in: Check for stdlib.h.
723 * configure: Regenerate.
725 * gencode.c (build_instruction): Add UNUSED attribute to tempS
726 variable declaration.
727 (build_instruction): Initialize memval1.
728 (build_instruction): Add UNUSED attribute to byte, bigend,
730 (build_operands): Ditto.
732 * interp.c: Fix GCC warnings.
733 (sim_get_quit_code): Delete.
735 * configure.in: Add INLINE, ENDIAN, HOSTENDIAN and WARNINGS.
736 * Makefile.in: Ditto.
737 * configure: Re-generate.
739 * Makefile.in (SIM_OBJS): Add sim-watch.o module.
741 Tue May 20 15:08:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
743 * interp.c (mips_option_handler): New function parse argumes using
745 (myname): Replace with STATE_MY_NAME.
746 (sim_open): Delete check for host endianness - performed by
748 (simHOSTBE, simBE): Delete, replaced by sim-endian flags.
749 (sim_open): Move much of the initialization from here.
750 (sim_load): To here. After the image has been loaded and
752 (sim_open): Move ColdReset from here.
753 (sim_create_inferior): To here.
754 (sim_open): Make FP check less dependant on host endianness.
756 * Makefile.in (SIM_RUN_OBJS): Set to nrun.o - use new version or
758 * interp.c (sim_set_callbacks): Delete.
760 * interp.c (membank, membank_base, membank_size): Replace with
761 STATE_MEMORY, STATE_MEM_SIZE, STATE_MEM_BASE.
762 (sim_open): Remove call to callback->init. gdb/run do this.
766 * sim-main.h (SIM_HAVE_FLATMEM): Define.
768 * interp.c (big_endian_p): Delete, replaced by
769 current_target_byte_order.
771 Tue May 20 13:55:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
773 * interp.c (host_read_long, host_read_word, host_swap_word,
774 host_swap_long): Delete. Using common sim-endian.
775 (sim_fetch_register, sim_store_register): Use H2T.
776 (pipeline_ticks): Delete. Handled by sim-events.
778 (sim_engine_run): Update.
780 Tue May 20 13:42:03 1997 Andrew Cagney <cagney@b1.cygnus.com>
782 * interp.c (sim_stop_reason): Move code determining simEXCEPTION
784 (SignalException): To here. Signal using sim_engine_halt.
785 (sim_stop_reason): Delete, moved to common.
787 Tue May 20 10:19:48 1997 Andrew Cagney <cagney@b2.cygnus.com>
789 * interp.c (sim_open): Add callback argument.
790 (sim_set_callbacks): Delete SIM_DESC argument.
793 Mon May 19 18:20:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
795 * Makefile.in (SIM_OBJS): Add common modules.
797 * interp.c (sim_set_callbacks): Also set SD callback.
798 (set_endianness, xfer_*, swap_*): Delete.
799 (host_read_word, host_read_long, host_swap_word, host_swap_long):
800 Change to functions using sim-endian macros.
801 (control_c, sim_stop): Delete, use common version.
802 (simulate): Convert into.
803 (sim_engine_run): This function.
804 (sim_resume): Delete.
806 * interp.c (simulation): New variable - the simulator object.
807 (sim_kind): Delete global - merged into simulation.
808 (sim_load): Cleanup. Move PC assignment from here.
809 (sim_create_inferior): To here.
811 * sim-main.h: New file.
812 * interp.c (sim-main.h): Include.
814 Thu Apr 24 00:39:51 1997 Doug Evans <dje@canuck.cygnus.com>
816 * configure: Regenerated to track ../common/aclocal.m4 changes.
818 Wed Apr 23 17:32:19 1997 Doug Evans <dje@canuck.cygnus.com>
820 * tconfig.in (SIM_HAVE_BIENDIAN): Define.
822 Mon Apr 21 17:16:13 1997 Gavin Koch <gavin@cygnus.com>
824 * gencode.c (build_instruction): DIV instructions: check
825 for division by zero and integer overflow before using
826 host's division operation.
828 Thu Apr 17 03:18:14 1997 Doug Evans <dje@canuck.cygnus.com>
830 * Makefile.in (SIM_OBJS): Add sim-load.o.
831 * interp.c: #include bfd.h.
832 (target_byte_order): Delete.
833 (sim_kind, myname, big_endian_p): New static locals.
834 (sim_open): Set sim_kind, myname. Move call to set_endianness to
835 after argument parsing. Recognize -E arg, set endianness accordingly.
836 (sim_load): Return SIM_RC. New arg abfd. Call sim_load_file to
837 load file into simulator. Set PC from bfd.
838 (sim_create_inferior): Return SIM_RC. Delete arg start_address.
839 (set_endianness): Use big_endian_p instead of target_byte_order.
841 Wed Apr 16 17:55:37 1997 Andrew Cagney <cagney@b1.cygnus.com>
843 * interp.c (sim_size): Delete prototype - conflicts with
844 definition in remote-sim.h. Correct definition.
846 Mon Apr 7 15:45:02 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
848 * configure: Regenerated to track ../common/aclocal.m4 changes.
851 Wed Apr 2 15:06:28 1997 Doug Evans <dje@canuck.cygnus.com>
853 * interp.c (sim_open): New arg `kind'.
855 * configure: Regenerated to track ../common/aclocal.m4 changes.
857 Wed Apr 2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
859 * configure: Regenerated to track ../common/aclocal.m4 changes.
861 Tue Mar 25 11:38:22 1997 Doug Evans <dje@canuck.cygnus.com>
863 * interp.c (sim_open): Set optind to 0 before calling getopt.
865 Wed Mar 19 01:14:00 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
867 * configure: Regenerated to track ../common/aclocal.m4 changes.
869 Mon Mar 17 10:52:59 1997 Gavin Koch <gavin@cetus.cygnus.com>
871 * interp.c : Replace uses of pr_addr with pr_uword64
872 where the bit length is always 64 independent of SIM_ADDR.
873 (pr_uword64) : added.
875 Mon Mar 17 15:10:07 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
877 * configure: Re-generate.
879 Fri Mar 14 10:34:11 1997 Michael Meissner <meissner@cygnus.com>
881 * configure: Regenerate to track ../common/aclocal.m4 changes.
883 Thu Mar 13 12:51:36 1997 Doug Evans <dje@canuck.cygnus.com>
885 * interp.c (sim_open): New SIM_DESC result. Argument is now
887 (other sim_*): New SIM_DESC argument.
890 Wed Feb 26 18:32:21 1997 Gavin Koch <gavin@cygnus.com>
892 * gencode.c (POP_AND,POP_OR,POP_NOR,POP_XOR):
893 Change values to avoid overloading DOUBLEWORD which is tested
895 * gencode.c: reinstate "offending code".
898 Mon Feb 24 22:47:14 1997 Dawn Perchik <dawn@cygnus.com>
900 * interp.c: Fix printing of addresses for non-64-bit targets.
901 (pr_addr): Add function to print address based on size.
903 * gencode.c: #ifdef out offending code until a permanent fix
904 can be added. Code is causing build errors for non-5900 mips targets.
908 Thu Feb 20 10:40:24 1997 Gavin Koch <gavin@cetus.cygnus.com>
910 * gencode.c (process_instructions): Correct test for ISA dependent
911 architecture bits in isa field of MIPS_DECODE.
914 Wed Feb 19 14:42:09 1997 Mark Alexander <marka@cygnus.com>
916 * interp.c (simopen): Add support for LSI MiniRISC PMON vectors.
919 Tue Feb 18 17:03:47 1997 Gavin Koch <gavin@cygnus.com>
921 * gencode.c (MIPS_DECODE): Correct instruction feature flags for
925 Thu Feb 13 14:08:30 1997 Ian Lance Taylor <ian@cygnus.com>
927 * gencode.c (build_mips16_operands): Correct computation of base
928 address for extended PC relative instruction.
931 Fri Feb 7 11:12:44 1997 Gavin Koch <gavin@cygnus.com>
933 * Makefile.in, configure, configure.in, gencode.c,
934 interp.c, support.h: add r5900.
937 Thu Feb 6 17:16:15 1997 Ian Lance Taylor <ian@cygnus.com>
939 * interp.c (mips16_entry): Add support for floating point cases.
940 (SignalException): Pass floating point cases to mips16_entry.
941 (ValueFPR): Don't restrict fmt_single and fmt_word to even
943 (StoreFPR): Likewise. Also, don't clobber fpr + 1 for fmt_single
945 (COP_LW): Pass fmt_word rather than fmt_uninterpreted to StoreFPR,
946 and then set the state to fmt_uninterpreted.
947 (COP_SW): Temporarily set the state to fmt_word while calling
950 Tue Feb 4 16:48:25 1997 Ian Lance Taylor <ian@cygnus.com>
952 * gencode.c (build_instruction): The high order may be set in the
953 comparison flags at any ISA level, not just ISA 4.
955 Tue Feb 4 13:33:30 1997 Doug Evans <dje@canuck.cygnus.com>
957 * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
958 COMMON_{PRE,POST}_CONFIG_FRAG instead.
959 * configure.in: sinclude ../common/aclocal.m4.
960 * configure: Regenerated.
962 Fri Jan 31 11:11:45 1997 Ian Lance Taylor <ian@cygnus.com>
964 * configure: Rebuild after change to aclocal.m4.
966 Thu Jan 23 11:46:23 1997 Stu Grossman (grossman@critters.cygnus.com)
968 * configure configure.in Makefile.in: Update to new configure
969 scheme which is more compatible with WinGDB builds.
970 * configure.in: Improve comment on how to run autoconf.
971 * configure: Re-run autoconf to get new ../common/aclocal.m4.
972 * Makefile.in: Use autoconf substitution to install common
975 Wed Jan 8 12:39:03 1997 Jim Wilson <wilson@cygnus.com>
977 * gencode.c (build_instruction): Use BigEndianCPU instead of
980 Thu Jan 02 22:23:04 1997 Mark Alexander <marka@cygnus.com>
982 * interp.c (sim_monitor): Make output to stdout visible in
983 wingdb's I/O log window.
985 Tue Dec 31 07:04:00 1996 Mark Alexander <marka@cygnus.com>
987 * support.h: Undo previous change to SIGTRAP
990 Mon Dec 30 17:36:06 1996 Ian Lance Taylor <ian@cygnus.com>
992 * interp.c (store_word, load_word): New static functions.
993 (mips16_entry): New static function.
994 (SignalException): Look for mips16 entry and exit instructions.
995 (simulate): Use the correct index when setting fpr_state after
996 doing a pending move.
998 Sun Dec 29 09:37:18 1996 Mark Alexander <marka@cygnus.com>
1000 * interp.c: Fix byte-swapping code throughout to work on
1001 both little- and big-endian hosts.
1003 Sun Dec 29 09:18:32 1996 Mark Alexander <marka@cygnus.com>
1005 * support.h: Make definitions of SIGTRAP and SIGQUIT consistent
1006 with gdb/config/i386/xm-windows.h.
1008 Fri Dec 27 22:48:51 1996 Mark Alexander <marka@cygnus.com>
1010 * gencode.c (build_instruction): Work around MSVC++ code gen bug
1011 that messes up arithmetic shifts.
1013 Fri Dec 20 11:04:05 1996 Stu Grossman (grossman@critters.cygnus.com)
1015 * support.h: Use _WIN32 instead of __WIN32__. Also add defs for
1016 SIGTRAP and SIGQUIT for _WIN32.
1018 Thu Dec 19 14:07:27 1996 Ian Lance Taylor <ian@cygnus.com>
1020 * gencode.c (build_instruction) [MUL]: Cast operands to word64, to
1021 force a 64 bit multiplication.
1022 (build_instruction) [OR]: In mips16 mode, don't do anything if the
1023 destination register is 0, since that is the default mips16 nop
1026 Mon Dec 16 14:59:38 1996 Ian Lance Taylor <ian@cygnus.com>
1028 * gencode.c (MIPS16_DECODE): SWRASP is I8, not RI.
1029 (build_endian_shift): Don't check proc64.
1030 (build_instruction): Always set memval to uword64. Cast op2 to
1031 uword64 when shifting it left in memory instructions. Always use
1032 the same code for stores--don't special case proc64.
1034 * gencode.c (build_mips16_operands): Fix base PC value for PC
1036 (build_instruction): Call JALDELAYSLOT rather than DELAYSLOT for a
1038 * interp.c (simJALDELAYSLOT): Define.
1039 (JALDELAYSLOT): Define.
1040 (INDELAYSLOT, INJALDELAYSLOT): Define.
1041 (simulate): Clear simJALDELAYSLOT when simDELAYSLOT is cleared.
1043 Tue Dec 24 22:11:20 1996 Angela Marie Thomas (angela@cygnus.com)
1045 * interp.c (sim_open): add flush_cache as a PMON routine
1046 (sim_monitor): handle flush_cache by ignoring it
1048 Wed Dec 11 13:53:51 1996 Jim Wilson <wilson@cygnus.com>
1050 * gencode.c (build_instruction): Use !ByteSwapMem instead of
1052 * interp.c (CONFIG, config_EP_{mask,shift,D,DxxDxx, config_BE): Delete.
1053 (BigEndianMem): Rename to ByteSwapMem and change sense.
1054 (BigEndianCPU, sim_write, LoadMemory, StoreMemory): Change
1055 BigEndianMem references to !ByteSwapMem.
1056 (set_endianness): New function, with prototype.
1057 (sim_open): Call set_endianness.
1058 (sim_info): Use simBE instead of BigEndianMem.
1059 (xfer_direct_word, xfer_direct_long, swap_direct_word,
1060 swap_direct_long, xfer_big_word, xfer_big_long, xfer_little_word,
1061 xfer_little_long, swap_word, swap_long): Delete unnecessary MSC_VER
1062 ifdefs, keeping the prototype declaration.
1063 (swap_word): Rewrite correctly.
1064 (ColdReset): Delete references to CONFIG. Delete endianness related
1065 code; moved to set_endianness.
1067 Tue Dec 10 11:32:04 1996 Jim Wilson <wilson@cygnus.com>
1069 * gencode.c (build_instruction, case JUMP): Truncate PC to 32 bits.
1070 * interp.c (CHECKHILO): Define away.
1071 (simSIGINT): New macro.
1072 (membank_size): Increase from 1MB to 2MB.
1073 (control_c): New function.
1074 (sim_resume): Rename parameter signal to signal_number. Add local
1075 variable prev. Call signal before and after simulate.
1076 (sim_stop_reason): Add simSIGINT support.
1077 (sim_warning, sim_error, dotrace, SignalException): Define as stdarg
1079 (sim_warning): Delete call to SignalException. Do call printf_filtered
1081 (AddressTranslation): Add #ifdef DEBUG around debugging message and
1082 a call to sim_warning.
1084 Wed Nov 27 11:53:50 1996 Ian Lance Taylor <ian@cygnus.com>
1086 * gencode.c (process_instructions): If ! proc64, skip DOUBLEWORD
1087 16 bit instructions.
1089 Tue Nov 26 11:53:12 1996 Ian Lance Taylor <ian@cygnus.com>
1091 Add support for mips16 (16 bit MIPS implementation):
1092 * gencode.c (inst_type): Add mips16 instruction encoding types.
1093 (GETDATASIZEINSN): Define.
1094 (MIPS_DECODE): Add REG flag to dsllv, dsrav, and dsrlv. Add
1095 jalx. Add LEFT flag to mfhi and mflo. Add RIGHT flag to mthi and
1097 (MIPS16_DECODE): New table, for mips16 instructions.
1098 (bitmap_val): New static function.
1099 (struct mips16_op): Define.
1100 (mips16_op_table): New table, for mips16 operands.
1101 (build_mips16_operands): New static function.
1102 (process_instructions): If PC is odd, decode a mips16
1103 instruction. Break out instruction handling into new
1104 build_instruction function.
1105 (build_instruction): New static function, broken out of
1106 process_instructions. Check modifiers rather than flags for SHIFT
1107 bit count and m[ft]{hi,lo} direction.
1108 (usage): Pass program name to fprintf.
1109 (main): Remove unused variable this_option_optind. Change
1110 ``*loptarg++'' to ``loptarg++''.
1111 (my_strtoul): Parenthesize && within ||.
1112 * interp.c (LoadMemory): Accept a halfword pAddr if vAddr is odd.
1113 (simulate): If PC is odd, fetch a 16 bit instruction, and
1114 increment PC by 2 rather than 4.
1115 * configure.in: Add case for mips16*-*-*.
1116 * configure: Rebuild.
1118 Fri Nov 22 08:49:36 1996 Mark Alexander <marka@cygnus.com>
1120 * interp.c: Allow -t to enable tracing in standalone simulator.
1121 Fix garbage output in trace file and error messages.
1123 Wed Nov 20 01:54:37 1996 Doug Evans <dje@canuck.cygnus.com>
1125 * Makefile.in: Delete stuff moved to ../common/Make-common.in.
1126 (SIM_{OBJS,EXTRA_CFLAGS,EXTRA_CLEAN}): Define.
1127 * configure.in: Simplify using macros in ../common/aclocal.m4.
1128 * configure: Regenerated.
1129 * tconfig.in: New file.
1131 Tue Nov 12 13:34:00 1996 Dawn Perchik <dawn@cygnus.com>
1133 * interp.c: Fix bugs in 64-bit port.
1134 Use ansi function declarations for msvc compiler.
1135 Initialize and test file pointer in trace code.
1136 Prevent duplicate definition of LAST_EMED_REGNUM.
1138 Tue Oct 15 11:07:06 1996 Mark Alexander <marka@cygnus.com>
1140 * interp.c (xfer_big_long): Prevent unwanted sign extension.
1142 Thu Sep 26 17:35:00 1996 James G. Smith <jsmith@cygnus.co.uk>
1144 * interp.c (SignalException): Check for explicit terminating
1146 * gencode.c: Pass instruction value through SignalException()
1147 calls for Trap, Breakpoint and Syscall.
1149 Thu Sep 26 11:35:17 1996 James G. Smith <jsmith@cygnus.co.uk>
1151 * interp.c (SquareRoot): Add HAVE_SQRT check to ensure sqrt() is
1152 only used on those hosts that provide it.
1153 * configure.in: Add sqrt() to list of functions to be checked for.
1154 * config.in: Re-generated.
1155 * configure: Re-generated.
1157 Fri Sep 20 15:47:12 1996 Ian Lance Taylor <ian@cygnus.com>
1159 * gencode.c (process_instructions): Call build_endian_shift when
1160 expanding STORE RIGHT, to fix swr.
1161 * support.h (SIGNEXTEND): If the sign bit is not set, explicitly
1162 clear the high bits.
1163 * interp.c (Convert): Fix fmt_single to fmt_long to not truncate.
1164 Fix float to int conversions to produce signed values.
1166 Thu Sep 19 15:34:17 1996 Ian Lance Taylor <ian@cygnus.com>
1168 * gencode.c (MIPS_DECODE): Set UNSIGNED for multu instruction.
1169 (process_instructions): Correct handling of nor instruction.
1170 Correct shift count for 32 bit shift instructions. Correct sign
1171 extension for arithmetic shifts to not shift the number of bits in
1172 the type. Fix 64 bit multiply high word calculation. Fix 32 bit
1173 unsigned multiply. Fix ldxc1 and friends to use coprocessor 1.
1175 * interp.c (CHECKHILO): Don't set HIACCESS, LOACCESS, or HLPC.
1176 It's OK to have a mult follow a mult. What's not OK is to have a
1177 mult follow an mfhi.
1178 (Convert): Comment out incorrect rounding code.
1180 Mon Sep 16 11:38:16 1996 James G. Smith <jsmith@cygnus.co.uk>
1182 * interp.c (sim_monitor): Improved monitor printf
1183 simulation. Tidied up simulator warnings, and added "--log" option
1184 for directing warning message output.
1185 * gencode.c: Use sim_warning() rather than WARNING macro.
1187 Thu Aug 22 15:03:12 1996 Ian Lance Taylor <ian@cygnus.com>
1189 * Makefile.in (gencode): Depend upon gencode.o, getopt.o, and
1190 getopt1.o, rather than on gencode.c. Link objects together.
1191 Don't link against -liberty.
1192 (gencode.o, getopt.o, getopt1.o): New targets.
1193 * gencode.c: Include <ctype.h> and "ansidecl.h".
1194 (AND): Undefine after including "ansidecl.h".
1195 (ULONG_MAX): Define if not defined.
1196 (OP_*): Don't define macros; now defined in opcode/mips.h.
1197 (main): Call my_strtoul rather than strtoul.
1198 (my_strtoul): New static function.
1200 Wed Jul 17 18:12:38 1996 Stu Grossman (grossman@critters.cygnus.com)
1202 * gencode.c (process_instructions): Generate word64 and uword64
1203 instead of `long long' and `unsigned long long' data types.
1204 * interp.c: #include sysdep.h to get signals, and define default
1206 * (Convert): Work around for Visual-C++ compiler bug with type
1208 * support.h: Make things compile under Visual-C++ by using
1209 __int64 instead of `long long'. Change many refs to long long
1210 into word64/uword64 typedefs.
1212 Wed Jun 26 12:24:55 1996 Jason Molenda (crash@godzilla.cygnus.co.jp)
1214 * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
1215 INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
1217 * configure.in (AC_PREREQ): autoconf 2.5 or higher.
1218 (AC_PROG_INSTALL): Added.
1219 (AC_PROG_CC): Moved to before configure.host call.
1220 * configure: Rebuilt.
1222 Wed Jun 5 08:28:13 1996 James G. Smith <jsmith@cygnus.co.uk>
1224 * configure.in: Define @SIMCONF@ depending on mips target.
1225 * configure: Rebuild.
1226 * Makefile.in (run): Add @SIMCONF@ to control simulator
1228 * gencode.c: Change LOADDRMASK to 64bit memory model only.
1229 * interp.c: Remove some debugging, provide more detailed error
1230 messages, update memory accesses to use LOADDRMASK.
1232 Mon Jun 3 11:55:03 1996 Ian Lance Taylor <ian@cygnus.com>
1234 * configure.in: Add calls to AC_CONFIG_HEADER, AC_CHECK_HEADERS,
1235 AC_CHECK_LIB, and AC_CHECK_FUNCS. Change AC_OUTPUT to set
1237 * configure: Rebuild.
1238 * config.in: New file, generated by autoheader.
1239 * interp.c: Include "config.h". Include <stdlib.h>, <string.h>,
1240 and <strings.h> if they exist. Replace #ifdef sun with #ifdef
1241 HAVE_ANINT and HAVE_AINT, as appropriate.
1242 * Makefile.in (run): Use @LIBS@ rather than -lm.
1243 (interp.o): Depend upon config.h.
1244 (Makefile): Just rebuild Makefile.
1245 (clean): Remove stamp-h.
1246 (mostlyclean): Make the same as clean, not as distclean.
1247 (config.h, stamp-h): New targets.
1249 Fri May 10 00:41:17 1996 James G. Smith <jsmith@cygnus.co.uk>
1251 * interp.c (ColdReset): Fix boolean test. Make all simulator
1254 Wed May 8 15:12:58 1996 James G. Smith <jsmith@cygnus.co.uk>
1256 * interp.c (xfer_direct_word, xfer_direct_long,
1257 swap_direct_word, swap_direct_long, xfer_big_word,
1258 xfer_big_long, xfer_little_word, xfer_little_long,
1259 swap_word,swap_long): Added.
1260 * interp.c (ColdReset): Provide function indirection to
1261 host<->simulated_target transfer routines.
1262 * interp.c (sim_store_register, sim_fetch_register): Updated to
1263 make use of indirected transfer routines.
1265 Fri Apr 19 15:48:24 1996 James G. Smith <jsmith@cygnus.co.uk>
1267 * gencode.c (process_instructions): Ensure FP ABS instruction
1269 * interp.c (AbsoluteValue): Add routine. Also provide simple PMON
1270 system call support.
1272 Wed Apr 10 09:51:38 1996 James G. Smith <jsmith@cygnus.co.uk>
1274 * interp.c (sim_do_command): Complain if callback structure not
1277 Thu Mar 28 13:50:51 1996 James G. Smith <jsmith@cygnus.co.uk>
1279 * interp.c (Convert): Provide round-to-nearest and round-to-zero
1280 support for Sun hosts.
1281 * Makefile.in (gencode): Ensure the host compiler and libraries
1282 used for cross-hosted build.
1284 Wed Mar 27 14:42:12 1996 James G. Smith <jsmith@cygnus.co.uk>
1286 * interp.c, gencode.c: Some more (TODO) tidying.
1288 Thu Mar 7 11:19:33 1996 James G. Smith <jsmith@cygnus.co.uk>
1290 * gencode.c, interp.c: Replaced explicit long long references with
1291 WORD64HI, WORD64LO, SET64HI and SET64LO macro calls.
1292 * support.h (SET64LO, SET64HI): Macros added.
1294 Wed Feb 21 12:16:21 1996 Ian Lance Taylor <ian@cygnus.com>
1296 * configure: Regenerate with autoconf 2.7.
1298 Tue Jan 30 08:48:18 1996 Fred Fish <fnf@cygnus.com>
1300 * interp.c (LoadMemory): Enclose text following #endif in /* */.
1301 * support.h: Remove superfluous "1" from #if.
1302 * support.h (CHECKSIM): Remove stray 'a' at end of line.
1304 Mon Dec 4 11:44:40 1995 Jamie Smith <jsmith@cygnus.com>
1306 * interp.c (StoreFPR): Control UndefinedResult() call on
1307 WARN_RESULT manifest.
1309 Fri Dec 1 16:37:19 1995 James G. Smith <jsmith@cygnus.co.uk>
1311 * gencode.c: Tidied instruction decoding, and added FP instruction
1314 * interp.c: Added dineroIII, and BSD profiling support. Also
1315 run-time FP handling.
1317 Sun Oct 22 00:57:18 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
1319 * Changelog, Makefile.in, README.Cygnus, configure, configure.in,
1320 gencode.c, interp.c, support.h: created.