sim/mips/ChangeLog

   1 2008-07-11  Hans-Peter Nilsson  <hp@axis.com>
   2
   3         * configure: Regenerate to track ../common/common.m4 changes.
   4         * config.in: Ditto.
   5
   6 2008-06-06  Vladimir Prus  <vladimir@codesourcery.com>
   7             Daniel Jacobowitz  <dan@codesourcery.com>
   8             Joseph Myers  <joseph@codesourcery.com>
   9
  10         * configure: Regenerate.
  11
  12 2007-10-22  Richard Sandiford  <rsandifo@nildram.co.uk>
  13
  14         * mips.igen (check_fmt_p): Provide a separate mips32r2 definition
  15         that unconditionally allows fmt_ps.
  16         (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL, CVT.S.PU)
  17         (FLOOR.L.fmt, LWXC1, MADD.fmt, MSUB.fmt, NMADD.fmt, NMSUB.fmt)
  18         (PLL.PS, PLU.PS, PUL.PS, PUU.PS, ROUND.L.fmt, TRUNC.L.fmt): Change
  19         filter from 64,f to 32,f.
  20         (PREFX): Change filter from 64 to 32.
  21         (LDXC1, LUXC1): Provide separate mips32r2 implementations
  22         that use do_load_double instead of do_load.  Make both LUXC1
  23         versions unpredictable if SizeFGR () != 64.
  24         (SDXC1, SUXC1): Extend to mips32r2, using do_store_double
  25         instead of do_store.  Remove unused variable.  Make both SUXC1
  26         versions unpredictable if SizeFGR () != 64.
  27
  28 2007-10-07  Richard Sandiford  <rsandifo@nildram.co.uk>
  29
  30         * mips.igen (ll): Fix mask for WITH_TARGET_WORD_BITSIZE == 32.
  31         (sc, swxc1): Likewise.  Also fix big-endian and reverse-endian
  32         shifts for that case.
  33
  34 2007-09-04  Nick Clifton  <nickc@redhat.com>
  35
  36         * interp.c (options enum): Add OPTION_INFO_MEMORY.
  37         (display_mem_info): New static variable.
  38         (mips_option_handler): Handle OPTION_INFO_MEMORY.
  39         (mips_options): Add info-memory and memory-info.
  40         (sim_open): After processing the command line and board
  41         specification, check display_mem_info.  If it is set then
  42         call the real handler for the --memory-info command line
  43         switch.
  44
  45 2007-08-24  Joel Brobecker  <brobecker@adacore.com>
  46
  47         * configure.ac: Change license of multi-run.c to GPL version 3.
  48         * configure: Regenerate.
  49
  50 2007-06-28  Richard Sandiford  <richard@codesourcery.com>
  51
  52         * configure.ac, configure: Revert last patch.
  53
  54 2007-06-26  Richard Sandiford  <richard@codesourcery.com>
  55
  56         * configure.ac (sim_mipsisa3264_configs): New variable.
  57         (mipsis32*-*-, mipsisa32r2*-*-*, mips64*-*-*, mips64r2*-*-*): Make
  58         every configuration support all four targets, using the triplet to
  59         determine the default.
  60         * configure: Regenerate.
  61
  62 2007-06-25  Richard Sandiford  <richard@codesourcery.com>
  63
  64         * Makefile.in (m16run.o): New rule.
  65
  66 2007-05-15  Thiemo Seufer  <ths@mips.com>
  67
  68         * mips3264r2.igen (DSHD): Fix compile warning.
  69
  70 2007-05-14  Thiemo Seufer  <ths@mips.com>
  71
  72         * mips.igen (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL,
  73         CVT.S.PU, FLOOR.L.fmt, LDXC1, LUXC1, LWXC1, MADD.fmt, MSUB.fmt,
  74         NMADD.fmt, NMSUB.fmt, PLL.PS, PLU.PS, PREFX, PUL.PS, PUU.PS,
  75         RECIP.fmt, ROUND.L.fmt, RSQRT.fmt, SWXC1, TRUNC.L.fmt): Add support
  76         for mips32r2.
  77
  78 2007-03-01  Thiemo Seufer  <ths@mips.com>
  79
  80         * mips.igen (MFHI, MFLO, MTHI, MTLO): Restore support for mips32
  81         and mips64.
  82
  83 2007-02-20  Thiemo Seufer  <ths@mips.com>
  84
  85         * dsp.igen: Update copyright notice.
  86         * dsp2.igen: Fix copyright notice.
  87
  88 2007-02-20  Thiemo Seufer  <ths@mips.com>
  89             Chao-Ying Fu  <fu@mips.com>
  90
  91         * Makefile.in (IGEN_INCLUDE): Add dsp2.igen.
  92         * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
  93         Add dsp2 to sim_igen_machine.
  94         * configure: Regenerate.
  95         * dsp.igen (do_ph_op): Add MUL support when op = 2.
  96         (do_ph_mulq): New function to support mulq_rs.ph and mulq_s.ph.
  97         (mulq_rs.ph): Use do_ph_mulq.
  98         (MFHI, MFLO, MTHI, MTLO): Move these instructions to mips.igen.
  99         * mips.igen: Add dsp2 model and include dsp2.igen.
 100         (MFHI, MFLO, MTHI, MTLO): Extend these instructions for
 101         for *mips32r2, *mips64r2, *dsp.
 102         (MADD, MADDU, MSUB, MSUBU, MULT, MULTU): Extend these instructions
 103         for *mips32r2, *mips64r2, *dsp2.
 104         * dsp2.igen: New file for MIPS DSP REV 2 ASE.
 105
 106 2007-02-19  Thiemo Seufer  <ths@mips.com>
 107             Nigel Stephens  <nigel@mips.com>
 108
 109         * mips.igen (jalr.hb, jr.hb): Add decoder for mip32r2/mips64r2
 110         jumps with hazard barrier.
 111
 112 2007-02-19  Thiemo Seufer  <ths@mips.com>
 113             Nigel Stephens  <nigel@mips.com>
 114
 115         * interp.c (sim_monitor): Flush stdout and stderr file descriptors
 116         after each call to sim_io_write.
 117
 118 2007-02-19  Thiemo Seufer  <ths@mips.com>
 119             Nigel Stephens  <nigel@mips.com>
 120
 121         * interp.c (ColdReset): Set CP0 Config0 to reflect the address size
 122         supported by this simulator.
 123         (decode_coproc): Recognise additional CP0 Config registers
 124         correctly.
 125
 126 2007-02-19  Thiemo Seufer  <ths@mips.com>
 127             Nigel Stephens  <nigel@mips.com>
 128             David Ung  <davidu@mips.com>
 129
 130         * cp1.c (value_fpr): Don't inherit existing FPR_STATE for
 131         uninterpreted formats. If fmt is one of the uninterpreted types
 132         don't update the FPR_STATE. Handle fmt_uninterpreted_32 like
 133         fmt_word, and fmt_uninterpreted_64 like fmt_long.
 134         (store_fpr): When writing an invalid odd register, set the
 135         matching even register to fmt_unknown, not the following register.
 136         * interp.c (sim_open): If STATE_MEM_SIZE isn't set then set it to
 137         the the memory window at offset 0 set by --memory-size command
 138         line option.
 139         (sim_store_register): Handle storing 4 bytes to an 8 byte floating
 140         point register.
 141         (sim_fetch_register): Likewise for reading 4 bytes from an 8 byte
 142         register.
 143         (sim_monitor): When returning the memory size to the MIPS
 144         application, use the value in STATE_MEM_SIZE, not an arbitrary
 145         hardcoded value.
 146         (cop_lw): Don' mess around with FPR_STATE, just pass
 147         fmt_uninterpreted_32 to StoreFPR.
 148         (cop_sw): Similarly.
 149         (cop_ld): Pass fmt_uninterpreted_64 not fmt_uninterpreted.
 150         (cop_sd): Similarly.
 151         * mips.igen (not_word_value): Single version for mips32, mips64
 152         and mips16.
 153
 154 2007-02-19  Thiemo Seufer <ths@mips.com>
 155             Nigel Stephens  <nigel@mips.com>
 156
 157         * interp.c (MEM_SIZE): Increase default memory size from 2 to 8
 158         MBytes.
 159
 160 2007-02-17  Thiemo Seufer  <ths@mips.com>
 161
 162         * configure.ac (mips*-sde-elf*): Move in front of generic machine
 163         configuration.
 164         * configure: Regenerate.
 165
 166 2007-02-17  Thiemo Seufer  <ths@mips.com>
 167
 168         * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
 169         Add mdmx to sim_igen_machine.
 170         (mipsisa64*-*-*): Likewise. Remove dsp.
 171         (mipsisa32*-*-*): Remove dsp.
 172         * configure: Regenerate.
 173
 174 2007-02-13  Thiemo Seufer  <ths@mips.com>
 175
 176         * configure.ac: Add mips*-sde-elf* target.
 177         * configure: Regenerate.
 178
 179 2006-12-21  Hans-Peter Nilsson  <hp@axis.com>
 180
 181         * acconfig.h: Remove.
 182         * config.in, configure: Regenerate.
 183
 184 2006-11-07  Thiemo Seufer  <ths@mips.com>
 185
 186         * dsp.igen (do_w_op): Fix compiler warning.
 187
 188 2006-08-29  Thiemo Seufer  <ths@mips.com>
 189             David Ung  <davidu@mips.com>
 190
 191         * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*): Add smartmips to
 192         sim_igen_machine.
 193         * configure: Regenerate.
 194         * mips.igen (model): Add smartmips.
 195         (MADDU): Increment ACX if carry.
 196         (do_mult): Clear ACX.
 197         (ROR,RORV): Add smartmips.
 198         (include): Include smartmips.igen.
 199         * sim-main.h (ACX): Set to REGISTERS[89].
 200         * smartmips.igen: New file.
 201
 202 2006-08-29  Thiemo Seufer  <ths@mips.com>
 203             David Ung  <davidu@mips.com>
 204
 205         * Makefile.in (IGEN_INCLUDE): Add missing includes for m16e.igen and
 206         mips3264r2.igen. Add missing dependency rules.
 207         * m16e.igen: Support for mips16e save/restore instructions.
 208
 209 2006-06-13  Richard Earnshaw  <rearnsha@arm.com>
 210
 211         * configure: Regenerated.
 212
 213 2006-06-05  Daniel Jacobowitz  <dan@codesourcery.com>
 214
 215         * configure: Regenerated.
 216
 217 2006-05-31  Daniel Jacobowitz  <dan@codesourcery.com>
 218
 219         * configure: Regenerated.
 220
 221 2006-05-15 Chao-ying Fu  <fu@mips.com>
 222
 223         * dsp.igen (do_ph_shift, do_w_shra): Fix bugs for rounding instructions.
 224
 225 2006-04-18  Nick Clifton  <nickc@redhat.com>
 226
 227         * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Add missing break
 228         statement.
 229
 230 2006-03-29  Hans-Peter Nilsson  <hp@axis.com>
 231
 232         * configure: Regenerate.
 233
 234 2005-12-14  Chao-ying Fu  <fu@mips.com>
 235
 236         * Makefile.in (SIM_OBJS): Add dsp.o.
 237         (dsp.o): New dependency.
 238         (IGEN_INCLUDE): Add dsp.igen.
 239         * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*, mipsisa64r2*-*-*,
 240         mipsisa64*-*-*): Add dsp to sim_igen_machine.
 241         * configure: Regenerate.
 242         * mips.igen: Add dsp model and include dsp.igen.
 243         (MFHI, MFLO, MTHI, MTLO): Remove mips32, mips32r2, mips64, mips64r2,
 244         because these instructions are extended in DSP ASE.
 245         * sim-main.h (LAST_EMBED_REGNUM): Change from 89 to 96 because of
 246         adding 6 DSP accumulator registers and 1 DSP control register.
 247         (AC0LOIDX, AC0HIIDX, AC1LOIDX, AC1HIIDX, AC2LOIDX, AC2HIIDX, AC3LOIDX,
 248         AC3HIIDX, DSPLO, DSPHI, DSPCRIDX, DSPCR, DSPCR_POS_SHIFT,
 249         DSPCR_POS_MASK, DSPCR_POS_SMASK, DSPCR_SCOUNT_SHIFT, DSPCR_SCOUNT_MASK,
 250         DSPCR_SCOUNT_SMASK, DSPCR_CARRY_SHIFT, DSPCR_CARRY_MASK,
 251         DSPCR_CARRY_SMASK, DSPCR_CARRY, DSPCR_EFI_SHIFT, DSPCR_EFI_MASK,
 252         DSPCR_EFI_SMASK, DSPCR_EFI, DSPCR_OUFLAG_SHIFT, DSPCR_OUFLAG_MASK,
 253         DSPCR_OUFLAG_SMASK, DSPCR_OUFLAG4, DSPCR_OUFLAG5, DSPCR_OUFLAG6,
 254         DSPCR_OUFLAG7, DSPCR_CCOND_SHIFT, DSPCR_CCOND_MASK,
 255         DSPCR_CCOND_SMASK): New define.
 256         (DSPLO_REGNUM, DSPHI_REGNUM): New array for DSP accumulators.
 257         * dsp.c, dsp.igen: New files for MIPS DSP ASE.
 258
 259 2005-07-08  Ian Lance Taylor  <ian@airs.com>
 260
 261         * tconfig.in (SIM_QUIET_NAN_NEGATED): Define.
 262
 263 2005-06-16  David Ung  <davidu@mips.com>
 264             Nigel Stephens  <nigel@mips.com>
 265
 266         * mips.igen: New mips16e model and include m16e.igen.
 267         (check_u64): Add mips16e tag.
 268         * m16e.igen: New file for MIPS16e instructions.
 269         * configure.ac (mipsisa32*-*-*, mipsisa32r2*-*-*, mipsisa64*-*-*,
 270         mipsisa64r2*-*-*): Change sim_gen to M16, add mips16 and mips16e
 271         models.
 272         * configure: Regenerate.
 273
 274 2005-05-26  David Ung  <davidu@mips.com>
 275
 276         * mips.igen (mips32r2, mips64r2): New ISA models.  Add new model
 277         tags to all instructions which are applicable to the new ISAs.
 278         (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Add, moved from
 279         vr.igen.
 280         * mips3264r2.igen: New file for MIPS 32/64 revision 2 specific
 281         instructions.
 282         * vr.igen (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Move
 283         to mips.igen.
 284         * configure.ac (mipsisa32r2*-*-*, mipsisa64r2*-*-*): Add new targets.
 285         * configure: Regenerate.
 286
 287 2005-03-23  Mark Kettenis  <kettenis@gnu.org>
 288
 289         * configure: Regenerate.
 290
 291 2005-01-14  Andrew Cagney  <cagney@gnu.org>
 292
 293         * configure.ac: Sinclude aclocal.m4 before common.m4.  Add
 294         explicit call to AC_CONFIG_HEADER.
 295         * configure: Regenerate.
 296
 297 2005-01-12  Andrew Cagney  <cagney@gnu.org>
 298
 299         * configure.ac: Update to use ../common/common.m4.
 300         * configure: Re-generate.
 301
 302 2005-01-11  Andrew Cagney  <cagney@localhost.localdomain>
 303
 304         * configure: Regenerated to track ../common/aclocal.m4 changes.
 305
 306 2005-01-07  Andrew Cagney  <cagney@gnu.org>
 307
 308         * configure.ac: Rename configure.in, require autoconf 2.59.
 309         * configure: Re-generate.
 310
 311 2004-12-08  Hans-Peter Nilsson  <hp@axis.com>
 312
 313         * configure: Regenerate for ../common/aclocal.m4 update.
 314
 315 2004-09-24  Monika Chaddha  <monika@acmet.com>
 316
 317         Committed by Andrew Cagney.
 318         * m16.igen (CMP, CMPI): Fix assembler.
 319
 320 2004-08-18  Chris Demetriou  <cgd@broadcom.com>
 321
 322         * configure.in (mipsisa64sb1*-*-*): Add mips3d to sim_igen_machine.
 323         * configure: Regenerate.
 324
 325 2004-06-25  Chris Demetriou  <cgd@broadcom.com>
 326
 327         * configure.in (sim_m16_machine): Include mipsIII.
 328         * configure: Regenerate.
 329
 330 2004-05-11  Maciej W. Rozycki  <macro@ds2.pg.gda.pl>
 331
 332         * mips/interp.c (decode_coproc): Sign-extend the address retrieved
 333         from COP0_BADVADDR.
 334         * mips/sim-main.h (COP0_BADVADDR): Remove a cast.
 335
 336 2004-04-10  Chris Demetriou  <cgd@broadcom.com>
 337
 338         * sb1.igen (DIV.PS, RECIP.PS, RSQRT.PS, SQRT.PS): New.
 339
 340 2004-04-09  Chris Demetriou  <cgd@broadcom.com>
 341
 342         * mips.igen (check_fmt): Remove.
 343         (ABS.fmt, ADD.fmt, C.cond.fmta, C.cond.fmtb, CEIL.L.fmt, CEIL.W)
 344         (CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt, FLOOR.L.fmt)
 345         (FLOOR.W.fmt, MADD.fmt, MOV.fmt, MOVtf.fmt, MOVN.fmt, MOVZ.fmt)
 346         (MSUB.fmt, MUL.fmt, NEG.fmt, NMADD.fmt, NMSUB.fmt, RECIP.fmt)
 347         (ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt)
 348         (TRUNC.L.fmt, TRUNC.W): Explicitly specify allowed FPU formats.
 349         (check_fmt_p, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
 350         (FLOOR.W.fmt, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt)
 351         (SQRT.fmt, TRUNC.L.fmt, TRUNC.W): Remove all uses of check_fmt.
 352         (C.cnd.fmta): Remove incorrect call to check_fmt_p.
 353
 354 2004-04-09  Chris Demetriou  <cgd@broadcom.com>
 355
 356         * sb1.igen (check_sbx): New function.
 357         (PABSDIFF.fmt, PABSDIFC.fmt, PAVG.fmt): Use check_sbx.
 358
 359 2004-03-29  Chris Demetriou  <cgd@broadcom.com>
 360             Richard Sandiford  <rsandifo@redhat.com>
 361
 362         * sim-main.h (MIPS_MACH_HAS_MT_HILO_HAZARD)
 363         (MIPS_MACH_HAS_MULT_HILO_HAZARD, MIPS_MACH_HAS_DIV_HILO_HAZARD): New.
 364         * mips.igen (check_mt_hilo, check_mult_hilo, check_div_hilo): Provide
 365         separate implementations for mipsIV and mipsV.  Use new macros to
 366         determine whether the restrictions apply.
 367
 368 2004-01-19  Chris Demetriou  <cgd@broadcom.com>
 369
 370         * mips.igen (check_mf_cycles, check_mt_hilo, check_mf_hilo)
 371         (check_mult_hilo): Improve comments.
 372         (check_div_hilo): Likewise.  Also, fork off a new version
 373         to handle mips32/mips64 (since there are no hazards to check
 374         in MIPS32/MIPS64).
 375
 376 2003-06-17  Richard Sandiford  <rsandifo@redhat.com>
 377
 378         * mips.igen (do_dmultx): Fix check for negative operands.
 379
 380 2003-05-16  Ian Lance Taylor  <ian@airs.com>
 381
 382         * Makefile.in (SHELL): Make sure this is defined.
 383         (various): Use $(SHELL) whenever we invoke move-if-change.
 384
 385 2003-05-03  Chris Demetriou  <cgd@broadcom.com>
 386
 387         * cp1.c: Tweak attribution slightly.
 388         * cp1.h: Likewise.
 389         * mdmx.c: Likewise.
 390         * mdmx.igen: Likewise.
 391         * mips3d.igen: Likewise.
 392         * sb1.igen: Likewise.
 393
 394 2003-04-15  Richard Sandiford  <rsandifo@redhat.com>
 395
 396         * vr.igen (do_vr_mul_op): Zero-extend the low 32 bits of
 397         unsigned operands.
 398
 399 2003-02-27  Andrew Cagney  <cagney@redhat.com>
 400
 401         * interp.c (sim_open): Rename _bfd to bfd.
 402         (sim_create_inferior): Ditto.
 403
 404 2003-01-14  Chris Demetriou  <cgd@broadcom.com>
 405
 406         * mips.igen (LUXC1, SUXC1): New, for mipsV and mips64.
 407
 408 2003-01-14  Chris Demetriou  <cgd@broadcom.com>
 409
 410         * mips.igen (EI, DI): Remove.
 411
 412 2003-01-05  Richard Sandiford  <rsandifo@redhat.com>
 413
 414         * Makefile.in (tmp-run-multi): Fix mips16 filter.
 415
 416 2003-01-04  Richard Sandiford  <rsandifo@redhat.com>
 417             Andrew Cagney  <ac131313@redhat.com>
 418             Gavin Romig-Koch  <gavin@redhat.com>
 419             Graydon Hoare  <graydon@redhat.com>
 420             Aldy Hernandez  <aldyh@redhat.com>
 421             Dave Brolley  <brolley@redhat.com>
 422             Chris Demetriou  <cgd@broadcom.com>
 423
 424         * configure.in (mips64vr*): Define TARGET_ENABLE_FR to 1.
 425         (sim_mach_default): New variable.
 426         (mips64vr-*-*, mips64vrel-*-*): New configurations.
 427         Add a new simulator generator, MULTI.
 428         * configure: Regenerate.
 429         * Makefile.in (SIM_MULTI_OBJ, SIM_EXTRA_DISTCLEAN): New variables.
 430         (multi-run.o): New dependency.
 431         (SIM_MULTI_ALL, SIM_MULTI_IGEN_CONFIGS): New variables.
 432         (tmp-mach-multi, tmp-itable-multi, tmp-run-multi): New rules.
 433         (tmp-multi): Combine them.
 434         (BUILT_SRC_FROM_MULTI): New variable.  Depend on tmp-multi.
 435         (clean-extra): Remove sources in BUILT_SRC_FROM_MULTI.
 436         (distclean-extra): New rule.
 437         * sim-main.h: Include bfd.h.
 438         (MIPS_MACH): New macro.
 439         * mips.igen (vr4120, vr5400, vr5500): New models.
 440         (clo, clz, dclo, dclz, madd, maddu, msub, msub, mul): Add *vr5500.
 441         * vr.igen: Replace with new version.
 442
 443 2003-01-04  Chris Demetriou  <cgd@broadcom.com>
 444
 445         * configure.in: Use SIM_AC_OPTION_RESERVED_BITS(1).
 446         * configure: Regenerate.
 447
 448 2002-12-31  Chris Demetriou  <cgd@broadcom.com>
 449
 450         * sim-main.h (check_branch_bug, mark_branch_bug): Remove.
 451         * mips.igen: Remove all invocations of check_branch_bug and
 452         mark_branch_bug.
 453
 454 2002-12-16  Chris Demetriou  <cgd@broadcom.com>
 455
 456         * tconfig.in: Include "gdb/callback.h" and "gdb/remote-sim.h".
 457
 458 2002-07-30  Chris Demetriou  <cgd@broadcom.com>
 459
 460         * mips.igen (do_load_double, do_store_double): New functions.
 461         (LDC1, SDC1): Rename to...
 462         (LDC1b, SDC1b): respectively.
 463         (LDC1a, SDC1a): New instructions for MIPS II and MIPS32 support.
 464
 465 2002-07-29  Michael Snyder  <msnyder@redhat.com>
 466
 467         * cp1.c (fp_recip2): Modify initialization expression so that
 468         GCC will recognize it as constant.
 469
 470 2002-06-18  Chris Demetriou  <cgd@broadcom.com>
 471
 472         * mdmx.c (SD_): Delete.
 473         (Unpredictable): Re-define, for now, to directly invoke
 474         unpredictable_action().
 475         (mdmx_acc_op): Fix error in .ob immediate handling.
 476
 477 2002-06-18  Andrew Cagney  <cagney@redhat.com>
 478
 479         * interp.c (sim_firmware_command): Initialize `address'.
 480
 481 2002-06-16  Andrew Cagney  <ac131313@redhat.com>
 482
 483         * configure: Regenerated to track ../common/aclocal.m4 changes.
 484
 485 2002-06-14  Chris Demetriou  <cgd@broadcom.com>
 486             Ed Satterthwaite  <ehs@broadcom.com>
 487
 488         * mips3d.igen: New file which contains MIPS-3D ASE instructions.
 489         * Makefile.in (IGEN_INCLUDE): Add mips3d.igen.
 490         * mips.igen: Include mips3d.igen.
 491         (mips3d): New model name for MIPS-3D ASE instructions.
 492         (CVT.W.fmt): Don't use this instruction for word (source) format
 493         instructions.
 494         * cp1.c (fp_binary_r, fp_add_r, fp_mul_r, fpu_inv1, fpu_inv1_32)
 495         (fpu_inv1_64, fp_recip1, fp_recip2, fpu_inv_sqrt1, fpu_inv_sqrt1_32)
 496         (fpu_inv_sqrt1_64, fp_rsqrt1, fp_rsqrt2): New functions.
 497         (NR_FRAC_GUARD, IMPLICIT_1): New macros.
 498         * sim-main.h (fmt_pw, CompareAbs, AddR, MultiplyR, Recip1, Recip2)
 499         (RSquareRoot1, RSquareRoot2): New macros.
 500         (fp_add_r, fp_mul_r, fp_recip1, fp_recip2, fp_rsqrt1)
 501         (fp_rsqrt2): New functions.
 502         * configure.in: Add MIPS-3D support to mipsisa64 simulator.
 503         * configure: Regenerate.
 504
 505 2002-06-13  Chris Demetriou  <cgd@broadcom.com>
 506             Ed Satterthwaite  <ehs@broadcom.com>
 507
 508         * cp1.c (FP_PS_upper, FP_PS_lower, FP_PS_cat, FPQNaN_PS): New macros.
 509         (value_fpr, store_fpr, fp_cmp, fp_unary, fp_binary, fp_mac)
 510         (fp_inv_sqrt, fpu_format_name): Add paired-single support.
 511         (convert): Note that this function is not used for paired-single
 512         format conversions.
 513         (ps_lower, ps_upper, pack_ps, convert_ps): New functions.
 514         * mips.igen (FMT, MOVtf.fmt): Add paired-single support.
 515         (check_fmt_p): Enable paired-single support.
 516         (ALNV.PS, CVT.PS.S, CVT.S.PL, CVT.S.PU, PLL.PS, PLU.PS, PUL.PS)
 517         (PUU.PS): New instructions.
 518         (CVT.S.fmt): Don't use this instruction for paired-single format
 519         destinations.
 520         * sim-main.h (FP_formats): New value 'fmt_ps.'
 521         (ps_lower, ps_upper, pack_ps, convert_ps): New prototypes.
 522         (PSLower, PSUpper, PackPS, ConvertPS): New macros.
 523
 524 2002-06-12  Chris Demetriou  <cgd@broadcom.com>
 525
 526         * mips.igen: Fix formatting of function calls in
 527         many FP operations.
 528
 529 2002-06-12  Chris Demetriou  <cgd@broadcom.com>
 530
 531         * mips.igen (MOVN, MOVZ): Trace result.
 532         (TNEI): Print "tnei" as the opcode name in traces.
 533         (CEIL.W): Add disassembly string for traces.
 534         (RSQRT.fmt): Make location of disassembly string consistent
 535         with other instructions.
 536
 537 2002-06-12  Chris Demetriou  <cgd@broadcom.com>
 538
 539         * mips.igen (X): Delete unused function.
 540
 541 2002-06-08  Andrew Cagney  <cagney@redhat.com>
 542
 543         * interp.c: Include "gdb/callback.h" and "gdb/remote-sim.h".
 544
 545 2002-06-07  Chris Demetriou  <cgd@broadcom.com>
 546             Ed Satterthwaite  <ehs@broadcom.com>
 547
 548         * cp1.c (inner_mac, fp_mac, inner_rsqrt, fp_inv_sqrt)
 549         (fp_rsqrt, fp_madd, fp_msub, fp_nmadd, fp_nmsub): New functions.
 550         * sim-main.h (fp_rsqrt, fp_madd, fp_msub, fp_nmadd)
 551         (fp_nmsub): New prototypes.
 552         (RSquareRoot, MultiplyAdd, MultiplySub, NegMultiplyAdd)
 553         (NegMultiplySub): New defines.
 554         * mips.igen (RSQRT.fmt): Use RSquareRoot().
 555         (MADD.D, MADD.S): Replace with...
 556         (MADD.fmt): New instruction.
 557         (MSUB.D, MSUB.S): Replace with...
 558         (MSUB.fmt): New instruction.
 559         (NMADD.D, NMADD.S): Replace with...
 560         (NMADD.fmt): New instruction.
 561         (NMSUB.D, MSUB.S): Replace with...
 562         (NMSUB.fmt): New instruction.
 563
 564 2002-06-07  Chris Demetriou  <cgd@broadcom.com>
 565             Ed Satterthwaite  <ehs@broadcom.com>
 566
 567         * cp1.c: Fix more comment spelling and formatting.
 568         (value_fcr, store_fcr): Use fenr_FS rather than hard-coding value.
 569         (denorm_mode): New function.
 570         (fpu_unary, fpu_binary): Round results after operation, collect
 571         status from rounding operations, and update the FCSR.
 572         (convert): Collect status from integer conversions and rounding
 573         operations, and update the FCSR.  Adjust NaN values that result
 574         from conversions.  Convert to use sim_io_eprintf rather than
 575         fprintf, and remove some debugging code.
 576         * cp1.h (fenr_FS): New define.
 577
 578 2002-06-07  Chris Demetriou  <cgd@broadcom.com>
 579
 580         * cp1.c (convert): Remove unusable debugging code, and move MIPS
 581         rounding mode to sim FP rounding mode flag conversion code into...
 582         (rounding_mode): New function.
 583
 584 2002-06-07  Chris Demetriou  <cgd@broadcom.com>
 585
 586         * cp1.c: Clean up formatting of a few comments.
 587         (value_fpr): Reformat switch statement.
 588
 589 2002-06-06  Chris Demetriou  <cgd@broadcom.com>
 590             Ed Satterthwaite  <ehs@broadcom.com>
 591
 592         * cp1.h: New file.
 593         * sim-main.h: Include cp1.h.
 594         (SETFCC, GETFCC, IR, UF, OF, DX, IO, UO, FP_FLAGS, FP_ENABLE)
 595         (FP_CAUSE, GETFS, FP_RM_NEAREST, FP_RM_TOZERO, FP_RM_TOPINF)
 596         (FP_RM_TOMINF, GETRM): Remove.  Moved to cp1.h.
 597         (FP_FS, FP_MASK_RM, FP_SH_RM, Nan, Less, Equal): Remove.
 598         (value_fcr, store_fcr, test_fcsr, fp_cmp): New prototypes.
 599         (ValueFCR, StoreFCR, TestFCSR, Compare): New macros.
 600         * cp1.c: Don't include sim-fpu.h; already included by
 601         sim-main.h.  Clean up formatting of some comments.
 602         (NaN, Equal, Less): Remove.
 603         (test_fcsr, value_fcr, store_fcr, update_fcsr, fp_test)
 604         (fp_cmp): New functions.
 605         * mips.igen (do_c_cond_fmt): Remove.
 606         (C.cond.fmta, C.cond.fmtb): Replace uses of do_c_cond_fmt_a with
 607         Compare.  Add result tracing.
 608         (CxC1): Remove, replace with...
 609         (CFC1a, CFC1b, CFC1c, CTC1a, CTC1b, CTC1c): New instructions.
 610         (DMxC1): Remove, replace with...
 611         (DMFC1a, DMFC1b, DMTC1a, DMTC1b): New instructions.
 612         (MxC1): Remove, replace with...
 613         (MFC1a, MFC1b, MTC1a, MTC1b): New instructions.
 614
 615 2002-06-04  Chris Demetriou  <cgd@broadcom.com>
 616
 617         * sim-main.h (FGRIDX): Remove, replace all uses with...
 618         (FGR_BASE): New macro.
 619         (FP0_REGNUM, FCRCS_REGNUM, FCRIR_REGNUM): New macros.
 620         (_sim_cpu): Move 'fgr' member to be right before 'fpr_state' member.
 621         (NR_FGR, FGR): Likewise.
 622         * interp.c: Replace all uses of FGRIDX with FGR_BASE.
 623         * mips.igen: Likewise.
 624
 625 2002-06-04  Chris Demetriou  <cgd@broadcom.com>
 626
 627         * cp1.c: Add an FSF Copyright notice to this file.
 628
 629 2002-06-04  Chris Demetriou  <cgd@broadcom.com>
 630             Ed Satterthwaite  <ehs@broadcom.com>
 631
 632         * cp1.c (Infinity): Remove.
 633         * sim-main.h (Infinity): Likewise.
 634
 635         * cp1.c (fp_unary, fp_binary): New functions.
 636         (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div, fp_recip)
 637         (fp_sqrt): New functions, implemented in terms of the above.
 638         (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
 639         (Recip, SquareRoot): Remove (replaced by functions above).
 640         * sim-main.h (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div)
 641         (fp_recip, fp_sqrt): New prototypes.
 642         (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
 643         (Recip, SquareRoot): Replace prototypes with #defines which
 644         invoke the functions above.
 645
 646 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
 647
 648         * sim-main.h (Nan, Infinity, Less, Equal, AbsoluteValue, Negate)
 649         (Add, Sub, Multiply, Divide, Recip, SquareRoot): Move lower in
 650         file, remove PARAMS from prototypes.
 651         (value_fpr, store_fpr, convert): Likewise.  Use SIM_STATE to provide
 652         simulator state arguments.
 653         (ValueFPR, StoreFPR, Convert): Move lower in file.  Use SIM_ARGS to
 654         pass simulator state arguments.
 655         * cp1.c (SD): Redefine as CPU_STATE(cpu).
 656         (store_fpr, convert): Remove 'sd' argument.
 657         (value_fpr): Likewise.  Convert to use 'SD' instead.
 658
 659 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
 660
 661         * cp1.c (Min, Max): Remove #if 0'd functions.
 662         * sim-main.h (Min, Max): Remove.
 663
 664 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
 665
 666         * cp1.c: fix formatting of switch case and default labels.
 667         * interp.c: Likewise.
 668         * sim-main.c: Likewise.
 669
 670 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
 671
 672         * cp1.c: Clean up comments which describe FP formats.
 673          (FPQNaN_DOUBLE, FPQNaN_LONG): Generate using UNSIGNED64.
 674
 675 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
 676             Ed Satterthwaite  <ehs@broadcom.com>
 677
 678         * configure.in (mipsisa64sb1*-*-*): New target for supporting
 679         Broadcom SiByte SB-1 processor configurations.
 680         * configure: Regenerate.
 681         * sb1.igen: New file.
 682         * mips.igen: Include sb1.igen.
 683         (sb1): New model.
 684         * Makefile.in (IGEN_INCLUDE): Add sb1.igen.
 685         * mdmx.igen: Add "sb1" model to all appropriate functions and
 686         instructions.
 687         * mdmx.c (AbsDiffOB, AvgOB, AccAbsDiffOB): New functions.
 688         (ob_func, ob_acc): Reference the above.
 689         (qh_acc): Adjust to keep the same size as ob_acc.
 690         * sim-main.h (status_SBX, MX_VECT_ABSD, MX_VECT_AVG, MX_AbsDiff)
 691         (MX_Avg, MX_VECT_ABSDA, MX_AbsDiffC): New macros.
 692
 693 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
 694
 695         * Makefile.in (IGEN_INCLUDE): Add mdmx.igen.
 696
 697 2002-06-02  Chris Demetriou  <cgd@broadcom.com>
 698             Ed Satterthwaite  <ehs@broadcom.com>
 699
 700         * mips.igen (mdmx): New (pseudo-)model.
 701         * mdmx.c, mdmx.igen: New files.
 702         * Makefile.in (SIM_OBJS): Add mdmx.o.
 703         * sim-main.h (MDMX_accumulator, MX_fmtsel, signed24, signed48):
 704         New typedefs.
 705         (ACC, MX_Add, MX_AddA, MX_AddL, MX_And, MX_C_EQ, MX_C_LT, MX_Comp)
 706         (MX_FMT_OB, MX_FMT_QH, MX_Max, MX_Min, MX_Msgn, MX_Mul, MX_MulA)
 707         (MX_MulL, MX_MulS, MX_MulSL, MX_Nor, MX_Or, MX_Pick, MX_RAC)
 708         (MX_RAC_H, MX_RAC_L, MX_RAC_M, MX_RNAS, MX_RNAU, MX_RND_AS)
 709         (MX_RND_AU, MX_RND_ES, MX_RND_EU, MX_RND_ZS, MX_RND_ZU, MX_RNES)
 710         (MX_RNEU, MX_RZS, MX_RZU, MX_SHFL, MX_ShiftLeftLogical)
 711         (MX_ShiftRightArith, MX_ShiftRightLogical, MX_Sub, MX_SubA, MX_SubL)
 712         (MX_VECT_ADD, MX_VECT_ADDA, MX_VECT_ADDL, MX_VECT_AND)
 713         (MX_VECT_MAX, MX_VECT_MIN, MX_VECT_MSGN, MX_VECT_MUL, MX_VECT_MULA)
 714         (MX_VECT_MULL, MX_VECT_MULS, MX_VECT_MULSL, MX_VECT_NOR)
 715         (MX_VECT_OR, MX_VECT_SLL, MX_VECT_SRA, MX_VECT_SRL, MX_VECT_SUB)
 716         (MX_VECT_SUBA, MX_VECT_SUBL, MX_VECT_XOR, MX_WACH, MX_WACL, MX_Xor)
 717         (SIM_ARGS, SIM_STATE, UnpredictableResult, fmt_mdmx, ob_fmtsel)
 718         (qh_fmtsel): New macros.
 719         (_sim_cpu): New member "acc".
 720         (mdmx_acc_op, mdmx_cc_op, mdmx_cpr_op, mdmx_pick_op, mdmx_rac_op)
 721         (mdmx_round_op, mdmx_shuffle, mdmx_wach, mdmx_wacl): New functions.
 722
 723 2002-05-01  Chris Demetriou  <cgd@broadcom.com>
 724
 725         * interp.c: Use 'deprecated' rather than 'depreciated.'
 726         * sim-main.h: Likewise.
 727
 728 2002-05-01  Chris Demetriou  <cgd@broadcom.com>
 729
 730         * cp1.c (store_fpr): Remove #ifdef'd out call to UndefinedResult
 731         which wouldn't compile anyway.
 732         * sim-main.h (unpredictable_action): New function prototype.
 733         (Unpredictable): Define to call igen function unpredictable().
 734         (NotWordValue): New macro to call igen function not_word_value().
 735         (UndefinedResult): Remove.
 736         * interp.c (undefined_result): Remove.
 737         (unpredictable_action): New function.
 738         * mips.igen (not_word_value, unpredictable): New functions.
 739         (ADD, ADDI, do_addiu, do_addu, BGEZAL, BGEZALL, BLTZAL, BLTZALL)
 740         (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, do_mult, do_multu)
 741         (do_sra, do_srav, do_srl, do_srlv, SUB, do_subu): Invoke
 742         NotWordValue() to check for unpredictable inputs, then
 743         Unpredictable() to handle them.
 744
 745 2002-02-24  Chris Demetriou  <cgd@broadcom.com>
 746
 747         * mips.igen: Fix formatting of calls to Unpredictable().
 748
 749 2002-04-20  Andrew Cagney  <ac131313@redhat.com>
 750
 751         * interp.c (sim_open): Revert previous change.
 752
 753 2002-04-18  Alexandre Oliva  <aoliva@redhat.com>
 754
 755         * interp.c (sim_open): Disable chunk of code that wrote code in
 756         vector table entries.
 757
 758 2002-03-19  Chris Demetriou  <cgd@broadcom.com>
 759
 760         * cp1.c (FP_S_s, FP_D_s, FP_S_be, FP_D_be, FP_S_e, FP_D_e, FP_S_f)
 761         (FP_D_f, FP_S_fb, FP_D_fb, FPINF_SINGLE, FPINF_DOUBLE): Remove
 762         unused definitions.
 763
 764 2002-03-19  Chris Demetriou  <cgd@broadcom.com>
 765
 766         * cp1.c: Fix many formatting issues.
 767
 768 2002-03-19  Chris G. Demetriou  <cgd@broadcom.com>
 769
 770         * cp1.c (fpu_format_name): New function to replace...
 771         (DOFMT): This.  Delete, and update all callers.
 772         (fpu_rounding_mode_name): New function to replace...
 773         (RMMODE): This.  Delete, and update all callers.
 774
 775 2002-03-19  Chris G. Demetriou  <cgd@broadcom.com>
 776
 777         * interp.c: Move FPU support routines from here to...
 778         * cp1.c: Here.  New file.
 779         * Makefile.in (SIM_OBJS): Add cp1.o to object list.
 780         (cp1.o): New target.
 781
 782 2002-03-12  Chris Demetriou  <cgd@broadcom.com>
 783
 784         * configure.in (mipsisa32*-*-*, mipsisa64*-*-*): New targets.
 785         * mips.igen (mips32, mips64): New models, add to all instructions
 786         and functions as appropriate.
 787         (loadstore_ea, check_u64): New variant for model mips64.
 788         (check_fmt_p): New variant for models mipsV and mips64, remove
 789         mipsV model marking fro other variant.
 790         (SLL) Rename to...
 791         (SLLa) this.
 792         (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, SLLb): New instructions
 793         for mips32 and mips64.
 794         (DCLO, DCLZ): New instructions for mips64.
 795
 796 2002-03-07  Chris Demetriou  <cgd@broadcom.com>
 797
 798         * mips.igen (BREAK, LUI, ORI, SYSCALL, XORI): Print
 799         immediate or code as a hex value with the "%#lx" format.
 800         (ANDI): Likewise, and fix printed instruction name.
 801
 802 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
 803
 804         * sim-main.h (UndefinedResult, Unpredictable): New macros
 805         which currently do nothing.
 806
 807 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
 808
 809         * sim-main.h (status_UX, status_SX, status_KX, status_TS)
 810         (status_PX, status_MX, status_CU0, status_CU1, status_CU2)
 811         (status_CU3): New definitions.
 812
 813         * sim-main.h (ExceptionCause): Add new values for MIPS32
 814         and MIPS64: MDMX, MCheck, CacheErr.  Update comments
 815         for DebugBreakPoint and NMIReset to note their status in
 816         MIPS32 and MIPS64.
 817         (SignalExceptionMDMX, SignalExceptionWatch, SignalExceptionMCheck)
 818         (SignalExceptionCacheErr): New exception macros.
 819
 820 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
 821
 822         * mips.igen (check_fpu): Enable check for coprocessor 1 usability.
 823         * sim-main.h (COP_Usable): Define, but for now coprocessor 1
 824         is always enabled.
 825         (SignalExceptionCoProcessorUnusable): Take as argument the
 826         unusable coprocessor number.
 827
 828 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
 829
 830         * mips.igen: Fix formatting of all SignalException calls.
 831
 832 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
 833
 834         * sim-main.h (SIGNEXTEND): Remove.
 835
 836 2002-03-04  Chris Demetriou  <cgd@broadcom.com>
 837
 838         * mips.igen: Remove gencode comment from top of file, fix
 839         spelling in another comment.
 840
 841 2002-03-04  Chris Demetriou  <cgd@broadcom.com>
 842
 843         * mips.igen (check_fmt, check_fmt_p): New functions to check
 844         whether specific floating point formats are usable.
 845         (ABS.fmt, ADD.fmt, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
 846         (FLOOR.W.fmt, MOV.fmt, MUL.fmt, NEG.fmt, RECIP.fmt, ROUND.L.fmt)
 847         (ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt, TRUNC.L.fmt, TRUNC.W):
 848         Use the new functions.
 849         (do_c_cond_fmt): Remove format checks...
 850         (C.cond.fmta, C.cond.fmtb): And move them into all callers.
 851
 852 2002-03-03  Chris Demetriou  <cgd@broadcom.com>
 853
 854         * mips.igen: Fix formatting of check_fpu calls.
 855
 856 2002-03-03  Chris Demetriou  <cgd@broadcom.com>
 857
 858         * mips.igen (FLOOR.L.fmt): Store correct destination register.
 859
 860 2002-03-03  Chris Demetriou  <cgd@broadcom.com>
 861
 862         * mips.igen: Remove whitespace at end of lines.
 863
 864 2002-03-02  Chris Demetriou  <cgd@broadcom.com>
 865
 866         * mips.igen (loadstore_ea): New function to do effective
 867         address calculations.
 868         (do_load, do_load_left, do_load_right, LL, LDD, PREF, do_store,
 869         do_store_left, do_store_right, SC, SCD, PREFX, SWC1, SWXC1,
 870         CACHE): Use loadstore_ea to do effective address computations.
 871
 872 2002-03-02  Chris Demetriou  <cgd@broadcom.com>
 873
 874         * interp.c (load_word): Use EXTEND32 rather than SIGNEXTEND.
 875         * mips.igen (LL, CxC1, MxC1): Likewise.
 876
 877 2002-03-02  Chris Demetriou  <cgd@broadcom.com>
 878
 879         * mips.igen (LL, LLD, PREF, SC, SCD, ABS.fmt, ADD.fmt, CEIL.L.fmt,
 880         CEIL.W, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt,
 881         FLOOR.L.fmt, FLOOR.W.fmt, MADD.D, MADD.S, MOV.fmt, MOVtf.fmt,
 882         MSUB.D, MSUB.S, MUL.fmt, NEG.fmt, NMADD.D, NMADD.S, NMSUB.D,
 883         NMSUB.S, PREFX, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt,
 884         SQRT.fmt, SUB.fmt, SWC1, SWXC1, TRUNC.L.fmt, TRUNC.W, CACHE):
 885         Don't split opcode fields by hand, use the opcode field values
 886         provided by igen.
 887
 888 2002-03-01  Chris Demetriou  <cgd@broadcom.com>
 889
 890         * mips.igen (do_divu): Fix spacing.
 891
 892         * mips.igen (do_dsllv): Move to be right before DSLLV,
 893         to match the rest of the do_<shift> functions.
 894
 895 2002-03-01  Chris Demetriou  <cgd@broadcom.com>
 896
 897         * mips.igen (do_dsll, do_dsllv, DSLL32, do_dsra, DSRA32, do_dsrl,
 898         DSRL32, do_dsrlv): Trace inputs and results.
 899
 900 2002-03-01  Chris Demetriou  <cgd@broadcom.com>
 901
 902         * mips.igen (CACHE): Provide instruction-printing string.
 903
 904         * interp.c (signal_exception): Comment tokens after #endif.
 905
 906 2002-02-28  Chris Demetriou  <cgd@broadcom.com>
 907
 908         * mips.igen (LWXC1): Mark with filter "64,f", rather than just "32".
 909         (MOVtf, MxC1, MxC1, DMxC1, DMxC1, CxC1, CxC1, SQRT.fmt, MOV.fmt,
 910         NEG.fmt, ROUND.L.fmt, TRUNC.L.fmt, CEIL.L.fmt, FLOOR.L.fmt,
 911         ROUND.W.fmt, TRUNC.W, CEIL.W, FLOOR.W.fmt, RECIP.fmt, RSQRT.fmt,
 912         CVT.S.fmt, CVT.D.fmt, CVT.W.fmt, CVT.L.fmt, MOVtf.fmt, C.cond.fmta,
 913         C.cond.fmtb, SUB.fmt, MUL.fmt, DIV.fmt, MOVZ.fmt, MOVN.fmt, LDXC1,
 914         SWXC1, SDXC1, MSUB.D, MSUB.S, NMADD.S, NMADD.D, NMSUB.S, NMSUB.D,
 915         LWC1, SWC1): Add "f" to filter, since these are FP instructions.
 916
 917 2002-02-28  Chris Demetriou  <cgd@broadcom.com>
 918
 919         * mips.igen (DSRA32, DSRAV): Fix order of arguments in
 920         instruction-printing string.
 921         (LWU): Use '64' as the filter flag.
 922
 923 2002-02-28  Chris Demetriou  <cgd@broadcom.com>
 924
 925         * mips.igen (SDXC1): Fix instruction-printing string.
 926
 927 2002-02-28  Chris Demetriou  <cgd@broadcom.com>
 928
 929         * mips.igen (LDC1, SDC1): Remove mipsI model, and mark with
 930         filter flags "32,f".
 931
 932 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
 933
 934         * mips.igen (PREFX): This is a 64-bit instruction, use '64'
 935         as the filter flag.
 936
 937 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
 938
 939         * mips.igen (PREFX): Tweak instruction opcode fields (i.e.,
 940         add a comma) so that it more closely match the MIPS ISA
 941         documentation opcode partitioning.
 942         (PREF): Put useful names on opcode fields, and include
 943         instruction-printing string.
 944
 945 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
 946
 947         * mips.igen (check_u64): New function which in the future will
 948         check whether 64-bit instructions are usable and signal an
 949         exception if not.  Currently a no-op.
 950         (DADD, DADDI, DADDIU, DADDU, DDIV, DDIVU, DMULT, DMULTU, DSLL,
 951         DSLL32, DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB,
 952         DSUBU, LD, LDL, LDR, LLD, LWU, SCD, SD, SDL, SDR, DMxC1, LDXC1,
 953         LWXC1, SDXC1, SWXC1, DMFC0, DMTC0): Use check_u64.
 954
 955         * mips.igen (check_fpu): New function which in the future will
 956         check whether FPU instructions are usable and signal an exception
 957         if not.  Currently a no-op.
 958         (ABS.fmt, ADD.fmt, BC1a, BC1b, C.cond.fmta, C.cond.fmtb,
 959         CEIL.L.fmt, CEIL.W, CxC1, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt,
 960         CVT.W.fmt, DIV.fmt, DMxC1, DMxC1, FLOOR.L.fmt, FLOOR.W.fmt, LDC1,
 961         LDXC1, LWC1, LWXC1, MADD.D, MADD.S, MxC1, MOV.fmt, MOVtf,
 962         MOVtf.fmt, MOVN.fmt, MOVZ.fmt, MSUB.D, MSUB.S, MUL.fmt, NEG.fmt,
 963         NMADD.D, NMADD.S, NMSUB.D, NMSUB.S, RECIP.fmt, ROUND.L.fmt,
 964         ROUND.W.fmt, RSQRT.fmt, SDC1, SDXC1, SQRT.fmt, SUB.fmt, SWC1,
 965         SWXC1, TRUNC.L.fmt, TRUNC.W): Use check_fpu.
 966
 967 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
 968
 969         * mips.igen (do_load_left, do_load_right): Move to be immediately
 970         following do_load.
 971         (do_store_left, do_store_right): Move to be immediately following
 972         do_store.
 973
 974 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
 975
 976         * mips.igen (mipsV): New model name.  Also, add it to
 977         all instructions and functions where it is appropriate.
 978
 979 2002-02-18  Chris Demetriou  <cgd@broadcom.com>
 980
 981         * mips.igen: For all functions and instructions, list model
 982         names that support that instruction one per line.
 983
 984 2002-02-11  Chris Demetriou  <cgd@broadcom.com>
 985
 986         * mips.igen: Add some additional comments about supported
 987         models, and about which instructions go where.
 988         (BC1b, MFC0, MTC0, RFE): Sort supported models in the same
 989         order as is used in the rest of the file.
 990
 991 2002-02-11  Chris Demetriou  <cgd@broadcom.com>
 992
 993         * mips.igen (ADD, ADDI, DADDI, DSUB, SUB): Add comment
 994         indicating that ALU32_END or ALU64_END are there to check
 995         for overflow.
 996         (DADD): Likewise, but also remove previous comment about
 997         overflow checking.
 998
 999 2002-02-10  Chris Demetriou  <cgd@broadcom.com>
1000
1001         * mips.igen (DDIV, DIV, DIVU, DMULT, DMULTU, DSLL, DSLL32,
1002         DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB, DSUBU,
1003         JALR, JR, MOVN, MOVZ, MTLO, MULT, MULTU, SLL, SLLV, SLT, SLTU,
1004         SRAV, SRLV, SUB, SUBU, SYNC, XOR, MOVtf, DI, DMFC0, DMTC0, EI,
1005         ERET, RFE, TLBP, TLBR, TLBWI, TLBWR): Tweak instruction opcode
1006         fields (i.e., add and move commas) so that they more closely
1007         match the MIPS ISA documentation opcode partitioning.
1008
1009 2002-02-10  Chris Demetriou  <cgd@broadcom.com>
1010
1011         * mips.igen (ADDI): Print immediate value.
1012         (BREAK): Print code.
1013         (DADDIU, DSRAV, DSRLV): Print correct instruction name.
1014         (SLL): Print "nop" specially, and don't run the code
1015         that does the shift for the "nop" case.
1016
1017 2001-11-17  Fred Fish  <fnf@redhat.com>
1018
1019         * sim-main.h (float_operation): Move enum declaration outside
1020         of _sim_cpu struct declaration.
1021
1022 2001-04-12  Jim Blandy  <jimb@redhat.com>
1023
1024         * mips.igen (CFC1, CTC1): Pass the correct register numbers to
1025         PENDING_FILL.  Use PENDING_SCHED directly to handle the pending
1026         set of the FCSR.
1027         * sim-main.h (COCIDX): Remove definition; this isn't supported by
1028         PENDING_FILL, and you can get the intended effect gracefully by
1029         calling PENDING_SCHED directly.
1030
1031 2001-02-23  Ben Elliston  <bje@redhat.com>
1032
1033         * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Only define if not
1034         already defined elsewhere.
1035
1036 2001-02-19  Ben Elliston  <bje@redhat.com>
1037
1038         * sim-main.h (sim_monitor): Return an int.
1039         * interp.c (sim_monitor): Add return values.
1040         (signal_exception): Handle error conditions from sim_monitor.
1041
1042 2001-02-08  Ben Elliston  <bje@redhat.com>
1043
1044         * sim-main.c (load_memory): Pass cia to sim_core_read* functions.
1045         (store_memory): Likewise, pass cia to sim_core_write*.
1046
1047 2000-10-19  Frank Ch. Eigler  <fche@redhat.com>
1048
1049         On advice from Chris G. Demetriou <cgd@sibyte.com>:
1050         * sim-main.h (GPR_CLEAR): Remove unused alternative macro.
1051
1052 Thu Jul 27 22:02:05 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1053
1054         From Maciej W. Rozycki <macro@ds2.pg.gda.pl>:
1055         * Makefile.in: Don't delete *.igen when cleaning directory.
1056
1057 Wed Jul 19 18:50:51 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1058
1059         * m16.igen (break): Call SignalException not sim_engine_halt.
1060
1061 Mon Jul  3 11:13:20 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1062
1063         From Jason Eckhardt:
1064         * mips.igen (MOVZ.fmt, MOVN.fmt): Move conditional on GPR[RT].
1065
1066 Tue Jun 13 20:52:07 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1067
1068         * mips.igen (MxC1, DMxC1): Fix printf formatting.
1069
1070 2000-05-24  Michael Hayes  <mhayes@cygnus.com>
1071
1072         * mips.igen (do_dmultx): Fix typo.
1073
1074 Tue May 23 21:39:23 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1075
1076         * configure: Regenerated to track ../common/aclocal.m4 changes.
1077
1078 Fri Apr 28 20:48:36 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1079
1080         * mips.igen (DMxC1): Fix format arguments for sim_io_eprintf call.
1081
1082 2000-04-12  Frank Ch. Eigler  <fche@redhat.com>
1083
1084         * sim-main.h (GPR_CLEAR): Define macro.
1085
1086 Mon Apr 10 00:07:09 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1087
1088         * interp.c (decode_coproc): Output long using %lx and not %s.
1089
1090 2000-03-21  Frank Ch. Eigler  <fche@redhat.com>
1091
1092         * interp.c (sim_open): Sort & extend dummy memory regions for
1093         --board=jmr3904 for eCos.
1094
1095 2000-03-02  Frank Ch. Eigler  <fche@redhat.com>
1096
1097         * configure: Regenerated.
1098
1099 Tue Feb  8 18:35:01 2000  Donald Lindsay  <dlindsay@hound.cygnus.com>
1100
1101         * interp.c, mips.igen: all 5 DEADC0DE situations now have sim_io_eprintf
1102         calls, conditional on the simulator being in verbose mode.
1103
1104 Fri Feb  4 09:45:15 2000  Donald Lindsay  <dlindsay@cygnus.com>
1105
1106         * sim-main.c (cache_op): Added case arm so that CACHE ops to a secondary
1107         cache don't get ReservedInstruction traps.
1108
1109 1999-11-29  Mark Salter  <msalter@cygnus.com>
1110
1111         * dv-tx3904sio.c (tx3904sio_io_write_buffer): Use write value as a mask
1112         to clear status bits in sdisr register. This is how the hardware works.
1113
1114         * interp.c (sim_open): Added more memory aliases for jmr3904 hardware
1115         being used by cygmon.
1116
1117 1999-11-11  Andrew Haley  <aph@cygnus.com>
1118
1119         * interp.c (decode_coproc): Correctly handle DMFC0 and DMTC0
1120         instructions.
1121
1122 Thu Sep  9 15:12:08 1999  Geoffrey Keating  <geoffk@cygnus.com>
1123
1124         * mips.igen (MULT): Correct previous mis-applied patch.
1125
1126 Tue Sep  7 13:34:54 1999  Geoffrey Keating  <geoffk@cygnus.com>
1127
1128         * mips.igen (delayslot32): Handle sequence like
1129         mtc1 $at,$f12 ; jal fp_add ; mov.s $f13,$f12
1130         correctly by calling ENGINE_ISSUE_PREFIX_HOOK() before issue.
1131         (MULT): Actually pass the third register...
1132
1133 1999-09-03  Mark Salter  <msalter@cygnus.com>
1134
1135         * interp.c (sim_open): Added more memory aliases for additional
1136         hardware being touched by cygmon on jmr3904 board.
1137
1138 Thu Sep  2 18:15:53 1999  Andrew Cagney  <cagney@b1.cygnus.com>
1139
1140         * configure: Regenerated to track ../common/aclocal.m4 changes.
1141
1142 Tue Jul 27 16:36:51 1999  Andrew Cagney  <cagney@amy.cygnus.com>
1143
1144         * interp.c (sim_store_register): Handle case where client - GDB -
1145         specifies that a 4 byte register is 8 bytes in size.
1146         (sim_fetch_register): Ditto.
1147
1148 1999-07-14  Frank Ch. Eigler  <fche@cygnus.com>
1149
1150         Implement "sim firmware" option, inspired by jimb's version of 1998-01.
1151         * interp.c (firmware_option_p): New global flag: "sim firmware" given.
1152         (idt_monitor_base): Base address for IDT monitor traps.
1153         (pmon_monitor_base): Ditto for PMON.
1154         (lsipmon_monitor_base): Ditto for LSI PMON.
1155         (MONITOR_BASE, MONITOR_SIZE): Removed macros.
1156         (mips_option): Add "firmware" option with new OPTION_FIRMWARE key.
1157         (sim_firmware_command): New function.
1158         (mips_option_handler): Call it for OPTION_FIRMWARE.
1159         (sim_open): Allocate memory for idt_monitor region.  If "--board"
1160         option was given, add no monitor by default.  Add BREAK hooks only if
1161         monitors are also there.
1162
1163 Mon Jul 12 00:02:27 1999  Andrew Cagney  <cagney@amy.cygnus.com>
1164
1165         * interp.c (sim_monitor): Flush output before reading input.
1166
1167 Sun Jul 11 19:28:11 1999  Andrew Cagney  <cagney@b1.cygnus.com>
1168
1169         * tconfig.in (SIM_HANDLES_LMA): Always define.
1170
1171 Thu Jul  8 16:06:59 1999  Andrew Cagney  <cagney@b1.cygnus.com>
1172
1173         From Mark Salter <msalter@cygnus.com>:
1174         * interp.c (BOARD_BSP): Define.  Add to list of possible boards.
1175         (sim_open): Add setup for BSP board.
1176
1177 Wed Jul  7 12:45:58 1999  Andrew Cagney  <cagney@b1.cygnus.com>
1178
1179         * mips.igen (MULT, MULTU): Add syntax for two operand version.
1180         (DMFC0, DMTC0): Recognize.  Call DecodeCoproc which will report
1181         them as unimplemented.
1182
1183 1999-05-08  Felix Lee  <flee@cygnus.com>
1184
1185         * configure: Regenerated to track ../common/aclocal.m4 changes.
1186
1187 1999-04-21  Frank Ch. Eigler  <fche@cygnus.com>
1188
1189         * mips.igen (bc0f): For the TX39 only, decode this as a no-op stub.
1190
1191 Thu Apr 15 14:15:17 1999  Andrew Cagney  <cagney@amy.cygnus.com>
1192
1193         * configure.in: Any mips64vr5*-*-* target should have
1194         -DTARGET_ENABLE_FR=1.
1195         (default_endian): Any mips64vr*el-*-* target should default to
1196         LITTLE_ENDIAN.
1197         * configure: Re-generate.
1198
1199 1999-02-19  Gavin Romig-Koch  <gavin@cygnus.com>
1200
1201         * mips.igen (ldl): Extend from _16_, not 32.
1202
1203 Wed Jan 27 18:51:38 1999  Andrew Cagney  <cagney@chook.cygnus.com>
1204
1205         * interp.c (sim_store_register): Force registers written to by GDB
1206         into an un-interpreted state.
1207
1208 1999-02-05  Frank Ch. Eigler  <fche@cygnus.com>
1209
1210         * dv-tx3904sio.c (tx3904sio_tickle): After a polled I/O from the
1211         CPU, start periodic background I/O polls.
1212         (tx3904sio_poll): New function: periodic I/O poller.
1213
1214 1998-12-30  Frank Ch. Eigler  <fche@cygnus.com>
1215
1216         * mips.igen (BREAK): Call signal_exception instead of sim_engine_halt.
1217
1218 Tue Dec 29 16:03:53 1998  Rainer Orth  <ro@TechFak.Uni-Bielefeld.DE>
1219
1220         * configure.in, configure (mips64vr5*-*-*): Added missing ;; in
1221         case statement.
1222
1223 1998-12-29  Frank Ch. Eigler  <fche@cygnus.com>
1224
1225         * interp.c (sim_open): Allocate jm3904 memory in smaller chunks.
1226         (load_word): Call SIM_CORE_SIGNAL hook on error.
1227         (signal_exception): Call SIM_CPU_EXCEPTION_TRIGGER hook before
1228         starting.  For exception dispatching, pass PC instead of NULL_CIA.
1229         (decode_coproc): Use COP0_BADVADDR to store faulting address.
1230         * sim-main.h (COP0_BADVADDR): Define.
1231         (SIM_CORE_SIGNAL): Define hook to call mips_core_signal.
1232         (SIM_CPU_EXCEPTION*): Define hooks to call mips_cpu_exception*().
1233         (_sim_cpu): Add exc_* fields to store register value snapshots.
1234         * mips.igen (*): Replace memory-related SignalException* calls
1235         with references to SIM_CORE_SIGNAL hook.
1236
1237         * dv-tx3904irc.c (tx3904irc_port_event): printf format warning
1238         fix.
1239         * sim-main.c (*): Minor warning cleanups.
1240
1241 1998-12-24  Gavin Romig-Koch  <gavin@cygnus.com>
1242
1243         * m16.igen (DADDIU5): Correct type-o.
1244
1245 Mon Dec 21 10:34:48 1998  Andrew Cagney  <cagney@chook>
1246
1247         * mips.igen (do_ddiv, do_ddivu): Pacify GCC. Update hi/lo via tmp
1248         variables.
1249
1250 Wed Dec 16 18:20:28 1998  Andrew Cagney  <cagney@chook>
1251
1252         * Makefile.in (SIM_EXTRA_CFLAGS): No longer need to add .../newlib
1253         to include path.
1254         (interp.o): Add dependency on itable.h
1255         (oengine.c, gencode): Delete remaining references.
1256         (BUILT_SRC_FROM_GEN): Clean up.
1257
1258 1998-12-16  Gavin Romig-Koch  <gavin@cygnus.com>
1259
1260         * vr4run.c: New.
1261         * Makefile.in (SIM_HACK_OBJ,HACK_OBJS,HACK_GEN_SRCS,libhack.a,
1262         tmp-hack,tmp-m32-hack,tmp-m16-hack,tmp-itable-hack,
1263         tmp-run-hack) : New.
1264         * m16.igen (LD,DADDIU,DADDUI5,DADJSP,DADDIUSP,DADDI,DADDU,DSUBU,
1265         DSLL,DSRL,DSRA,DSLLV,DSRAV,DMULT,DMULTU,DDIV,DDIVU,JALX32,JALX):
1266         Drop the "64" qualifier to get the HACK generator working.
1267         Use IMMEDIATE rather than IMMED.  Use SHAMT rather than SHIFT.
1268         * mips.igen (do_daddiu,do_ddiv,do_divu): Remove the 64-only
1269         qualifier to get the hack generator working.
1270         (do_dsll,do_dsllv,do_dsra,do_dsrl,do_dsrlv): New.
1271         (DSLL): Use do_dsll.
1272         (DSLLV): Use do_dsllv.
1273         (DSRA): Use do_dsra.
1274         (DSRL): Use do_dsrl.
1275         (DSRLV): Use do_dsrlv.
1276         (BC1): Move *vr4100 to get the HACK generator working.
1277         (CxC1, DMxC1, MxC1,MACCU,MACCHI,MACCHIU): Rename to
1278         get the HACK generator working.
1279         (MACC) Rename to get the HACK generator working.
1280         (DMACC,MACCS,DMACCS): Add the 64.
1281
1282 1998-12-12  Gavin Romig-Koch  <gavin@cygnus.com>
1283
1284         * mips.igen (BC1): Renamed to BC1a and BC1b to avoid conflicts.
1285         * sim-main.h (SizeFGR): Handle TARGET_ENABLE_FR.
1286
1287 1998-12-11  Gavin Romig-Koch  <gavin@cygnus.com>
1288
1289     * mips/interp.c (DEBUG): Cleanups.
1290
1291 1998-12-10  Frank Ch. Eigler  <fche@cygnus.com>
1292
1293         * dv-tx3904sio.c (tx3904sio_io_read_buffer): Endianness fixes.
1294         (tx3904sio_tickle): fflush after a stdout character output.
1295
1296 1998-12-03  Frank Ch. Eigler  <fche@cygnus.com>
1297
1298         * interp.c (sim_close): Uninstall modules.
1299
1300 Wed Nov 25 13:41:03 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1301
1302         * sim-main.h, interp.c (sim_monitor): Change to global
1303         function.
1304
1305 Wed Nov 25 17:33:24 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1306
1307         * configure.in (vr4100): Only include vr4100 instructions in
1308         simulator.
1309         * configure: Re-generate.
1310         * m16.igen (*): Tag all mips16 instructions as also being vr4100.
1311
1312 Mon Nov 23 18:20:36 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1313
1314         * Makefile.in (SIM_CFLAGS): Do not define WITH_IGEN.
1315         * sim-main.h, sim-main.c, interp.c: Delete #if WITH_IGEN keeping
1316         true alternative.
1317
1318         * configure.in (sim_default_gen, sim_use_gen): Replace with
1319         sim_gen.
1320         (--enable-sim-igen): Delete config option. Always using IGEN.
1321         * configure: Re-generate.
1322
1323         * Makefile.in (gencode): Kill, kill, kill.
1324         * gencode.c: Ditto.
1325
1326 Mon Nov 23 18:07:36 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1327
1328         * configure.in: Configure mips64vr4100-elf nee mips64vr41* as a 64
1329         bit mips16 igen simulator.
1330         * configure: Re-generate.
1331
1332         * mips.igen (check_div_hilo, check_mult_hilo, check_mf_hilo): Mark
1333         as part of vr4100 ISA.
1334         * vr.igen: Mark all instructions as 64 bit only.
1335
1336 Mon Nov 23 17:07:37 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1337
1338         * interp.c (get_cell, sim_monitor, fetch_str, CoProcPresent):
1339         Pacify GCC.
1340
1341 Mon Nov 23 13:23:40 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1342
1343         * configure.in: Configure mips-lsi-elf nee mips*lsi* as a
1344         mipsIII/mips16 igen simulator.  Fix sim_gen VS sim_igen typos.
1345         * configure: Re-generate.
1346
1347         * m16.igen (BREAK): Define breakpoint instruction.
1348         (JALX32): Mark instruction as mips16 and not r3900.
1349         * mips.igen (C.cond.fmt): Fix typo in instruction format.
1350
1351         * sim-main.h (PENDING_FILL): Wrap C statements in do/while.
1352
1353 Sat Nov  7 09:54:38 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1354
1355         * gencode.c (build_instruction - BREAK): For MIPS16, handle BREAK
1356         insn as a debug breakpoint.
1357
1358         * sim-main.h (PENDING_SLOT_BIT): Fix, was incorrectly defined as
1359         pending.slot_size.
1360         (PENDING_SCHED): Clean up trace statement.
1361         (PENDING_SCHED): Increment PENDING_IN and PENDING_TOTAL.
1362         (PENDING_FILL): Delay write by only one cycle.
1363         (PENDING_FILL): For FSRs, write fmt_uninterpreted to FPR_STATE.
1364
1365         * sim-main.c (pending_tick): Clean up trace statements. Add trace
1366         of pending writes.
1367         (pending_tick): Fix sizes in switch statements, 4 & 8 instead of
1368         32 & 64.
1369         (pending_tick): Move incrementing of index to FOR statement.
1370         (pending_tick): Only update PENDING_OUT after a write has occured.
1371
1372         * configure.in: Add explicit mips-lsi-* target.  Use gencode to
1373         build simulator.
1374         * configure: Re-generate.
1375
1376         * interp.c (sim_engine_run OLD): Delete explicit call to
1377         PENDING_TICK. Now called via ENGINE_ISSUE_PREFIX_HOOK.
1378
1379 Sat Oct 30 09:49:10 1998  Frank Ch. Eigler  <fche@cygnus.com>
1380
1381         * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Add dummy
1382         interrupt level number to match changed SignalExceptionInterrupt
1383         macro.
1384
1385 Fri Oct  9 18:02:25 1998  Doug Evans  <devans@canuck.cygnus.com>
1386
1387         * interp.c: #include "itable.h" if WITH_IGEN.
1388         (get_insn_name): New function.
1389         (sim_open): Initialize CPU_INSN_NAME,CPU_MAX_INSNS.
1390         * sim-main.h (MAX_INSNS,INSN_NAME): Delete.
1391
1392 Mon Sep 14 12:36:44 1998  Frank Ch. Eigler  <fche@cygnus.com>
1393
1394         * configure: Rebuilt to inhale new common/aclocal.m4.
1395
1396 Tue Sep  1 15:39:18 1998  Frank Ch. Eigler  <fche@cygnus.com>
1397
1398         * dv-tx3904sio.c: Include sim-assert.h.
1399
1400 Tue Aug 25 12:49:46 1998  Frank Ch. Eigler  <fche@cygnus.com>
1401
1402         * dv-tx3904sio.c: New file: tx3904 serial I/O module.
1403         * configure.in: Add dv-tx3904sio, dv-sockser for tx39 target.
1404         Reorganize target-specific sim-hardware checks.
1405         * configure: rebuilt.
1406         * interp.c (sim_open): For tx39 target boards, set
1407         OPERATING_ENVIRONMENT, add tx3904sio devices.
1408         * tconfig.in: For tx39 target, set SIM_HANDLES_LMA for loading
1409         ROM executables.  Install dv-sockser into sim-modules list.
1410
1411         * dv-tx3904irc.c: Compiler warning clean-up.
1412         * dv-tx3904tmr.c: Compiler warning clean-up.  Remove particularly
1413         frequent hw-trace messages.
1414
1415 Fri Jul 31 18:14:16 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1416
1417         * vr.igen (MulAcc): Identify as a vr4100 specific function.
1418
1419 Sat Jul 25 16:03:14 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1420
1421         * Makefile.in (IGEN_INCLUDE): Add vr.igen.
1422
1423         * vr.igen: New file.
1424         (MAC/MADD16, DMAC/DMADD16): Implement using code from gencode.c.
1425         * mips.igen: Define vr4100 model. Include vr.igen.
1426 Mon Jun 29 09:21:07 1998  Gavin Koch  <gavin@cygnus.com>
1427
1428         * mips.igen (check_mf_hilo): Correct check.
1429
1430 Wed Jun 17 12:20:49 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1431
1432         * sim-main.h (interrupt_event): Add prototype.
1433
1434         * dv-tx3904tmr.c (tx3904tmr_io_write_buffer): Delete unused
1435         register_ptr, register_value.
1436         (deliver_tx3904tmr_tick): Fix types passed to printf fmt.
1437
1438         * sim-main.h (tracefh): Make extern.
1439
1440 Tue Jun 16 14:39:00 1998  Frank Ch. Eigler  <fche@cygnus.com>
1441
1442         * dv-tx3904tmr.c: Deschedule timer event after dispatching.
1443         Reduce unnecessarily high timer event frequency.
1444         * dv-tx3904cpu.c: Ditto for interrupt event.
1445
1446 Wed Jun 10 13:22:32 1998  Frank Ch. Eigler  <fche@cygnus.com>
1447
1448         * interp.c (decode_coproc): For TX39, add stub COP0 register #7,
1449         to allay warnings.
1450         (interrupt_event): Made non-static.
1451
1452         * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Correct accidental
1453         interchange of configuration values for external vs. internal
1454         clock dividers.
1455
1456 Tue Jun  9 12:46:24 1998  Ian Carmichael  <iancarm@cygnus.com>
1457
1458         * mips.igen (BREAK): Moved code to here for
1459         simulator-reserved break instructions.
1460         * gencode.c (build_instruction): Ditto.
1461         * interp.c (signal_exception): Code moved from here.  Non-
1462         reserved instructions now use exception vector, rather
1463         than halting sim.
1464         * sim-main.h: Moved magic constants to here.
1465
1466 Tue Jun  9 12:29:50 1998  Frank Ch. Eigler  <fche@cygnus.com>
1467
1468         * dv-tx3904cpu.c (deliver_*_interrupt,*_port_event): Set the CAUSE
1469         register upon non-zero interrupt event level, clear upon zero
1470         event value.
1471         * dv-tx3904irc.c (*_port_event): Handle deactivated interrupt signal
1472         by passing zero event value.
1473         (*_io_{read,write}_buffer): Endianness fixes.
1474         * dv-tx3904tmr.c (*_io_{read,write}_buffer): Endianness fixes.
1475         (deliver_*_tick): Reduce sim event interval to 75% of count interval.
1476
1477         * interp.c (sim_open): Added jmr3904pal board type that adds PAL-based
1478         serial I/O and timer module at base address 0xFFFF0000.
1479
1480 Tue Jun  9 11:52:29 1998  Gavin Koch  <gavin@cygnus.com>
1481
1482         * mips.igen (SWC1) : Correct the handling of ReverseEndian
1483         and BigEndianCPU.
1484
1485 Tue Jun  9 11:40:57 1998  Gavin Koch  <gavin@cygnus.com>
1486
1487         * configure.in (mips_fpu_bitsize) : Set this correctly for 32-bit mips
1488         parts.
1489         * configure: Update.
1490
1491 Thu Jun  4 15:37:33 1998  Frank Ch. Eigler  <fche@cygnus.com>
1492
1493         * dv-tx3904tmr.c: New file - implements tx3904 timer.
1494         * dv-tx3904{irc,cpu}.c: Mild reformatting.
1495         * configure.in: Include tx3904tmr in hw_device list.
1496         * configure: Rebuilt.
1497         * interp.c (sim_open): Instantiate three timer instances.
1498         Fix address typo of tx3904irc instance.
1499
1500 Tue Jun  2 15:48:02 1998  Ian Carmichael  <iancarm@cygnus.com>
1501
1502         * interp.c (signal_exception): SystemCall exception now uses
1503         the exception vector.
1504
1505 Mon Jun  1 18:18:26 1998  Frank Ch. Eigler  <fche@cygnus.com>
1506
1507         * interp.c (decode_coproc): For TX39, add stub COP0 register #3,
1508         to allay warnings.
1509
1510 Fri May 29 11:40:39 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1511
1512         * configure.in (sim_igen_filter): Match mips*tx39 not mipst*tx39.
1513
1514 Mon May 25 20:47:45 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1515
1516         * dv-tx3904cpu.c, dv-tx3904irc.c: Rename *_callback to *_method.
1517
1518         * dv-tx3904cpu.c, dv-tx3904irc.c: Include hw-main.h and
1519         sim-main.h. Declare a struct hw_descriptor instead of struct
1520         hw_device_descriptor.
1521
1522 Mon May 25 12:41:38 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1523
1524         * mips.igen (do_store_left, do_load_left): Compute nr of left and
1525         right bits and then re-align left hand bytes to correct byte
1526         lanes.  Fix incorrect computation in do_store_left when loading
1527         bytes from second word.
1528
1529 Fri May 22 13:34:20 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1530
1531         * configure.in (SIM_AC_OPTION_HARDWARE): Only enable when tx3904.
1532         * interp.c (sim_open): Only create a device tree when HW is
1533         enabled.
1534
1535         * dv-tx3904irc.c (tx3904irc_finish): Pacify GCC.
1536         * interp.c (signal_exception): Ditto.
1537
1538 Thu May 21 14:24:11 1998  Gavin Koch  <gavin@cygnus.com>
1539
1540         * gencode.c: Mark BEGEZALL as LIKELY.
1541
1542 Thu May 21 18:57:19 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1543
1544         * sim-main.h (ALU32_END): Sign extend 32 bit results.
1545         * mips.igen (ADD, SUB, ADDI, DADD, DSUB): Trace.
1546
1547 Mon May 18 18:22:42 1998  Frank Ch. Eigler  <fche@cygnus.com>
1548
1549         * configure.in (SIM_AC_OPTION_HARDWARE): Added common hardware
1550         modules.  Recognize TX39 target with "mips*tx39" pattern.
1551         * configure: Rebuilt.
1552         * sim-main.h (*): Added many macros defining bits in
1553         TX39 control registers.
1554         (SignalInterrupt): Send actual PC instead of NULL.
1555         (SignalNMIReset): New exception type.
1556         * interp.c (board): New variable for future use to identify
1557         a particular board being simulated.
1558         (mips_option_handler,mips_options): Added "--board" option.
1559         (interrupt_event): Send actual PC.
1560         (sim_open): Make memory layout conditional on board setting.
1561         (signal_exception): Initial implementation of hardware interrupt
1562         handling.  Accept another break instruction variant for simulator
1563         exit.
1564         (decode_coproc): Implement RFE instruction for TX39.
1565         (mips.igen): Decode RFE instruction as such.
1566         * configure.in (tx3904cpu,tx3904irc): Added devices for tx3904.
1567         * interp.c: Define "jmr3904" and "jmr3904debug" board types and
1568         bbegin to implement memory map.
1569         * dv-tx3904cpu.c: New file.
1570         * dv-tx3904irc.c: New file.
1571
1572 Wed May 13 14:40:11 1998  Gavin Koch  <gavin@cygnus.com>
1573
1574         * mips.igen (check_mt_hilo): Create a separate r3900 version.
1575
1576 Wed May 13 14:11:46 1998  Gavin Koch  <gavin@cygnus.com>
1577
1578         * tx.igen (madd,maddu):  Replace calls to check_op_hilo
1579         with calls to check_div_hilo.
1580
1581 Wed May 13 09:59:27 1998  Gavin Koch  <gavin@cygnus.com>
1582
1583         * mips/mips.igen (check_op_hilo,check_mult_hilo,check_div_hilo):
1584         Replace check_op_hilo with check_mult_hilo and check_div_hilo.
1585         Add special r3900 version of do_mult_hilo.
1586         (do_dmultx,do_mult,do_multu): Replace calls to check_op_hilo
1587         with calls to check_mult_hilo.
1588         (do_ddiv,do_ddivu,do_div,do_divu): Replace calls to check_op_hilo
1589         with calls to check_div_hilo.
1590
1591 Tue May 12 15:22:11 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1592
1593         * configure.in (SUBTARGET_R3900): Define for mipstx39 target.
1594         Document a replacement.
1595
1596 Fri May  8 17:48:19 1998  Ian Carmichael  <iancarm@cygnus.com>
1597
1598         * interp.c (sim_monitor): Make mon_printf work.
1599
1600 Wed May  6 19:42:19 1998  Doug Evans  <devans@canuck.cygnus.com>
1601
1602         * sim-main.h (INSN_NAME): New arg `cpu'.
1603
1604 Tue Apr 28 18:33:31 1998  Geoffrey Noer  <noer@cygnus.com>
1605
1606         * configure: Regenerated to track ../common/aclocal.m4 changes.
1607
1608 Sun Apr 26 15:31:55 1998  Tom Tromey  <tromey@creche>
1609
1610         * configure: Regenerated to track ../common/aclocal.m4 changes.
1611         * config.in: Ditto.
1612
1613 Sun Apr 26 15:20:01 1998  Tom Tromey  <tromey@cygnus.com>
1614
1615         * acconfig.h: New file.
1616         * configure.in: Reverted change of Apr 24; use sinclude again.
1617
1618 Fri Apr 24 14:16:40 1998  Tom Tromey  <tromey@creche>
1619
1620         * configure: Regenerated to track ../common/aclocal.m4 changes.
1621         * config.in: Ditto.
1622
1623 Fri Apr 24 11:19:20 1998  Tom Tromey  <tromey@cygnus.com>
1624
1625         * configure.in: Don't call sinclude.
1626
1627 Fri Apr 24 11:35:01 1998  Andrew Cagney  <cagney@chook.cygnus.com>
1628
1629         * mips.igen (do_store_left): Pass 0 not NULL to store_memory.
1630
1631 Tue Apr 21 11:59:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1632
1633         * mips.igen (ERET): Implement.
1634
1635         * interp.c (decode_coproc): Return sign-extended EPC.
1636
1637         * mips.igen (ANDI, LUI, MFC0): Add tracing code.
1638
1639         * interp.c (signal_exception): Do not ignore Trap.
1640         (signal_exception): On TRAP, restart at exception address.
1641         (HALT_INSTRUCTION, HALT_INSTRUCTION_MASK): Define.
1642         (signal_exception): Update.
1643         (sim_open): Patch V_COMMON interrupt vector with an abort sequence
1644         so that TRAP instructions are caught.
1645
1646 Mon Apr 20 11:26:55 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1647
1648         * sim-main.h (struct hilo_access, struct hilo_history): Define,
1649         contains HI/LO access history.
1650         (struct _sim_cpu): Make hiaccess and loaccess of type hilo_access.
1651         (HIACCESS, LOACCESS): Delete, replace with
1652         (HIHISTORY, LOHISTORY): New macros.
1653         (CHECKHILO): Delete all, moved to mips.igen
1654
1655         * gencode.c (build_instruction): Do not generate checks for
1656         correct HI/LO register usage.
1657
1658         * interp.c (old_engine_run): Delete checks for correct HI/LO
1659         register usage.
1660
1661         * mips.igen (check_mt_hilo, check_mf_hilo, check_op_hilo,
1662         check_mf_cycles): New functions.
1663         (do_mfhi, do_mflo, "mthi", "mtlo", do_ddiv, do_ddivu, do_div,
1664         do_divu, domultx, do_mult, do_multu): Use.
1665
1666         * tx.igen ("madd", "maddu"): Use.
1667
1668 Wed Apr 15 18:31:54 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1669
1670         * mips.igen (DSRAV): Use function do_dsrav.
1671         (SRAV): Use new function do_srav.
1672
1673         * m16.igen (BEQZ, BNEZ): Compare GPR[TRX] not GPR[RX].
1674         (B): Sign extend 11 bit immediate.
1675         (EXT-B*): Shift 16 bit immediate left by 1.
1676         (ADDIU*): Don't sign extend immediate value.
1677
1678 Wed Apr 15 10:32:15 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1679
1680         * m16run.c (sim_engine_run): Restore CIA after handling an event.
1681
1682         * sim-main.h (DELAY_SLOT, NULLIFY_NEXT_INSTRUCTION): For IGEN, use
1683         functions.
1684
1685         * mips.igen (delayslot32, nullify_next_insn): New functions.
1686         (m16.igen): Always include.
1687         (do_*): Add more tracing.
1688
1689         * m16.igen (delayslot16): Add NIA argument, could be called by a
1690         32 bit MIPS16 instruction.
1691
1692         * interp.c (ifetch16): Move function from here.
1693         * sim-main.c (ifetch16): To here.
1694
1695         * sim-main.c (ifetch16, ifetch32): Update to match current
1696         implementations of LH, LW.
1697         (signal_exception): Don't print out incorrect hex value of illegal
1698         instruction.
1699
1700 Wed Apr 15 00:17:25 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1701
1702         * m16run.c (sim_engine_run): Use IMEM16 and IMEM32 to fetch an
1703         instruction.
1704
1705         * m16.igen: Implement MIPS16 instructions.
1706
1707         * mips.igen (do_addiu, do_addu, do_and, do_daddiu, do_daddu,
1708         do_ddiv, do_ddivu, do_div, do_divu, do_dmultx, do_dmultu, do_srav,
1709         do_dsubu, do_mfhi, do_mflo, do_mult, do_multu, do_nor, do_or,
1710         do_sll, do_sllv, do_slt, do_slti, do_sltiu, do_sltu, do_sra,
1711         do_srl, do_srlv, do_subu, do_xor, do_xori): New functions.  Move
1712         bodies of corresponding code from 32 bit insn to these.  Also used
1713         by MIPS16 versions of functions.
1714
1715         * sim-main.h (RAIDX, T8IDX, T8, SPIDX): Define.
1716         (IMEM16): Drop NR argument from macro.
1717
1718 Sat Apr  4 22:39:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1719
1720         * Makefile.in (SIM_OBJS): Add sim-main.o.
1721
1722         * sim-main.h (address_translation, load_memory, store_memory,
1723         cache_op, sync_operation, prefetch, ifetch32, pending_tick): Mark
1724         as INLINE_SIM_MAIN.
1725         (pr_addr, pr_uword64): Declare.
1726         (sim-main.c): Include when H_REVEALS_MODULE_P.
1727
1728         * interp.c (address_translation, load_memory, store_memory,
1729         cache_op, sync_operation, prefetch, ifetch32, pending_tick): Move
1730         from here.
1731         * sim-main.c: To here. Fix compilation problems.
1732
1733         * configure.in: Enable inlining.
1734         * configure: Re-config.
1735
1736 Sat Apr  4 20:36:25 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1737
1738         * configure: Regenerated to track ../common/aclocal.m4 changes.
1739
1740 Fri Apr  3 04:32:35 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1741
1742         * mips.igen: Include tx.igen.
1743         * Makefile.in (IGEN_INCLUDE): Add tx.igen.
1744         * tx.igen: New file, contains MADD and MADDU.
1745
1746         * interp.c (load_memory): When shifting bytes, use LOADDRMASK not
1747         the hardwired constant `7'.
1748         (store_memory): Ditto.
1749         (LOADDRMASK): Move definition to sim-main.h.
1750
1751         mips.igen (MTC0): Enable for r3900.
1752         (ADDU): Add trace.
1753
1754         mips.igen (do_load_byte): Delete.
1755         (do_load, do_store, do_load_left, do_load_write, do_store_left,
1756         do_store_right): New functions.
1757         (SW*, LW*, SD*, LD*, SH, LH, SB, LB): Use.
1758
1759         configure.in: Let the tx39 use igen again.
1760         configure: Update.
1761
1762 Thu Apr  2 10:59:39 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1763
1764         * interp.c (sim_monitor): get_mem_info returns a 4 byte quantity,
1765         not an address sized quantity.  Return zero for cache sizes.
1766
1767 Wed Apr  1 23:47:53 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1768
1769         * mips.igen (r3900): r3900 does not support 64 bit integer
1770         operations.
1771
1772 Mon Mar 30 14:46:05 1998  Gavin Koch  <gavin@cygnus.com>
1773
1774         * configure.in (mipstx39*-*-*): Use gencode simulator rather
1775         than igen one.
1776         * configure : Rebuild.
1777
1778 Fri Mar 27 16:15:52 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1779
1780         * configure: Regenerated to track ../common/aclocal.m4 changes.
1781
1782 Fri Mar 27 15:01:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1783
1784         * interp.c (mips_option_handler): Iterate over MAX_NR_PROCESSORS.
1785
1786 Wed Mar 25 16:44:27 1998  Ian Carmichael  <iancarm@cygnus.com>
1787
1788         * configure: Regenerated to track ../common/aclocal.m4 changes.
1789         * config.in: Regenerated to track ../common/aclocal.m4 changes.
1790
1791 Wed Mar 25 12:35:29 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1792
1793         * configure: Regenerated to track ../common/aclocal.m4 changes.
1794
1795 Wed Mar 25 10:05:46 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1796
1797         * interp.c (Max, Min): Comment out functions. Not yet used.
1798
1799 Wed Mar 18 12:38:12 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1800
1801         * configure: Regenerated to track ../common/aclocal.m4 changes.
1802
1803 Tue Mar 17 19:05:20 1998  Frank Ch. Eigler  <fche@cygnus.com>
1804
1805         * Makefile.in (MIPS_EXTRA_LIBS, SIM_EXTRA_LIBS): Added
1806         configurable settings for stand-alone simulator.
1807
1808         * configure.in: Added X11 search, just in case.
1809
1810         * configure: Regenerated.
1811
1812 Wed Mar 11 14:09:10 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1813
1814         * interp.c (sim_write, sim_read, load_memory, store_memory):
1815         Replace sim_core_*_map with read_map, write_map, exec_map resp.
1816
1817 Tue Mar  3 13:58:43 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1818
1819         * sim-main.h (GETFCC): Return an unsigned value.
1820
1821 Tue Mar  3 13:21:37 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1822
1823         * mips.igen (DIV): Fix check for -1 / MIN_INT.
1824         (DADD): Result destination is RD not RT.
1825
1826 Fri Feb 27 13:49:49 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1827
1828         * sim-main.h (HIACCESS, LOACCESS): Always define.
1829
1830         * mdmx.igen (Maxi, Mini): Rename Max, Min.
1831
1832         * interp.c (sim_info): Delete.
1833
1834 Fri Feb 27 18:41:01 1998  Doug Evans  <devans@canuck.cygnus.com>
1835
1836         * interp.c (DECLARE_OPTION_HANDLER): Use it.
1837         (mips_option_handler): New argument `cpu'.
1838         (sim_open): Update call to sim_add_option_table.
1839
1840 Wed Feb 25 18:56:22 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1841
1842         * mips.igen (CxC1): Add tracing.
1843
1844 Fri Feb 20 17:43:21 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1845
1846         * sim-main.h (Max, Min): Declare.
1847
1848         * interp.c (Max, Min): New functions.
1849
1850         * mips.igen (BC1): Add tracing.
1851
1852 Thu Feb 19 14:50:00 1998  John Metzler  <jmetzler@cygnus.com>
1853
1854         * interp.c Added memory map for stack in vr4100
1855
1856 Thu Feb 19 10:21:21 1998  Gavin Koch  <gavin@cygnus.com>
1857
1858         * interp.c (load_memory): Add missing "break"'s.
1859
1860 Tue Feb 17 12:45:35 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1861
1862         * interp.c (sim_store_register, sim_fetch_register): Pass in
1863         length parameter.  Return -1.
1864
1865 Tue Feb 10 11:57:40 1998  Ian Carmichael  <iancarm@cygnus.com>
1866
1867         * interp.c: Added hardware init hook, fixed warnings.
1868
1869 Sat Feb  7 17:16:20 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1870
1871         * Makefile.in (itable.h itable.c): Depend on SIM_@sim_gen@_ALL.
1872
1873 Tue Feb  3 11:36:02 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1874
1875         * interp.c (ifetch16): New function.
1876
1877         * sim-main.h (IMEM32): Rename IMEM.
1878         (IMEM16_IMMED): Define.
1879         (IMEM16): Define.
1880         (DELAY_SLOT): Update.
1881
1882         * m16run.c (sim_engine_run): New file.
1883
1884         * m16.igen: All instructions except LB.
1885         (LB): Call do_load_byte.
1886         * mips.igen (do_load_byte): New function.
1887         (LB): Call do_load_byte.
1888
1889         * mips.igen: Move spec for insn bit size and high bit from here.
1890         * Makefile.in (tmp-igen, tmp-m16): To here.
1891
1892         * m16.dc: New file, decode mips16 instructions.
1893
1894         * Makefile.in (SIM_NO_ALL): Define.
1895         (tmp-m16): Generate both 16 bit and 32 bit simulator engines.
1896
1897 Tue Feb  3 11:28:00 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1898
1899         * configure.in (mips_fpu_bitsize): For tx39, restrict floating
1900         point unit to 32 bit registers.
1901         * configure: Re-generate.
1902
1903 Sun Feb  1 15:47:14 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1904
1905         * configure.in (sim_use_gen): Make IGEN the default simulator
1906         generator for generic 32 and 64 bit mips targets.
1907         * configure: Re-generate.
1908
1909 Sun Feb  1 16:52:37 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1910
1911         * sim-main.h (SizeFGR): Determine from floating-point and not gpr
1912         bitsize.
1913
1914         * interp.c (sim_fetch_register, sim_store_register): Read/write
1915         FGR from correct location.
1916         (sim_open): Set size of FGR's according to
1917         WITH_TARGET_FLOATING_POINT_BITSIZE.
1918
1919         * sim-main.h (FGR): Store floating point registers in a separate
1920         array.
1921
1922 Sun Feb  1 16:47:51 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1923
1924         * configure: Regenerated to track ../common/aclocal.m4 changes.
1925
1926 Tue Feb  3 00:10:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1927
1928         * interp.c (ColdReset): Call PENDING_INVALIDATE.
1929
1930         * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Call PENDING_TICK.
1931
1932         * interp.c (pending_tick): New function.  Deliver pending writes.
1933
1934         * sim-main.h (PENDING_FILL, PENDING_TICK, PENDING_SCHED,
1935         PENDING_BIT, PENDING_INVALIDATE): Re-write pipeline code so that
1936         it can handle mixed sized quantites and single bits.
1937
1938 Mon Feb  2 17:43:15 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1939
1940         * interp.c (oengine.h): Do not include when building with IGEN.
1941         (sim_open): Replace GPRLEN by WITH_TARGET_WORD_BITSIZE.
1942         (sim_info): Ditto for PROCESSOR_64BIT.
1943         (sim_monitor): Replace ut_reg with unsigned_word.
1944         (*): Ditto for t_reg.
1945         (LOADDRMASK): Define.
1946         (sim_open): Remove defunct check that host FP is IEEE compliant,
1947         using software to emulate floating point.
1948         (value_fpr, ...): Always compile, was conditional on HASFPU.
1949
1950 Sun Feb  1 11:15:29 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1951
1952         * sim-main.h (sim_state): Make the cpu array MAX_NR_PROCESSORS in
1953         size.
1954
1955         * interp.c (SD, CPU): Define.
1956         (mips_option_handler): Set flags in each CPU.
1957         (interrupt_event): Assume CPU 0 is the one being iterrupted.
1958         (sim_close): Do not clear STATE, deleted anyway.
1959         (sim_write, sim_read): Assume CPU zero's vm should be used for
1960         data transfers.
1961         (sim_create_inferior): Set the PC for all processors.
1962         (sim_monitor, store_word, load_word, mips16_entry): Add cpu
1963         argument.
1964         (mips16_entry): Pass correct nr of args to store_word, load_word.
1965         (ColdReset): Cold reset all cpu's.
1966         (signal_exception): Pass cpu to sim_monitor & mips16_entry.
1967         (sim_monitor, load_memory, store_memory, signal_exception): Use
1968         `CPU' instead of STATE_CPU.
1969
1970
1971         * sim-main.h: Replace uses of STATE_CPU with CPU. Replace sd with
1972         SD or CPU_.
1973
1974         * sim-main.h (signal_exception): Add sim_cpu arg.
1975         (SignalException*): Pass both SD and CPU to signal_exception.
1976         * interp.c (signal_exception): Update.
1977
1978         * sim-main.h (value_fpr, store_fpr, dotrace, ifetch32), interp.c:
1979         Ditto
1980         (sync_operation, prefetch, cache_op, store_memory, load_memory,
1981         address_translation): Ditto
1982         (decode_coproc, cop_lw, cop_ld, cop_sw, cop_sd): Ditto.
1983
1984 Sat Jan 31 18:15:41 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1985
1986         * configure: Regenerated to track ../common/aclocal.m4 changes.
1987
1988 Sat Jan 31 14:49:24 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1989
1990         * interp.c (sim_engine_run): Add `nr_cpus' argument.
1991
1992         * mips.igen (model): Map processor names onto BFD name.
1993
1994         * sim-main.h (CPU_CIA): Delete.
1995         (SET_CIA, GET_CIA): Define
1996
1997 Wed Jan 21 16:16:27 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1998
1999         * sim-main.h (GPR_SET): Define, used by igen when zeroing a
2000         regiser.
2001
2002         * configure.in (default_endian): Configure a big-endian simulator
2003         by default.
2004         * configure: Re-generate.
2005
2006 Mon Jan 19 22:26:29 1998  Doug Evans  <devans@seba>
2007
2008         * configure: Regenerated to track ../common/aclocal.m4 changes.
2009
2010 Mon Jan  5 20:38:54 1998  Mark Alexander  <marka@cygnus.com>
2011
2012         * interp.c (sim_monitor): Handle Densan monitor outbyte
2013         and inbyte functions.
2014
2015 1997-12-29  Felix Lee  <flee@cygnus.com>
2016
2017         * interp.c (sim_engine_run): msvc cpp barfs on #if (a==b!=c).
2018
2019 Wed Dec 17 14:48:20 1997  Jeffrey A Law  (law@cygnus.com)
2020
2021         * Makefile.in (tmp-igen): Arrange for $zero to always be
2022         reset to zero after every instruction.
2023
2024 Mon Dec 15 23:17:11 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2025
2026         * configure: Regenerated to track ../common/aclocal.m4 changes.
2027         * config.in: Ditto.
2028
2029 Wed Dec 10 17:10:45 1997  Jeffrey A Law  (law@cygnus.com)
2030
2031         * mips.igen (MSUB): Fix to work like MADD.
2032         * gencode.c (MSUB): Similarly.
2033
2034 Thu Dec  4 09:21:05 1997  Doug Evans  <devans@canuck.cygnus.com>
2035
2036         * configure: Regenerated to track ../common/aclocal.m4 changes.
2037
2038 Wed Nov 26 11:00:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2039
2040         * mips.igen (LWC1): Correct assembler - lwc1 not swc1.
2041
2042 Sun Nov 23 01:45:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2043
2044         * sim-main.h (sim-fpu.h): Include.
2045
2046         * interp.c (convert, SquareRoot, Recip, Divide, Multiply, Sub,
2047         Add, Negate, AbsoluteValue, Equal, Less, Infinity, NaN): Rewrite
2048         using host independant sim_fpu module.
2049
2050 Thu Nov 20 19:56:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2051
2052         * interp.c (signal_exception): Report internal errors with SIGABRT
2053         not SIGQUIT.
2054
2055         * sim-main.h (C0_CONFIG): New register.
2056         (signal.h): No longer include.
2057
2058         * interp.c (decode_coproc): Allow access C0_CONFIG to register.
2059
2060 Tue Nov 18 15:33:48 1997  Doug Evans  <devans@canuck.cygnus.com>
2061
2062         * Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS).
2063
2064 Fri Nov 14 11:56:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2065
2066         * mips.igen: Tag vr5000 instructions.
2067         (ANDI): Was missing mipsIV model, fix assembler syntax.
2068         (do_c_cond_fmt): New function.
2069         (C.cond.fmt): Handle mips I-III which do not support CC field
2070         separatly.
2071         (bc1): Handle mips IV which do not have a delaed FCC separatly.
2072         (SDR): Mask paddr when BigEndianMem, not the converse as specified
2073         in IV3.2 spec.
2074         (DMULT, DMULTU): Force use of hosts 64bit multiplication.  Handle
2075         vr5000 which saves LO in a GPR separatly.
2076
2077         * configure.in (enable-sim-igen): For vr5000, select vr5000
2078         specific instructions.
2079         * configure: Re-generate.
2080
2081 Wed Nov 12 14:42:52 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2082
2083         * Makefile.in (SIM_OBJS): Add sim-fpu module.
2084
2085         * interp.c (store_fpr), sim-main.h: Add separate fmt_uninterpreted_32 and
2086         fmt_uninterpreted_64 bit cases to switch.  Convert to
2087         fmt_formatted,
2088
2089         * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Define,
2090
2091         * mips.igen (SWR): Mask paddr when BigEndianMem, not the converse
2092         as specified in IV3.2 spec.
2093         (MTC1, DMTC1): Call StoreFPR to store the GPR in the FPR.
2094
2095 Tue Nov 11 12:38:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2096
2097         * mips.igen: Delay slot branches add OFFSET to NIA not CIA.
2098         (MFC0, MTC0, SWC1, LWC1, SDC1, LDC1): Implement.
2099         (MTC1, MFC1, DMTC1, DMFC1, CFC1, CTC1): Implement separate non
2100         PENDING_FILL versions of instructions.  Simplify.
2101         (X): New function.
2102         (MULT, MULTU): Implement separate RD==0 and RD!=0 versions of
2103         instructions.
2104         (BEQZ, ..., SLT, SLTI, TLT, TLE, TLI, ...): Explicitly cast GPR to
2105         a signed value.
2106         (MTHI, MFHI): Disable code checking HI-LO.
2107
2108         * sim-main.h (dotrace,tracefh), interp.c: Make dotrace & tracefh
2109         global.
2110         (NULLIFY_NEXT_INSTRUCTION): Call dotrace.
2111
2112 Thu Nov  6 16:36:35 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2113
2114         * gencode.c (build_mips16_operands): Replace IPC with cia.
2115
2116         * interp.c (sim_monitor, signal_exception, cache_op, store_fpr,
2117         value_fpr, cop_ld, cop_lw, cop_sw, cop_sd, decode_coproc): Replace
2118         IPC to `cia'.
2119         (UndefinedResult): Replace function with macro/function
2120         combination.
2121         (sim_engine_run): Don't save PC in IPC.
2122
2123         * sim-main.h (IPC): Delete.
2124
2125
2126         * interp.c (signal_exception, store_word, load_word,
2127         address_translation, load_memory, store_memory, cache_op,
2128         prefetch, sync_operation, ifetch, value_fpr, store_fpr, convert,
2129         cop_lw, cop_ld, cop_sw, cop_sd, decode_coproc, sim_monitor): Add
2130         current instruction address - cia - argument.
2131         (sim_read, sim_write): Call address_translation directly.
2132         (sim_engine_run): Rename variable vaddr to cia.
2133         (signal_exception): Pass cia to sim_monitor
2134
2135         * sim-main.h (SignalException, LoadWord, StoreWord, CacheOp,
2136         Prefetch, SyncOperation, ValueFPR, StoreFPR, Convert, COP_LW,
2137         COP_LD, COP_SW, COP_SD, DecodeCoproc): Update.
2138
2139         * sim-main.h (SignalExceptionSimulatorFault): Delete definition.
2140         * interp.c (sim_open): Replace SignalExceptionSimulatorFault with
2141         SIM_ASSERT.
2142
2143         * interp.c (signal_exception): Pass restart address to
2144         sim_engine_restart.
2145
2146         * Makefile.in (semantics.o, engine.o, support.o, itable.o,
2147         idecode.o): Add dependency.
2148
2149         * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESUME_HOOK):
2150         Delete definitions
2151         (DELAY_SLOT): Update NIA not PC with branch address.
2152         (NULLIFY_NEXT_INSTRUCTION): Set NIA to instruction after next.
2153
2154         * mips.igen: Use CIA not PC in branch calculations.
2155         (illegal): Call SignalException.
2156         (BEQ, ADDIU): Fix assembler.
2157
2158 Wed Nov  5 12:19:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2159
2160         * m16.igen (JALX): Was missing.
2161
2162         * configure.in (enable-sim-igen): New configuration option.
2163         * configure: Re-generate.
2164
2165         * sim-main.h (MAX_INSNS, INSN_NAME): Define.
2166
2167         * interp.c (load_memory, store_memory): Delete parameter RAW.
2168         (sim_read, sim_write): Use sim_core_{read,write}_buffer directly
2169         bypassing {load,store}_memory.
2170
2171         * sim-main.h (ByteSwapMem): Delete definition.
2172
2173         * Makefile.in (SIM_OBJS): Add sim-memopt module.
2174
2175         * interp.c (sim_do_command, sim_commands): Delete mips specific
2176         commands.  Handled by module sim-options.
2177
2178         * sim-main.h (SIM_HAVE_FLATMEM): Undefine, use sim-core.o module.
2179         (WITH_MODULO_MEMORY): Define.
2180
2181         * interp.c (sim_info): Delete code printing memory size.
2182
2183         * interp.c (mips_size): Nee sim_size, delete function.
2184         (power2): Delete.
2185         (monitor, monitor_base, monitor_size): Delete global variables.
2186         (sim_open, sim_close): Delete code creating monitor and other
2187         memory regions.  Use sim-memopts module, via sim_do_commandf, to
2188         manage memory regions.
2189         (load_memory, store_memory): Use sim-core for memory model.
2190
2191         * interp.c (address_translation): Delete all memory map code
2192         except line forcing 32 bit addresses.
2193
2194 Wed Nov  5 11:21:11 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2195
2196         * sim-main.h (WITH_TRACE): Delete definition.  Enables common
2197         trace options.
2198
2199         * interp.c (logfh, logfile): Delete globals.
2200         (sim_open, sim_close): Delete code opening & closing log file.
2201         (mips_option_handler): Delete -l and -n options.
2202         (OPTION mips_options): Ditto.
2203
2204         * interp.c (OPTION mips_options): Rename option trace to dinero.
2205         (mips_option_handler): Update.
2206
2207 Wed Nov  5 09:35:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2208
2209         * interp.c (fetch_str): New function.
2210         (sim_monitor): Rewrite using sim_read & sim_write.
2211         (sim_open): Check magic number.
2212         (sim_open): Write monitor vectors into memory using sim_write.
2213         (MONITOR_BASE, MONITOR_SIZE, MEM_SIZE): Define.
2214         (sim_read, sim_write): Simplify - transfer data one byte at a
2215         time.
2216         (load_memory, store_memory): Clarify meaning of parameter RAW.
2217
2218         * sim-main.h (isHOST): Defete definition.
2219         (isTARGET): Mark as depreciated.
2220         (address_translation): Delete parameter HOST.
2221
2222         * interp.c (address_translation): Delete parameter HOST.
2223
2224 Wed Oct 29 11:13:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2225
2226         * mips.igen:
2227
2228         * Makefile.in (IGEN_INCLUDE): Files included by mips.igen.
2229         (tmp-igen, tmp-m16): Depend on IGEN_INCLUDE.
2230
2231 Tue Oct 28 11:06:47 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2232
2233         * mips.igen: Add model filter field to records.
2234
2235 Mon Oct 27 17:53:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2236
2237         * Makefile.in (SIM_NO_CFLAGS): Define.  Define WITH_IGEN=0.
2238
2239         interp.c (sim_engine_run): Do not compile function sim_engine_run
2240         when WITH_IGEN == 1.
2241
2242         * configure.in (sim_igen_flags, sim_m16_flags): Set according to
2243         target architecture.
2244
2245         Makefile.in (tmp-igen, tmp-m16): Drop -F and -M options to
2246         igen. Replace with configuration variables sim_igen_flags /
2247         sim_m16_flags.
2248
2249         * m16.igen: New file.  Copy mips16 insns here.
2250         * mips.igen: From here.
2251
2252 Mon Oct 27 13:53:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2253
2254         * Makefile.in (SIM_NO_OBJ): Define, move SIM_M16_OBJ, SIM_IGEN_OBJ
2255         to top.
2256         (tmp-igen, tmp-m16): Pass -I srcdir to igen.
2257
2258 Sat Oct 25 16:51:40 1997  Gavin Koch  <gavin@cygnus.com>
2259
2260         * gencode.c (build_instruction): Follow sim_write's lead in using
2261         BigEndianMem instead of !ByteSwapMem.
2262
2263 Fri Oct 24 17:41:49 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2264
2265         * configure.in (sim_gen): Dependent on target, select type of
2266         generator.  Always select old style generator.
2267
2268         configure: Re-generate.
2269
2270         Makefile.in (tmp-igen, tmp-m16, clean-m16, clean-igen): New
2271         targets.
2272         (SIM_M16_CFLAGS, SIM_M16_ALL, SIM_M16_OBJ, BUILT_SRC_FROM_M16,
2273         SIM_IGEN_CFLAGS, SIM_IGEN_ALL, SIM_IGEN_OBJ, BUILT_SRC_FROM_IGEN,
2274         IGEN_TRACE, IGEN_INSN, IGEN_DC): Define
2275         (SIM_EXTRA_CFLAGS, SIM_EXTRA_ALL, SIM_OBJS): Add member
2276         SIM_@sim_gen@_*, set by autoconf.
2277
2278 Wed Oct 22 12:52:06 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2279
2280         * sim-main.h (NULLIFY_NEXT_INSTRUCTION, DELAY_SLOT): Define.
2281
2282         * interp.c (ColdReset): Remove #ifdef HASFPU, check
2283         CURRENT_FLOATING_POINT instead.
2284
2285         * interp.c (ifetch32): New function. Fetch 32 bit instruction.
2286         (address_translation): Raise exception InstructionFetch when
2287         translation fails and isINSTRUCTION.
2288
2289         * interp.c (sim_open, sim_write, sim_monitor, store_word,
2290         sim_engine_run): Change type of of vaddr and paddr to
2291         address_word.
2292         (address_translation, prefetch, load_memory, store_memory,
2293         cache_op): Change type of vAddr and pAddr to address_word.
2294
2295         * gencode.c (build_instruction): Change type of vaddr and paddr to
2296         address_word.
2297
2298 Mon Oct 20 15:29:04 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2299
2300         * sim-main.h (ALU64_END, ALU32_END): Use ALU*_OVERFLOW_RESULT
2301         macro to obtain result of ALU op.
2302
2303 Tue Oct 21 17:39:14 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2304
2305         * interp.c (sim_info): Call profile_print.
2306
2307 Mon Oct 20 13:31:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2308
2309         * Makefile.in (SIM_OBJS): Add sim-profile.o module.
2310
2311         * sim-main.h (WITH_PROFILE): Do not define, defined in
2312         common/sim-config.h.  Use sim-profile module.
2313         (simPROFILE): Delete defintion.
2314
2315         * interp.c (PROFILE): Delete definition.
2316         (mips_option_handler): Delete 'p', 'y' and 'x' profile options.
2317         (sim_close): Delete code writing profile histogram.
2318         (mips_set_profile, mips_set_profile_size, writeout16, writeout32):
2319         Delete.
2320         (sim_engine_run): Delete code profiling the PC.
2321
2322 Mon Oct 20 13:31:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2323
2324         * sim-main.h (SIGNEXTEND): Force type of result to unsigned_word.
2325
2326         * interp.c (sim_monitor): Make register pointers of type
2327         unsigned_word*.
2328
2329         * sim-main.h: Make registers of type unsigned_word not
2330         signed_word.
2331
2332 Thu Oct 16 10:31:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2333
2334         * interp.c (sync_operation): Rename from SyncOperation, make
2335         global, add SD argument.
2336         (prefetch): Rename from Prefetch, make global, add SD argument.
2337         (decode_coproc): Make global.
2338
2339         * sim-main.h (SyncOperation, DecodeCoproc, Pefetch): Define.
2340
2341         * gencode.c (build_instruction): Generate DecodeCoproc not
2342         decode_coproc calls.
2343
2344         * interp.c (SETFCC, GETFCC, PREVCOC1): Move to sim-main.h
2345         (SizeFGR): Move to sim-main.h
2346         (simHALTEX, simHALTIN, simTRACE, simPROFILE, simDELAYSLOT,
2347         simSIGINT, simJALDELAYSLOT): Move to sim-main.h
2348         (FP_FLAGS, FP_ENABLE, FP_CAUSE, IR, UF, OF, DZ, IO, UO): Move to
2349         sim-main.h.
2350         (FP_FS, FP_MASK_RM, FP_SH_RM, FP_RM_NEAREST, FP_RM_TOPINF,
2351         FP_RM_TOMINF, GETRM): Move to sim-main.h.
2352         (Uncached, CachedNoncoherent, CachedCoherent, Cached,
2353         isINSTRUCTION, ..., AccessLength_BYTE, ...): Move to sim-main.h.
2354         (UserMode, BigEndianMem, ByteSwapMem, ReverseEndian,
2355         BigEndianCPU, status_KSU_mask, ...). Moved to sim-main.h
2356
2357         * sim-main.h (ALU32_END, ALU64_END): Define. When overflow raise
2358         exception.
2359         (sim-alu.h): Include.
2360         (NULLIFY_NIA, NULL_CIA, CPU_CIA): Define.
2361         (sim_cia): Typedef to instruction_address.
2362
2363 Thu Oct 16 10:31:41 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2364
2365         * Makefile.in (interp.o): Rename generated file engine.c to
2366         oengine.c.
2367
2368         * interp.c: Update.
2369
2370 Thu Oct 16 10:31:40 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2371
2372         * gencode.c (build_instruction): Use FPR_STATE not fpr_state.
2373
2374 Thu Oct 16 10:31:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2375
2376         * gencode.c (build_instruction): For "FPSQRT", output correct
2377         number of arguments to Recip.
2378
2379 Tue Oct 14 17:38:18 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2380
2381         * Makefile.in (interp.o): Depends on sim-main.h
2382
2383         * interp.c (mips16_entry, ColdReset,dotrace): Add SD argument. Use GPR not registers.
2384
2385         * sim-main.h (sim_cpu): Add registers, register_widths, fpr_state,
2386         ipc, dspc, pending_*, hiaccess, loaccess, state, dsstate fields.
2387         (REGISTERS, REGISTER_WIDTHS, FPR_STATE, IPC, DSPC, PENDING_*,
2388         STATE, DSSTATE): Define
2389         (GPR, FGRIDX, ..): Define.
2390
2391         * interp.c (registers, register_widths, fpr_state, ipc, dspc,
2392         pending_*, hiaccess, loaccess, state, dsstate): Delete globals.
2393         (GPR, FGRIDX, ...): Delete macros.
2394
2395         * interp.c: Update names to match defines from sim-main.h
2396
2397 Tue Oct 14 15:11:45 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2398
2399         * interp.c (sim_monitor): Add SD argument.
2400         (sim_warning): Delete.  Replace calls with calls to
2401         sim_io_eprintf.
2402         (sim_error): Delete. Replace calls with sim_io_error.
2403         (open_trace, writeout32, writeout16, getnum): Add SD argument.
2404         (mips_set_profile): Rename from sim_set_profile. Add SD argument.
2405         (mips_set_profile_size): Rename from sim_set_profile_size. Add SD
2406         argument.
2407         (mips_size): Rename from sim_size. Add SD argument.
2408
2409         * interp.c (simulator): Delete global variable.
2410         (callback): Delete global variable.
2411         (mips_option_handler, sim_open, sim_write, sim_read,
2412         sim_store_register, sim_fetch_register, sim_info, sim_do_command,
2413         sim_size,sim_monitor): Use sim_io_* not callback->*.
2414         (sim_open): ZALLOC simulator struct.
2415         (PROFILE): Do not define.
2416
2417 Tue Oct 14 13:35:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2418
2419         * interp.c (sim_open), support.h: Replace CHECKSIM macro found in
2420         support.h with corresponding code.
2421
2422         * sim-main.h (word64, uword64), support.h: Move definition to
2423         sim-main.h.
2424         (WORD64LO, WORD64HI, SET64LO, SET64HI, WORD64, UWORD64): Ditto.
2425
2426         * support.h: Delete
2427         * Makefile.in: Update dependencies
2428         * interp.c: Do not include.
2429
2430 Tue Oct 14 13:35:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2431
2432         * interp.c (address_translation, load_memory, store_memory,
2433         cache_op): Rename to from AddressTranslation et.al., make global,
2434         add SD argument
2435
2436         * sim-main.h (AddressTranslation, LoadMemory, StoreMemory,
2437         CacheOp): Define.
2438
2439         * interp.c (SignalException): Rename to signal_exception, make
2440         global.
2441
2442         * interp.c (Interrupt, ...): Move definitions to sim-main.h.
2443
2444         * sim-main.h (SignalException, SignalExceptionInterrupt,
2445         SignalExceptionInstructionFetch, SignalExceptionAddressStore,
2446         SignalExceptionAddressLoad, SignalExceptionSimulatorFault,
2447         SignalExceptionIntegerOverflow, SignalExceptionCoProcessorUnusable):
2448         Define.
2449
2450         * interp.c, support.h: Use.
2451
2452 Tue Oct 14 13:19:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2453
2454         * interp.c (ValueFPR, StoreFPR), sim-main.h: Make global, rename
2455         to value_fpr / store_fpr. Add SD argument.
2456         (NaN, Infinity, Less, Equal, AbsoluteValue, Negate, Add, Sub,
2457         Multiply, Divide, Recip, SquareRoot, Convert): Make global.
2458
2459         * sim-main.h (ValueFPR, StoreFPR): Define.
2460
2461 Tue Oct 14 13:06:55 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2462
2463         * interp.c (sim_engine_run): Check consistency between configure
2464         WITH_TARGET_WORD_BITSIZE and WITH_FLOATING_POINT and gensim GPRLEN
2465         and HASFPU.
2466
2467         * configure.in (mips_bitsize): Configure WITH_TARGET_WORD_BITSIZE.
2468         (mips_fpu): Configure WITH_FLOATING_POINT.
2469         (mips_endian): Configure WITH_TARGET_ENDIAN.
2470         * configure: Update.
2471
2472 Fri Oct  3 09:28:00 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2473
2474         * configure: Regenerated to track ../common/aclocal.m4 changes.
2475
2476 Mon Sep 29 14:45:00 1997  Bob Manson  <manson@charmed.cygnus.com>
2477
2478         * configure: Regenerated.
2479
2480 Fri Sep 26 12:48:18 1997  Mark Alexander  <marka@cygnus.com>
2481
2482         * interp.c: Allow Debug, DEPC, and EPC registers to be examined in GDB.
2483
2484 Thu Sep 25 11:15:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2485
2486         * gencode.c (print_igen_insn_models): Assume certain architectures
2487         include all mips* instructions.
2488         (print_igen_insn_format): Use data_size==-1 as marker for MIPS16
2489         instruction.
2490
2491         * Makefile.in (tmp.igen): Add target. Generate igen input from
2492         gencode file.
2493
2494         * gencode.c (FEATURE_IGEN): Define.
2495         (main): Add --igen option.  Generate output in igen format.
2496         (process_instructions): Format output according to igen option.
2497         (print_igen_insn_format): New function.
2498         (print_igen_insn_models): New function.
2499         (process_instructions): Only issue warnings and ignore
2500         instructions when no FEATURE_IGEN.
2501
2502 Wed Sep 24 17:38:57 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2503
2504         * interp.c (COP_SD, COP_LD): Add UNUSED to pacify GCC for some
2505         MIPS targets.
2506
2507 Tue Sep 23 11:04:38 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2508
2509         * configure: Regenerated to track ../common/aclocal.m4 changes.
2510
2511 Tue Sep 23 10:19:51 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2512
2513         * Makefile.in (SIM_ALIGNMENT, SIM_ENDIAN, SIM_HOSTENDIAN,
2514         SIM_RESERVED_BITS): Delete, moved to common.
2515         (SIM_EXTRA_CFLAGS): Update.
2516
2517 Mon Sep 22 11:46:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2518
2519         * configure.in: Configure non-strict memory alignment.
2520         * configure: Regenerated to track ../common/aclocal.m4 changes.
2521
2522 Fri Sep 19 17:45:25 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2523
2524         * configure: Regenerated to track ../common/aclocal.m4 changes.
2525
2526 Sat Sep 20 14:07:28 1997  Gavin Koch  <gavin@cygnus.com>
2527
2528         * gencode.c (SDBBP,DERET): Added (3900) insns.
2529         (RFE): Turn on for 3900.
2530         * interp.c (DebugBreakPoint,DEPC,Debug,Debug_*): Added.
2531         (dsstate): Made global.
2532         (SUBTARGET_R3900): Added.
2533         (CANCELDELAYSLOT): New.
2534         (SignalException): Ignore SystemCall rather than ignore and
2535         terminate.  Add DebugBreakPoint handling.
2536         (decode_coproc): New insns RFE, DERET; and new registers Debug
2537         and DEPC protected by SUBTARGET_R3900.
2538         (sim_engine_run): Use CANCELDELAYSLOT rather than clearing
2539         bits explicitly.
2540         * Makefile.in,configure.in: Add mips subtarget option.
2541         * configure: Update.
2542
2543 Fri Sep 19 09:33:27 1997  Gavin Koch  <gavin@cygnus.com>
2544
2545         * gencode.c: Add r3900 (tx39).
2546
2547
2548 Tue Sep 16 15:52:04 1997  Gavin Koch  <gavin@cygnus.com>
2549
2550         * gencode.c (build_instruction): Don't need to subtract 4 for
2551         JALR, just 2.
2552
2553 Tue Sep 16 11:32:28 1997  Gavin Koch  <gavin@cygnus.com>
2554
2555         * interp.c: Correct some HASFPU problems.
2556
2557 Mon Sep 15 17:36:15 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2558
2559         * configure: Regenerated to track ../common/aclocal.m4 changes.
2560
2561 Fri Sep 12 12:01:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2562
2563         * interp.c (mips_options): Fix samples option short form, should
2564         be `x'.
2565
2566 Thu Sep 11 09:35:29 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2567
2568         * interp.c (sim_info): Enable info code.  Was just returning.
2569
2570 Tue Sep  9 17:30:57 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2571
2572         * interp.c (decode_coproc): Clarify warning about unsuported MTC0,
2573         MFC0.
2574
2575 Tue Sep  9 16:28:28 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2576
2577         * gencode.c (build_instruction): Use SIGNED64 for 64 bit
2578         constants.
2579         (build_instruction): Ditto for LL.
2580
2581 Thu Sep  4 17:21:23 1997  Doug Evans  <dje@seba>
2582
2583         * configure: Regenerated to track ../common/aclocal.m4 changes.
2584
2585 Wed Aug 27 18:13:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2586
2587         * configure: Regenerated to track ../common/aclocal.m4 changes.
2588         * config.in: Ditto.
2589
2590 Wed Aug 27 14:12:27 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2591
2592         * interp.c (sim_open): Add call to sim_analyze_program, update
2593         call to sim_config.
2594
2595 Tue Aug 26 10:40:07 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2596
2597         * interp.c (sim_kill): Delete.
2598         (sim_create_inferior): Add ABFD argument. Set PC from same.
2599         (sim_load): Move code initializing trap handlers from here.
2600         (sim_open): To here.
2601         (sim_load): Delete, use sim-hload.c.
2602
2603         * Makefile.in (SIM_OBJS): Add sim-hload.o module.
2604
2605 Mon Aug 25 17:50:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2606
2607         * configure: Regenerated to track ../common/aclocal.m4 changes.
2608         * config.in: Ditto.
2609
2610 Mon Aug 25 15:59:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2611
2612         * interp.c (sim_open): Add ABFD argument.
2613         (sim_load): Move call to sim_config from here.
2614         (sim_open): To here.  Check return status.
2615
2616 Fri Jul 25 15:00:45 1997  Gavin Koch  <gavin@cygnus.com>
2617
2618         * gencode.c (build_instruction): Two arg MADD should
2619         not assign result to $0.
2620
2621 Thu Jun 26 12:13:17 1997  Angela Marie Thomas (angela@cygnus.com)
2622
2623         * sim/mips/configure: Change default_sim_endian to 0 (bi-endian)
2624         * sim/mips/configure.in: Regenerate.
2625
2626 Wed Jul  9 10:29:21 1997  Andrew Cagney  <cagney@critters.cygnus.com>
2627
2628         * interp.c (SUB_REG_UW, SUB_REG_SW, SUB_REG_*): Use more explicit
2629         signed8, unsigned8 et.al. types.
2630
2631         * interp.c (SUB_REG_FETCH): Handle both little and big endian
2632         hosts when selecting subreg.
2633
2634 Wed Jul  2 11:54:10 1997  Jeffrey A Law  (law@cygnus.com)
2635
2636         * interp.c (sim_engine_run): Reset the ZERO register to zero
2637         regardless of FEATURE_WARN_ZERO.
2638         * gencode.c (FEATURE_WARNINGS): Remove FEATURE_WARN_ZERO.
2639
2640 Wed Jun  4 10:43:14 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2641
2642         * interp.c (decode_coproc): Implement MTC0 N, CAUSE.
2643         (SignalException): For BreakPoints ignore any mode bits and just
2644         save the PC.
2645         (SignalException): Always set the CAUSE register.
2646
2647 Tue Jun  3 05:00:33 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2648
2649         * interp.c (SignalException): Clear the simDELAYSLOT flag when an
2650         exception has been taken.
2651
2652         * interp.c: Implement the ERET and mt/f sr instructions.
2653
2654 Sat May 31 00:44:16 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2655
2656         * interp.c (SignalException): Don't bother restarting an
2657         interrupt.
2658
2659 Fri May 30 23:41:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2660
2661         * interp.c (SignalException): Really take an interrupt.
2662         (interrupt_event): Only deliver interrupts when enabled.
2663
2664 Tue May 27 20:08:06 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2665
2666         * interp.c (sim_info): Only print info when verbose.
2667         (sim_info) Use sim_io_printf for output.
2668
2669 Tue May 27 14:22:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2670
2671         * interp.c (CoProcPresent): Add UNUSED attribute - not used by all
2672         mips architectures.
2673
2674 Tue May 27 14:22:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2675
2676         * interp.c (sim_do_command): Check for common commands if a
2677         simulator specific command fails.
2678
2679 Thu May 22 09:32:03 1997  Gavin Koch  <gavin@cygnus.com>
2680
2681         * interp.c (sim_engine_run): ifdef out uses of simSTOP, simSTEP
2682         and simBE when DEBUG is defined.
2683
2684 Wed May 21 09:08:10 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2685
2686         * interp.c (interrupt_event): New function.  Pass exception event
2687         onto exception handler.
2688
2689         * configure.in: Check for stdlib.h.
2690         * configure: Regenerate.
2691
2692         * gencode.c (build_instruction): Add UNUSED attribute to tempS
2693         variable declaration.
2694         (build_instruction): Initialize memval1.
2695         (build_instruction): Add UNUSED attribute to byte, bigend,
2696         reverse.
2697         (build_operands): Ditto.
2698
2699         * interp.c: Fix GCC warnings.
2700         (sim_get_quit_code): Delete.
2701
2702         * configure.in: Add INLINE, ENDIAN, HOSTENDIAN and WARNINGS.
2703         * Makefile.in: Ditto.
2704         * configure: Re-generate.
2705
2706         * Makefile.in (SIM_OBJS): Add sim-watch.o module.
2707
2708 Tue May 20 15:08:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2709
2710         * interp.c (mips_option_handler): New function parse argumes using
2711         sim-options.
2712         (myname): Replace with STATE_MY_NAME.
2713         (sim_open): Delete check for host endianness - performed by
2714         sim_config.
2715         (simHOSTBE, simBE): Delete, replaced by sim-endian flags.
2716         (sim_open): Move much of the initialization from here.
2717         (sim_load): To here.  After the image has been loaded and
2718         endianness set.
2719         (sim_open): Move ColdReset from here.
2720         (sim_create_inferior): To here.
2721         (sim_open): Make FP check less dependant on host endianness.
2722
2723         * Makefile.in (SIM_RUN_OBJS): Set to nrun.o - use new version or
2724         run.
2725         * interp.c (sim_set_callbacks): Delete.
2726
2727         * interp.c (membank, membank_base, membank_size): Replace with
2728         STATE_MEMORY, STATE_MEM_SIZE, STATE_MEM_BASE.
2729         (sim_open): Remove call to callback->init. gdb/run do this.
2730
2731         * interp.c: Update
2732
2733         * sim-main.h (SIM_HAVE_FLATMEM): Define.
2734
2735         * interp.c (big_endian_p): Delete, replaced by
2736         current_target_byte_order.
2737
2738 Tue May 20 13:55:00 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2739
2740         * interp.c (host_read_long, host_read_word, host_swap_word,
2741         host_swap_long): Delete. Using common sim-endian.
2742         (sim_fetch_register, sim_store_register): Use H2T.
2743         (pipeline_ticks): Delete.  Handled by sim-events.
2744         (sim_info): Update.
2745         (sim_engine_run): Update.
2746
2747 Tue May 20 13:42:03 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2748
2749         * interp.c (sim_stop_reason): Move code determining simEXCEPTION
2750         reason from here.
2751         (SignalException): To here. Signal using sim_engine_halt.
2752         (sim_stop_reason): Delete, moved to common.
2753
2754 Tue May 20 10:19:48 1997  Andrew Cagney  <cagney@b2.cygnus.com>
2755
2756         * interp.c (sim_open): Add callback argument.
2757         (sim_set_callbacks): Delete SIM_DESC argument.
2758         (sim_size): Ditto.
2759
2760 Mon May 19 18:20:38 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2761
2762         * Makefile.in (SIM_OBJS): Add common modules.
2763
2764         * interp.c (sim_set_callbacks): Also set SD callback.
2765         (set_endianness, xfer_*, swap_*): Delete.
2766         (host_read_word, host_read_long, host_swap_word, host_swap_long):
2767         Change to functions using sim-endian macros.
2768         (control_c, sim_stop): Delete, use common version.
2769         (simulate): Convert into.
2770         (sim_engine_run): This function.
2771         (sim_resume): Delete.
2772
2773         * interp.c (simulation): New variable - the simulator object.
2774         (sim_kind): Delete global - merged into simulation.
2775         (sim_load): Cleanup.  Move PC assignment from here.
2776         (sim_create_inferior): To here.
2777
2778         * sim-main.h: New file.
2779         * interp.c (sim-main.h): Include.
2780
2781 Thu Apr 24 00:39:51 1997  Doug Evans  <dje@canuck.cygnus.com>
2782
2783         * configure: Regenerated to track ../common/aclocal.m4 changes.
2784
2785 Wed Apr 23 17:32:19 1997  Doug Evans  <dje@canuck.cygnus.com>
2786
2787         * tconfig.in (SIM_HAVE_BIENDIAN): Define.
2788
2789 Mon Apr 21 17:16:13 1997  Gavin Koch  <gavin@cygnus.com>
2790
2791         * gencode.c (build_instruction): DIV instructions: check
2792         for division by zero and integer overflow before using
2793         host's division operation.
2794
2795 Thu Apr 17 03:18:14 1997  Doug Evans  <dje@canuck.cygnus.com>
2796
2797         * Makefile.in (SIM_OBJS): Add sim-load.o.
2798         * interp.c: #include bfd.h.
2799         (target_byte_order): Delete.
2800         (sim_kind, myname, big_endian_p): New static locals.
2801         (sim_open): Set sim_kind, myname.  Move call to set_endianness to
2802         after argument parsing.  Recognize -E arg, set endianness accordingly.
2803         (sim_load): Return SIM_RC.  New arg abfd.  Call sim_load_file to
2804         load file into simulator.  Set PC from bfd.
2805         (sim_create_inferior): Return SIM_RC.  Delete arg start_address.
2806         (set_endianness): Use big_endian_p instead of target_byte_order.
2807
2808 Wed Apr 16 17:55:37 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2809
2810         * interp.c (sim_size): Delete prototype - conflicts with
2811         definition in remote-sim.h.  Correct definition.
2812
2813 Mon Apr  7 15:45:02 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
2814
2815         * configure: Regenerated to track ../common/aclocal.m4 changes.
2816         * config.in: Ditto.
2817
2818 Wed Apr  2 15:06:28 1997  Doug Evans  <dje@canuck.cygnus.com>
2819
2820         * interp.c (sim_open): New arg `kind'.
2821
2822         * configure: Regenerated to track ../common/aclocal.m4 changes.
2823
2824 Wed Apr  2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
2825
2826         * configure: Regenerated to track ../common/aclocal.m4 changes.
2827
2828 Tue Mar 25 11:38:22 1997  Doug Evans  <dje@canuck.cygnus.com>
2829
2830         * interp.c (sim_open): Set optind to 0 before calling getopt.
2831
2832 Wed Mar 19 01:14:00 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
2833
2834         * configure: Regenerated to track ../common/aclocal.m4 changes.
2835
2836 Mon Mar 17 10:52:59 1997  Gavin Koch  <gavin@cetus.cygnus.com>
2837
2838         * interp.c : Replace uses of pr_addr with pr_uword64
2839         where the bit length is always 64 independent of SIM_ADDR.
2840         (pr_uword64) : added.
2841
2842 Mon Mar 17 15:10:07 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
2843
2844         * configure: Re-generate.
2845
2846 Fri Mar 14 10:34:11 1997  Michael Meissner  <meissner@cygnus.com>
2847
2848         * configure: Regenerate to track ../common/aclocal.m4 changes.
2849
2850 Thu Mar 13 12:51:36 1997  Doug Evans  <dje@canuck.cygnus.com>
2851
2852         * interp.c (sim_open): New SIM_DESC result.  Argument is now
2853         in argv form.
2854         (other sim_*): New SIM_DESC argument.
2855
2856 Mon Feb 24 22:47:14 1997  Dawn Perchik  <dawn@cygnus.com>
2857
2858         * interp.c: Fix printing of addresses for non-64-bit targets.
2859         (pr_addr): Add function to print address based on size.
2860
2861 Wed Feb 19 14:42:09 1997  Mark Alexander  <marka@cygnus.com>
2862
2863         * interp.c (simopen): Add support for LSI MiniRISC PMON vectors.
2864
2865 Thu Feb 13 14:08:30 1997  Ian Lance Taylor  <ian@cygnus.com>
2866
2867         * gencode.c (build_mips16_operands): Correct computation of base
2868         address for extended PC relative instruction.
2869
2870 Thu Feb  6 17:16:15 1997  Ian Lance Taylor  <ian@cygnus.com>
2871
2872         * interp.c (mips16_entry): Add support for floating point cases.
2873         (SignalException): Pass floating point cases to mips16_entry.
2874         (ValueFPR): Don't restrict fmt_single and fmt_word to even
2875         registers.
2876         (StoreFPR): Likewise.  Also, don't clobber fpr + 1 for fmt_single
2877         or fmt_word.
2878         (COP_LW): Pass fmt_word rather than fmt_uninterpreted to StoreFPR,
2879         and then set the state to fmt_uninterpreted.
2880         (COP_SW): Temporarily set the state to fmt_word while calling
2881         ValueFPR.
2882
2883 Tue Feb  4 16:48:25 1997  Ian Lance Taylor  <ian@cygnus.com>
2884
2885         * gencode.c (build_instruction): The high order may be set in the
2886         comparison flags at any ISA level, not just ISA 4.
2887
2888 Tue Feb  4 13:33:30 1997  Doug Evans  <dje@canuck.cygnus.com>
2889
2890         * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
2891         COMMON_{PRE,POST}_CONFIG_FRAG instead.
2892         * configure.in: sinclude ../common/aclocal.m4.
2893         * configure: Regenerated.
2894
2895 Fri Jan 31 11:11:45 1997  Ian Lance Taylor  <ian@cygnus.com>
2896
2897         * configure: Rebuild after change to aclocal.m4.
2898
2899 Thu Jan 23 11:46:23 1997  Stu Grossman  (grossman@critters.cygnus.com)
2900
2901         * configure configure.in Makefile.in:  Update to new configure
2902         scheme which is more compatible with WinGDB builds.
2903         * configure.in:  Improve comment on how to run autoconf.
2904         * configure:  Re-run autoconf to get new ../common/aclocal.m4.
2905         * Makefile.in:  Use autoconf substitution to install common
2906         makefile fragment.
2907
2908 Wed Jan  8 12:39:03 1997  Jim Wilson  <wilson@cygnus.com>
2909
2910         * gencode.c (build_instruction): Use BigEndianCPU instead of
2911         ByteSwapMem.
2912
2913 Thu Jan 02 22:23:04 1997  Mark Alexander  <marka@cygnus.com>
2914
2915         * interp.c (sim_monitor): Make output to stdout visible in
2916         wingdb's I/O log window.
2917
2918 Tue Dec 31 07:04:00 1996  Mark Alexander  <marka@cygnus.com>
2919
2920         * support.h: Undo previous change to SIGTRAP
2921         and SIGQUIT values.
2922
2923 Mon Dec 30 17:36:06 1996  Ian Lance Taylor  <ian@cygnus.com>
2924
2925         * interp.c (store_word, load_word): New static functions.
2926         (mips16_entry): New static function.
2927         (SignalException): Look for mips16 entry and exit instructions.
2928         (simulate): Use the correct index when setting fpr_state after
2929         doing a pending move.
2930
2931 Sun Dec 29 09:37:18 1996  Mark Alexander  <marka@cygnus.com>
2932
2933         * interp.c: Fix byte-swapping code throughout to work on
2934         both little- and big-endian hosts.
2935
2936 Sun Dec 29 09:18:32 1996  Mark Alexander  <marka@cygnus.com>
2937
2938         * support.h: Make definitions of SIGTRAP and SIGQUIT consistent
2939         with gdb/config/i386/xm-windows.h.
2940
2941 Fri Dec 27 22:48:51 1996  Mark Alexander  <marka@cygnus.com>
2942
2943         * gencode.c (build_instruction): Work around MSVC++ code gen bug
2944         that messes up arithmetic shifts.
2945
2946 Fri Dec 20 11:04:05 1996  Stu Grossman  (grossman@critters.cygnus.com)
2947
2948         * support.h:  Use _WIN32 instead of __WIN32__.  Also add defs for
2949         SIGTRAP and SIGQUIT for _WIN32.
2950
2951 Thu Dec 19 14:07:27 1996  Ian Lance Taylor  <ian@cygnus.com>
2952
2953         * gencode.c (build_instruction) [MUL]: Cast operands to word64, to
2954         force a 64 bit multiplication.
2955         (build_instruction) [OR]: In mips16 mode, don't do anything if the
2956         destination register is 0, since that is the default mips16 nop
2957         instruction.
2958
2959 Mon Dec 16 14:59:38 1996  Ian Lance Taylor  <ian@cygnus.com>
2960
2961         * gencode.c (MIPS16_DECODE): SWRASP is I8, not RI.
2962         (build_endian_shift): Don't check proc64.
2963         (build_instruction): Always set memval to uword64.  Cast op2 to
2964         uword64 when shifting it left in memory instructions.  Always use
2965         the same code for stores--don't special case proc64.
2966
2967         * gencode.c (build_mips16_operands): Fix base PC value for PC
2968         relative operands.
2969         (build_instruction): Call JALDELAYSLOT rather than DELAYSLOT for a
2970         jal instruction.
2971         * interp.c (simJALDELAYSLOT): Define.
2972         (JALDELAYSLOT): Define.
2973         (INDELAYSLOT, INJALDELAYSLOT): Define.
2974         (simulate): Clear simJALDELAYSLOT when simDELAYSLOT is cleared.
2975
2976 Tue Dec 24 22:11:20 1996  Angela Marie Thomas (angela@cygnus.com)
2977
2978         * interp.c (sim_open): add flush_cache as a PMON routine
2979         (sim_monitor): handle flush_cache by ignoring it
2980
2981 Wed Dec 11 13:53:51 1996  Jim Wilson  <wilson@cygnus.com>
2982
2983         * gencode.c (build_instruction): Use !ByteSwapMem instead of
2984         BigEndianMem.
2985         * interp.c (CONFIG, config_EP_{mask,shift,D,DxxDxx, config_BE): Delete.
2986         (BigEndianMem): Rename to ByteSwapMem and change sense.
2987         (BigEndianCPU, sim_write, LoadMemory, StoreMemory): Change
2988         BigEndianMem references to !ByteSwapMem.
2989         (set_endianness): New function, with prototype.
2990         (sim_open): Call set_endianness.
2991         (sim_info): Use simBE instead of BigEndianMem.
2992         (xfer_direct_word, xfer_direct_long, swap_direct_word,
2993         swap_direct_long, xfer_big_word, xfer_big_long, xfer_little_word,
2994         xfer_little_long, swap_word, swap_long): Delete unnecessary MSC_VER
2995         ifdefs, keeping the prototype declaration.
2996         (swap_word): Rewrite correctly.
2997         (ColdReset): Delete references to CONFIG.  Delete endianness related
2998         code; moved to set_endianness.
2999
3000 Tue Dec 10 11:32:04 1996  Jim Wilson  <wilson@cygnus.com>
3001
3002         * gencode.c (build_instruction, case JUMP): Truncate PC to 32 bits.
3003         * interp.c (CHECKHILO): Define away.
3004         (simSIGINT): New macro.
3005         (membank_size): Increase from 1MB to 2MB.
3006         (control_c): New function.
3007         (sim_resume): Rename parameter signal to signal_number.  Add local
3008         variable prev.  Call signal before and after simulate.
3009         (sim_stop_reason): Add simSIGINT support.
3010         (sim_warning, sim_error, dotrace, SignalException): Define as stdarg
3011         functions always.
3012         (sim_warning): Delete call to SignalException.  Do call printf_filtered
3013         if logfh is NULL.
3014         (AddressTranslation): Add #ifdef DEBUG around debugging message and
3015         a call to sim_warning.
3016
3017 Wed Nov 27 11:53:50 1996  Ian Lance Taylor  <ian@cygnus.com>
3018
3019         * gencode.c (process_instructions): If ! proc64, skip DOUBLEWORD
3020         16 bit instructions.
3021
3022 Tue Nov 26 11:53:12 1996  Ian Lance Taylor  <ian@cygnus.com>
3023
3024         Add support for mips16 (16 bit MIPS implementation):
3025         * gencode.c (inst_type): Add mips16 instruction encoding types.
3026         (GETDATASIZEINSN): Define.
3027         (MIPS_DECODE): Add REG flag to dsllv, dsrav, and dsrlv.  Add
3028         jalx.  Add LEFT flag to mfhi and mflo.  Add RIGHT flag to mthi and
3029         mtlo.
3030         (MIPS16_DECODE): New table, for mips16 instructions.
3031         (bitmap_val): New static function.
3032         (struct mips16_op): Define.
3033         (mips16_op_table): New table, for mips16 operands.
3034         (build_mips16_operands): New static function.
3035         (process_instructions): If PC is odd, decode a mips16
3036         instruction.  Break out instruction handling into new
3037         build_instruction function.
3038         (build_instruction): New static function, broken out of
3039         process_instructions.  Check modifiers rather than flags for SHIFT
3040         bit count and m[ft]{hi,lo} direction.
3041         (usage): Pass program name to fprintf.
3042         (main): Remove unused variable this_option_optind.  Change
3043         ``*loptarg++'' to ``loptarg++''.
3044         (my_strtoul): Parenthesize && within ||.
3045         * interp.c (LoadMemory): Accept a halfword pAddr if vAddr is odd.
3046         (simulate): If PC is odd, fetch a 16 bit instruction, and
3047         increment PC by 2 rather than 4.
3048         * configure.in: Add case for mips16*-*-*.
3049         * configure: Rebuild.
3050
3051 Fri Nov 22 08:49:36 1996  Mark Alexander  <marka@cygnus.com>
3052
3053         * interp.c: Allow -t to enable tracing in standalone simulator.
3054         Fix garbage output in trace file and error messages.
3055
3056 Wed Nov 20 01:54:37 1996  Doug Evans  <dje@canuck.cygnus.com>
3057
3058         * Makefile.in: Delete stuff moved to ../common/Make-common.in.
3059         (SIM_{OBJS,EXTRA_CFLAGS,EXTRA_CLEAN}): Define.
3060         * configure.in: Simplify using macros in ../common/aclocal.m4.
3061         * configure: Regenerated.
3062         * tconfig.in: New file.
3063
3064 Tue Nov 12 13:34:00 1996  Dawn Perchik  <dawn@cygnus.com>
3065
3066         * interp.c: Fix bugs in 64-bit port.
3067         Use ansi function declarations for msvc compiler.
3068         Initialize and test file pointer in trace code.
3069         Prevent duplicate definition of LAST_EMED_REGNUM.
3070
3071 Tue Oct 15 11:07:06 1996  Mark Alexander  <marka@cygnus.com>
3072
3073         * interp.c (xfer_big_long): Prevent unwanted sign extension.
3074
3075 Thu Sep 26 17:35:00 1996  James G. Smith  <jsmith@cygnus.co.uk>
3076
3077         * interp.c (SignalException): Check for explicit terminating
3078         breakpoint value.
3079         * gencode.c: Pass instruction value through SignalException()
3080         calls for Trap, Breakpoint and Syscall.
3081
3082 Thu Sep 26 11:35:17 1996  James G. Smith  <jsmith@cygnus.co.uk>
3083
3084         * interp.c (SquareRoot): Add HAVE_SQRT check to ensure sqrt() is
3085         only used on those hosts that provide it.
3086         * configure.in: Add sqrt() to list of functions to be checked for.
3087         * config.in: Re-generated.
3088         * configure: Re-generated.
3089
3090 Fri Sep 20 15:47:12 1996  Ian Lance Taylor  <ian@cygnus.com>
3091
3092         * gencode.c (process_instructions): Call build_endian_shift when
3093         expanding STORE RIGHT, to fix swr.
3094         * support.h (SIGNEXTEND): If the sign bit is not set, explicitly
3095         clear the high bits.
3096         * interp.c (Convert): Fix fmt_single to fmt_long to not truncate.
3097         Fix float to int conversions to produce signed values.
3098
3099 Thu Sep 19 15:34:17 1996  Ian Lance Taylor  <ian@cygnus.com>
3100
3101         * gencode.c (MIPS_DECODE): Set UNSIGNED for multu instruction.
3102         (process_instructions): Correct handling of nor instruction.
3103         Correct shift count for 32 bit shift instructions. Correct sign
3104         extension for arithmetic shifts to not shift the number of bits in
3105         the type.  Fix 64 bit multiply high word calculation.  Fix 32 bit
3106         unsigned multiply.  Fix ldxc1 and friends to use coprocessor 1.
3107         Fix madd.
3108         * interp.c (CHECKHILO): Don't set HIACCESS, LOACCESS, or HLPC.
3109         It's OK to have a mult follow a mult.  What's not OK is to have a
3110         mult follow an mfhi.
3111         (Convert): Comment out incorrect rounding code.
3112
3113 Mon Sep 16 11:38:16 1996  James G. Smith  <jsmith@cygnus.co.uk>
3114
3115         * interp.c (sim_monitor): Improved monitor printf
3116         simulation. Tidied up simulator warnings, and added "--log" option
3117         for directing warning message output.
3118         * gencode.c: Use sim_warning() rather than WARNING macro.
3119
3120 Thu Aug 22 15:03:12 1996  Ian Lance Taylor  <ian@cygnus.com>
3121
3122         * Makefile.in (gencode): Depend upon gencode.o, getopt.o, and
3123         getopt1.o, rather than on gencode.c.  Link objects together.
3124         Don't link against -liberty.
3125         (gencode.o, getopt.o, getopt1.o): New targets.
3126         * gencode.c: Include <ctype.h> and "ansidecl.h".
3127         (AND): Undefine after including "ansidecl.h".
3128         (ULONG_MAX): Define if not defined.
3129         (OP_*): Don't define macros; now defined in opcode/mips.h.
3130         (main): Call my_strtoul rather than strtoul.
3131         (my_strtoul): New static function.
3132
3133 Wed Jul 17 18:12:38 1996  Stu Grossman  (grossman@critters.cygnus.com)
3134
3135         * gencode.c (process_instructions):  Generate word64 and uword64
3136         instead of `long long' and `unsigned long long' data types.
3137         * interp.c:  #include sysdep.h to get signals, and define default
3138         for SIGBUS.
3139         * (Convert):  Work around for Visual-C++ compiler bug with type
3140         conversion.
3141         * support.h:  Make things compile under Visual-C++ by using
3142         __int64 instead of `long long'.  Change many refs to long long
3143         into word64/uword64 typedefs.
3144
3145 Wed Jun 26 12:24:55 1996  Jason Molenda  (crash@godzilla.cygnus.co.jp)
3146
3147         * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
3148         INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
3149         (docdir): Removed.
3150         * configure.in (AC_PREREQ): autoconf 2.5 or higher.
3151         (AC_PROG_INSTALL): Added.
3152         (AC_PROG_CC): Moved to before configure.host call.
3153         * configure: Rebuilt.
3154
3155 Wed Jun  5 08:28:13 1996  James G. Smith  <jsmith@cygnus.co.uk>
3156
3157         * configure.in: Define @SIMCONF@ depending on mips target.
3158         * configure: Rebuild.
3159         * Makefile.in (run): Add @SIMCONF@ to control simulator
3160         construction.
3161         * gencode.c: Change LOADDRMASK to 64bit memory model only.
3162         * interp.c: Remove some debugging, provide more detailed error
3163         messages, update memory accesses to use LOADDRMASK.
3164
3165 Mon Jun  3 11:55:03 1996  Ian Lance Taylor  <ian@cygnus.com>
3166
3167         * configure.in: Add calls to AC_CONFIG_HEADER, AC_CHECK_HEADERS,
3168         AC_CHECK_LIB, and AC_CHECK_FUNCS.  Change AC_OUTPUT to set
3169         stamp-h.
3170         * configure: Rebuild.
3171         * config.in: New file, generated by autoheader.
3172         * interp.c: Include "config.h".  Include <stdlib.h>, <string.h>,
3173         and <strings.h> if they exist.  Replace #ifdef sun with #ifdef
3174         HAVE_ANINT and HAVE_AINT, as appropriate.
3175         * Makefile.in (run): Use @LIBS@ rather than -lm.
3176         (interp.o): Depend upon config.h.
3177         (Makefile): Just rebuild Makefile.
3178         (clean): Remove stamp-h.
3179         (mostlyclean): Make the same as clean, not as distclean.
3180         (config.h, stamp-h): New targets.
3181
3182 Fri May 10 00:41:17 1996  James G. Smith  <jsmith@cygnus.co.uk>
3183
3184         * interp.c (ColdReset): Fix boolean test. Make all simulator
3185         globals static.
3186
3187 Wed May  8 15:12:58 1996  James G. Smith  <jsmith@cygnus.co.uk>
3188
3189         * interp.c (xfer_direct_word, xfer_direct_long,
3190         swap_direct_word, swap_direct_long, xfer_big_word,
3191         xfer_big_long, xfer_little_word, xfer_little_long,
3192         swap_word,swap_long): Added.
3193         * interp.c (ColdReset): Provide function indirection to
3194         host<->simulated_target transfer routines.
3195         * interp.c (sim_store_register, sim_fetch_register): Updated to
3196         make use of indirected transfer routines.
3197
3198 Fri Apr 19 15:48:24 1996  James G. Smith  <jsmith@cygnus.co.uk>
3199
3200         * gencode.c (process_instructions): Ensure FP ABS instruction
3201         recognised.
3202         * interp.c (AbsoluteValue): Add routine. Also provide simple PMON
3203         system call support.
3204
3205 Wed Apr 10 09:51:38 1996  James G. Smith  <jsmith@cygnus.co.uk>
3206
3207         * interp.c (sim_do_command): Complain if callback structure not
3208         initialised.
3209
3210 Thu Mar 28 13:50:51 1996  James G. Smith  <jsmith@cygnus.co.uk>
3211
3212         * interp.c (Convert): Provide round-to-nearest and round-to-zero
3213         support for Sun hosts.
3214         * Makefile.in (gencode): Ensure the host compiler and libraries
3215         used for cross-hosted build.
3216
3217 Wed Mar 27 14:42:12 1996  James G. Smith  <jsmith@cygnus.co.uk>
3218
3219         * interp.c, gencode.c: Some more (TODO) tidying.
3220
3221 Thu Mar  7 11:19:33 1996  James G. Smith  <jsmith@cygnus.co.uk>
3222
3223         * gencode.c, interp.c: Replaced explicit long long references with
3224         WORD64HI, WORD64LO, SET64HI and SET64LO macro calls.
3225         * support.h (SET64LO, SET64HI): Macros added.
3226
3227 Wed Feb 21 12:16:21 1996  Ian Lance Taylor  <ian@cygnus.com>
3228
3229         * configure: Regenerate with autoconf 2.7.
3230
3231 Tue Jan 30 08:48:18 1996  Fred Fish  <fnf@cygnus.com>
3232
3233         * interp.c (LoadMemory): Enclose text following #endif in /* */.
3234         * support.h: Remove superfluous "1" from #if.
3235         * support.h (CHECKSIM): Remove stray 'a' at end of line.
3236
3237 Mon Dec  4 11:44:40 1995  Jamie Smith  <jsmith@cygnus.com>
3238
3239         * interp.c (StoreFPR): Control UndefinedResult() call on
3240         WARN_RESULT manifest.
3241
3242 Fri Dec  1 16:37:19 1995  James G. Smith  <jsmith@cygnus.co.uk>
3243
3244         * gencode.c: Tidied instruction decoding, and added FP instruction
3245         support.
3246
3247         * interp.c: Added dineroIII, and BSD profiling support. Also
3248         run-time FP handling.
3249
3250 Sun Oct 22 00:57:18 1995  James G. Smith  <jsmith@pasanda.cygnus.co.uk>
3251
3252         * Changelog, Makefile.in, README.Cygnus, configure, configure.in,
3253         gencode.c, interp.c, support.h: created.