sim/mips/ChangeLog

   1 Wed Nov 25 17:33:24 1998  Andrew Cagney  <cagney@b1.cygnus.com>
   2
   3         * configure.in (vr4100): Only include vr4100 instructions in
   4         simulator.
   5         * configure: Re-generate.
   6         * m16.igen (*): Tag all mips16 instructions as also being vr4100.
   7
   8 Mon Nov 23 18:20:36 1998  Andrew Cagney  <cagney@b1.cygnus.com>
   9
  10         * Makefile.in (SIM_CFLAGS): Do not define WITH_IGEN.
  11         * sim-main.h, sim-main.c, interp.c: Delete #if WITH_IGEN keeping
  12         true alternative.
  13
  14         * configure.in (sim_default_gen, sim_use_gen): Replace with
  15         sim_gen.
  16         (--enable-sim-igen): Delete config option. Always using IGEN.
  17         * configure: Re-generate.
  18
  19         * Makefile.in (gencode): Kill, kill, kill.
  20         * gencode.c: Ditto.
  21
  22 Mon Nov 23 18:07:36 1998  Andrew Cagney  <cagney@b1.cygnus.com>
  23
  24         * configure.in: Configure mips64vr4100-elf nee mips64vr41* as a 64
  25         bit mips16 igen simulator.
  26         * configure: Re-generate.
  27
  28         * mips.igen (check_div_hilo, check_mult_hilo, check_mf_hilo): Mark
  29         as part of vr4100 ISA.
  30         * vr.igen: Mark all instructions as 64 bit only.
  31
  32 Mon Nov 23 17:07:37 1998  Andrew Cagney  <cagney@b1.cygnus.com>
  33
  34         * interp.c (get_cell, sim_monitor, fetch_str, CoProcPresent):
  35         Pacify GCC.
  36
  37 start-sanitize-tx19
  38 Mon Nov 23 16:51:02 1998  Andrew Cagney  <cagney@b1.cygnus.com>
  39
  40         * configure.in (tx19): Reconize target mips-tx19-elf.
  41         * configure: Re-generate.
  42
  43 end-sanitize-tx19
  44 Mon Nov 23 13:23:40 1998  Andrew Cagney  <cagney@b1.cygnus.com>
  45
  46         * configure.in: Configure mips-lsi-elf nee mips*lsi* as a
  47         mipsIII/mips16 igen simulator.  Fix sim_gen VS sim_igen typos.
  48         * configure: Re-generate.
  49
  50         * m16.igen (BREAK): Define breakpoint instruction.
  51         (JALX32): Mark instruction as mips16 and not r3900.
  52         * mips.igen (C.cond.fmt): Fix typo in instruction format.
  53
  54         * sim-main.h (PENDING_FILL): Wrap C statements in do/while.
  55
  56 start-sanitize-r5900
  57 Mon Nov 16 11:44:24 1998  Andrew Cagney  <cagney@b1.cygnus.com>
  58
  59         * r5900.igen (CVT.W.S): Always round towards zero.
  60
  61 end-sanitize-r5900
  62 Sat Nov  7 09:54:38 1998  Andrew Cagney  <cagney@b1.cygnus.com>
  63
  64         * gencode.c (build_instruction - BREAK): For MIPS16, handle BREAK
  65         insn as a debug breakpoint.
  66
  67         * sim-main.h (PENDING_SLOT_BIT): Fix, was incorrectly defined as
  68         pending.slot_size.
  69         (PENDING_SCHED): Clean up trace statement.
  70         (PENDING_SCHED): Increment PENDING_IN and PENDING_TOTAL.
  71         (PENDING_FILL): Delay write by only one cycle.
  72         (PENDING_FILL): For FSRs, write fmt_uninterpreted to FPR_STATE.
  73
  74         * sim-main.c (pending_tick): Clean up trace statements. Add trace
  75         of pending writes.
  76         (pending_tick): Fix sizes in switch statements, 4 & 8 instead of
  77         32 & 64.
  78         (pending_tick): Move incrementing of index to FOR statement.
  79         (pending_tick): Only update PENDING_OUT after a write has occured.
  80
  81         * configure.in: Add explicit mips-lsi-* target.  Use gencode to
  82         build simulator.
  83         * configure: Re-generate.
  84
  85         * interp.c (sim_engine_run OLD): Delete explicit call to
  86         PENDING_TICK. Now called via ENGINE_ISSUE_PREFIX_HOOK.
  87
  88 start-sanitize-r5900
  89 Wed Nov 11 16:53:57 1998  Andrew Cagney  <cagney@b1.cygnus.com>
  90
  91         * r5900.igen (RSQRT): Set both I/SI and D/SD when div-0.
  92
  93 Thu Nov  5 10:29:42 EST 1998  Frank Ch. Eigler  <fche@cygnus.com>
  94
  95         * r5900.igen (r59fp_opdiv): Correct erroneous FGR[FD] reference.
  96
  97 Thu Nov  5 19:40:12 1998  Andrew Cagney  <cagney@b1.cygnus.com>
  98
  99         * r5900.igen (DIV): Do not clear clear SO/SU when already set.
 100
 101         * r5900.igen (RSQRT.S): Do not compute 1/srqt(abs(T)) when T
 102         negative, compute S/sqrt(abs(T)) instead.  Correctly set FCSR
 103         bits.
 104
 105         * r5900.igen (RSQRT.S): Handle overflow/underflow better. Check
 106         sign of FT not FS.
 107         (r59fp_store): Clarify "bad value" abort messages.
 108
 109 end-sanitize-r5900
 110 start-sanitize-tx3904
 111 Sat Oct 30 09:49:10 1998  Frank Ch. Eigler  <fche@cygnus.com>
 112
 113         * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Add dummy
 114         interrupt level number to match changed SignalExceptionInterrupt
 115         macro.
 116
 117 end-sanitize-tx3904
 118 start-sanitize-sky
 119 Thu Oct 29 12:47:46 1998  Frank Ch. Eigler  <fche@cygnus.com>
 120
 121         * sim-main.c (tlb_try_match): Include physical address in
 122         scratchpad non-mapping warning.
 123
 124 end-sanitize-sky
 125 start-sanitize-r5900
 126 Thu Oct 29 11:06:30 EST 1998  Frank Ch. Eigler <fche@cygnus.com>
 127
 128         * r5900.igen: Fix PSRLVW, MULTU1, PADSBH instructions,
 129         as per customer patch.
 130
 131 end-sanitize-r5900
 132 Fri Oct  9 18:02:25 1998  Doug Evans  <devans@canuck.cygnus.com>
 133
 134         * interp.c: #include "itable.h" if WITH_IGEN.
 135         (get_insn_name): New function.
 136         (sim_open): Initialize CPU_INSN_NAME,CPU_MAX_INSNS.
 137         * sim-main.h (MAX_INSNS,INSN_NAME): Delete.
 138
 139 start-sanitize-sky
 140 Tue Sep 22 10:35:37 1998  Frank Ch. Eigler  <fche@cygnus.com>
 141
 142         * sim-main.c (tlb_try_match): Specially match virtual
 143         pages mapped to scratchpad RAM, an unimplemented feature.
 144
 145 end-sanitize-sky
 146 start-sanitize-r5900
 147 Fri Sep 18 11:31:16 1998  Frank Ch. Eigler <fche@cygnus.com>
 148
 149         * r5900.igen (prot3w): Correct rotation sequence; patch
 150         from customer.
 151
 152 end-sanitize-r5900
 153 Mon Sep 14 12:36:44 1998  Frank Ch. Eigler  <fche@cygnus.com>
 154
 155         * configure: Rebuilt to inhale new common/aclocal.m4.
 156
 157 start-sanitize-r5900
 158 Thu Sep 10 11:50:54 1998  Doug Evans  <devans@canuck.cygnus.com>
 159
 160         * r5900.igen (plzcw): Make `i' signed.
 161
 162 Wed Sep  9 15:02:10 1998  Doug Evans  <devans@canuck.cygnus.com>
 163
 164         * sim-main.h (COP0_COUNT,COP0_COMPARE,status_IM7): New macros.
 165         * sky-engine.c (cpu_issue): Increment COP0_COUNT and signal an
 166         interrupt if == COP0_COMPARE and interrupt masks/enables allow it.
 167         * interp.c (signal_exception, sky version): Handle INT 2.
 168
 169 Wed Sep 9 11:28:20 1998  Ron Unrau <runrau@cygnus.com>
 170
 171         * sim-main.h: track COP0 registers
 172         * interp.c (sim_{fetch,store}_register): read/write COP0 registers
 173
 174 Fri Sep  4 10:37:57 1998  Frank Ch. Eigler  <fche@cygnus.com>
 175
 176         * r5900.igen (mtsab): Correct typo in input register.
 177
 178         * sim-main.h (TMP_*): New macros for accessing local 128-bit
 179         temporary for multimedia instructions.
 180         * r5900.igen (*): Convert most instructions to use new TMP
 181         macros to store output result during computation.
 182
 183 end-sanitize-r5900
 184 start-sanitize-tx3904
 185 Tue Sep  1 15:39:18 1998  Frank Ch. Eigler  <fche@cygnus.com>
 186
 187         * dv-tx3904sio.c: Include sim-assert.h.
 188
 189 Tue Aug 25 12:49:46 1998  Frank Ch. Eigler  <fche@cygnus.com>
 190
 191         * dv-tx3904sio.c: New file: tx3904 serial I/O module.
 192         * configure.in: Add dv-tx3904sio, dv-sockser for tx39 target.
 193         Reorganize target-specific sim-hardware checks.
 194         * configure: rebuilt.
 195         * interp.c (sim_open): For tx39 target boards, set
 196         OPERATING_ENVIRONMENT, add tx3904sio devices.
 197         * tconfig.in: For tx39 target, set SIM_HANDLES_LMA for loading
 198         ROM executables.  Install dv-sockser into sim-modules list.
 199
 200         * dv-tx3904irc.c: Compiler warning clean-up.
 201         * dv-tx3904tmr.c: Compiler warning clean-up.  Remove particularly
 202         frequent hw-trace messages.
 203
 204 end-sanitize-tx3904
 205 start-sanitize-sky
 206 Tue Aug 11 13:52:16 1998  Frank Ch. Eigler  <fche@cygnus.com>
 207
 208         * interp.c (signal_exception): Set IP3 bit in CAUSE on
 209         sky interrupt.
 210
 211 end-sanitize-sky
 212 Fri Jul 31 18:14:16 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 213
 214         * vr.igen (MulAcc): Identify as a vr4100 specific function.
 215
 216 Sat Jul 25 16:03:14 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 217
 218         * Makefile.in (IGEN_INCLUDE): Add vr.igen.
 219
 220         * vr.igen: New file.
 221         (MAC/MADD16, DMAC/DMADD16): Implement using code from gencode.c.
 222         * mips.igen: Define vr4100 model. Include vr.igen.
 223 start-sanitize-cygnus
 224         * vr5400.igen: Move instructions to vr.igen
 225         * Makefile.in (IGEN_INCLUDE): Remove vr5400.igen.
 226 end-sanitize-cygnus
 227 start-sanitize-vr4320
 228         * vr4320.igen: Move instructions to vr.igen.
 229         * Makefile.in (IGEN_INCLUDE): Remove vr5320.igen.
 230
 231 end-sanitize-vr4320
 232 start-sanitize-sky
 233 Fri Jul 24 16:01:03 1998  Ian Carmichael  <iancarm@cygnus.com>
 234
 235         * interp.c (MONITOR_SIZE): Make 1MB monitor for SKY.
 236         * mips.igen (BREAK): Fix 0xffff2 monitor call.  Slightly less
 237         confusing message if not enough --load-next options appear.
 238
 239         * sky-pke.h (VUx_MEMx_SRCADDR_START): Move to 0x19800000 range.
 240         * sim-main.c (GDB_COMM_AREA): Move to 0x19810000.
 241         * sky-gdb.c (init_fifo_bp_cache): Use VIO_BASE when reading GDB area.
 242         (resume_handler): Same.
 243         (suspend_handler): Same.
 244
 245 Wed Jul 22 13:04:13 1998  Frank Ch. Eigler  <fche@cygnus.com>
 246
 247         * mips.igen (break): Implement LOAD_INSTRUCTION ("break 0xffff1")
 248         to trigger multi-phase load.
 249
 250         * sim-main.c: Include sim-assert.h for ASSERT macro.
 251         * sim-main.h (PRINTF_INSTRUCTION): Correct bit pattern for
 252         "break 0xffff2".
 253
 254 Tue Jul 21 18:37:36 1998  Ian Carmichael  <iancarm@cygnus.com>
 255
 256         MMU support.
 257         * interp.c (sim_open): Initialize TLB.
 258         * interp.c (signal_exceptions): New 5900 handling.
 259         * r5900.igen (TLBWR, TLBWI, TLBR, TLBP): Make these work.
 260         * sim-main.c (tlb_try_match, tlb_lookup): New functions.
 261         (address_translation): Use the TLB.
 262         * sim-main.h (r4000_tlb_entry_t): New type.
 263         (TLB_*): New constants.
 264         (COP0_*): New register names.
 265
 266         Sky character I/O device.
 267         * sky-psio.c: New file.
 268         * sky-psio.h: New file.
 269         * Makefile.in: Add sky-psio.o.
 270
 271 end-sanitize-sky
 272 start-sanitize-r5900
 273 Tue Jul 14 16:10:45 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 274
 275         * r5900.igen (r59fp_overflow): Replace argument ANS with argument
 276         SIGN_P.
 277         (r59fp_zero): Ditto.
 278         (r59fp_store): Update calls.
 279         (DIV.S): Compute 0/0 sign from inputs. Ditto for X/0.
 280
 281 end-sanitize-r5900
 282 start-sanitize-branchbug4011
 283 Mon Jun 29 09:31:27 1998  Gavin Koch  <gavin@cygnus.com>
 284
 285         * interp.c (OPTION_BRANCH_BUG_4011): Add.
 286         (mips_option_handler): Handle OPTION_BRANCH_BUG_4011.
 287         (mips_options): Define the option.
 288         * mips.igen (check_4011_branch_bug): New.
 289         (mark_4011_branch_bug): New.
 290         (all branch insn): Call mark_branch_bug, and check_branch_bug.
 291         * sim-main.h (branchbug4011_option, branchbug4011_last_target,
 292         branchbug4011_last_cia, BRANCHBUG4011_OPTION,
 293         BRANCHBUG4011_LAST_TARGET, BRANCHBUG4011_LAST_CIA,
 294         check_branch_bug, mark_branch_bug): Define.
 295
 296 end-sanitize-branchbug4011
 297 Mon Jun 29 09:21:07 1998  Gavin Koch  <gavin@cygnus.com>
 298
 299         * mips.igen (check_mf_hilo): Correct check.
 300
 301 start-sanitize-r5900
 302 Fri Jun 19 14:44:46 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 303
 304         * sim-main.h (NR_COP0_GPR, COP0_GPR, cop0_gpr, NR_COP0_BP,
 305         COP0_BP, cop0_bp, NR_COP0_P, COP0_P, cop0_p): Add 32 COP0 general
 306         purpose registers, add 8 COP0 break-point registers, add 64 COP0
 307         performance registers.
 308
 309         * interp.c (decode_coproc): Accept any MTC0/MFC0, MTBP/MFBP, MTP*
 310         MFP* instructions.  Just transfer value to/from corresponding
 311         register.
 312
 313         * r5900.igen (BC0F, BC0FL, BC0T, BC0TL): Implement, assume COP0
 314         status is always true.
 315         (CACHE, TLBP, TPGWI, TLBWR): Treat as NOP.
 316         (EI, DI): Set/clear Status-EIE bit.
 317
 318 end-sanitize-r5900
 319 start-sanitize-sky
 320 Fri Jun 19 14:44:46 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 321
 322         * mips.igen (BC0F, BC0FL, BC0T, BC0TL): Move to sky code to
 323         r5900.igen.
 324
 325 end-sanitize-sky
 326 Wed Jun 17 12:20:49 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 327
 328 start-sanitize-sky
 329         * sky-vu.c (vu0_read_cop2_register, vu0_write_cop2_register): Call
 330         ASSERT not assert.
 331         * sky-gdb.c: Include "sim-assert.h".
 332
 333 end-sanitize-sky
 334         * sim-main.h (interrupt_event): Add prototype.
 335
 336 start-sanitize-tx3904
 337         * dv-tx3904tmr.c (tx3904tmr_io_write_buffer): Delete unused
 338         register_ptr, register_value.
 339         (deliver_tx3904tmr_tick): Fix types passed to printf fmt.
 340
 341 end-sanitize-tx3904
 342         * sim-main.h (tracefh): Make extern.
 343
 344 start-sanitize-tx3904
 345 Tue Jun 16 14:39:00 1998  Frank Ch. Eigler  <fche@cygnus.com>
 346
 347         * dv-tx3904tmr.c: Deschedule timer event after dispatching.
 348         Reduce unnecessarily high timer event frequency.
 349         * dv-tx3904cpu.c: Ditto for interrupt event.
 350
 351 end-sanitize-tx3904
 352 start-sanitize-sky
 353 Tue Jun 16 14:12:09 1998  Frank Ch. Eigler  <fche@cygnus.com>
 354
 355         * interp.c (decode_coproc): Removed COP2 branches.
 356         * r5900.igen: Moved COP2 branch instructions here.
 357         * mips.igen: Restricted COPz == COP2 bit pattern to
 358         exclude COP2 branches.
 359
 360 end-sanitize-sky
 361 Wed Jun 10 13:22:32 1998  Frank Ch. Eigler  <fche@cygnus.com>
 362
 363         * interp.c (decode_coproc): For TX39, add stub COP0 register #7,
 364         to allay warnings.
 365         (interrupt_event): Made non-static.
 366 start-sanitize-tx3904
 367
 368         * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Correct accidental
 369         interchange of configuration values for external vs. internal
 370         clock dividers.
 371 end-sanitize-tx3904
 372
 373 Tue Jun  9 12:46:24 1998  Ian Carmichael  <iancarm@cygnus.com>
 374
 375         * mips.igen (BREAK): Moved code to here for
 376         simulator-reserved break instructions.
 377         * gencode.c (build_instruction): Ditto.
 378         * interp.c (signal_exception): Code moved from here.  Non-
 379         reserved instructions now use exception vector, rather
 380         than halting sim.
 381         * sim-main.h: Moved magic constants to here.
 382
 383 start-sanitize-tx3904
 384 Tue Jun  9 12:29:50 1998  Frank Ch. Eigler  <fche@cygnus.com>
 385
 386         * dv-tx3904cpu.c (deliver_*_interrupt,*_port_event): Set the CAUSE
 387         register upon non-zero interrupt event level, clear upon zero
 388         event value.
 389         * dv-tx3904irc.c (*_port_event): Handle deactivated interrupt signal
 390         by passing zero event value.
 391         (*_io_{read,write}_buffer): Endianness fixes.
 392         * dv-tx3904tmr.c (*_io_{read,write}_buffer): Endianness fixes.
 393         (deliver_*_tick): Reduce sim event interval to 75% of count interval.
 394
 395         * interp.c (sim_open): Added jmr3904pal board type that adds PAL-based
 396         serial I/O and timer module at base address 0xFFFF0000.
 397
 398 end-sanitize-tx3904
 399 Tue Jun  9 11:52:29 1998  Gavin Koch  <gavin@cygnus.com>
 400
 401         * mips.igen (SWC1) : Correct the handling of ReverseEndian
 402         and BigEndianCPU.
 403
 404 Tue Jun  9 11:40:57 1998  Gavin Koch  <gavin@cygnus.com>
 405
 406         * configure.in (mips_fpu_bitsize) : Set this correctly for 32-bit mips
 407         parts.
 408         * configure: Update.
 409
 410 start-sanitize-tx3904
 411 Thu Jun  4 15:37:33 1998  Frank Ch. Eigler  <fche@cygnus.com>
 412
 413         * dv-tx3904tmr.c: New file - implements tx3904 timer.
 414         * dv-tx3904{irc,cpu}.c: Mild reformatting.
 415         * configure.in: Include tx3904tmr in hw_device list.
 416         * configure: Rebuilt.
 417         * interp.c (sim_open): Instantiate three timer instances.
 418         Fix address typo of tx3904irc instance.
 419
 420 end-sanitize-tx3904
 421 start-sanitize-r5900
 422 Thu Jun  4 16:47:27 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 423
 424         * mips.igen (check_mt_hilo): 2.1 of r5900 spec stalls for HILO.
 425         Select corresponding check_mt_hilo function.
 426         (check_mult_hilo, check_div_hilo, check_mf_hilo, check_mt_hilo):
 427         Ditto.
 428
 429         * r5900.igen (check_mult_hilo_hi1lo1, check_div_hilo_hi1lo1): Mark
 430         as r5900 specific.
 431
 432 end-sanitize-r5900
 433 Tue Jun  2 15:48:02 1998  Ian Carmichael  <iancarm@cygnus.com>
 434
 435         * interp.c (signal_exception): SystemCall exception now uses
 436         the exception vector.
 437
 438 Mon Jun  1 18:18:26 1998  Frank Ch. Eigler  <fche@cygnus.com>
 439
 440         * interp.c (decode_coproc): For TX39, add stub COP0 register #3,
 441         to allay warnings.
 442
 443 start-sanitize-r5900
 444 Mon Jun  1 10:28:25 1998  Jeffrey A Law  (law@cygnus.com)
 445
 446         * r5900.igen (rsqrt.s): Update based on r5900 ISA manual version 2.1.
 447         (sqrt.s): Likewise.
 448
 449 end-sanitize-r5900
 450 Fri May 29 11:40:39 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 451
 452         * configure.in (sim_igen_filter): Match mips*tx39 not mipst*tx39.
 453
 454 start-sanitize-tx3904
 455 Mon May 25 20:47:45 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 456
 457         * dv-tx3904cpu.c, dv-tx3904irc.c: Rename *_callback to *_method.
 458
 459         * dv-tx3904cpu.c, dv-tx3904irc.c: Include hw-main.h and
 460         sim-main.h. Declare a struct hw_descriptor instead of struct
 461         hw_device_descriptor.
 462
 463 end-sanitize-tx3904
 464 Mon May 25 12:41:38 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 465
 466         * mips.igen (do_store_left, do_load_left): Compute nr of left and
 467         right bits and then re-align left hand bytes to correct byte
 468         lanes.  Fix incorrect computation in do_store_left when loading
 469         bytes from second word.
 470
 471 start-sanitize-tx3904
 472 Fri May 22 13:34:20 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 473
 474         * configure.in (SIM_AC_OPTION_HARDWARE): Only enable when tx3904.
 475         * interp.c (sim_open): Only create a device tree when HW is
 476         enabled.
 477
 478         * dv-tx3904irc.c (tx3904irc_finish): Pacify GCC.
 479         * interp.c (signal_exception): Ditto.
 480
 481 end-sanitize-tx3904
 482 Thu May 21 14:24:11 1998  Gavin Koch  <gavin@cygnus.com>
 483
 484         * gencode.c: Mark BEGEZALL as LIKELY.
 485
 486 Thu May 21 18:57:19 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 487
 488         * sim-main.h (ALU32_END): Sign extend 32 bit results.
 489         * mips.igen (ADD, SUB, ADDI, DADD, DSUB): Trace.
 490
 491 start-sanitize-r5900
 492 Thu May 21 17:15:39 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 493
 494         * interp.c (sim_fetch_register): Convert internal r5900 regs to
 495         target byte order
 496
 497 end-sanitize-r5900
 498 Mon May 18 18:22:42 1998  Frank Ch. Eigler  <fche@cygnus.com>
 499
 500         * configure.in (SIM_AC_OPTION_HARDWARE): Added common hardware
 501         modules.  Recognize TX39 target with "mips*tx39" pattern.
 502         * configure: Rebuilt.
 503         * sim-main.h (*): Added many macros defining bits in
 504         TX39 control registers.
 505         (SignalInterrupt): Send actual PC instead of NULL.
 506         (SignalNMIReset): New exception type.
 507         * interp.c (board): New variable for future use to identify
 508         a particular board being simulated.
 509         (mips_option_handler,mips_options): Added "--board" option.
 510         (interrupt_event): Send actual PC.
 511         (sim_open): Make memory layout conditional on board setting.
 512         (signal_exception): Initial implementation of hardware interrupt
 513         handling.  Accept another break instruction variant for simulator
 514         exit.
 515         (decode_coproc): Implement RFE instruction for TX39.
 516         (mips.igen): Decode RFE instruction as such.
 517 start-sanitize-tx3904
 518         * configure.in (tx3904cpu,tx3904irc): Added devices for tx3904.
 519         * interp.c: Define "jmr3904" and "jmr3904debug" board types and
 520         bbegin to implement memory map.
 521         * dv-tx3904cpu.c: New file.
 522         * dv-tx3904irc.c: New file.
 523 end-sanitize-tx3904
 524
 525 Wed May 13 14:40:11 1998  Gavin Koch  <gavin@cygnus.com>
 526
 527         * mips.igen (check_mt_hilo): Create a separate r3900 version.
 528
 529 start-sanitize-r5900
 530 Wed May 13 14:27:53 1998  Gavin Koch  <gavin@cygnus.com>
 531
 532         * r5900.igen: Replace the calls and the definition of the
 533         function check_op_hilo_hi1lo1 with the pair
 534         check_mult_hilo_hi1lo1 and check_mult_hilo_hi1lo1.
 535
 536 end-sanitize-r5900
 537 Wed May 13 14:11:46 1998  Gavin Koch  <gavin@cygnus.com>
 538
 539         * tx.igen (madd,maddu):  Replace calls to check_op_hilo
 540         with calls to check_div_hilo.
 541
 542 Wed May 13 09:59:27 1998  Gavin Koch  <gavin@cygnus.com>
 543
 544         * mips/mips.igen (check_op_hilo,check_mult_hilo,check_div_hilo):
 545         Replace check_op_hilo with check_mult_hilo and check_div_hilo.
 546         Add special r3900 version of do_mult_hilo.
 547         (do_dmultx,do_mult,do_multu): Replace calls to check_op_hilo
 548         with calls to check_mult_hilo.
 549         (do_ddiv,do_ddivu,do_div,do_divu): Replace calls to check_op_hilo
 550         with calls to check_div_hilo.
 551
 552 Tue May 12 15:22:11 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 553
 554         * configure.in (SUBTARGET_R3900): Define for mipstx39 target.
 555         Document a replacement.
 556
 557 Fri May  8 17:48:19 1998  Ian Carmichael  <iancarm@cygnus.com>
 558
 559         * interp.c (sim_monitor): Make mon_printf work.
 560
 561 Wed May  6 19:42:19 1998  Doug Evans  <devans@canuck.cygnus.com>
 562
 563         * sim-main.h (INSN_NAME): New arg `cpu'.
 564
 565 start-sanitize-sky
 566 Thu Apr 30 18:51:26 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 567
 568         * sky-libvpe.c (FMAdd, FMSub): Replace r59fp_op3 call with
 569         r59fp_mula.
 570
 571 end-sanitize-sky
 572 start-sanitize-r5900
 573 Wed Apr 29 22:54:45 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 574
 575         * sim-main.h (R5900_FP_MAX, R5900_FP_MIN): Define.
 576         * r5900.igen (r59fp_overflow): Use.
 577
 578         * r5900.igen (r59fp_op3): Rename to
 579         (r59fp_mula): This, delete opm argument.
 580         (MADD.S, MADDA.S, MSUB.S, MSUBS.S): Update.
 581         (r59fp_mula): Overflowing product propogates through to result.
 582         (r59fp_mula): ACC to the MAX propogates to result.
 583         (r59fp_mula): Underflow during multiply only sets SU.
 584
 585 end-sanitize-r5900
 586 Tue Apr 28 18:33:31 1998  Geoffrey Noer  <noer@cygnus.com>
 587
 588         * configure: Regenerated to track ../common/aclocal.m4 changes.
 589
 590 Sun Apr 26 15:31:55 1998  Tom Tromey  <tromey@creche>
 591
 592         * configure: Regenerated to track ../common/aclocal.m4 changes.
 593         * config.in: Ditto.
 594
 595 Sun Apr 26 15:20:01 1998  Tom Tromey  <tromey@cygnus.com>
 596
 597         * acconfig.h: New file.
 598         * configure.in: Reverted change of Apr 24; use sinclude again.
 599
 600 Fri Apr 24 14:16:40 1998  Tom Tromey  <tromey@creche>
 601
 602         * configure: Regenerated to track ../common/aclocal.m4 changes.
 603         * config.in: Ditto.
 604
 605 Fri Apr 24 11:19:20 1998  Tom Tromey  <tromey@cygnus.com>
 606
 607         * configure.in: Don't call sinclude.
 608
 609 Fri Apr 24 11:35:01 1998  Andrew Cagney  <cagney@chook.cygnus.com>
 610
 611         * mips.igen (do_store_left): Pass 0 not NULL to store_memory.
 612
 613 Tue Apr 21 11:59:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 614
 615         * mips.igen (ERET): Implement.
 616
 617         * interp.c (decode_coproc): Return sign-extended EPC.
 618
 619         * mips.igen (ANDI, LUI, MFC0): Add tracing code.
 620
 621         * interp.c (signal_exception): Do not ignore Trap.
 622         (signal_exception): On TRAP, restart at exception address.
 623         (HALT_INSTRUCTION, HALT_INSTRUCTION_MASK): Define.
 624         (signal_exception): Update.
 625         (sim_open): Patch V_COMMON interrupt vector with an abort sequence
 626         so that TRAP instructions are caught.
 627
 628 Mon Apr 20 11:26:55 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 629
 630         * sim-main.h (struct hilo_access, struct hilo_history): Define,
 631         contains HI/LO access history.
 632         (struct _sim_cpu): Make hiaccess and loaccess of type hilo_access.
 633         (HIACCESS, LOACCESS): Delete, replace with
 634         (HIHISTORY, LOHISTORY): New macros.
 635         (start-sanitize-r5900):
 636         (struct sim_5900_cpu): Make hi1access, lo1access of type
 637         hilo_access.
 638         (HI1ACCESS, LO1ACCESS): Delete, replace with
 639         (HI1HISTORY, LO1HISTORY): New macros.
 640         (end-sanitize-r5900):
 641         (CHECKHILO): Delete all, moved to mips.igen
 642
 643         * gencode.c (build_instruction): Do not generate checks for
 644         correct HI/LO register usage.
 645
 646         * interp.c (old_engine_run): Delete checks for correct HI/LO
 647         register usage.
 648
 649         * mips.igen (check_mt_hilo, check_mf_hilo, check_op_hilo,
 650         check_mf_cycles): New functions.
 651         (do_mfhi, do_mflo, "mthi", "mtlo", do_ddiv, do_ddivu, do_div,
 652         do_divu, domultx, do_mult, do_multu): Use.
 653
 654         * tx.igen ("madd", "maddu"): Use.
 655         (start-sanitize-r5900):
 656
 657         r5900.igen: Update all HI/LO checks.
 658         ("mfhi1", "mflo1", "mthi1", "mthi1", "pmfhi", "pmflo", "pmfhl",
 659         "pmthi", "pmtlo", "mpthl"): Check MF/MT HI/LO.
 660         ("mult1", "div1", "divu1", "multu1", "madd1", "maddu1", "pdivbw",
 661         "pdivuw", "pdivw", "phmaddh", "phmsubh", "pmaddh", "madduw",
 662         "pmaddw", "pmsubh", "pmsubw", "pmulth", "pmultuw", "pmultw"):
 663         Check HI/LO op.
 664         (end-sanitize-r5900):
 665
 666 start-sanitize-sky
 667 Mon Apr 20 18:39:47 1998  Frank Ch. Eigler  <fche@cygnus.com>
 668
 669         * interp.c (decode_coproc): Correct CMFC2/QMTC2
 670         GPR access.
 671
 672         * r5900.igen (LQ,SQ): Use a pair of 64-bit accesses
 673         instead of a single 128-bit access.
 674
 675 end-sanitize-sky
 676 start-sanitize-sky
 677 Fri Apr 17 14:50:39 1998  Frank Ch. Eigler  <fche@cygnus.com>
 678
 679         * r5900.igen (COP_[LS]Q): Transfer COP2 quadwords.
 680         * interp.c (cop_[ls]q): Fixes corresponding to above.
 681
 682 end-sanitize-sky
 683 start-sanitize-sky
 684 Thu Apr 16 15:24:14 1998  Frank Ch. Eigler  <fche@cygnus.com>
 685
 686         * interp.c (decode_coproc): Adapt COP2 micro interlock to
 687         clarified specs.  Reset "M" bit; exit also on "E" bit.
 688
 689 end-sanitize-sky
 690 start-sanitize-r5900
 691 Thu Apr 16 10:40:29 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 692
 693         * r5900.igen (CFC1, CTC1): Implement R5900 specific version.
 694         * mips.igen (CFC1, CTC1): R5900 des not use generic version.
 695
 696         * r5900.igen (r59fp_unpack): New function.
 697         (r59fp_op1, r59fp_op2, r59fp_op3, C.cond.S, CVT.S.W, DIV.S,
 698         RSQRT.S, SQRT.S): Use.
 699         (r59fp_zero): New function.
 700         (r59fp_overflow): Generate r5900 specific overflow value.
 701         (r59fp_store): Re-write, overflow to MAX_R5900_FP value, underflow
 702         to zero.
 703         (CVT.S.W, CVT.W.S): Exchange implementations.
 704
 705         * sim-main.h (R5900_EXPMAX, R5900_EXPMIN, R5900_EXPBIAS): Defile.
 706
 707 end-sanitize-r5900
 708 start-sanitize-tx19
 709 Thu Apr 16 09:14:44 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 710
 711         * configure.in (tx19, sim_use_gen): Switch to igen.
 712         * configure: Re-build.
 713
 714 end-sanitize-tx19
 715 start-sanitize-sky
 716 Wed Apr 15 12:41:18 1998  Frank Ch. Eigler  <fche@cygnus.com>
 717
 718         * interp.c (decode_coproc): Make COP2 branch code compile after
 719         igen signature changes.
 720
 721 end-sanitize-sky
 722 Wed Apr 15 18:31:54 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 723
 724         * mips.igen (DSRAV): Use function do_dsrav.
 725         (SRAV): Use new function do_srav.
 726
 727         * m16.igen (BEQZ, BNEZ): Compare GPR[TRX] not GPR[RX].
 728         (B): Sign extend 11 bit immediate.
 729         (EXT-B*): Shift 16 bit immediate left by 1.
 730         (ADDIU*): Don't sign extend immediate value.
 731
 732 Wed Apr 15 10:32:15 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 733
 734         * m16run.c (sim_engine_run): Restore CIA after handling an event.
 735
 736 start-sanitize-tx19
 737         * mips.igen (mtc0): Valid tx19 instruction.
 738
 739 end-sanitize-tx19
 740         * sim-main.h (DELAY_SLOT, NULLIFY_NEXT_INSTRUCTION): For IGEN, use
 741         functions.
 742
 743         * mips.igen (delayslot32, nullify_next_insn): New functions.
 744         (m16.igen): Always include.
 745         (do_*): Add more tracing.
 746
 747         * m16.igen (delayslot16): Add NIA argument, could be called by a
 748         32 bit MIPS16 instruction.
 749
 750         * interp.c (ifetch16): Move function from here.
 751         * sim-main.c (ifetch16): To here.
 752
 753         * sim-main.c (ifetch16, ifetch32): Update to match current
 754         implementations of LH, LW.
 755         (signal_exception): Don't print out incorrect hex value of illegal
 756         instruction.
 757
 758 Wed Apr 15 00:17:25 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 759
 760         * m16run.c (sim_engine_run): Use IMEM16 and IMEM32 to fetch an
 761         instruction.
 762
 763         * m16.igen: Implement MIPS16 instructions.
 764
 765         * mips.igen (do_addiu, do_addu, do_and, do_daddiu, do_daddu,
 766         do_ddiv, do_ddivu, do_div, do_divu, do_dmultx, do_dmultu, do_srav,
 767         do_dsubu, do_mfhi, do_mflo, do_mult, do_multu, do_nor, do_or,
 768         do_sll, do_sllv, do_slt, do_slti, do_sltiu, do_sltu, do_sra,
 769         do_srl, do_srlv, do_subu, do_xor, do_xori): New functions.  Move
 770         bodies of corresponding code from 32 bit insn to these.  Also used
 771         by MIPS16 versions of functions.
 772
 773         * sim-main.h (RAIDX, T8IDX, T8, SPIDX): Define.
 774         (IMEM16): Drop NR argument from macro.
 775
 776 start-sanitize-sky
 777 Mon Apr 13 16:28:52 1998  Frank Ch. Eigler  <fche@cygnus.com>
 778
 779         * interp.c (decode_coproc): Add proper 1000000 bit-string at top
 780         of VU lower instruction.
 781
 782 end-sanitize-sky
 783 start-sanitize-sky
 784 Thu Apr  9 16:38:23 1998  Frank Ch. Eigler  <fche@cygnus.com>
 785
 786         * r5900.igen (LQC,SQC): Adapted code to DOUBLEWORD accesses
 787         instead of QUADWORD.
 788
 789         * sim-main.h: Removed attempt at allowing 128-bit access.
 790
 791 end-sanitize-sky
 792 start-sanitize-sky
 793 Wed Apr  8 18:12:13 1998  Frank Ch. Eigler  <fche@cygnus.com>
 794
 795         * Makefile.in (SIM_SKY_OBJS): Added sky-vudis.o.
 796
 797         * interp.c (decode_coproc): Refer to VU CIA as a "special"
 798         register, not as a "misc" register.  Aha.  Add activity
 799         assertions after VCALLMS* instructions.
 800
 801 end-sanitize-sky
 802 start-sanitize-sky
 803 Tue Apr  7 18:32:49 1998  Frank Ch. Eigler  <fche@cygnus.com>
 804
 805         * interp.c (decode_coproc): Do not apply superfluous E (end) flag
 806         to upper code of generated VU instruction.
 807
 808 end-sanitize-sky
 809 start-sanitize-sky
 810 Mon Apr  6 19:55:56 1998  Frank Ch. Eigler  <fche@cygnus.com>
 811
 812         * interp.c (cop_[ls]q): Replaced stub with proper COP2 code.
 813
 814         * sim-main.h (LOADADDRMASK): Redefine to allow 128-bit accesses
 815         for TARGET_SKY.
 816
 817         * r5900.igen (SQC2): Thinko.
 818
 819 end-sanitize-sky
 820 start-sanitize-sky
 821 Sun Apr  5 12:05:44 1998  Frank Ch. Eigler  <fche@cygnus.com>
 822
 823         * interp.c (*): Adapt code to merged VU device & state structs.
 824         (decode_coproc): Execute COP2 each macroinstruction without
 825         pipelining, by stepping VU to completion state.  Adapted to
 826         read_vu_*_reg style of register access.
 827
 828         * mips.igen ([SL]QC2): Removed these COP2 instructions.
 829
 830         * r5900.igen ([SL]QC2): Transplanted these COP2 instructions here.
 831
 832         * sim-main.h (cop_[ls]q): Enclosed in TARGET_SKY guards.
 833
 834 end-sanitize-sky
 835 Sat Apr  4 22:39:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 836
 837         * Makefile.in (SIM_OBJS): Add sim-main.o.
 838
 839         * sim-main.h (address_translation, load_memory, store_memory,
 840         cache_op, sync_operation, prefetch, ifetch32, pending_tick): Mark
 841         as INLINE_SIM_MAIN.
 842         (pr_addr, pr_uword64): Declare.
 843         (sim-main.c): Include when H_REVEALS_MODULE_P.
 844
 845         * interp.c (address_translation, load_memory, store_memory,
 846         cache_op, sync_operation, prefetch, ifetch32, pending_tick): Move
 847         from here.
 848         * sim-main.c: To here. Fix compilation problems.
 849
 850         * configure.in: Enable inlining.
 851         * configure: Re-config.
 852
 853 Sat Apr  4 20:36:25 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 854
 855         * configure: Regenerated to track ../common/aclocal.m4 changes.
 856
 857 Fri Apr  3 04:32:35 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 858
 859         * mips.igen: Include tx.igen.
 860         * Makefile.in (IGEN_INCLUDE): Add tx.igen.
 861         * tx.igen: New file, contains MADD and MADDU.
 862
 863         * interp.c (load_memory): When shifting bytes, use LOADDRMASK not
 864         the hardwired constant `7'.
 865         (store_memory): Ditto.
 866         (LOADDRMASK): Move definition to sim-main.h.
 867
 868         mips.igen (MTC0): Enable for r3900.
 869         (ADDU): Add trace.
 870
 871         mips.igen (do_load_byte): Delete.
 872         (do_load, do_store, do_load_left, do_load_write, do_store_left,
 873         do_store_right): New functions.
 874         (SW*, LW*, SD*, LD*, SH, LH, SB, LB): Use.
 875
 876         configure.in: Let the tx39 use igen again.
 877         configure: Update.
 878
 879 Thu Apr  2 10:59:39 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 880
 881         * interp.c (sim_monitor): get_mem_info returns a 4 byte quantity,
 882         not an address sized quantity.  Return zero for cache sizes.
 883
 884 Wed Apr  1 23:47:53 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 885
 886         * mips.igen (r3900): r3900 does not support 64 bit integer
 887         operations.
 888
 889 start-sanitize-sky
 890 Wed Apr 1 08:20:31 1998  Frank Ch. Eigler  <fche@cygnus.com>
 891
 892         * mips.igen (SQC2/LQC2): Make bodies sky-target-only also.
 893
 894 end-sanitize-sky
 895 start-sanitize-sky
 896 Mon Mar 30 18:41:43 1998  Frank Ch. Eigler  <fche@cygnus.com>
 897
 898         * interp.c (decode_coproc): Continuing COP2 work.
 899         (cop_[ls]q): Make sky-target-only.
 900
 901         * sim-main.h (COP_[LS]Q): Make sky-target-only.
 902 end-sanitize-sky
 903 Mon Mar 30 14:46:05 1998  Gavin Koch  <gavin@cygnus.com>
 904
 905         * configure.in (mipstx39*-*-*): Use gencode simulator rather
 906         than igen one.
 907         * configure : Rebuild.
 908
 909 start-sanitize-sky
 910 Sun Mar 29 17:50:11       Frank Ch. Eigler  <fche@cygnus.com>
 911
 912         * interp.c (decode_coproc): Added a missing TARGET_SKY check
 913         around COP2 implementation skeleton.
 914
 915 end-sanitize-sky
 916 start-sanitize-sky
 917 Fri Mar 27 16:19:29 1998  Frank Ch. Eigler  <fche@cygnus.com>
 918
 919         * Makefile.in (SIM_SKY_OBJS): Replaced sky-vu[01].o with sky-vu.o.
 920
 921         * interp.c (sim_{load,store}_register): Use new vu[01]_device
 922         static to access VU registers.
 923         (decode_coproc): Added skeleton of sky COP2 (VU) instruction
 924         decoding.  Work in progress.
 925
 926         * mips.igen (LDCzz, SDCzz): Removed *5900 case for this
 927         overlapping/redundant bit pattern.
 928         (LQC2, SQC2): Added *5900 COP2 instruction skeleta.  Work in
 929         progress.
 930
 931         * sim-main.h (status_CU[012]): Added COP[n]-enabled flags for
 932         status register.
 933
 934         * interp.c (cop_lq, cop_sq): New functions for future 128-bit
 935         access to coprocessor registers.
 936
 937         * sim-main.h (COP_LQ, COP_SQ): New macro front-ends for above.
 938 end-sanitize-sky
 939 Fri Mar 27 16:15:52 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 940
 941         * configure: Regenerated to track ../common/aclocal.m4 changes.
 942
 943 Fri Mar 27 15:01:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 944
 945         * interp.c (mips_option_handler): Iterate over MAX_NR_PROCESSORS.
 946
 947 Wed Mar 25 16:44:27 1998  Ian Carmichael  <iancarm@cygnus.com>
 948
 949         * configure: Regenerated to track ../common/aclocal.m4 changes.
 950         * config.in: Regenerated to track ../common/aclocal.m4 changes.
 951
 952 Wed Mar 25 12:35:29 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 953
 954         * configure: Regenerated to track ../common/aclocal.m4 changes.
 955
 956 Wed Mar 25 10:05:46 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 957
 958         * interp.c (Max, Min): Comment out functions. Not yet used.
 959
 960 start-sanitize-vr4320
 961 Wed Mar 25 10:04:13 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 962
 963         * vr4320.igen (DCLZ): Pacify GCC, 64 bit arg, int format.
 964
 965 end-sanitize-vr4320
 966 Wed Mar 18 12:38:12 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 967
 968         * configure: Regenerated to track ../common/aclocal.m4 changes.
 969
 970 Tue Mar 17 19:05:20 1998  Frank Ch. Eigler  <fche@cygnus.com>
 971
 972         * Makefile.in (MIPS_EXTRA_LIBS, SIM_EXTRA_LIBS): Added
 973         configurable settings for stand-alone simulator.
 974
 975 start-sanitize-sky
 976         * configure.in: Added --with-sim-gpu2 option to specify path of
 977         sky GPU2 library.  Triggers -DSKY_GPU2 for sky-gpuif.c, and
 978         links/compiles stand-alone simulator with this library.
 979
 980         * interp.c (MEM_SIZE): Increased default sky memory size to 16MB.
 981 end-sanitize-sky
 982         * configure.in: Added X11 search, just in case.
 983
 984         * configure: Regenerated.
 985
 986 Wed Mar 11 14:09:10 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 987
 988         * interp.c (sim_write, sim_read, load_memory, store_memory):
 989         Replace sim_core_*_map with read_map, write_map, exec_map resp.
 990
 991 start-sanitize-vr4320
 992 Tue Mar 10 10:32:22 1998  Gavin Koch  <gavin@cygnus.com>
 993
 994         * vr4320.igen (clz,dclz) : Added.
 995         (dmac): Replaced 99, with LO.
 996
 997 end-sanitize-vr4320
 998 start-sanitize-cygnus
 999 Fri Mar  6 08:30:58 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1000
1001         * mdmx.igen (SHFL.REPA.fmt, SHFL.REPB.fmt): Fix bit fields.
1002
1003 end-sanitize-cygnus
1004 start-sanitize-vr4320
1005 Tue Mar  3 11:56:29 1998  Gavin Koch  <gavin@cygnus.com>
1006
1007         * vr4320.igen: New file.
1008         * Makefile.in (vr4320.igen) : Added.
1009         * configure.in (mips64vr4320-*-*): Added.
1010         * configure : Rebuilt.
1011         * mips.igen : Correct the bfd-names in the mips-ISA model entries.
1012         Add the vr4320 model entry and mark the vr4320 insn as necessary.
1013
1014 end-sanitize-vr4320
1015 Tue Mar  3 13:58:43 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1016
1017         * sim-main.h (GETFCC): Return an unsigned value.
1018
1019 start-sanitize-r5900
1020         * r5900.igen: Use an unsigned array index variable `i'.
1021         (QFSRV): Ditto for variable bytes.
1022
1023 end-sanitize-r5900
1024 Tue Mar  3 13:21:37 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1025
1026         * mips.igen (DIV): Fix check for -1 / MIN_INT.
1027         (DADD): Result destination is RD not RT.
1028
1029 start-sanitize-r5900
1030         * r5900.igen (DIV1): Fix check for -1 / MIN_INT.
1031         (DIVU1): Don't check for MIN_INT / -1 as performing unsigned
1032         divide.
1033
1034 end-sanitize-r5900
1035 Fri Feb 27 13:49:49 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1036
1037         * sim-main.h (HIACCESS, LOACCESS): Always define.
1038
1039         * mdmx.igen (Maxi, Mini): Rename Max, Min.
1040
1041         * interp.c (sim_info): Delete.
1042
1043 Fri Feb 27 18:41:01 1998  Doug Evans  <devans@canuck.cygnus.com>
1044
1045         * interp.c (DECLARE_OPTION_HANDLER): Use it.
1046         (mips_option_handler): New argument `cpu'.
1047         (sim_open): Update call to sim_add_option_table.
1048
1049 Wed Feb 25 18:56:22 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1050
1051         * mips.igen (CxC1): Add tracing.
1052
1053 start-sanitize-r5900
1054 Wed Feb 25 13:59:03 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1055
1056         * r5900.igen (StoreFP): Delete.
1057         (r59fp_store, r59fp_overflow, r59fp_op1, r59fp_op2, r59fp_op3):
1058         New functions.
1059         (rsqrt.s, sqrt.s): Implement.
1060         (r59cond): New function.
1061         (C.COND.S): Call r59cond in assembler line.
1062         (cvt.w.s, cvt.s.w): Implement.
1063
1064         * mips.igen (rsqrt.fmt, sqrt.fmt, cvt.*.*): Remove from r5900
1065         instruction set.
1066
1067         * sim-main.h: Define an enum of r5900 FCSR bit fields.
1068
1069 end-sanitize-r5900
1070 start-sanitize-r5900
1071 Tue Feb 24 14:44:18 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1072
1073         * r5900.igen: Add tracing to all p* instructions.
1074
1075 Tue Feb 24 02:47:33 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1076
1077         * interp.c (sim_store_register, sim_fetch_register): Pull swifty
1078         to get gdb talking to re-aranged sim_cpu register structure.
1079
1080 end-sanitize-r5900
1081 Fri Feb 20 17:43:21 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1082
1083         * sim-main.h (Max, Min): Declare.
1084
1085         * interp.c (Max, Min): New functions.
1086
1087         * mips.igen (BC1): Add tracing.
1088
1089 start-sanitize-cygnus
1090 Fri Feb 20 16:27:17 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1091
1092         * mdmx.igen: Tag all functions as requiring either with mdmx or
1093         vr5400 processor.
1094
1095 end-sanitize-cygnus
1096 start-sanitize-r5900
1097 Fri Feb 20 15:55:51 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1098
1099         * configure.in (SIM_AC_OPTION_FLOAT): For r5900, set FP bit size
1100         to 32.
1101         (SIM_AC_OPTION_BITSIZE): For r5900, set nr address bits to 32.
1102
1103         * mips.igen (C.cond.fmt, ..): Not part of r5900 insn set.
1104
1105         * r5900.igen: Rewrite.
1106
1107         * sim-main.h: Move r5900 registers to a separate _sim_r5900_cpu
1108         struct.
1109         (GPR_SB, GPR_SH, GPR_SW, GPR_SD, GPR_UB, GPR_UH, GPR_UW, GPR_UD):
1110         Define in terms of GPR/GPR1 instead of REGISTERS/REGISTERS.1
1111
1112 end-sanitize-r5900
1113 Thu Feb 19 14:50:00 1998  John Metzler  <jmetzler@cygnus.com>
1114
1115         * interp.c Added memory map for stack in vr4100
1116
1117 Thu Feb 19 10:21:21 1998  Gavin Koch  <gavin@cygnus.com>
1118
1119         * interp.c (load_memory): Add missing "break"'s.
1120
1121 Tue Feb 17 12:45:35 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1122
1123         * interp.c (sim_store_register, sim_fetch_register): Pass in
1124         length parameter.  Return -1.
1125
1126 Tue Feb 10 11:57:40 1998  Ian Carmichael  <iancarm@cygnus.com>
1127
1128         * interp.c: Added hardware init hook, fixed warnings.
1129
1130 Sat Feb  7 17:16:20 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1131
1132         * Makefile.in (itable.h itable.c): Depend on SIM_@sim_gen@_ALL.
1133
1134 Tue Feb  3 11:36:02 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1135
1136         * interp.c (ifetch16): New function.
1137
1138         * sim-main.h (IMEM32): Rename IMEM.
1139         (IMEM16_IMMED): Define.
1140         (IMEM16): Define.
1141         (DELAY_SLOT): Update.
1142
1143         * m16run.c (sim_engine_run): New file.
1144
1145         * m16.igen: All instructions except LB.
1146         (LB): Call do_load_byte.
1147         * mips.igen (do_load_byte): New function.
1148         (LB): Call do_load_byte.
1149
1150         * mips.igen: Move spec for insn bit size and high bit from here.
1151         * Makefile.in (tmp-igen, tmp-m16): To here.
1152
1153         * m16.dc: New file, decode mips16 instructions.
1154
1155         * Makefile.in (SIM_NO_ALL): Define.
1156         (tmp-m16): Generate both 16 bit and 32 bit simulator engines.
1157
1158 start-sanitize-tx19
1159         * m16.igen: Mark all mips16 insns as being part of the tx19 insn
1160         set.
1161
1162 end-sanitize-tx19
1163 Tue Feb  3 11:28:00 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1164
1165         * configure.in (mips_fpu_bitsize): For tx39, restrict floating
1166         point unit to 32 bit registers.
1167         * configure: Re-generate.
1168
1169 Sun Feb  1 15:47:14 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1170
1171         * configure.in (sim_use_gen): Make IGEN the default simulator
1172         generator for generic 32 and 64 bit mips targets.
1173         * configure: Re-generate.
1174
1175 Sun Feb  1 16:52:37 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1176
1177         * sim-main.h (SizeFGR): Determine from floating-point and not gpr
1178         bitsize.
1179
1180         * interp.c (sim_fetch_register, sim_store_register): Read/write
1181         FGR from correct location.
1182         (sim_open): Set size of FGR's according to
1183         WITH_TARGET_FLOATING_POINT_BITSIZE.
1184
1185         * sim-main.h (FGR): Store floating point registers in a separate
1186         array.
1187
1188 Sun Feb  1 16:47:51 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1189
1190         * configure: Regenerated to track ../common/aclocal.m4 changes.
1191
1192 start-sanitize-cygnus
1193         * mdmx.igen: Mark all instructions as 64bit/fp specific.
1194
1195 end-sanitize-cygnus
1196 Tue Feb  3 00:10:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1197
1198         * interp.c (ColdReset): Call PENDING_INVALIDATE.
1199
1200         * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Call PENDING_TICK.
1201
1202         * interp.c (pending_tick): New function.  Deliver pending writes.
1203
1204         * sim-main.h (PENDING_FILL, PENDING_TICK, PENDING_SCHED,
1205         PENDING_BIT, PENDING_INVALIDATE): Re-write pipeline code so that
1206         it can handle mixed sized quantites and single bits.
1207
1208 Mon Feb  2 17:43:15 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1209
1210         * interp.c (oengine.h): Do not include when building with IGEN.
1211         (sim_open): Replace GPRLEN by WITH_TARGET_WORD_BITSIZE.
1212         (sim_info): Ditto for PROCESSOR_64BIT.
1213         (sim_monitor): Replace ut_reg with unsigned_word.
1214         (*): Ditto for t_reg.
1215         (LOADDRMASK): Define.
1216         (sim_open): Remove defunct check that host FP is IEEE compliant,
1217         using software to emulate floating point.
1218         (value_fpr, ...): Always compile, was conditional on HASFPU.
1219
1220 Sun Feb  1 11:15:29 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1221
1222         * sim-main.h (sim_state): Make the cpu array MAX_NR_PROCESSORS in
1223         size.
1224
1225         * interp.c (SD, CPU): Define.
1226         (mips_option_handler): Set flags in each CPU.
1227         (interrupt_event): Assume CPU 0 is the one being iterrupted.
1228         (sim_close): Do not clear STATE, deleted anyway.
1229         (sim_write, sim_read): Assume CPU zero's vm should be used for
1230         data transfers.
1231         (sim_create_inferior): Set the PC for all processors.
1232         (sim_monitor, store_word, load_word, mips16_entry): Add cpu
1233         argument.
1234         (mips16_entry): Pass correct nr of args to store_word, load_word.
1235         (ColdReset): Cold reset all cpu's.
1236         (signal_exception): Pass cpu to sim_monitor & mips16_entry.
1237         (sim_monitor, load_memory, store_memory, signal_exception): Use
1238         `CPU' instead of STATE_CPU.
1239
1240
1241         * sim-main.h: Replace uses of STATE_CPU with CPU. Replace sd with
1242         SD or CPU_.
1243
1244         * sim-main.h (signal_exception): Add sim_cpu arg.
1245         (SignalException*): Pass both SD and CPU to signal_exception.
1246         * interp.c (signal_exception): Update.
1247
1248         * sim-main.h (value_fpr, store_fpr, dotrace, ifetch32), interp.c:
1249         Ditto
1250         (sync_operation, prefetch, cache_op, store_memory, load_memory,
1251         address_translation): Ditto
1252         (decode_coproc, cop_lw, cop_ld, cop_sw, cop_sd): Ditto.
1253
1254 start-sanitize-cygnus
1255         * mdmx.igen (get_scale): Pass CPU_ to semantic_illegal instead of
1256         `sd'.
1257         (ByteAlign): Use StoreFPR, pass args in correct order.
1258
1259 end-sanitize-cygnus
1260 start-sanitize-r5900
1261 Sun Feb  1 10:59:55 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1262
1263         * configure.in (sim_igen_filter): For r5900, configure as SMP.
1264
1265 end-sanitize-r5900
1266 Sat Jan 31 18:15:41 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1267
1268         * configure: Regenerated to track ../common/aclocal.m4 changes.
1269
1270 Sat Jan 31 14:49:24 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1271
1272 start-sanitize-r5900
1273         * configure.in (sim_igen_filter): For r5900, use igen.
1274         * configure: Re-generate.
1275
1276 end-sanitize-r5900
1277         * interp.c (sim_engine_run): Add `nr_cpus' argument.
1278
1279         * mips.igen (model): Map processor names onto BFD name.
1280
1281         * sim-main.h (CPU_CIA): Delete.
1282         (SET_CIA, GET_CIA): Define
1283
1284 Wed Jan 21 16:16:27 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1285
1286         * sim-main.h (GPR_SET): Define, used by igen when zeroing a
1287         regiser.
1288
1289         * configure.in (default_endian): Configure a big-endian simulator
1290         by default.
1291         * configure: Re-generate.
1292
1293 Mon Jan 19 22:26:29 1998  Doug Evans  <devans@seba>
1294
1295         * configure: Regenerated to track ../common/aclocal.m4 changes.
1296
1297 Mon Jan  5 20:38:54 1998  Mark Alexander  <marka@cygnus.com>
1298
1299         * interp.c (sim_monitor): Handle Densan monitor outbyte
1300         and inbyte functions.
1301
1302 1997-12-29  Felix Lee  <flee@cygnus.com>
1303
1304         * interp.c (sim_engine_run): msvc cpp barfs on #if (a==b!=c).
1305
1306 Wed Dec 17 14:48:20 1997  Jeffrey A Law  (law@cygnus.com)
1307
1308         * Makefile.in (tmp-igen): Arrange for $zero to always be
1309         reset to zero after every instruction.
1310
1311 Mon Dec 15 23:17:11 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1312
1313         * configure: Regenerated to track ../common/aclocal.m4 changes.
1314         * config.in: Ditto.
1315
1316 start-sanitize-cygnus
1317 Sat Dec 13 15:18:51 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1318
1319         * vr5400.igen (Low32Bits, High32Bits): Sign extend extracted 32
1320         bit values.
1321
1322 Fri Dec 12 12:26:07 1997  Jeffrey A Law  (law@cygnus.com)
1323
1324         * configure.in (sim_igen_filter): Multi-sim vr5000 - vr5000 or
1325         vr5400 with the vr5000 as the default.
1326
1327 end-sanitize-cygnus
1328 Wed Dec 10 17:10:45 1997  Jeffrey A Law  (law@cygnus.com)
1329
1330         * mips.igen (MSUB): Fix to work like MADD.
1331         * gencode.c (MSUB): Similarly.
1332
1333 start-sanitize-cygnus
1334 Tue Dec  9 12:02:12 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1335
1336         * configure.in (sim_igen_filter): Multi-sim vr5400 - vr5000 or
1337         vr5400.
1338
1339 end-sanitize-cygnus
1340 Thu Dec  4 09:21:05 1997  Doug Evans  <devans@canuck.cygnus.com>
1341
1342         * configure: Regenerated to track ../common/aclocal.m4 changes.
1343
1344 Wed Nov 26 11:00:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1345
1346         * mips.igen (LWC1): Correct assembler - lwc1 not swc1.
1347
1348 start-sanitize-cygnus
1349         * mdmx.igen (value_vr): Correct sim_io_eprintf format argument.
1350         (value_cc, store_cc): Implement.
1351
1352         * sim-main.h: Add 8*3*8 bit accumulator.
1353
1354         * vr5400.igen: Move mdmx instructins from here
1355         * mdmx.igen: To here - new file. Add/fix missing instructions.
1356         * mips.igen: Include mdmx.igen.
1357         * Makefile.in (IGEN_INCLUDE): Add mdmx.igen.
1358
1359 end-sanitize-cygnus
1360 Sun Nov 23 01:45:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1361
1362         * sim-main.h (sim-fpu.h): Include.
1363
1364         * interp.c (convert, SquareRoot, Recip, Divide, Multiply, Sub,
1365         Add, Negate, AbsoluteValue, Equal, Less, Infinity, NaN): Rewrite
1366         using host independant sim_fpu module.
1367
1368 Thu Nov 20 19:56:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1369
1370         * interp.c (signal_exception): Report internal errors with SIGABRT
1371         not SIGQUIT.
1372
1373         * sim-main.h (C0_CONFIG): New register.
1374         (signal.h): No longer include.
1375
1376         * interp.c (decode_coproc): Allow access C0_CONFIG to register.
1377
1378 Tue Nov 18 15:33:48 1997  Doug Evans  <devans@canuck.cygnus.com>
1379
1380         * Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS).
1381
1382 Fri Nov 14 11:56:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1383
1384         * mips.igen: Tag vr5000 instructions.
1385         (ANDI): Was missing mipsIV model, fix assembler syntax.
1386         (do_c_cond_fmt): New function.
1387         (C.cond.fmt): Handle mips I-III which do not support CC field
1388         separatly.
1389         (bc1): Handle mips IV which do not have a delaed FCC separatly.
1390         (SDR): Mask paddr when BigEndianMem, not the converse as specified
1391         in IV3.2 spec.
1392         (DMULT, DMULTU): Force use of hosts 64bit multiplication.  Handle
1393         vr5000 which saves LO in a GPR separatly.
1394
1395         * configure.in (enable-sim-igen): For vr5000, select vr5000
1396         specific instructions.
1397         * configure: Re-generate.
1398
1399 Wed Nov 12 14:42:52 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1400
1401         * Makefile.in (SIM_OBJS): Add sim-fpu module.
1402
1403         * interp.c (store_fpr), sim-main.h: Add separate fmt_uninterpreted_32 and
1404         fmt_uninterpreted_64 bit cases to switch.  Convert to
1405         fmt_formatted,
1406
1407         * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Define,
1408
1409         * mips.igen (SWR): Mask paddr when BigEndianMem, not the converse
1410         as specified in IV3.2 spec.
1411         (MTC1, DMTC1): Call StoreFPR to store the GPR in the FPR.
1412
1413 Tue Nov 11 12:38:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1414
1415         * mips.igen: Delay slot branches add OFFSET to NIA not CIA.
1416         (MFC0, MTC0, SWC1, LWC1, SDC1, LDC1): Implement.
1417         (start-sanitize-r5900):
1418         (LWXC1, SWXC1): Delete from r5900 instruction set.
1419         (end-sanitize-r5900):
1420         (MTC1, MFC1, DMTC1, DMFC1, CFC1, CTC1): Implement separate non
1421         PENDING_FILL versions of instructions.  Simplify.
1422         (X): New function.
1423         (MULT, MULTU): Implement separate RD==0 and RD!=0 versions of
1424         instructions.
1425         (BEQZ, ..., SLT, SLTI, TLT, TLE, TLI, ...): Explicitly cast GPR to
1426         a signed value.
1427         (MTHI, MFHI): Disable code checking HI-LO.
1428
1429         * sim-main.h (dotrace,tracefh), interp.c: Make dotrace & tracefh
1430         global.
1431         (NULLIFY_NEXT_INSTRUCTION): Call dotrace.
1432
1433 Thu Nov  6 16:36:35 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1434
1435         * gencode.c (build_mips16_operands): Replace IPC with cia.
1436
1437         * interp.c (sim_monitor, signal_exception, cache_op, store_fpr,
1438         value_fpr, cop_ld, cop_lw, cop_sw, cop_sd, decode_coproc): Replace
1439         IPC to `cia'.
1440         (UndefinedResult): Replace function with macro/function
1441         combination.
1442         (sim_engine_run): Don't save PC in IPC.
1443
1444         * sim-main.h (IPC): Delete.
1445
1446         start-sanitize-cygnus
1447         * vr5400.igen (vr): Add missing cia argument to value_fpr.
1448         (do_select): Rename function select.
1449         end-sanitize-cygnus
1450
1451         * interp.c (signal_exception, store_word, load_word,
1452         address_translation, load_memory, store_memory, cache_op,
1453         prefetch, sync_operation, ifetch, value_fpr, store_fpr, convert,
1454         cop_lw, cop_ld, cop_sw, cop_sd, decode_coproc, sim_monitor): Add
1455         current instruction address - cia - argument.
1456         (sim_read, sim_write): Call address_translation directly.
1457         (sim_engine_run): Rename variable vaddr to cia.
1458         (signal_exception): Pass cia to sim_monitor
1459
1460         * sim-main.h (SignalException, LoadWord, StoreWord, CacheOp,
1461         Prefetch, SyncOperation, ValueFPR, StoreFPR, Convert, COP_LW,
1462         COP_LD, COP_SW, COP_SD, DecodeCoproc): Update.
1463
1464         * sim-main.h (SignalExceptionSimulatorFault): Delete definition.
1465         * interp.c (sim_open): Replace SignalExceptionSimulatorFault with
1466         SIM_ASSERT.
1467
1468         * interp.c (signal_exception): Pass restart address to
1469         sim_engine_restart.
1470
1471         * Makefile.in (semantics.o, engine.o, support.o, itable.o,
1472         idecode.o): Add dependency.
1473
1474         * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESUME_HOOK):
1475         Delete definitions
1476         (DELAY_SLOT): Update NIA not PC with branch address.
1477         (NULLIFY_NEXT_INSTRUCTION): Set NIA to instruction after next.
1478
1479         * mips.igen: Use CIA not PC in branch calculations.
1480         (illegal): Call SignalException.
1481         (BEQ, ADDIU): Fix assembler.
1482
1483 Wed Nov  5 12:19:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1484
1485         * m16.igen (JALX): Was missing.
1486
1487         * configure.in (enable-sim-igen): New configuration option.
1488         * configure: Re-generate.
1489
1490         * sim-main.h (MAX_INSNS, INSN_NAME): Define.
1491
1492         * interp.c (load_memory, store_memory): Delete parameter RAW.
1493         (sim_read, sim_write): Use sim_core_{read,write}_buffer directly
1494         bypassing {load,store}_memory.
1495
1496         * sim-main.h (ByteSwapMem): Delete definition.
1497
1498         * Makefile.in (SIM_OBJS): Add sim-memopt module.
1499
1500         * interp.c (sim_do_command, sim_commands): Delete mips specific
1501         commands.  Handled by module sim-options.
1502
1503         * sim-main.h (SIM_HAVE_FLATMEM): Undefine, use sim-core.o module.
1504         (WITH_MODULO_MEMORY): Define.
1505
1506         * interp.c (sim_info): Delete code printing memory size.
1507
1508         * interp.c (mips_size): Nee sim_size, delete function.
1509         (power2): Delete.
1510         (monitor, monitor_base, monitor_size): Delete global variables.
1511         (sim_open, sim_close): Delete code creating monitor and other
1512         memory regions.  Use sim-memopts module, via sim_do_commandf, to
1513         manage memory regions.
1514         (load_memory, store_memory): Use sim-core for memory model.
1515
1516         * interp.c (address_translation): Delete all memory map code
1517         except line forcing 32 bit addresses.
1518
1519 Wed Nov  5 11:21:11 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1520
1521         * sim-main.h (WITH_TRACE): Delete definition.  Enables common
1522         trace options.
1523
1524         * interp.c (logfh, logfile): Delete globals.
1525         (sim_open, sim_close): Delete code opening & closing log file.
1526         (mips_option_handler): Delete -l and -n options.
1527         (OPTION mips_options): Ditto.
1528
1529         * interp.c (OPTION mips_options): Rename option trace to dinero.
1530         (mips_option_handler): Update.
1531
1532 Wed Nov  5 09:35:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1533
1534         * interp.c (fetch_str): New function.
1535         (sim_monitor): Rewrite using sim_read & sim_write.
1536         (sim_open): Check magic number.
1537         (sim_open): Write monitor vectors into memory using sim_write.
1538         (MONITOR_BASE, MONITOR_SIZE, MEM_SIZE): Define.
1539         (sim_read, sim_write): Simplify - transfer data one byte at a
1540         time.
1541         (load_memory, store_memory): Clarify meaning of parameter RAW.
1542
1543         * sim-main.h (isHOST): Defete definition.
1544         (isTARGET): Mark as depreciated.
1545         (address_translation): Delete parameter HOST.
1546
1547         * interp.c (address_translation): Delete parameter HOST.
1548
1549 start-sanitize-tx49
1550 Wed Oct 29 14:21:32 1997  Gavin Koch  <gavin@cygnus.com>
1551
1552         * gencode.c: Add tx49 configury and insns.
1553         * configure.in: Add tx49 configury.
1554         * configure: Update.
1555
1556 end-sanitize-tx49
1557 Wed Oct 29 11:13:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1558
1559         * mips.igen:
1560
1561         * Makefile.in (IGEN_INCLUDE): Files included by mips.igen.
1562         (tmp-igen, tmp-m16): Depend on IGEN_INCLUDE.
1563
1564 Tue Oct 28 11:06:47 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1565
1566         * mips.igen: Add model filter field to records.
1567
1568 Mon Oct 27 17:53:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1569
1570         * Makefile.in (SIM_NO_CFLAGS): Define.  Define WITH_IGEN=0.
1571
1572         interp.c (sim_engine_run): Do not compile function sim_engine_run
1573         when WITH_IGEN == 1.
1574
1575         * configure.in (sim_igen_flags, sim_m16_flags): Set according to
1576         target architecture.
1577
1578         Makefile.in (tmp-igen, tmp-m16): Drop -F and -M options to
1579         igen. Replace with configuration variables sim_igen_flags /
1580         sim_m16_flags.
1581
1582         start-sanitize-r5900
1583         * r5900.igen: New file. Copy r5900 insns here.
1584         end-sanitize-r5900
1585         start-sanitize-cygnus
1586         * vr5400.igen: New file.
1587         end-sanitize-cygnus
1588         * m16.igen: New file.  Copy mips16 insns here.
1589         * mips.igen: From here.
1590
1591 Mon Oct 27 13:53:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1592
1593         start-sanitize-cygnus
1594         * mips.igen: Tag all mipsIV instructions with vr5400 model.
1595
1596         * configure.in: Add mips64vr5400 target.
1597         * configure: Re-generate.
1598
1599         end-sanitize-cygnus
1600         * Makefile.in (SIM_NO_OBJ): Define, move SIM_M16_OBJ, SIM_IGEN_OBJ
1601         to top.
1602         (tmp-igen, tmp-m16): Pass -I srcdir to igen.
1603
1604 Sat Oct 25 16:51:40 1997  Gavin Koch  <gavin@cygnus.com>
1605
1606         * gencode.c (build_instruction): Follow sim_write's lead in using
1607         BigEndianMem instead of !ByteSwapMem.
1608
1609 Fri Oct 24 17:41:49 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1610
1611         * configure.in (sim_gen): Dependent on target, select type of
1612         generator.  Always select old style generator.
1613
1614         configure: Re-generate.
1615
1616         Makefile.in (tmp-igen, tmp-m16, clean-m16, clean-igen): New
1617         targets.
1618         (SIM_M16_CFLAGS, SIM_M16_ALL, SIM_M16_OBJ, BUILT_SRC_FROM_M16,
1619         SIM_IGEN_CFLAGS, SIM_IGEN_ALL, SIM_IGEN_OBJ, BUILT_SRC_FROM_IGEN,
1620         IGEN_TRACE, IGEN_INSN, IGEN_DC): Define
1621         (SIM_EXTRA_CFLAGS, SIM_EXTRA_ALL, SIM_OBJS): Add member
1622         SIM_@sim_gen@_*, set by autoconf.
1623
1624 Wed Oct 22 12:52:06 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1625
1626         * sim-main.h (NULLIFY_NEXT_INSTRUCTION, DELAY_SLOT): Define.
1627
1628         * interp.c (ColdReset): Remove #ifdef HASFPU, check
1629         CURRENT_FLOATING_POINT instead.
1630
1631         * interp.c (ifetch32): New function. Fetch 32 bit instruction.
1632         (address_translation): Raise exception InstructionFetch when
1633         translation fails and isINSTRUCTION.
1634
1635         * interp.c (sim_open, sim_write, sim_monitor, store_word,
1636         sim_engine_run): Change type of of vaddr and paddr to
1637         address_word.
1638         (address_translation, prefetch, load_memory, store_memory,
1639         cache_op): Change type of vAddr and pAddr to address_word.
1640
1641         * gencode.c (build_instruction): Change type of vaddr and paddr to
1642         address_word.
1643
1644 Mon Oct 20 15:29:04 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1645
1646         * sim-main.h (ALU64_END, ALU32_END): Use ALU*_OVERFLOW_RESULT
1647         macro to obtain result of ALU op.
1648
1649 Tue Oct 21 17:39:14 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1650
1651         * interp.c (sim_info): Call profile_print.
1652
1653 Mon Oct 20 13:31:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1654
1655         * Makefile.in (SIM_OBJS): Add sim-profile.o module.
1656
1657         * sim-main.h (WITH_PROFILE): Do not define, defined in
1658         common/sim-config.h.  Use sim-profile module.
1659         (simPROFILE): Delete defintion.
1660
1661         * interp.c (PROFILE): Delete definition.
1662         (mips_option_handler): Delete 'p', 'y' and 'x' profile options.
1663         (sim_close): Delete code writing profile histogram.
1664         (mips_set_profile, mips_set_profile_size, writeout16, writeout32):
1665         Delete.
1666         (sim_engine_run): Delete code profiling the PC.
1667
1668 Mon Oct 20 13:31:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1669
1670         * sim-main.h (SIGNEXTEND): Force type of result to unsigned_word.
1671
1672         * interp.c (sim_monitor): Make register pointers of type
1673         unsigned_word*.
1674
1675         * sim-main.h: Make registers of type unsigned_word not
1676         signed_word.
1677
1678 Thu Oct 16 10:31:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1679
1680 start-sanitize-r5900
1681         * sim-main.h (BYTES_IN_MMI_REGS, ..., SUB_REG_FETCH, ..., GPR_SB,
1682         ...): Move to sim-main.h
1683
1684 end-sanitize-r5900
1685         * interp.c (sync_operation): Rename from SyncOperation, make
1686         global, add SD argument.
1687         (prefetch): Rename from Prefetch, make global, add SD argument.
1688         (decode_coproc): Make global.
1689
1690         * sim-main.h (SyncOperation, DecodeCoproc, Pefetch): Define.
1691
1692         * gencode.c (build_instruction): Generate DecodeCoproc not
1693         decode_coproc calls.
1694
1695         * interp.c (SETFCC, GETFCC, PREVCOC1): Move to sim-main.h
1696         (SizeFGR): Move to sim-main.h
1697         (simHALTEX, simHALTIN, simTRACE, simPROFILE, simDELAYSLOT,
1698         simSIGINT, simJALDELAYSLOT): Move to sim-main.h
1699         (FP_FLAGS, FP_ENABLE, FP_CAUSE, IR, UF, OF, DZ, IO, UO): Move to
1700         sim-main.h.
1701         (FP_FS, FP_MASK_RM, FP_SH_RM, FP_RM_NEAREST, FP_RM_TOPINF,
1702         FP_RM_TOMINF, GETRM): Move to sim-main.h.
1703         (Uncached, CachedNoncoherent, CachedCoherent, Cached,
1704         isINSTRUCTION, ..., AccessLength_BYTE, ...): Move to sim-main.h.
1705         (UserMode, BigEndianMem, ByteSwapMem, ReverseEndian,
1706         BigEndianCPU, status_KSU_mask, ...). Moved to sim-main.h
1707
1708         * sim-main.h (ALU32_END, ALU64_END): Define. When overflow raise
1709         exception.
1710         (sim-alu.h): Include.
1711         (NULLIFY_NIA, NULL_CIA, CPU_CIA): Define.
1712         (sim_cia): Typedef to instruction_address.
1713
1714 Thu Oct 16 10:31:41 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1715
1716         * Makefile.in (interp.o): Rename generated file engine.c to
1717         oengine.c.
1718
1719         * interp.c: Update.
1720
1721 Thu Oct 16 10:31:40 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1722
1723         * gencode.c (build_instruction): Use FPR_STATE not fpr_state.
1724
1725 Thu Oct 16 10:31:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1726
1727         * gencode.c (build_instruction): For "FPSQRT", output correct
1728         number of arguments to Recip.
1729
1730 Tue Oct 14 17:38:18 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1731
1732         * Makefile.in (interp.o): Depends on sim-main.h
1733
1734         * interp.c (mips16_entry, ColdReset,dotrace): Add SD argument. Use GPR not registers.
1735
1736         * sim-main.h (sim_cpu): Add registers, register_widths, fpr_state,
1737         ipc, dspc, pending_*, hiaccess, loaccess, state, dsstate fields.
1738         (REGISTERS, REGISTER_WIDTHS, FPR_STATE, IPC, DSPC, PENDING_*,
1739         STATE, DSSTATE): Define
1740         (GPR, FGRIDX, ..): Define.
1741
1742         * interp.c (registers, register_widths, fpr_state, ipc, dspc,
1743         pending_*, hiaccess, loaccess, state, dsstate): Delete globals.
1744         (GPR, FGRIDX, ...): Delete macros.
1745
1746         * interp.c: Update names to match defines from sim-main.h
1747
1748 Tue Oct 14 15:11:45 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1749
1750         * interp.c (sim_monitor): Add SD argument.
1751         (sim_warning): Delete.  Replace calls with calls to
1752         sim_io_eprintf.
1753         (sim_error): Delete. Replace calls with sim_io_error.
1754         (open_trace, writeout32, writeout16, getnum): Add SD argument.
1755         (mips_set_profile): Rename from sim_set_profile. Add SD argument.
1756         (mips_set_profile_size): Rename from sim_set_profile_size. Add SD
1757         argument.
1758         (mips_size): Rename from sim_size. Add SD argument.
1759
1760         * interp.c (simulator): Delete global variable.
1761         (callback): Delete global variable.
1762         (mips_option_handler, sim_open, sim_write, sim_read,
1763         sim_store_register, sim_fetch_register, sim_info, sim_do_command,
1764         sim_size,sim_monitor): Use sim_io_* not callback->*.
1765         (sim_open): ZALLOC simulator struct.
1766         (PROFILE): Do not define.
1767
1768 Tue Oct 14 13:35:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1769
1770         * interp.c (sim_open), support.h: Replace CHECKSIM macro found in
1771         support.h with corresponding code.
1772
1773         * sim-main.h (word64, uword64), support.h: Move definition to
1774         sim-main.h.
1775         (WORD64LO, WORD64HI, SET64LO, SET64HI, WORD64, UWORD64): Ditto.
1776
1777         * support.h: Delete
1778         * Makefile.in: Update dependencies
1779         * interp.c: Do not include.
1780
1781 Tue Oct 14 13:35:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1782
1783         * interp.c (address_translation, load_memory, store_memory,
1784         cache_op): Rename to from AddressTranslation et.al., make global,
1785         add SD argument
1786
1787         * sim-main.h (AddressTranslation, LoadMemory, StoreMemory,
1788         CacheOp): Define.
1789
1790         * interp.c (SignalException): Rename to signal_exception, make
1791         global.
1792
1793         * interp.c (Interrupt, ...): Move definitions to sim-main.h.
1794
1795         * sim-main.h (SignalException, SignalExceptionInterrupt,
1796         SignalExceptionInstructionFetch, SignalExceptionAddressStore,
1797         SignalExceptionAddressLoad, SignalExceptionSimulatorFault,
1798         SignalExceptionIntegerOverflow, SignalExceptionCoProcessorUnusable):
1799         Define.
1800
1801         * interp.c, support.h: Use.
1802
1803 Tue Oct 14 13:19:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1804
1805         * interp.c (ValueFPR, StoreFPR), sim-main.h: Make global, rename
1806         to value_fpr / store_fpr. Add SD argument.
1807         (NaN, Infinity, Less, Equal, AbsoluteValue, Negate, Add, Sub,
1808         Multiply, Divide, Recip, SquareRoot, Convert): Make global.
1809
1810         * sim-main.h (ValueFPR, StoreFPR): Define.
1811
1812 Tue Oct 14 13:06:55 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1813
1814         * interp.c (sim_engine_run): Check consistency between configure
1815         WITH_TARGET_WORD_BITSIZE and WITH_FLOATING_POINT and gensim GPRLEN
1816         and HASFPU.
1817
1818         * configure.in (mips_bitsize): Configure WITH_TARGET_WORD_BITSIZE.
1819         (mips_fpu): Configure WITH_FLOATING_POINT.
1820         (mips_endian): Configure WITH_TARGET_ENDIAN.
1821         * configure: Update.
1822
1823 Fri Oct  3 09:28:00 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1824
1825         * configure: Regenerated to track ../common/aclocal.m4 changes.
1826
1827 start-sanitize-r5900
1828 Mon Aug 25 19:11:15 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1829
1830         * interp.c (MAX_REG): Allow up-to 128 registers.
1831         (LO1, HI1): Define value that matches REGISTER_NAMES in gdb.
1832         (REGISTER_SA): Ditto.
1833         (sim_open): Initialize register_widths for r5900 specific
1834         registers.
1835         (sim_fetch_register, sim_store_register): Check for request of
1836         r5900 specific SA register.  Check for request for hi 64 bits of
1837         r5900 specific registers.
1838
1839 end-sanitize-r5900
1840 Mon Sep 29 14:45:00 1997  Bob Manson  <manson@charmed.cygnus.com>
1841
1842         * configure: Regenerated.
1843
1844 Fri Sep 26 12:48:18 1997  Mark Alexander  <marka@cygnus.com>
1845
1846         * interp.c: Allow Debug, DEPC, and EPC registers to be examined in GDB.
1847
1848 Thu Sep 25 11:15:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1849
1850         * gencode.c (print_igen_insn_models): Assume certain architectures
1851         include all mips* instructions.
1852         (print_igen_insn_format): Use data_size==-1 as marker for MIPS16
1853         instruction.
1854
1855         * Makefile.in (tmp.igen): Add target. Generate igen input from
1856         gencode file.
1857
1858         * gencode.c (FEATURE_IGEN): Define.
1859         (main): Add --igen option.  Generate output in igen format.
1860         (process_instructions): Format output according to igen option.
1861         (print_igen_insn_format): New function.
1862         (print_igen_insn_models): New function.
1863         (process_instructions): Only issue warnings and ignore
1864         instructions when no FEATURE_IGEN.
1865
1866 Wed Sep 24 17:38:57 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1867
1868         * interp.c (COP_SD, COP_LD): Add UNUSED to pacify GCC for some
1869         MIPS targets.
1870
1871 Tue Sep 23 11:04:38 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1872
1873         * configure: Regenerated to track ../common/aclocal.m4 changes.
1874
1875 Tue Sep 23 10:19:51 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1876
1877         * Makefile.in (SIM_ALIGNMENT, SIM_ENDIAN, SIM_HOSTENDIAN,
1878         SIM_RESERVED_BITS): Delete, moved to common.
1879         (SIM_EXTRA_CFLAGS): Update.
1880
1881 Mon Sep 22 11:46:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1882
1883         * configure.in: Configure non-strict memory alignment.
1884         * configure: Regenerated to track ../common/aclocal.m4 changes.
1885
1886 Fri Sep 19 17:45:25 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1887
1888         * configure: Regenerated to track ../common/aclocal.m4 changes.
1889
1890 Sat Sep 20 14:07:28 1997  Gavin Koch  <gavin@cygnus.com>
1891
1892         * gencode.c (SDBBP,DERET): Added (3900) insns.
1893         (RFE): Turn on for 3900.
1894         * interp.c (DebugBreakPoint,DEPC,Debug,Debug_*): Added.
1895         (dsstate): Made global.
1896         (SUBTARGET_R3900): Added.
1897         (CANCELDELAYSLOT): New.
1898         (SignalException): Ignore SystemCall rather than ignore and
1899         terminate.  Add DebugBreakPoint handling.
1900         (decode_coproc): New insns RFE, DERET; and new registers Debug
1901         and DEPC protected by SUBTARGET_R3900.
1902         (sim_engine_run): Use CANCELDELAYSLOT rather than clearing
1903         bits explicitly.
1904         * Makefile.in,configure.in: Add mips subtarget option.
1905         * configure: Update.
1906
1907 Fri Sep 19 09:33:27 1997  Gavin Koch  <gavin@cygnus.com>
1908
1909         * gencode.c: Add r3900 (tx39).
1910
1911 start-sanitize-tx19
1912         * gencode.c: Fix some configuration problems by improving
1913         the relationship between tx19 and tx39.
1914 end-sanitize-tx19
1915
1916 Tue Sep 16 15:52:04 1997  Gavin Koch  <gavin@cygnus.com>
1917
1918         * gencode.c (build_instruction): Don't need to subtract 4 for
1919         JALR, just 2.
1920
1921 Tue Sep 16 11:32:28 1997  Gavin Koch  <gavin@cygnus.com>
1922
1923         * interp.c: Correct some HASFPU problems.
1924
1925 Mon Sep 15 17:36:15 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1926
1927         * configure: Regenerated to track ../common/aclocal.m4 changes.
1928
1929 Fri Sep 12 12:01:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1930
1931         * interp.c (mips_options): Fix samples option short form, should
1932         be `x'.
1933
1934 Thu Sep 11 09:35:29 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1935
1936         * interp.c (sim_info): Enable info code.  Was just returning.
1937
1938 Tue Sep  9 17:30:57 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1939
1940         * interp.c (decode_coproc): Clarify warning about unsuported MTC0,
1941         MFC0.
1942
1943 Tue Sep  9 16:28:28 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1944
1945         * gencode.c (build_instruction): Use SIGNED64 for 64 bit
1946         constants.
1947         (build_instruction): Ditto for LL.
1948
1949 start-sanitize-tx19
1950 Sun Sep  7 16:05:46 1997  Gavin Koch  <gavin@cygnus.com>
1951
1952         * mips/configure.in, mips/gencode: Add tx19/r1900.
1953
1954 end-sanitize-tx19
1955 Thu Sep  4 17:21:23 1997  Doug Evans  <dje@seba>
1956
1957         * configure: Regenerated to track ../common/aclocal.m4 changes.
1958
1959 start-sanitize-r5900
1960 Mon Sep  1 18:43:30 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1961
1962         * gencode.c (build_instruction): For "pabsw" and "pabsh", check
1963         for overflow due to ABS of MININT, set result to MAXINT.
1964         (build_instruction): For "psrlvw", signextend bit 31.
1965
1966 end-sanitize-r5900
1967 Wed Aug 27 18:13:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1968
1969         * configure: Regenerated to track ../common/aclocal.m4 changes.
1970         * config.in: Ditto.
1971
1972 Wed Aug 27 14:12:27 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1973
1974         * interp.c (sim_open): Add call to sim_analyze_program, update
1975         call to sim_config.
1976
1977 Tue Aug 26 10:40:07 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1978
1979         * interp.c (sim_kill): Delete.
1980         (sim_create_inferior): Add ABFD argument. Set PC from same.
1981         (sim_load): Move code initializing trap handlers from here.
1982         (sim_open): To here.
1983         (sim_load): Delete, use sim-hload.c.
1984
1985         * Makefile.in (SIM_OBJS): Add sim-hload.o module.
1986
1987 Mon Aug 25 17:50:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1988
1989         * configure: Regenerated to track ../common/aclocal.m4 changes.
1990         * config.in: Ditto.
1991
1992 Mon Aug 25 15:59:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1993
1994         * interp.c (sim_open): Add ABFD argument.
1995         (sim_load): Move call to sim_config from here.
1996         (sim_open): To here.  Check return status.
1997
1998 start-sanitize-r5900
1999         * gencode.c (build_instruction): Do not define x8000000000000000,
2000         x7FFFFFFFFFFFFFFF, or xFFFFFFFF80000000.
2001
2002 end-sanitize-r5900
2003 start-sanitize-r5900
2004 Mon Jul 28 19:49:29 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2005
2006         * gencode.c (build_instruction): For "pdivw", "pdivbw" and
2007         "pdivuw" check for overflow due to signed divide by -1.
2008
2009 end-sanitize-r5900
2010 Fri Jul 25 15:00:45 1997  Gavin Koch  <gavin@cygnus.com>
2011
2012         * gencode.c (build_instruction): Two arg MADD should
2013         not assign result to $0.
2014
2015 start-sanitize-r5900
2016 Thu Jul 10 11:58:48 1997  Andrew Cagney  <cagney@critters.cygnus.com>
2017
2018         * gencode.c (build_instruction): For "ppac5" use unsigned
2019         arrithmetic so that the sign bit doesn't smear when right shifted.
2020         (build_instruction): For "pdiv" perform sign extension when
2021         storing results in HI and LO.
2022         (build_instructions): For "pdiv" and "pdivbw" check for
2023         divide-by-zero.
2024         (build_instruction): For "pmfhl.slw" update hi part of dest
2025         register as well as low part.
2026         (build_instruction): For "pmfhl" portably handle long long values.
2027         (build_instruction): For "pmfhl.sh" correctly negative values.
2028         Store half words 2 and three in the correct place.
2029         (build_instruction): For "psllvw", sign extend value after shift.
2030
2031 end-sanitize-r5900
2032 Thu Jun 26 12:13:17 1997  Angela Marie Thomas (angela@cygnus.com)
2033
2034         * sim/mips/configure: Change default_sim_endian to 0 (bi-endian)
2035         * sim/mips/configure.in: Regenerate.
2036
2037 Wed Jul  9 10:29:21 1997  Andrew Cagney  <cagney@critters.cygnus.com>
2038
2039         * interp.c (SUB_REG_UW, SUB_REG_SW, SUB_REG_*): Use more explicit
2040         signed8, unsigned8 et.al. types.
2041
2042 start-sanitize-r5900
2043         * gencode.c (build_instruction): For PMULTU* do not sign extend
2044         registers.  Make generated code easier to debug.
2045
2046 end-sanitize-r5900
2047         * interp.c (SUB_REG_FETCH): Handle both little and big endian
2048         hosts when selecting subreg.
2049
2050 start-sanitize-r5900
2051 Tue Jul  8 18:07:20 1997  Andrew Cagney  <cagney@andros.cygnus.com>
2052
2053         * gencode.c (type_for_data_len): For 32bit operations concerned
2054         with overflow, perform op using 64bits.
2055         (build_instruction): For PADD, always compute operation using type
2056         returned by type_for_data_len.
2057         (build_instruction): For PSUBU, when overflow, saturate to zero as
2058         actually underflow.
2059
2060 end-sanitize-r5900
2061 Wed Jul  2 11:54:10 1997  Jeffrey A Law  (law@cygnus.com)
2062
2063 start-sanitize-r5900
2064         * gencode.c (build_instruction): Handle "pext5" according to
2065         version 1.95 of the r5900 ISA.
2066
2067         * gencode.c (build_instruction): Handle "ppac5" according to
2068         version 1.95 of the r5900 ISA.
2069
2070 end-sanitize-r5900
2071         * interp.c (sim_engine_run): Reset the ZERO register to zero
2072         regardless of FEATURE_WARN_ZERO.
2073         * gencode.c (FEATURE_WARNINGS): Remove FEATURE_WARN_ZERO.
2074
2075 Wed Jun  4 10:43:14 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2076
2077         * interp.c (decode_coproc): Implement MTC0 N, CAUSE.
2078         (SignalException): For BreakPoints ignore any mode bits and just
2079         save the PC.
2080         (SignalException): Always set the CAUSE register.
2081
2082 Tue Jun  3 05:00:33 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2083
2084         * interp.c (SignalException): Clear the simDELAYSLOT flag when an
2085         exception has been taken.
2086
2087         * interp.c: Implement the ERET and mt/f sr instructions.
2088
2089 start-sanitize-r5900
2090 Mon Jun  2 23:28:19 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2091
2092         * gencode.c (build_instruction): For paddu, extract unsigned
2093         sub-fields.
2094
2095         * gencode.c (build_instruction): Saturate padds instead of padd
2096         instructions.
2097
2098 end-sanitize-r5900
2099 Sat May 31 00:44:16 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2100
2101         * interp.c (SignalException): Don't bother restarting an
2102         interrupt.
2103
2104 Fri May 30 23:41:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2105
2106         * interp.c (SignalException): Really take an interrupt.
2107         (interrupt_event): Only deliver interrupts when enabled.
2108
2109 Tue May 27 20:08:06 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2110
2111         * interp.c (sim_info): Only print info when verbose.
2112         (sim_info) Use sim_io_printf for output.
2113
2114 Tue May 27 14:22:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2115
2116         * interp.c (CoProcPresent): Add UNUSED attribute - not used by all
2117         mips architectures.
2118
2119 Tue May 27 14:22:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2120
2121         * interp.c (sim_do_command): Check for common commands if a
2122         simulator specific command fails.
2123
2124 Thu May 22 09:32:03 1997  Gavin Koch  <gavin@cygnus.com>
2125
2126         * interp.c (sim_engine_run): ifdef out uses of simSTOP, simSTEP
2127         and simBE when DEBUG is defined.
2128
2129 Wed May 21 09:08:10 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2130
2131         * interp.c (interrupt_event): New function.  Pass exception event
2132         onto exception handler.
2133
2134         * configure.in: Check for stdlib.h.
2135         * configure: Regenerate.
2136
2137         * gencode.c (build_instruction): Add UNUSED attribute to tempS
2138         variable declaration.
2139         (build_instruction): Initialize memval1.
2140         (build_instruction): Add UNUSED attribute to byte, bigend,
2141         reverse.
2142         (build_operands): Ditto.
2143
2144         * interp.c: Fix GCC warnings.
2145         (sim_get_quit_code): Delete.
2146
2147         * configure.in: Add INLINE, ENDIAN, HOSTENDIAN and WARNINGS.
2148         * Makefile.in: Ditto.
2149         * configure: Re-generate.
2150
2151         * Makefile.in (SIM_OBJS): Add sim-watch.o module.
2152
2153 Tue May 20 15:08:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2154
2155         * interp.c (mips_option_handler): New function parse argumes using
2156         sim-options.
2157         (myname): Replace with STATE_MY_NAME.
2158         (sim_open): Delete check for host endianness - performed by
2159         sim_config.
2160         (simHOSTBE, simBE): Delete, replaced by sim-endian flags.
2161         (sim_open): Move much of the initialization from here.
2162         (sim_load): To here.  After the image has been loaded and
2163         endianness set.
2164         (sim_open): Move ColdReset from here.
2165         (sim_create_inferior): To here.
2166         (sim_open): Make FP check less dependant on host endianness.
2167
2168         * Makefile.in (SIM_RUN_OBJS): Set to nrun.o - use new version or
2169         run.
2170         * interp.c (sim_set_callbacks): Delete.
2171
2172         * interp.c (membank, membank_base, membank_size): Replace with
2173         STATE_MEMORY, STATE_MEM_SIZE, STATE_MEM_BASE.
2174         (sim_open): Remove call to callback->init. gdb/run do this.
2175
2176         * interp.c: Update
2177
2178         * sim-main.h (SIM_HAVE_FLATMEM): Define.
2179
2180         * interp.c (big_endian_p): Delete, replaced by
2181         current_target_byte_order.
2182
2183 Tue May 20 13:55:00 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2184
2185         * interp.c (host_read_long, host_read_word, host_swap_word,
2186         host_swap_long): Delete. Using common sim-endian.
2187         (sim_fetch_register, sim_store_register): Use H2T.
2188         (pipeline_ticks): Delete.  Handled by sim-events.
2189         (sim_info): Update.
2190         (sim_engine_run): Update.
2191
2192 Tue May 20 13:42:03 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2193
2194         * interp.c (sim_stop_reason): Move code determining simEXCEPTION
2195         reason from here.
2196         (SignalException): To here. Signal using sim_engine_halt.
2197         (sim_stop_reason): Delete, moved to common.
2198
2199 Tue May 20 10:19:48 1997  Andrew Cagney  <cagney@b2.cygnus.com>
2200
2201         * interp.c (sim_open): Add callback argument.
2202         (sim_set_callbacks): Delete SIM_DESC argument.
2203         (sim_size): Ditto.
2204
2205 Mon May 19 18:20:38 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2206
2207         * Makefile.in (SIM_OBJS): Add common modules.
2208
2209         * interp.c (sim_set_callbacks): Also set SD callback.
2210         (set_endianness, xfer_*, swap_*): Delete.
2211         (host_read_word, host_read_long, host_swap_word, host_swap_long):
2212         Change to functions using sim-endian macros.
2213         (control_c, sim_stop): Delete, use common version.
2214         (simulate): Convert into.
2215         (sim_engine_run): This function.
2216         (sim_resume): Delete.
2217
2218         * interp.c (simulation): New variable - the simulator object.
2219         (sim_kind): Delete global - merged into simulation.
2220         (sim_load): Cleanup.  Move PC assignment from here.
2221         (sim_create_inferior): To here.
2222
2223         * sim-main.h: New file.
2224         * interp.c (sim-main.h): Include.
2225
2226 Thu Apr 24 00:39:51 1997  Doug Evans  <dje@canuck.cygnus.com>
2227
2228         * configure: Regenerated to track ../common/aclocal.m4 changes.
2229
2230 Wed Apr 23 17:32:19 1997  Doug Evans  <dje@canuck.cygnus.com>
2231
2232         * tconfig.in (SIM_HAVE_BIENDIAN): Define.
2233
2234 Mon Apr 21 17:16:13 1997  Gavin Koch  <gavin@cygnus.com>
2235
2236         * gencode.c (build_instruction): DIV instructions: check
2237         for division by zero and integer overflow before using
2238         host's division operation.
2239
2240 Thu Apr 17 03:18:14 1997  Doug Evans  <dje@canuck.cygnus.com>
2241
2242         * Makefile.in (SIM_OBJS): Add sim-load.o.
2243         * interp.c: #include bfd.h.
2244         (target_byte_order): Delete.
2245         (sim_kind, myname, big_endian_p): New static locals.
2246         (sim_open): Set sim_kind, myname.  Move call to set_endianness to
2247         after argument parsing.  Recognize -E arg, set endianness accordingly.
2248         (sim_load): Return SIM_RC.  New arg abfd.  Call sim_load_file to
2249         load file into simulator.  Set PC from bfd.
2250         (sim_create_inferior): Return SIM_RC.  Delete arg start_address.
2251         (set_endianness): Use big_endian_p instead of target_byte_order.
2252
2253 Wed Apr 16 17:55:37 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2254
2255         * interp.c (sim_size): Delete prototype - conflicts with
2256         definition in remote-sim.h.  Correct definition.
2257
2258 Mon Apr  7 15:45:02 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
2259
2260         * configure: Regenerated to track ../common/aclocal.m4 changes.
2261         * config.in: Ditto.
2262
2263 Wed Apr  2 15:06:28 1997  Doug Evans  <dje@canuck.cygnus.com>
2264
2265         * interp.c (sim_open): New arg `kind'.
2266
2267         * configure: Regenerated to track ../common/aclocal.m4 changes.
2268
2269 Wed Apr  2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
2270
2271         * configure: Regenerated to track ../common/aclocal.m4 changes.
2272
2273 Tue Mar 25 11:38:22 1997  Doug Evans  <dje@canuck.cygnus.com>
2274
2275         * interp.c (sim_open): Set optind to 0 before calling getopt.
2276
2277 Wed Mar 19 01:14:00 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
2278
2279         * configure: Regenerated to track ../common/aclocal.m4 changes.
2280
2281 Mon Mar 17 10:52:59 1997  Gavin Koch  <gavin@cetus.cygnus.com>
2282
2283         * interp.c : Replace uses of pr_addr with pr_uword64
2284         where the bit length is always 64 independent of SIM_ADDR.
2285         (pr_uword64) : added.
2286
2287 Mon Mar 17 15:10:07 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
2288
2289         * configure: Re-generate.
2290
2291 Fri Mar 14 10:34:11 1997  Michael Meissner  <meissner@cygnus.com>
2292
2293         * configure: Regenerate to track ../common/aclocal.m4 changes.
2294
2295 Thu Mar 13 12:51:36 1997  Doug Evans  <dje@canuck.cygnus.com>
2296
2297         * interp.c (sim_open): New SIM_DESC result.  Argument is now
2298         in argv form.
2299         (other sim_*): New SIM_DESC argument.
2300
2301 start-sanitize-r5900
2302 Wed Feb 26 18:32:21 1997  Gavin Koch  <gavin@cygnus.com>
2303
2304         * gencode.c (POP_AND,POP_OR,POP_NOR,POP_XOR):
2305         Change values to avoid overloading DOUBLEWORD which is tested
2306         for all insns.
2307         * gencode.c: reinstate "offending code".
2308
2309 end-sanitize-r5900
2310 Mon Feb 24 22:47:14 1997  Dawn Perchik  <dawn@cygnus.com>
2311
2312         * interp.c: Fix printing of addresses for non-64-bit targets.
2313         (pr_addr): Add function to print address based on size.
2314 start-sanitize-r5900
2315         * gencode.c: #ifdef out offending code until a permanent fix
2316         can be added.  Code is causing build errors for non-5900 mips targets.
2317 end-sanitize-r5900
2318
2319 start-sanitize-r5900
2320 Thu Feb 20 10:40:24 1997  Gavin Koch  <gavin@cetus.cygnus.com>
2321
2322         * gencode.c (process_instructions): Correct test for ISA dependent
2323         architecture bits in isa field of MIPS_DECODE.
2324
2325 end-sanitize-r5900
2326 Wed Feb 19 14:42:09 1997  Mark Alexander  <marka@cygnus.com>
2327
2328         * interp.c (simopen): Add support for LSI MiniRISC PMON vectors.
2329
2330 start-sanitize-r5900
2331 Tue Feb 18 17:03:47 1997  Gavin Koch  <gavin@cygnus.com>
2332
2333         * gencode.c (MIPS_DECODE): Correct instruction feature flags for
2334         PMADDUW.
2335
2336 end-sanitize-r5900
2337 Thu Feb 13 14:08:30 1997  Ian Lance Taylor  <ian@cygnus.com>
2338
2339         * gencode.c (build_mips16_operands): Correct computation of base
2340         address for extended PC relative instruction.
2341
2342 start-sanitize-r5900
2343 Fri Feb  7 11:12:44 1997  Gavin Koch  <gavin@cygnus.com>
2344
2345         * Makefile.in, configure, configure.in, gencode.c,
2346         interp.c, support.h: add r5900.
2347
2348 end-sanitize-r5900
2349 Thu Feb  6 17:16:15 1997  Ian Lance Taylor  <ian@cygnus.com>
2350
2351         * interp.c (mips16_entry): Add support for floating point cases.
2352         (SignalException): Pass floating point cases to mips16_entry.
2353         (ValueFPR): Don't restrict fmt_single and fmt_word to even
2354         registers.
2355         (StoreFPR): Likewise.  Also, don't clobber fpr + 1 for fmt_single
2356         or fmt_word.
2357         (COP_LW): Pass fmt_word rather than fmt_uninterpreted to StoreFPR,
2358         and then set the state to fmt_uninterpreted.
2359         (COP_SW): Temporarily set the state to fmt_word while calling
2360         ValueFPR.
2361
2362 Tue Feb  4 16:48:25 1997  Ian Lance Taylor  <ian@cygnus.com>
2363
2364         * gencode.c (build_instruction): The high order may be set in the
2365         comparison flags at any ISA level, not just ISA 4.
2366
2367 Tue Feb  4 13:33:30 1997  Doug Evans  <dje@canuck.cygnus.com>
2368
2369         * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
2370         COMMON_{PRE,POST}_CONFIG_FRAG instead.
2371         * configure.in: sinclude ../common/aclocal.m4.
2372         * configure: Regenerated.
2373
2374 Fri Jan 31 11:11:45 1997  Ian Lance Taylor  <ian@cygnus.com>
2375
2376         * configure: Rebuild after change to aclocal.m4.
2377
2378 Thu Jan 23 11:46:23 1997  Stu Grossman  (grossman@critters.cygnus.com)
2379
2380         * configure configure.in Makefile.in:  Update to new configure
2381         scheme which is more compatible with WinGDB builds.
2382         * configure.in:  Improve comment on how to run autoconf.
2383         * configure:  Re-run autoconf to get new ../common/aclocal.m4.
2384         * Makefile.in:  Use autoconf substitution to install common
2385         makefile fragment.
2386
2387 Wed Jan  8 12:39:03 1997  Jim Wilson  <wilson@cygnus.com>
2388
2389         * gencode.c (build_instruction): Use BigEndianCPU instead of
2390         ByteSwapMem.
2391
2392 Thu Jan 02 22:23:04 1997  Mark Alexander  <marka@cygnus.com>
2393
2394         * interp.c (sim_monitor): Make output to stdout visible in
2395         wingdb's I/O log window.
2396
2397 Tue Dec 31 07:04:00 1996  Mark Alexander  <marka@cygnus.com>
2398
2399         * support.h: Undo previous change to SIGTRAP
2400         and SIGQUIT values.
2401
2402 Mon Dec 30 17:36:06 1996  Ian Lance Taylor  <ian@cygnus.com>
2403
2404         * interp.c (store_word, load_word): New static functions.
2405         (mips16_entry): New static function.
2406         (SignalException): Look for mips16 entry and exit instructions.
2407         (simulate): Use the correct index when setting fpr_state after
2408         doing a pending move.
2409
2410 Sun Dec 29 09:37:18 1996  Mark Alexander  <marka@cygnus.com>
2411
2412         * interp.c: Fix byte-swapping code throughout to work on
2413         both little- and big-endian hosts.
2414
2415 Sun Dec 29 09:18:32 1996  Mark Alexander  <marka@cygnus.com>
2416
2417         * support.h: Make definitions of SIGTRAP and SIGQUIT consistent
2418         with gdb/config/i386/xm-windows.h.
2419
2420 Fri Dec 27 22:48:51 1996  Mark Alexander  <marka@cygnus.com>
2421
2422         * gencode.c (build_instruction): Work around MSVC++ code gen bug
2423         that messes up arithmetic shifts.
2424
2425 Fri Dec 20 11:04:05 1996  Stu Grossman  (grossman@critters.cygnus.com)
2426
2427         * support.h:  Use _WIN32 instead of __WIN32__.  Also add defs for
2428         SIGTRAP and SIGQUIT for _WIN32.
2429
2430 Thu Dec 19 14:07:27 1996  Ian Lance Taylor  <ian@cygnus.com>
2431
2432         * gencode.c (build_instruction) [MUL]: Cast operands to word64, to
2433         force a 64 bit multiplication.
2434         (build_instruction) [OR]: In mips16 mode, don't do anything if the
2435         destination register is 0, since that is the default mips16 nop
2436         instruction.
2437
2438 Mon Dec 16 14:59:38 1996  Ian Lance Taylor  <ian@cygnus.com>
2439
2440         * gencode.c (MIPS16_DECODE): SWRASP is I8, not RI.
2441         (build_endian_shift): Don't check proc64.
2442         (build_instruction): Always set memval to uword64.  Cast op2 to
2443         uword64 when shifting it left in memory instructions.  Always use
2444         the same code for stores--don't special case proc64.
2445
2446         * gencode.c (build_mips16_operands): Fix base PC value for PC
2447         relative operands.
2448         (build_instruction): Call JALDELAYSLOT rather than DELAYSLOT for a
2449         jal instruction.
2450         * interp.c (simJALDELAYSLOT): Define.
2451         (JALDELAYSLOT): Define.
2452         (INDELAYSLOT, INJALDELAYSLOT): Define.
2453         (simulate): Clear simJALDELAYSLOT when simDELAYSLOT is cleared.
2454
2455 Tue Dec 24 22:11:20 1996  Angela Marie Thomas (angela@cygnus.com)
2456
2457         * interp.c (sim_open): add flush_cache as a PMON routine
2458         (sim_monitor): handle flush_cache by ignoring it
2459
2460 Wed Dec 11 13:53:51 1996  Jim Wilson  <wilson@cygnus.com>
2461
2462         * gencode.c (build_instruction): Use !ByteSwapMem instead of
2463         BigEndianMem.
2464         * interp.c (CONFIG, config_EP_{mask,shift,D,DxxDxx, config_BE): Delete.
2465         (BigEndianMem): Rename to ByteSwapMem and change sense.
2466         (BigEndianCPU, sim_write, LoadMemory, StoreMemory): Change
2467         BigEndianMem references to !ByteSwapMem.
2468         (set_endianness): New function, with prototype.
2469         (sim_open): Call set_endianness.
2470         (sim_info): Use simBE instead of BigEndianMem.
2471         (xfer_direct_word, xfer_direct_long, swap_direct_word,
2472         swap_direct_long, xfer_big_word, xfer_big_long, xfer_little_word,
2473         xfer_little_long, swap_word, swap_long): Delete unnecessary MSC_VER
2474         ifdefs, keeping the prototype declaration.
2475         (swap_word): Rewrite correctly.
2476         (ColdReset): Delete references to CONFIG.  Delete endianness related
2477         code; moved to set_endianness.
2478
2479 Tue Dec 10 11:32:04 1996  Jim Wilson  <wilson@cygnus.com>
2480
2481         * gencode.c (build_instruction, case JUMP): Truncate PC to 32 bits.
2482         * interp.c (CHECKHILO): Define away.
2483         (simSIGINT): New macro.
2484         (membank_size): Increase from 1MB to 2MB.
2485         (control_c): New function.
2486         (sim_resume): Rename parameter signal to signal_number.  Add local
2487         variable prev.  Call signal before and after simulate.
2488         (sim_stop_reason): Add simSIGINT support.
2489         (sim_warning, sim_error, dotrace, SignalException): Define as stdarg
2490         functions always.
2491         (sim_warning): Delete call to SignalException.  Do call printf_filtered
2492         if logfh is NULL.
2493         (AddressTranslation): Add #ifdef DEBUG around debugging message and
2494         a call to sim_warning.
2495
2496 Wed Nov 27 11:53:50 1996  Ian Lance Taylor  <ian@cygnus.com>
2497
2498         * gencode.c (process_instructions): If ! proc64, skip DOUBLEWORD
2499         16 bit instructions.
2500
2501 Tue Nov 26 11:53:12 1996  Ian Lance Taylor  <ian@cygnus.com>
2502
2503         Add support for mips16 (16 bit MIPS implementation):
2504         * gencode.c (inst_type): Add mips16 instruction encoding types.
2505         (GETDATASIZEINSN): Define.
2506         (MIPS_DECODE): Add REG flag to dsllv, dsrav, and dsrlv.  Add
2507         jalx.  Add LEFT flag to mfhi and mflo.  Add RIGHT flag to mthi and
2508         mtlo.
2509         (MIPS16_DECODE): New table, for mips16 instructions.
2510         (bitmap_val): New static function.
2511         (struct mips16_op): Define.
2512         (mips16_op_table): New table, for mips16 operands.
2513         (build_mips16_operands): New static function.
2514         (process_instructions): If PC is odd, decode a mips16
2515         instruction.  Break out instruction handling into new
2516         build_instruction function.
2517         (build_instruction): New static function, broken out of
2518         process_instructions.  Check modifiers rather than flags for SHIFT
2519         bit count and m[ft]{hi,lo} direction.
2520         (usage): Pass program name to fprintf.
2521         (main): Remove unused variable this_option_optind.  Change
2522         ``*loptarg++'' to ``loptarg++''.
2523         (my_strtoul): Parenthesize && within ||.
2524         * interp.c (LoadMemory): Accept a halfword pAddr if vAddr is odd.
2525         (simulate): If PC is odd, fetch a 16 bit instruction, and
2526         increment PC by 2 rather than 4.
2527         * configure.in: Add case for mips16*-*-*.
2528         * configure: Rebuild.
2529
2530 Fri Nov 22 08:49:36 1996  Mark Alexander  <marka@cygnus.com>
2531
2532         * interp.c: Allow -t to enable tracing in standalone simulator.
2533         Fix garbage output in trace file and error messages.
2534
2535 Wed Nov 20 01:54:37 1996  Doug Evans  <dje@canuck.cygnus.com>
2536
2537         * Makefile.in: Delete stuff moved to ../common/Make-common.in.
2538         (SIM_{OBJS,EXTRA_CFLAGS,EXTRA_CLEAN}): Define.
2539         * configure.in: Simplify using macros in ../common/aclocal.m4.
2540         * configure: Regenerated.
2541         * tconfig.in: New file.
2542
2543 Tue Nov 12 13:34:00 1996  Dawn Perchik  <dawn@cygnus.com>
2544
2545         * interp.c: Fix bugs in 64-bit port.
2546         Use ansi function declarations for msvc compiler.
2547         Initialize and test file pointer in trace code.
2548         Prevent duplicate definition of LAST_EMED_REGNUM.
2549
2550 Tue Oct 15 11:07:06 1996  Mark Alexander  <marka@cygnus.com>
2551
2552         * interp.c (xfer_big_long): Prevent unwanted sign extension.
2553
2554 Thu Sep 26 17:35:00 1996  James G. Smith  <jsmith@cygnus.co.uk>
2555
2556         * interp.c (SignalException): Check for explicit terminating
2557         breakpoint value.
2558         * gencode.c: Pass instruction value through SignalException()
2559         calls for Trap, Breakpoint and Syscall.
2560
2561 Thu Sep 26 11:35:17 1996  James G. Smith  <jsmith@cygnus.co.uk>
2562
2563         * interp.c (SquareRoot): Add HAVE_SQRT check to ensure sqrt() is
2564         only used on those hosts that provide it.
2565         * configure.in: Add sqrt() to list of functions to be checked for.
2566         * config.in: Re-generated.
2567         * configure: Re-generated.
2568
2569 Fri Sep 20 15:47:12 1996  Ian Lance Taylor  <ian@cygnus.com>
2570
2571         * gencode.c (process_instructions): Call build_endian_shift when
2572         expanding STORE RIGHT, to fix swr.
2573         * support.h (SIGNEXTEND): If the sign bit is not set, explicitly
2574         clear the high bits.
2575         * interp.c (Convert): Fix fmt_single to fmt_long to not truncate.
2576         Fix float to int conversions to produce signed values.
2577
2578 Thu Sep 19 15:34:17 1996  Ian Lance Taylor  <ian@cygnus.com>
2579
2580         * gencode.c (MIPS_DECODE): Set UNSIGNED for multu instruction.
2581         (process_instructions): Correct handling of nor instruction.
2582         Correct shift count for 32 bit shift instructions. Correct sign
2583         extension for arithmetic shifts to not shift the number of bits in
2584         the type.  Fix 64 bit multiply high word calculation.  Fix 32 bit
2585         unsigned multiply.  Fix ldxc1 and friends to use coprocessor 1.
2586         Fix madd.
2587         * interp.c (CHECKHILO): Don't set HIACCESS, LOACCESS, or HLPC.
2588         It's OK to have a mult follow a mult.  What's not OK is to have a
2589         mult follow an mfhi.
2590         (Convert): Comment out incorrect rounding code.
2591
2592 Mon Sep 16 11:38:16 1996  James G. Smith  <jsmith@cygnus.co.uk>
2593
2594         * interp.c (sim_monitor): Improved monitor printf
2595         simulation. Tidied up simulator warnings, and added "--log" option
2596         for directing warning message output.
2597         * gencode.c: Use sim_warning() rather than WARNING macro.
2598
2599 Thu Aug 22 15:03:12 1996  Ian Lance Taylor  <ian@cygnus.com>
2600
2601         * Makefile.in (gencode): Depend upon gencode.o, getopt.o, and
2602         getopt1.o, rather than on gencode.c.  Link objects together.
2603         Don't link against -liberty.
2604         (gencode.o, getopt.o, getopt1.o): New targets.
2605         * gencode.c: Include <ctype.h> and "ansidecl.h".
2606         (AND): Undefine after including "ansidecl.h".
2607         (ULONG_MAX): Define if not defined.
2608         (OP_*): Don't define macros; now defined in opcode/mips.h.
2609         (main): Call my_strtoul rather than strtoul.
2610         (my_strtoul): New static function.
2611
2612 Wed Jul 17 18:12:38 1996  Stu Grossman  (grossman@critters.cygnus.com)
2613
2614         * gencode.c (process_instructions):  Generate word64 and uword64
2615         instead of `long long' and `unsigned long long' data types.
2616         * interp.c:  #include sysdep.h to get signals, and define default
2617         for SIGBUS.
2618         * (Convert):  Work around for Visual-C++ compiler bug with type
2619         conversion.
2620         * support.h:  Make things compile under Visual-C++ by using
2621         __int64 instead of `long long'.  Change many refs to long long
2622         into word64/uword64 typedefs.
2623
2624 Wed Jun 26 12:24:55 1996  Jason Molenda  (crash@godzilla.cygnus.co.jp)
2625
2626         * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
2627         INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
2628         (docdir): Removed.
2629         * configure.in (AC_PREREQ): autoconf 2.5 or higher.
2630         (AC_PROG_INSTALL): Added.
2631         (AC_PROG_CC): Moved to before configure.host call.
2632         * configure: Rebuilt.
2633
2634 Wed Jun  5 08:28:13 1996  James G. Smith  <jsmith@cygnus.co.uk>
2635
2636         * configure.in: Define @SIMCONF@ depending on mips target.
2637         * configure: Rebuild.
2638         * Makefile.in (run): Add @SIMCONF@ to control simulator
2639         construction.
2640         * gencode.c: Change LOADDRMASK to 64bit memory model only.
2641         * interp.c: Remove some debugging, provide more detailed error
2642         messages, update memory accesses to use LOADDRMASK.
2643
2644 Mon Jun  3 11:55:03 1996  Ian Lance Taylor  <ian@cygnus.com>
2645
2646         * configure.in: Add calls to AC_CONFIG_HEADER, AC_CHECK_HEADERS,
2647         AC_CHECK_LIB, and AC_CHECK_FUNCS.  Change AC_OUTPUT to set
2648         stamp-h.
2649         * configure: Rebuild.
2650         * config.in: New file, generated by autoheader.
2651         * interp.c: Include "config.h".  Include <stdlib.h>, <string.h>,
2652         and <strings.h> if they exist.  Replace #ifdef sun with #ifdef
2653         HAVE_ANINT and HAVE_AINT, as appropriate.
2654         * Makefile.in (run): Use @LIBS@ rather than -lm.
2655         (interp.o): Depend upon config.h.
2656         (Makefile): Just rebuild Makefile.
2657         (clean): Remove stamp-h.
2658         (mostlyclean): Make the same as clean, not as distclean.
2659         (config.h, stamp-h): New targets.
2660
2661 Fri May 10 00:41:17 1996  James G. Smith  <jsmith@cygnus.co.uk>
2662
2663         * interp.c (ColdReset): Fix boolean test. Make all simulator
2664         globals static.
2665
2666 Wed May  8 15:12:58 1996  James G. Smith  <jsmith@cygnus.co.uk>
2667
2668         * interp.c (xfer_direct_word, xfer_direct_long,
2669         swap_direct_word, swap_direct_long, xfer_big_word,
2670         xfer_big_long, xfer_little_word, xfer_little_long,
2671         swap_word,swap_long): Added.
2672         * interp.c (ColdReset): Provide function indirection to
2673         host<->simulated_target transfer routines.
2674         * interp.c (sim_store_register, sim_fetch_register): Updated to
2675         make use of indirected transfer routines.
2676
2677 Fri Apr 19 15:48:24 1996  James G. Smith  <jsmith@cygnus.co.uk>
2678
2679         * gencode.c (process_instructions): Ensure FP ABS instruction
2680         recognised.
2681         * interp.c (AbsoluteValue): Add routine. Also provide simple PMON
2682         system call support.
2683
2684 Wed Apr 10 09:51:38 1996  James G. Smith  <jsmith@cygnus.co.uk>
2685
2686         * interp.c (sim_do_command): Complain if callback structure not
2687         initialised.
2688
2689 Thu Mar 28 13:50:51 1996  James G. Smith  <jsmith@cygnus.co.uk>
2690
2691         * interp.c (Convert): Provide round-to-nearest and round-to-zero
2692         support for Sun hosts.
2693         * Makefile.in (gencode): Ensure the host compiler and libraries
2694         used for cross-hosted build.
2695
2696 Wed Mar 27 14:42:12 1996  James G. Smith  <jsmith@cygnus.co.uk>
2697
2698         * interp.c, gencode.c: Some more (TODO) tidying.
2699
2700 Thu Mar  7 11:19:33 1996  James G. Smith  <jsmith@cygnus.co.uk>
2701
2702         * gencode.c, interp.c: Replaced explicit long long references with
2703         WORD64HI, WORD64LO, SET64HI and SET64LO macro calls.
2704         * support.h (SET64LO, SET64HI): Macros added.
2705
2706 Wed Feb 21 12:16:21 1996  Ian Lance Taylor  <ian@cygnus.com>
2707
2708         * configure: Regenerate with autoconf 2.7.
2709
2710 Tue Jan 30 08:48:18 1996  Fred Fish  <fnf@cygnus.com>
2711
2712         * interp.c (LoadMemory): Enclose text following #endif in /* */.
2713         * support.h: Remove superfluous "1" from #if.
2714         * support.h (CHECKSIM): Remove stray 'a' at end of line.
2715
2716 Mon Dec  4 11:44:40 1995  Jamie Smith  <jsmith@cygnus.com>
2717
2718         * interp.c (StoreFPR): Control UndefinedResult() call on
2719         WARN_RESULT manifest.
2720
2721 Fri Dec  1 16:37:19 1995  James G. Smith  <jsmith@cygnus.co.uk>
2722
2723         * gencode.c: Tidied instruction decoding, and added FP instruction
2724         support.
2725
2726         * interp.c: Added dineroIII, and BSD profiling support. Also
2727         run-time FP handling.
2728
2729 Sun Oct 22 00:57:18 1995  James G. Smith  <jsmith@pasanda.cygnus.co.uk>
2730
2731         * Changelog, Makefile.in, README.Cygnus, configure, configure.in,
2732         gencode.c, interp.c, support.h: created.