sim/mips/ChangeLog

   1 2015-12-24  Mike Frysinger  <vapier@gentoo.org>
   2
   3         * sim-main.h (SIM_QUIET_NAN_NEGATED): Move from tconfig.h.
   4         * tconfig.h: Delete.
   5
   6 2015-12-24  Mike Frysinger  <vapier@gentoo.org>
   7
   8         * tconfig.h (SIM_HANDLES_LMA): Delete.
   9
  10 2015-12-24  Mike Frysinger  <vapier@gentoo.org>
  11
  12         * sim-main.h (WITH_WATCHPOINTS): Delete.
  13
  14 2015-12-24  Mike Frysinger  <vapier@gentoo.org>
  15
  16         * interp.c [SIM_HAVE_FLATMEM] (sim_open): Delete flatmem code.
  17
  18 2015-12-24  Mike Frysinger  <vapier@gentoo.org>
  19
  20         * tconfig.h (SIM_HAVE_SIMCACHE): Delete.
  21
  22 2015-12-15  Dominik Vogt  <vogt@linux.vnet.ibm.com>
  23
  24         * micromips.igen (process_isa_mode): Fix left shift of negative
  25         value.
  26
  27 2015-11-17  Mike Frysinger  <vapier@gentoo.org>
  28
  29         * sim-main.h (WITH_MODULO_MEMORY): Delete.
  30
  31 2015-11-15  Mike Frysinger  <vapier@gentoo.org>
  32
  33         * Makefile.in (SIM_OBJS): Delete sim-reason.o and sim-stop.o.
  34
  35 2015-11-14  Mike Frysinger  <vapier@gentoo.org>
  36
  37         * interp.c (sim_close): Rename to ...
  38         (mips_sim_close): ... this.  Delete calls to sim_module_uninstall and
  39         sim_io_shutdown.
  40         * sim-main.h (mips_sim_close): Declare.
  41         (SIM_CLOSE_HOOK): Define.
  42
  43 2015-09-25  Andrew Bennett  <andrew.bennett@imgtec.com>
  44             Ali Lown  <ali.lown@imgtec.com>
  45
  46         * Makefile.in (tmp-micromips): New rule.
  47         (tmp-mach-multi): Add support for micromips.
  48         * configure.ac (mips*-sde-elf* | mips*-mti-elf*): Made a multi sim
  49         that works for both mips64 and micromips64.
  50         (mipsisa32r2*-*-*): Made a multi sim that works for mips32 and
  51         micromips32.
  52         Add build support for micromips.
  53         * dsp.igen (do_ph_s_absq, do_w_s_absq, do_qb_s_absq, do_addsc,
  54         do_addwc, do_bitrev, do_extpv, do_extrv, do_extrv_s_h, do_insv,
  55         do_lxx do_modsub, do_mthlip, do_mulsaq_s_w_ph, do_ph_packrl, do_qb_pick
  56         do_ph_pick, do_qb_ph_precequ, do_qb_ph_preceu, do_w_preceq
  57         do_w_ph_precrq, do_ph_qb_precrq, do_w_ph_rs_precrq do_qb_w_raddu,
  58         do_rddsp, do_repl, do_shilov, do_ph_shl, do_qb_shl do_w_s_shllv,
  59         do_ph_shrlv, do_w_r_shrav, do_wrdsp, do_qb_shrav, do_append,
  60         do_balign, do_ph_w_mulsa, do_ph_qb_precr, do_prepend): New functions.
  61         Refactored instruction code to use these functions.
  62         * dsp2.igen: Refactored instruction code to use the new functions.
  63         * interp.c (decode_coproc): Refactored to work with any instruction
  64         encoding.
  65         (isa_mode): New variable
  66         (RSVD_INSTRUCTION): Changed to 0x00000039.
  67         * m16.igen (BREAK16): Refactored instruction to use do_break16.
  68         (JALX32): Add mips32, mips64, mips32r2 and mips64r2 models.
  69         * micromips.dc: New file.
  70         * micromips.igen: New file.
  71         * micromips16.dc: New file.
  72         * micromipsdsp.igen: New file.
  73         * micromipsrun.c: New file.
  74         * mips.igen (do_swc1): Changed to work with any instruction encoding.
  75         (do_add do_addi do_andi do_dadd do_daddi do_dsll32 do_dsra32
  76         do_dsrl32, do_dsub, do_break, do_break16, do_clo, do_clz, do_dclo,
  77         do_dclz, do_lb, do_lh, do_lwr, do_lwl, do_lwc, do_lw, do_lwu, do_lhu,
  78         do_ldc, do_lbu, do_ll, do_lld, do_lui, do_madd, do_dsp_madd, do_maddu,
  79         do_dsp_maddu, do_dsp_mfhi, do_dsp_mflo, do_movn, do_movz, do_msub,
  80         do_dsp_msub, do_msubu, do_dsp_msubu, do_mthi, do_dsp_mthi, do_mtlo,
  81         do_dsp_mtlo, do_mul, do_dsp_mult, do_dsp_multu, do_pref, do_sc,
  82         do_scd, do_sub, do_sw, do_teq, do_teqi, do_tge, do_tgei, do_tgeiu,
  83         do_tgeu, do_tlt do_tlti, do_tltiu, do_tltu, do_tne, do_tnei, do_abs_fmt,
  84         do_add_fmt, do_alnv_ps, do_c_cond_fmt, do_ceil_fmt, do_cfc1, do_ctc1,
  85         do_cvt_d_fmt, do_cvt_l_fmt, do_cvt_ps_s, do_cvt_s_fmt, do_cvt_s_pl,
  86         do_cvt_s_pu, do_cvt_w_fmt, do_div_fmt, do_dmfc1b, do_dmtc1b, do_floor_fmt,
  87         do_luxc1_32, do_luxc1_64, do_lwc1, do_lwxc1, do_madd_fmt, do_mfc1b,
  88         do_mov_fmt, do_movtf, do_movtf_fmt, do_movn_fmt, do_movz_fmt, do_msub_fmt,
  89         do_mtc1b, do_mul_fmt, do_neg_fmt, do_nmadd_fmt, do_nmsub_fmt, do_pll_ps,
  90         do_plu_ps, do_pul_ps, do_puu_ps, do_recip_fmt, do_round_fmt, do_rsqrt_fmt,
  91         do_prefx, do_sdc1, do_suxc1_32, do_suxc1_64, do_sqrt_fmt, do_sub_fmt,
  92         do_swc1, do_swxc1, do_trunc_fmt): New functions, refactored from existing
  93         instructions.
  94         Refactored instruction code to use these functions.
  95         (RSVD): Changed to use new reserved instruction.
  96         (loadstore_ea, not_word_value, unpredictable, check_mt_hilo,
  97         check_mf_hilo, check_mult_hilo, check_div_hilo, check_u64, do_luxc1_32,
  98         do_sdc1, do_suxc1_32, check_fmt_p, check_fpu, do_load_double,
  99         do_store_double):  Added micromips32 and micromips64 models.
 100         Added include for micromips.igen and micromipsdsp.igen
 101         Add micromips32 and micromips64 models.
 102         (DecodeCoproc): Updated to use new macro definition.
 103         * mips3264r2.igen (do_dsbh, do_dshd, do_dext, do_dextm, do_dextu, do_di,
 104         do_dins, do_dinsm, do_ei, do_ext, do_mfhc1, do_mthc1, do_ins, do_dinsu,
 105         do_seb, do_seh do_rdhwr, do_wsbh): New functions.
 106         Refactored instruction code to use these functions.
 107         * sim-main.h (CP0_operation): New enum.
 108         (DecodeCoproc): Updated macro.
 109         (IMEM32_MICROMIPS, IMEM16_MICROMIPS, MICROMIPS_MINOR_OPCODE,
 110         MICROMIPS_DELAYSLOT_SIZE_ANY, MICROMIPS_DELAYSLOT_SIZE_16,
 111         MICROMIPS_DELAYSLOT_SIZE_32, ISA_MODE_MIPS32 and
 112         ISA_MODE_MICROMIPS): New defines.
 113         (sim_state): Add isa_mode field.
 114
 115 2015-06-23  Mike Frysinger  <vapier@gentoo.org>
 116
 117         * configure: Regenerate.
 118
 119 2015-06-12  Mike Frysinger  <vapier@gentoo.org>
 120
 121         * configure.ac: Change configure.in to configure.ac.
 122         * configure: Regenerate.
 123
 124 2015-06-12  Mike Frysinger  <vapier@gentoo.org>
 125
 126         * configure: Regenerate.
 127
 128 2015-06-12  Mike Frysinger  <vapier@gentoo.org>
 129
 130         * interp.c [TRACE]: Delete.
 131         (TRACE): Change to WITH_TRACE_ANY_P.
 132         [!WITH_TRACE_ANY_P] (open_trace): Define.
 133         (mips_option_handler, open_trace, sim_close, dotrace):
 134         Change defined(TRACE) to WITH_TRACE_ANY_P.
 135         (sim_open): Delete TRACE ifdef check.
 136         * sim-main.c (load_memory): Delete TRACE ifdef check.
 137         (store_memory): Likewise.
 138         * sim-main.h [WITH_TRACE_ANY_P] (dotrace, tracefh): Protect decls.
 139         [!WITH_TRACE_ANY_P] (dotrace): Define.
 140
 141 2015-04-18  Mike Frysinger  <vapier@gentoo.org>
 142
 143         * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESTART_HOOK): Delete
 144         comments.
 145
 146 2015-04-18  Mike Frysinger  <vapier@gentoo.org>
 147
 148         * sim-main.h (SIM_CPU): Delete.
 149
 150 2015-04-18  Mike Frysinger  <vapier@gentoo.org>
 151
 152         * sim-main.h (sim_cia): Delete.
 153
 154 2015-04-17  Mike Frysinger  <vapier@gentoo.org>
 155
 156         * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Change CIA_GET to
 157         PU_PC_GET.
 158         * interp.c (interrupt_event): Change CIA_GET to CPU_PC_GET.
 159         (sim_create_inferior): Change CIA_SET to CPU_PC_SET.
 160         * m16run.c (sim_engine_run): Change CIA_GET to CPU_PC_GET and
 161         CIA_SET to CPU_PC_SET.
 162         * sim-main.h (CIA_GET, CIA_SET): Delete.
 163
 164 2015-04-15  Mike Frysinger  <vapier@gentoo.org>
 165
 166         * Makefile.in (SIM_OBJS): Delete sim-cpu.o.
 167         * sim-main.h (STATE_CPU): Delete.
 168
 169 2015-04-13  Mike Frysinger  <vapier@gentoo.org>
 170
 171         * configure: Regenerate.
 172
 173 2015-04-13  Mike Frysinger  <vapier@gentoo.org>
 174
 175         * Makefile.in (SIM_OBJS): Add sim-cpu.o.
 176         * interp.c (mips_pc_get, mips_pc_set): New functions.
 177         (sim_open): Declare new local var i.  Call sim_cpu_alloc_all.
 178         Call CPU_PC_FETCH & CPU_PC_STORE for all cpus.
 179         (sim_pc_get): Delete.
 180         * sim-main.h (SIM_CPU): Define.
 181         (struct sim_state): Change cpu to an array of pointers.
 182         (STATE_CPU): Drop &.
 183
 184 2015-04-13  Mike Frysinger  <vapier@gentoo.org>
 185
 186         * interp.c (mips_option_handler, open_trace, sim_close,
 187         sim_write, sim_read, sim_store_register, sim_fetch_register,
 188         sim_create_inferior, pr_addr, pr_uword64): Convert old style
 189         prototypes.
 190         (sim_open): Convert old style prototype.  Change casts with
 191         sim_write to unsigned char *.
 192         (fetch_str): Change null to unsigned char, and change cast to
 193         unsigned char *.
 194         (sim_monitor): Change c & ch to unsigned char.  Change cast to
 195         unsigned char *.
 196
 197 2015-04-12  Mike Frysinger  <vapier@gentoo.org>
 198
 199         * Makefile.in (SIM_OBJS): Move interp.o to the start of the list.
 200
 201 2015-04-06  Mike Frysinger  <vapier@gentoo.org>
 202
 203         * Makefile.in (SIM_OBJS): Delete sim-engine.o.
 204
 205 2015-04-01  Mike Frysinger  <vapier@gentoo.org>
 206
 207         * tconfig.h (SIM_HAVE_PROFILE): Delete.
 208
 209 2015-03-31  Mike Frysinger  <vapier@gentoo.org>
 210
 211         * config.in, configure: Regenerate.
 212
 213 2015-03-24  Mike Frysinger  <vapier@gentoo.org>
 214
 215         * interp.c (sim_pc_get): New function.
 216
 217 2015-03-24  Mike Frysinger  <vapier@gentoo.org>
 218
 219         * sim-main.h (SIM_HAVE_BIENDIAN): Delete.
 220         * tconfig.h (SIM_HAVE_BIENDIAN): Delete.
 221
 222 2015-03-24  Mike Frysinger  <vapier@gentoo.org>
 223
 224         * configure: Regenerate.
 225
 226 2015-03-23  Mike Frysinger  <vapier@gentoo.org>
 227
 228         * configure: Regenerate.
 229
 230 2015-03-23  Mike Frysinger  <vapier@gentoo.org>
 231
 232         * configure: Regenerate.
 233         * configure.ac (mips_extra_objs): Delete.
 234         * Makefile.in (MIPS_EXTRA_OBJS): Delete.
 235         (SIM_OBJS): Delete MIPS_EXTRA_OBJS.
 236
 237 2015-03-23  Mike Frysinger  <vapier@gentoo.org>
 238
 239         * configure: Regenerate.
 240         * configure.ac: Delete sim_hw checks for dv-sockser.
 241
 242 2015-03-16  Mike Frysinger  <vapier@gentoo.org>
 243
 244         * config.in, configure: Regenerate.
 245         * tconfig.in: Rename file ...
 246         * tconfig.h: ... here.
 247
 248 2015-03-15  Mike Frysinger  <vapier@gentoo.org>
 249
 250         * tconfig.in: Delete includes.
 251         [HAVE_DV_SOCKSER]: Delete.
 252
 253 2015-03-14  Mike Frysinger  <vapier@gentoo.org>
 254
 255         * Makefile.in (SIM_RUN_OBJS): Delete.
 256
 257 2015-03-14  Mike Frysinger  <vapier@gentoo.org>
 258
 259         * configure.ac (AC_CHECK_HEADERS): Delete.
 260         * aclocal.m4, configure: Regenerate.
 261
 262 2014-08-19  Alan Modra  <amodra@gmail.com>
 263
 264         * configure: Regenerate.
 265
 266 2014-08-15  Roland McGrath  <mcgrathr@google.com>
 267
 268         * configure: Regenerate.
 269         * config.in: Regenerate.
 270
 271 2014-03-04  Mike Frysinger  <vapier@gentoo.org>
 272
 273         * configure: Regenerate.
 274
 275 2013-09-23  Alan Modra  <amodra@gmail.com>
 276
 277         * configure: Regenerate.
 278
 279 2013-06-03  Mike Frysinger  <vapier@gentoo.org>
 280
 281         * aclocal.m4, configure: Regenerate.
 282
 283 2013-05-10  Freddie Chopin  <freddie_chopin@op.pl>
 284
 285         * configure: Rebuild.
 286
 287 2013-03-26  Mike Frysinger  <vapier@gentoo.org>
 288
 289         * configure: Regenerate.
 290
 291 2013-03-23  Joel Sherrill  <joel.sherrill@oarcorp.com>
 292
 293         * configure.ac: Address use of dv-sockser.o.
 294         * tconfig.in: Conditionalize use of dv_sockser_install.
 295         * configure: Regenerated.
 296         * config.in: Regenerated.
 297
 298 2012-10-04  Chao-ying Fu  <fu@mips.com>
 299             Steve Ellcey  <sellcey@mips.com>
 300
 301         * mips/mips3264r2.igen (rdhwr): New.
 302
 303 2012-09-03 Joel Sherrill <joel.sherrill@oarcorp.com>
 304
 305         * configure.ac: Always link against dv-sockser.o.
 306         * configure: Regenerate.
 307
 308 2012-06-15  Joel Brobecker  <brobecker@adacore.com>
 309
 310         * config.in, configure: Regenerate.
 311
 312 2012-05-18  Nick Clifton  <nickc@redhat.com>
 313
 314         PR 14072
 315         * interp.c: Include config.h before system header files.
 316
 317 2012-03-24  Mike Frysinger  <vapier@gentoo.org>
 318
 319         * aclocal.m4, config.in, configure: Regenerate.
 320
 321 2011-12-03  Mike Frysinger  <vapier@gentoo.org>
 322
 323         * aclocal.m4: New file.
 324         * configure: Regenerate.
 325
 326 2011-10-19  Mike Frysinger  <vapier@gentoo.org>
 327
 328         * configure: Regenerate after common/acinclude.m4 update.
 329
 330 2011-10-17  Mike Frysinger  <vapier@gentoo.org>
 331
 332         * configure.ac: Change include to common/acinclude.m4.
 333
 334 2011-10-17  Mike Frysinger  <vapier@gentoo.org>
 335
 336         * configure.ac: Change AC_PREREQ to 2.64.  Delete AC_CONFIG_HEADER
 337         call.  Replace common.m4 include with SIM_AC_COMMON.
 338         * configure: Regenerate.
 339
 340 2011-07-08  Hans-Peter Nilsson  <hp@axis.com>
 341
 342         * Makefile.in ($(SIM_MULTI_OBJ)): Depend on sim-main.h
 343         $(SIM_EXTRA_DEPS).
 344         (tmp-mach-multi): Exit early when igen fails.
 345
 346 2011-07-05  Mike Frysinger  <vapier@gentoo.org>
 347
 348         * interp.c (sim_do_command): Delete.
 349
 350 2011-02-14  Mike Frysinger  <vapier@gentoo.org>
 351
 352         * dv-tx3904sio.c (tx3904sio_fifo_push): Change zfree to free.
 353         (tx3904sio_fifo_reset): Likewise.
 354         * interp.c (sim_monitor): Likewise.
 355
 356 2010-04-14  Mike Frysinger  <vapier@gentoo.org>
 357
 358         * interp.c (sim_write): Add const to buffer arg.
 359
 360 2010-01-18  Masaki Muranaka  <monaka@monami-software.com>  (tiny change)
 361
 362         * interp.c: Don't include sysdep.h
 363
 364 2010-01-09  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>
 365
 366         * configure: Regenerate.
 367
 368 2009-08-22  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>
 369
 370         * config.in: Regenerate.
 371         * configure: Likewise.
 372
 373         * configure: Regenerate.
 374
 375 2008-07-11  Hans-Peter Nilsson  <hp@axis.com>
 376
 377         * configure: Regenerate to track ../common/common.m4 changes.
 378         * config.in: Ditto.
 379
 380 2008-06-06  Vladimir Prus  <vladimir@codesourcery.com>
 381             Daniel Jacobowitz  <dan@codesourcery.com>
 382             Joseph Myers  <joseph@codesourcery.com>
 383
 384         * configure: Regenerate.
 385
 386 2007-10-22  Richard Sandiford  <rsandifo@nildram.co.uk>
 387
 388         * mips.igen (check_fmt_p): Provide a separate mips32r2 definition
 389         that unconditionally allows fmt_ps.
 390         (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL, CVT.S.PU)
 391         (FLOOR.L.fmt, LWXC1, MADD.fmt, MSUB.fmt, NMADD.fmt, NMSUB.fmt)
 392         (PLL.PS, PLU.PS, PUL.PS, PUU.PS, ROUND.L.fmt, TRUNC.L.fmt): Change
 393         filter from 64,f to 32,f.
 394         (PREFX): Change filter from 64 to 32.
 395         (LDXC1, LUXC1): Provide separate mips32r2 implementations
 396         that use do_load_double instead of do_load.  Make both LUXC1
 397         versions unpredictable if SizeFGR () != 64.
 398         (SDXC1, SUXC1): Extend to mips32r2, using do_store_double
 399         instead of do_store.  Remove unused variable.  Make both SUXC1
 400         versions unpredictable if SizeFGR () != 64.
 401
 402 2007-10-07  Richard Sandiford  <rsandifo@nildram.co.uk>
 403
 404         * mips.igen (ll): Fix mask for WITH_TARGET_WORD_BITSIZE == 32.
 405         (sc, swxc1): Likewise.  Also fix big-endian and reverse-endian
 406         shifts for that case.
 407
 408 2007-09-04  Nick Clifton  <nickc@redhat.com>
 409
 410         * interp.c (options enum): Add OPTION_INFO_MEMORY.
 411         (display_mem_info): New static variable.
 412         (mips_option_handler): Handle OPTION_INFO_MEMORY.
 413         (mips_options): Add info-memory and memory-info.
 414         (sim_open): After processing the command line and board
 415         specification, check display_mem_info.  If it is set then
 416         call the real handler for the --memory-info command line
 417         switch.
 418
 419 2007-08-24  Joel Brobecker  <brobecker@adacore.com>
 420
 421         * configure.ac: Change license of multi-run.c to GPL version 3.
 422         * configure: Regenerate.
 423
 424 2007-06-28  Richard Sandiford  <richard@codesourcery.com>
 425
 426         * configure.ac, configure: Revert last patch.
 427
 428 2007-06-26  Richard Sandiford  <richard@codesourcery.com>
 429
 430         * configure.ac (sim_mipsisa3264_configs): New variable.
 431         (mipsis32*-*-, mipsisa32r2*-*-*, mips64*-*-*, mips64r2*-*-*): Make
 432         every configuration support all four targets, using the triplet to
 433         determine the default.
 434         * configure: Regenerate.
 435
 436 2007-06-25  Richard Sandiford  <richard@codesourcery.com>
 437
 438         * Makefile.in (m16run.o): New rule.
 439
 440 2007-05-15  Thiemo Seufer  <ths@mips.com>
 441
 442         * mips3264r2.igen (DSHD): Fix compile warning.
 443
 444 2007-05-14  Thiemo Seufer  <ths@mips.com>
 445
 446         * mips.igen (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL,
 447         CVT.S.PU, FLOOR.L.fmt, LDXC1, LUXC1, LWXC1, MADD.fmt, MSUB.fmt,
 448         NMADD.fmt, NMSUB.fmt, PLL.PS, PLU.PS, PREFX, PUL.PS, PUU.PS,
 449         RECIP.fmt, ROUND.L.fmt, RSQRT.fmt, SWXC1, TRUNC.L.fmt): Add support
 450         for mips32r2.
 451
 452 2007-03-01  Thiemo Seufer  <ths@mips.com>
 453
 454         * mips.igen (MFHI, MFLO, MTHI, MTLO): Restore support for mips32
 455         and mips64.
 456
 457 2007-02-20  Thiemo Seufer  <ths@mips.com>
 458
 459         * dsp.igen: Update copyright notice.
 460         * dsp2.igen: Fix copyright notice.
 461
 462 2007-02-20  Thiemo Seufer  <ths@mips.com>
 463             Chao-Ying Fu  <fu@mips.com>
 464
 465         * Makefile.in (IGEN_INCLUDE): Add dsp2.igen.
 466         * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
 467         Add dsp2 to sim_igen_machine.
 468         * configure: Regenerate.
 469         * dsp.igen (do_ph_op): Add MUL support when op = 2.
 470         (do_ph_mulq): New function to support mulq_rs.ph and mulq_s.ph.
 471         (mulq_rs.ph): Use do_ph_mulq.
 472         (MFHI, MFLO, MTHI, MTLO): Move these instructions to mips.igen.
 473         * mips.igen: Add dsp2 model and include dsp2.igen.
 474         (MFHI, MFLO, MTHI, MTLO): Extend these instructions for
 475         for *mips32r2, *mips64r2, *dsp.
 476         (MADD, MADDU, MSUB, MSUBU, MULT, MULTU): Extend these instructions
 477         for *mips32r2, *mips64r2, *dsp2.
 478         * dsp2.igen: New file for MIPS DSP REV 2 ASE.
 479
 480 2007-02-19  Thiemo Seufer  <ths@mips.com>
 481             Nigel Stephens  <nigel@mips.com>
 482
 483         * mips.igen (jalr.hb, jr.hb): Add decoder for mip32r2/mips64r2
 484         jumps with hazard barrier.
 485
 486 2007-02-19  Thiemo Seufer  <ths@mips.com>
 487             Nigel Stephens  <nigel@mips.com>
 488
 489         * interp.c (sim_monitor): Flush stdout and stderr file descriptors
 490         after each call to sim_io_write.
 491
 492 2007-02-19  Thiemo Seufer  <ths@mips.com>
 493             Nigel Stephens  <nigel@mips.com>
 494
 495         * interp.c (ColdReset): Set CP0 Config0 to reflect the address size
 496         supported by this simulator.
 497         (decode_coproc): Recognise additional CP0 Config registers
 498         correctly.
 499
 500 2007-02-19  Thiemo Seufer  <ths@mips.com>
 501             Nigel Stephens  <nigel@mips.com>
 502             David Ung  <davidu@mips.com>
 503
 504         * cp1.c (value_fpr): Don't inherit existing FPR_STATE for
 505         uninterpreted formats. If fmt is one of the uninterpreted types
 506         don't update the FPR_STATE. Handle fmt_uninterpreted_32 like
 507         fmt_word, and fmt_uninterpreted_64 like fmt_long.
 508         (store_fpr): When writing an invalid odd register, set the
 509         matching even register to fmt_unknown, not the following register.
 510         * interp.c (sim_open): If STATE_MEM_SIZE isn't set then set it to
 511         the the memory window at offset 0 set by --memory-size command
 512         line option.
 513         (sim_store_register): Handle storing 4 bytes to an 8 byte floating
 514         point register.
 515         (sim_fetch_register): Likewise for reading 4 bytes from an 8 byte
 516         register.
 517         (sim_monitor): When returning the memory size to the MIPS
 518         application, use the value in STATE_MEM_SIZE, not an arbitrary
 519         hardcoded value.
 520         (cop_lw): Don' mess around with FPR_STATE, just pass
 521         fmt_uninterpreted_32 to StoreFPR.
 522         (cop_sw): Similarly.
 523         (cop_ld): Pass fmt_uninterpreted_64 not fmt_uninterpreted.
 524         (cop_sd): Similarly.
 525         * mips.igen (not_word_value): Single version for mips32, mips64
 526         and mips16.
 527
 528 2007-02-19  Thiemo Seufer <ths@mips.com>
 529             Nigel Stephens  <nigel@mips.com>
 530
 531         * interp.c (MEM_SIZE): Increase default memory size from 2 to 8
 532         MBytes.
 533
 534 2007-02-17  Thiemo Seufer  <ths@mips.com>
 535
 536         * configure.ac (mips*-sde-elf*): Move in front of generic machine
 537         configuration.
 538         * configure: Regenerate.
 539
 540 2007-02-17  Thiemo Seufer  <ths@mips.com>
 541
 542         * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
 543         Add mdmx to sim_igen_machine.
 544         (mipsisa64*-*-*): Likewise. Remove dsp.
 545         (mipsisa32*-*-*): Remove dsp.
 546         * configure: Regenerate.
 547
 548 2007-02-13  Thiemo Seufer  <ths@mips.com>
 549
 550         * configure.ac: Add mips*-sde-elf* target.
 551         * configure: Regenerate.
 552
 553 2006-12-21  Hans-Peter Nilsson  <hp@axis.com>
 554
 555         * acconfig.h: Remove.
 556         * config.in, configure: Regenerate.
 557
 558 2006-11-07  Thiemo Seufer  <ths@mips.com>
 559
 560         * dsp.igen (do_w_op): Fix compiler warning.
 561
 562 2006-08-29  Thiemo Seufer  <ths@mips.com>
 563             David Ung  <davidu@mips.com>
 564
 565         * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*): Add smartmips to
 566         sim_igen_machine.
 567         * configure: Regenerate.
 568         * mips.igen (model): Add smartmips.
 569         (MADDU): Increment ACX if carry.
 570         (do_mult): Clear ACX.
 571         (ROR,RORV): Add smartmips.
 572         (include): Include smartmips.igen.
 573         * sim-main.h (ACX): Set to REGISTERS[89].
 574         * smartmips.igen: New file.
 575
 576 2006-08-29  Thiemo Seufer  <ths@mips.com>
 577             David Ung  <davidu@mips.com>
 578
 579         * Makefile.in (IGEN_INCLUDE): Add missing includes for m16e.igen and
 580         mips3264r2.igen. Add missing dependency rules.
 581         * m16e.igen: Support for mips16e save/restore instructions.
 582
 583 2006-06-13  Richard Earnshaw  <rearnsha@arm.com>
 584
 585         * configure: Regenerated.
 586
 587 2006-06-05  Daniel Jacobowitz  <dan@codesourcery.com>
 588
 589         * configure: Regenerated.
 590
 591 2006-05-31  Daniel Jacobowitz  <dan@codesourcery.com>
 592
 593         * configure: Regenerated.
 594
 595 2006-05-15 Chao-ying Fu  <fu@mips.com>
 596
 597         * dsp.igen (do_ph_shift, do_w_shra): Fix bugs for rounding instructions.
 598
 599 2006-04-18  Nick Clifton  <nickc@redhat.com>
 600
 601         * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Add missing break
 602         statement.
 603
 604 2006-03-29  Hans-Peter Nilsson  <hp@axis.com>
 605
 606         * configure: Regenerate.
 607
 608 2005-12-14  Chao-ying Fu  <fu@mips.com>
 609
 610         * Makefile.in (SIM_OBJS): Add dsp.o.
 611         (dsp.o): New dependency.
 612         (IGEN_INCLUDE): Add dsp.igen.
 613         * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*, mipsisa64r2*-*-*,
 614         mipsisa64*-*-*): Add dsp to sim_igen_machine.
 615         * configure: Regenerate.
 616         * mips.igen: Add dsp model and include dsp.igen.
 617         (MFHI, MFLO, MTHI, MTLO): Remove mips32, mips32r2, mips64, mips64r2,
 618         because these instructions are extended in DSP ASE.
 619         * sim-main.h (LAST_EMBED_REGNUM): Change from 89 to 96 because of
 620         adding 6 DSP accumulator registers and 1 DSP control register.
 621         (AC0LOIDX, AC0HIIDX, AC1LOIDX, AC1HIIDX, AC2LOIDX, AC2HIIDX, AC3LOIDX,
 622         AC3HIIDX, DSPLO, DSPHI, DSPCRIDX, DSPCR, DSPCR_POS_SHIFT,
 623         DSPCR_POS_MASK, DSPCR_POS_SMASK, DSPCR_SCOUNT_SHIFT, DSPCR_SCOUNT_MASK,
 624         DSPCR_SCOUNT_SMASK, DSPCR_CARRY_SHIFT, DSPCR_CARRY_MASK,
 625         DSPCR_CARRY_SMASK, DSPCR_CARRY, DSPCR_EFI_SHIFT, DSPCR_EFI_MASK,
 626         DSPCR_EFI_SMASK, DSPCR_EFI, DSPCR_OUFLAG_SHIFT, DSPCR_OUFLAG_MASK,
 627         DSPCR_OUFLAG_SMASK, DSPCR_OUFLAG4, DSPCR_OUFLAG5, DSPCR_OUFLAG6,
 628         DSPCR_OUFLAG7, DSPCR_CCOND_SHIFT, DSPCR_CCOND_MASK,
 629         DSPCR_CCOND_SMASK): New define.
 630         (DSPLO_REGNUM, DSPHI_REGNUM): New array for DSP accumulators.
 631         * dsp.c, dsp.igen: New files for MIPS DSP ASE.
 632
 633 2005-07-08  Ian Lance Taylor  <ian@airs.com>
 634
 635         * tconfig.in (SIM_QUIET_NAN_NEGATED): Define.
 636
 637 2005-06-16  David Ung  <davidu@mips.com>
 638             Nigel Stephens  <nigel@mips.com>
 639
 640         * mips.igen: New mips16e model and include m16e.igen.
 641         (check_u64): Add mips16e tag.
 642         * m16e.igen: New file for MIPS16e instructions.
 643         * configure.ac (mipsisa32*-*-*, mipsisa32r2*-*-*, mipsisa64*-*-*,
 644         mipsisa64r2*-*-*): Change sim_gen to M16, add mips16 and mips16e
 645         models.
 646         * configure: Regenerate.
 647
 648 2005-05-26  David Ung  <davidu@mips.com>
 649
 650         * mips.igen (mips32r2, mips64r2): New ISA models.  Add new model
 651         tags to all instructions which are applicable to the new ISAs.
 652         (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Add, moved from
 653         vr.igen.
 654         * mips3264r2.igen: New file for MIPS 32/64 revision 2 specific
 655         instructions.
 656         * vr.igen (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Move
 657         to mips.igen.
 658         * configure.ac (mipsisa32r2*-*-*, mipsisa64r2*-*-*): Add new targets.
 659         * configure: Regenerate.
 660
 661 2005-03-23  Mark Kettenis  <kettenis@gnu.org>
 662
 663         * configure: Regenerate.
 664
 665 2005-01-14  Andrew Cagney  <cagney@gnu.org>
 666
 667         * configure.ac: Sinclude aclocal.m4 before common.m4.  Add
 668         explicit call to AC_CONFIG_HEADER.
 669         * configure: Regenerate.
 670
 671 2005-01-12  Andrew Cagney  <cagney@gnu.org>
 672
 673         * configure.ac: Update to use ../common/common.m4.
 674         * configure: Re-generate.
 675
 676 2005-01-11  Andrew Cagney  <cagney@localhost.localdomain>
 677
 678         * configure: Regenerated to track ../common/aclocal.m4 changes.
 679
 680 2005-01-07  Andrew Cagney  <cagney@gnu.org>
 681
 682         * configure.ac: Rename configure.in, require autoconf 2.59.
 683         * configure: Re-generate.
 684
 685 2004-12-08  Hans-Peter Nilsson  <hp@axis.com>
 686
 687         * configure: Regenerate for ../common/aclocal.m4 update.
 688
 689 2004-09-24  Monika Chaddha  <monika@acmet.com>
 690
 691         Committed by Andrew Cagney.
 692         * m16.igen (CMP, CMPI): Fix assembler.
 693
 694 2004-08-18  Chris Demetriou  <cgd@broadcom.com>
 695
 696         * configure.in (mipsisa64sb1*-*-*): Add mips3d to sim_igen_machine.
 697         * configure: Regenerate.
 698
 699 2004-06-25  Chris Demetriou  <cgd@broadcom.com>
 700
 701         * configure.in (sim_m16_machine): Include mipsIII.
 702         * configure: Regenerate.
 703
 704 2004-05-11  Maciej W. Rozycki  <macro@ds2.pg.gda.pl>
 705
 706         * mips/interp.c (decode_coproc): Sign-extend the address retrieved
 707         from COP0_BADVADDR.
 708         * mips/sim-main.h (COP0_BADVADDR): Remove a cast.
 709
 710 2004-04-10  Chris Demetriou  <cgd@broadcom.com>
 711
 712         * sb1.igen (DIV.PS, RECIP.PS, RSQRT.PS, SQRT.PS): New.
 713
 714 2004-04-09  Chris Demetriou  <cgd@broadcom.com>
 715
 716         * mips.igen (check_fmt): Remove.
 717         (ABS.fmt, ADD.fmt, C.cond.fmta, C.cond.fmtb, CEIL.L.fmt, CEIL.W)
 718         (CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt, FLOOR.L.fmt)
 719         (FLOOR.W.fmt, MADD.fmt, MOV.fmt, MOVtf.fmt, MOVN.fmt, MOVZ.fmt)
 720         (MSUB.fmt, MUL.fmt, NEG.fmt, NMADD.fmt, NMSUB.fmt, RECIP.fmt)
 721         (ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt)
 722         (TRUNC.L.fmt, TRUNC.W): Explicitly specify allowed FPU formats.
 723         (check_fmt_p, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
 724         (FLOOR.W.fmt, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt)
 725         (SQRT.fmt, TRUNC.L.fmt, TRUNC.W): Remove all uses of check_fmt.
 726         (C.cnd.fmta): Remove incorrect call to check_fmt_p.
 727
 728 2004-04-09  Chris Demetriou  <cgd@broadcom.com>
 729
 730         * sb1.igen (check_sbx): New function.
 731         (PABSDIFF.fmt, PABSDIFC.fmt, PAVG.fmt): Use check_sbx.
 732
 733 2004-03-29  Chris Demetriou  <cgd@broadcom.com>
 734             Richard Sandiford  <rsandifo@redhat.com>
 735
 736         * sim-main.h (MIPS_MACH_HAS_MT_HILO_HAZARD)
 737         (MIPS_MACH_HAS_MULT_HILO_HAZARD, MIPS_MACH_HAS_DIV_HILO_HAZARD): New.
 738         * mips.igen (check_mt_hilo, check_mult_hilo, check_div_hilo): Provide
 739         separate implementations for mipsIV and mipsV.  Use new macros to
 740         determine whether the restrictions apply.
 741
 742 2004-01-19  Chris Demetriou  <cgd@broadcom.com>
 743
 744         * mips.igen (check_mf_cycles, check_mt_hilo, check_mf_hilo)
 745         (check_mult_hilo): Improve comments.
 746         (check_div_hilo): Likewise.  Also, fork off a new version
 747         to handle mips32/mips64 (since there are no hazards to check
 748         in MIPS32/MIPS64).
 749
 750 2003-06-17  Richard Sandiford  <rsandifo@redhat.com>
 751
 752         * mips.igen (do_dmultx): Fix check for negative operands.
 753
 754 2003-05-16  Ian Lance Taylor  <ian@airs.com>
 755
 756         * Makefile.in (SHELL): Make sure this is defined.
 757         (various): Use $(SHELL) whenever we invoke move-if-change.
 758
 759 2003-05-03  Chris Demetriou  <cgd@broadcom.com>
 760
 761         * cp1.c: Tweak attribution slightly.
 762         * cp1.h: Likewise.
 763         * mdmx.c: Likewise.
 764         * mdmx.igen: Likewise.
 765         * mips3d.igen: Likewise.
 766         * sb1.igen: Likewise.
 767
 768 2003-04-15  Richard Sandiford  <rsandifo@redhat.com>
 769
 770         * vr.igen (do_vr_mul_op): Zero-extend the low 32 bits of
 771         unsigned operands.
 772
 773 2003-02-27  Andrew Cagney  <cagney@redhat.com>
 774
 775         * interp.c (sim_open): Rename _bfd to bfd.
 776         (sim_create_inferior): Ditto.
 777
 778 2003-01-14  Chris Demetriou  <cgd@broadcom.com>
 779
 780         * mips.igen (LUXC1, SUXC1): New, for mipsV and mips64.
 781
 782 2003-01-14  Chris Demetriou  <cgd@broadcom.com>
 783
 784         * mips.igen (EI, DI): Remove.
 785
 786 2003-01-05  Richard Sandiford  <rsandifo@redhat.com>
 787
 788         * Makefile.in (tmp-run-multi): Fix mips16 filter.
 789
 790 2003-01-04  Richard Sandiford  <rsandifo@redhat.com>
 791             Andrew Cagney  <ac131313@redhat.com>
 792             Gavin Romig-Koch  <gavin@redhat.com>
 793             Graydon Hoare  <graydon@redhat.com>
 794             Aldy Hernandez  <aldyh@redhat.com>
 795             Dave Brolley  <brolley@redhat.com>
 796             Chris Demetriou  <cgd@broadcom.com>
 797
 798         * configure.in (mips64vr*): Define TARGET_ENABLE_FR to 1.
 799         (sim_mach_default): New variable.
 800         (mips64vr-*-*, mips64vrel-*-*): New configurations.
 801         Add a new simulator generator, MULTI.
 802         * configure: Regenerate.
 803         * Makefile.in (SIM_MULTI_OBJ, SIM_EXTRA_DISTCLEAN): New variables.
 804         (multi-run.o): New dependency.
 805         (SIM_MULTI_ALL, SIM_MULTI_IGEN_CONFIGS): New variables.
 806         (tmp-mach-multi, tmp-itable-multi, tmp-run-multi): New rules.
 807         (tmp-multi): Combine them.
 808         (BUILT_SRC_FROM_MULTI): New variable.  Depend on tmp-multi.
 809         (clean-extra): Remove sources in BUILT_SRC_FROM_MULTI.
 810         (distclean-extra): New rule.
 811         * sim-main.h: Include bfd.h.
 812         (MIPS_MACH): New macro.
 813         * mips.igen (vr4120, vr5400, vr5500): New models.
 814         (clo, clz, dclo, dclz, madd, maddu, msub, msub, mul): Add *vr5500.
 815         * vr.igen: Replace with new version.
 816
 817 2003-01-04  Chris Demetriou  <cgd@broadcom.com>
 818
 819         * configure.in: Use SIM_AC_OPTION_RESERVED_BITS(1).
 820         * configure: Regenerate.
 821
 822 2002-12-31  Chris Demetriou  <cgd@broadcom.com>
 823
 824         * sim-main.h (check_branch_bug, mark_branch_bug): Remove.
 825         * mips.igen: Remove all invocations of check_branch_bug and
 826         mark_branch_bug.
 827
 828 2002-12-16  Chris Demetriou  <cgd@broadcom.com>
 829
 830         * tconfig.in: Include "gdb/callback.h" and "gdb/remote-sim.h".
 831
 832 2002-07-30  Chris Demetriou  <cgd@broadcom.com>
 833
 834         * mips.igen (do_load_double, do_store_double): New functions.
 835         (LDC1, SDC1): Rename to...
 836         (LDC1b, SDC1b): respectively.
 837         (LDC1a, SDC1a): New instructions for MIPS II and MIPS32 support.
 838
 839 2002-07-29  Michael Snyder  <msnyder@redhat.com>
 840
 841         * cp1.c (fp_recip2): Modify initialization expression so that
 842         GCC will recognize it as constant.
 843
 844 2002-06-18  Chris Demetriou  <cgd@broadcom.com>
 845
 846         * mdmx.c (SD_): Delete.
 847         (Unpredictable): Re-define, for now, to directly invoke
 848         unpredictable_action().
 849         (mdmx_acc_op): Fix error in .ob immediate handling.
 850
 851 2002-06-18  Andrew Cagney  <cagney@redhat.com>
 852
 853         * interp.c (sim_firmware_command): Initialize `address'.
 854
 855 2002-06-16  Andrew Cagney  <ac131313@redhat.com>
 856
 857         * configure: Regenerated to track ../common/aclocal.m4 changes.
 858
 859 2002-06-14  Chris Demetriou  <cgd@broadcom.com>
 860             Ed Satterthwaite  <ehs@broadcom.com>
 861
 862         * mips3d.igen: New file which contains MIPS-3D ASE instructions.
 863         * Makefile.in (IGEN_INCLUDE): Add mips3d.igen.
 864         * mips.igen: Include mips3d.igen.
 865         (mips3d): New model name for MIPS-3D ASE instructions.
 866         (CVT.W.fmt): Don't use this instruction for word (source) format
 867         instructions.
 868         * cp1.c (fp_binary_r, fp_add_r, fp_mul_r, fpu_inv1, fpu_inv1_32)
 869         (fpu_inv1_64, fp_recip1, fp_recip2, fpu_inv_sqrt1, fpu_inv_sqrt1_32)
 870         (fpu_inv_sqrt1_64, fp_rsqrt1, fp_rsqrt2): New functions.
 871         (NR_FRAC_GUARD, IMPLICIT_1): New macros.
 872         * sim-main.h (fmt_pw, CompareAbs, AddR, MultiplyR, Recip1, Recip2)
 873         (RSquareRoot1, RSquareRoot2): New macros.
 874         (fp_add_r, fp_mul_r, fp_recip1, fp_recip2, fp_rsqrt1)
 875         (fp_rsqrt2): New functions.
 876         * configure.in: Add MIPS-3D support to mipsisa64 simulator.
 877         * configure: Regenerate.
 878
 879 2002-06-13  Chris Demetriou  <cgd@broadcom.com>
 880             Ed Satterthwaite  <ehs@broadcom.com>
 881
 882         * cp1.c (FP_PS_upper, FP_PS_lower, FP_PS_cat, FPQNaN_PS): New macros.
 883         (value_fpr, store_fpr, fp_cmp, fp_unary, fp_binary, fp_mac)
 884         (fp_inv_sqrt, fpu_format_name): Add paired-single support.
 885         (convert): Note that this function is not used for paired-single
 886         format conversions.
 887         (ps_lower, ps_upper, pack_ps, convert_ps): New functions.
 888         * mips.igen (FMT, MOVtf.fmt): Add paired-single support.
 889         (check_fmt_p): Enable paired-single support.
 890         (ALNV.PS, CVT.PS.S, CVT.S.PL, CVT.S.PU, PLL.PS, PLU.PS, PUL.PS)
 891         (PUU.PS): New instructions.
 892         (CVT.S.fmt): Don't use this instruction for paired-single format
 893         destinations.
 894         * sim-main.h (FP_formats): New value 'fmt_ps.'
 895         (ps_lower, ps_upper, pack_ps, convert_ps): New prototypes.
 896         (PSLower, PSUpper, PackPS, ConvertPS): New macros.
 897
 898 2002-06-12  Chris Demetriou  <cgd@broadcom.com>
 899
 900         * mips.igen: Fix formatting of function calls in
 901         many FP operations.
 902
 903 2002-06-12  Chris Demetriou  <cgd@broadcom.com>
 904
 905         * mips.igen (MOVN, MOVZ): Trace result.
 906         (TNEI): Print "tnei" as the opcode name in traces.
 907         (CEIL.W): Add disassembly string for traces.
 908         (RSQRT.fmt): Make location of disassembly string consistent
 909         with other instructions.
 910
 911 2002-06-12  Chris Demetriou  <cgd@broadcom.com>
 912
 913         * mips.igen (X): Delete unused function.
 914
 915 2002-06-08  Andrew Cagney  <cagney@redhat.com>
 916
 917         * interp.c: Include "gdb/callback.h" and "gdb/remote-sim.h".
 918
 919 2002-06-07  Chris Demetriou  <cgd@broadcom.com>
 920             Ed Satterthwaite  <ehs@broadcom.com>
 921
 922         * cp1.c (inner_mac, fp_mac, inner_rsqrt, fp_inv_sqrt)
 923         (fp_rsqrt, fp_madd, fp_msub, fp_nmadd, fp_nmsub): New functions.
 924         * sim-main.h (fp_rsqrt, fp_madd, fp_msub, fp_nmadd)
 925         (fp_nmsub): New prototypes.
 926         (RSquareRoot, MultiplyAdd, MultiplySub, NegMultiplyAdd)
 927         (NegMultiplySub): New defines.
 928         * mips.igen (RSQRT.fmt): Use RSquareRoot().
 929         (MADD.D, MADD.S): Replace with...
 930         (MADD.fmt): New instruction.
 931         (MSUB.D, MSUB.S): Replace with...
 932         (MSUB.fmt): New instruction.
 933         (NMADD.D, NMADD.S): Replace with...
 934         (NMADD.fmt): New instruction.
 935         (NMSUB.D, MSUB.S): Replace with...
 936         (NMSUB.fmt): New instruction.
 937
 938 2002-06-07  Chris Demetriou  <cgd@broadcom.com>
 939             Ed Satterthwaite  <ehs@broadcom.com>
 940
 941         * cp1.c: Fix more comment spelling and formatting.
 942         (value_fcr, store_fcr): Use fenr_FS rather than hard-coding value.
 943         (denorm_mode): New function.
 944         (fpu_unary, fpu_binary): Round results after operation, collect
 945         status from rounding operations, and update the FCSR.
 946         (convert): Collect status from integer conversions and rounding
 947         operations, and update the FCSR.  Adjust NaN values that result
 948         from conversions.  Convert to use sim_io_eprintf rather than
 949         fprintf, and remove some debugging code.
 950         * cp1.h (fenr_FS): New define.
 951
 952 2002-06-07  Chris Demetriou  <cgd@broadcom.com>
 953
 954         * cp1.c (convert): Remove unusable debugging code, and move MIPS
 955         rounding mode to sim FP rounding mode flag conversion code into...
 956         (rounding_mode): New function.
 957
 958 2002-06-07  Chris Demetriou  <cgd@broadcom.com>
 959
 960         * cp1.c: Clean up formatting of a few comments.
 961         (value_fpr): Reformat switch statement.
 962
 963 2002-06-06  Chris Demetriou  <cgd@broadcom.com>
 964             Ed Satterthwaite  <ehs@broadcom.com>
 965
 966         * cp1.h: New file.
 967         * sim-main.h: Include cp1.h.
 968         (SETFCC, GETFCC, IR, UF, OF, DX, IO, UO, FP_FLAGS, FP_ENABLE)
 969         (FP_CAUSE, GETFS, FP_RM_NEAREST, FP_RM_TOZERO, FP_RM_TOPINF)
 970         (FP_RM_TOMINF, GETRM): Remove.  Moved to cp1.h.
 971         (FP_FS, FP_MASK_RM, FP_SH_RM, Nan, Less, Equal): Remove.
 972         (value_fcr, store_fcr, test_fcsr, fp_cmp): New prototypes.
 973         (ValueFCR, StoreFCR, TestFCSR, Compare): New macros.
 974         * cp1.c: Don't include sim-fpu.h; already included by
 975         sim-main.h.  Clean up formatting of some comments.
 976         (NaN, Equal, Less): Remove.
 977         (test_fcsr, value_fcr, store_fcr, update_fcsr, fp_test)
 978         (fp_cmp): New functions.
 979         * mips.igen (do_c_cond_fmt): Remove.
 980         (C.cond.fmta, C.cond.fmtb): Replace uses of do_c_cond_fmt_a with
 981         Compare.  Add result tracing.
 982         (CxC1): Remove, replace with...
 983         (CFC1a, CFC1b, CFC1c, CTC1a, CTC1b, CTC1c): New instructions.
 984         (DMxC1): Remove, replace with...
 985         (DMFC1a, DMFC1b, DMTC1a, DMTC1b): New instructions.
 986         (MxC1): Remove, replace with...
 987         (MFC1a, MFC1b, MTC1a, MTC1b): New instructions.
 988
 989 2002-06-04  Chris Demetriou  <cgd@broadcom.com>
 990
 991         * sim-main.h (FGRIDX): Remove, replace all uses with...
 992         (FGR_BASE): New macro.
 993         (FP0_REGNUM, FCRCS_REGNUM, FCRIR_REGNUM): New macros.
 994         (_sim_cpu): Move 'fgr' member to be right before 'fpr_state' member.
 995         (NR_FGR, FGR): Likewise.
 996         * interp.c: Replace all uses of FGRIDX with FGR_BASE.
 997         * mips.igen: Likewise.
 998
 999 2002-06-04  Chris Demetriou  <cgd@broadcom.com>
1000
1001         * cp1.c: Add an FSF Copyright notice to this file.
1002
1003 2002-06-04  Chris Demetriou  <cgd@broadcom.com>
1004             Ed Satterthwaite  <ehs@broadcom.com>
1005
1006         * cp1.c (Infinity): Remove.
1007         * sim-main.h (Infinity): Likewise.
1008
1009         * cp1.c (fp_unary, fp_binary): New functions.
1010         (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div, fp_recip)
1011         (fp_sqrt): New functions, implemented in terms of the above.
1012         (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
1013         (Recip, SquareRoot): Remove (replaced by functions above).
1014         * sim-main.h (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div)
1015         (fp_recip, fp_sqrt): New prototypes.
1016         (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
1017         (Recip, SquareRoot): Replace prototypes with #defines which
1018         invoke the functions above.
1019
1020 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
1021
1022         * sim-main.h (Nan, Infinity, Less, Equal, AbsoluteValue, Negate)
1023         (Add, Sub, Multiply, Divide, Recip, SquareRoot): Move lower in
1024         file, remove PARAMS from prototypes.
1025         (value_fpr, store_fpr, convert): Likewise.  Use SIM_STATE to provide
1026         simulator state arguments.
1027         (ValueFPR, StoreFPR, Convert): Move lower in file.  Use SIM_ARGS to
1028         pass simulator state arguments.
1029         * cp1.c (SD): Redefine as CPU_STATE(cpu).
1030         (store_fpr, convert): Remove 'sd' argument.
1031         (value_fpr): Likewise.  Convert to use 'SD' instead.
1032
1033 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
1034
1035         * cp1.c (Min, Max): Remove #if 0'd functions.
1036         * sim-main.h (Min, Max): Remove.
1037
1038 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
1039
1040         * cp1.c: fix formatting of switch case and default labels.
1041         * interp.c: Likewise.
1042         * sim-main.c: Likewise.
1043
1044 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
1045
1046         * cp1.c: Clean up comments which describe FP formats.
1047          (FPQNaN_DOUBLE, FPQNaN_LONG): Generate using UNSIGNED64.
1048
1049 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
1050             Ed Satterthwaite  <ehs@broadcom.com>
1051
1052         * configure.in (mipsisa64sb1*-*-*): New target for supporting
1053         Broadcom SiByte SB-1 processor configurations.
1054         * configure: Regenerate.
1055         * sb1.igen: New file.
1056         * mips.igen: Include sb1.igen.
1057         (sb1): New model.
1058         * Makefile.in (IGEN_INCLUDE): Add sb1.igen.
1059         * mdmx.igen: Add "sb1" model to all appropriate functions and
1060         instructions.
1061         * mdmx.c (AbsDiffOB, AvgOB, AccAbsDiffOB): New functions.
1062         (ob_func, ob_acc): Reference the above.
1063         (qh_acc): Adjust to keep the same size as ob_acc.
1064         * sim-main.h (status_SBX, MX_VECT_ABSD, MX_VECT_AVG, MX_AbsDiff)
1065         (MX_Avg, MX_VECT_ABSDA, MX_AbsDiffC): New macros.
1066
1067 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
1068
1069         * Makefile.in (IGEN_INCLUDE): Add mdmx.igen.
1070
1071 2002-06-02  Chris Demetriou  <cgd@broadcom.com>
1072             Ed Satterthwaite  <ehs@broadcom.com>
1073
1074         * mips.igen (mdmx): New (pseudo-)model.
1075         * mdmx.c, mdmx.igen: New files.
1076         * Makefile.in (SIM_OBJS): Add mdmx.o.
1077         * sim-main.h (MDMX_accumulator, MX_fmtsel, signed24, signed48):
1078         New typedefs.
1079         (ACC, MX_Add, MX_AddA, MX_AddL, MX_And, MX_C_EQ, MX_C_LT, MX_Comp)
1080         (MX_FMT_OB, MX_FMT_QH, MX_Max, MX_Min, MX_Msgn, MX_Mul, MX_MulA)
1081         (MX_MulL, MX_MulS, MX_MulSL, MX_Nor, MX_Or, MX_Pick, MX_RAC)
1082         (MX_RAC_H, MX_RAC_L, MX_RAC_M, MX_RNAS, MX_RNAU, MX_RND_AS)
1083         (MX_RND_AU, MX_RND_ES, MX_RND_EU, MX_RND_ZS, MX_RND_ZU, MX_RNES)
1084         (MX_RNEU, MX_RZS, MX_RZU, MX_SHFL, MX_ShiftLeftLogical)
1085         (MX_ShiftRightArith, MX_ShiftRightLogical, MX_Sub, MX_SubA, MX_SubL)
1086         (MX_VECT_ADD, MX_VECT_ADDA, MX_VECT_ADDL, MX_VECT_AND)
1087         (MX_VECT_MAX, MX_VECT_MIN, MX_VECT_MSGN, MX_VECT_MUL, MX_VECT_MULA)
1088         (MX_VECT_MULL, MX_VECT_MULS, MX_VECT_MULSL, MX_VECT_NOR)
1089         (MX_VECT_OR, MX_VECT_SLL, MX_VECT_SRA, MX_VECT_SRL, MX_VECT_SUB)
1090         (MX_VECT_SUBA, MX_VECT_SUBL, MX_VECT_XOR, MX_WACH, MX_WACL, MX_Xor)
1091         (SIM_ARGS, SIM_STATE, UnpredictableResult, fmt_mdmx, ob_fmtsel)
1092         (qh_fmtsel): New macros.
1093         (_sim_cpu): New member "acc".
1094         (mdmx_acc_op, mdmx_cc_op, mdmx_cpr_op, mdmx_pick_op, mdmx_rac_op)
1095         (mdmx_round_op, mdmx_shuffle, mdmx_wach, mdmx_wacl): New functions.
1096
1097 2002-05-01  Chris Demetriou  <cgd@broadcom.com>
1098
1099         * interp.c: Use 'deprecated' rather than 'depreciated.'
1100         * sim-main.h: Likewise.
1101
1102 2002-05-01  Chris Demetriou  <cgd@broadcom.com>
1103
1104         * cp1.c (store_fpr): Remove #ifdef'd out call to UndefinedResult
1105         which wouldn't compile anyway.
1106         * sim-main.h (unpredictable_action): New function prototype.
1107         (Unpredictable): Define to call igen function unpredictable().
1108         (NotWordValue): New macro to call igen function not_word_value().
1109         (UndefinedResult): Remove.
1110         * interp.c (undefined_result): Remove.
1111         (unpredictable_action): New function.
1112         * mips.igen (not_word_value, unpredictable): New functions.
1113         (ADD, ADDI, do_addiu, do_addu, BGEZAL, BGEZALL, BLTZAL, BLTZALL)
1114         (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, do_mult, do_multu)
1115         (do_sra, do_srav, do_srl, do_srlv, SUB, do_subu): Invoke
1116         NotWordValue() to check for unpredictable inputs, then
1117         Unpredictable() to handle them.
1118
1119 2002-02-24  Chris Demetriou  <cgd@broadcom.com>
1120
1121         * mips.igen: Fix formatting of calls to Unpredictable().
1122
1123 2002-04-20  Andrew Cagney  <ac131313@redhat.com>
1124
1125         * interp.c (sim_open): Revert previous change.
1126
1127 2002-04-18  Alexandre Oliva  <aoliva@redhat.com>
1128
1129         * interp.c (sim_open): Disable chunk of code that wrote code in
1130         vector table entries.
1131
1132 2002-03-19  Chris Demetriou  <cgd@broadcom.com>
1133
1134         * cp1.c (FP_S_s, FP_D_s, FP_S_be, FP_D_be, FP_S_e, FP_D_e, FP_S_f)
1135         (FP_D_f, FP_S_fb, FP_D_fb, FPINF_SINGLE, FPINF_DOUBLE): Remove
1136         unused definitions.
1137
1138 2002-03-19  Chris Demetriou  <cgd@broadcom.com>
1139
1140         * cp1.c: Fix many formatting issues.
1141
1142 2002-03-19  Chris G. Demetriou  <cgd@broadcom.com>
1143
1144         * cp1.c (fpu_format_name): New function to replace...
1145         (DOFMT): This.  Delete, and update all callers.
1146         (fpu_rounding_mode_name): New function to replace...
1147         (RMMODE): This.  Delete, and update all callers.
1148
1149 2002-03-19  Chris G. Demetriou  <cgd@broadcom.com>
1150
1151         * interp.c: Move FPU support routines from here to...
1152         * cp1.c: Here.  New file.
1153         * Makefile.in (SIM_OBJS): Add cp1.o to object list.
1154         (cp1.o): New target.
1155
1156 2002-03-12  Chris Demetriou  <cgd@broadcom.com>
1157
1158         * configure.in (mipsisa32*-*-*, mipsisa64*-*-*): New targets.
1159         * mips.igen (mips32, mips64): New models, add to all instructions
1160         and functions as appropriate.
1161         (loadstore_ea, check_u64): New variant for model mips64.
1162         (check_fmt_p): New variant for models mipsV and mips64, remove
1163         mipsV model marking fro other variant.
1164         (SLL) Rename to...
1165         (SLLa) this.
1166         (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, SLLb): New instructions
1167         for mips32 and mips64.
1168         (DCLO, DCLZ): New instructions for mips64.
1169
1170 2002-03-07  Chris Demetriou  <cgd@broadcom.com>
1171
1172         * mips.igen (BREAK, LUI, ORI, SYSCALL, XORI): Print
1173         immediate or code as a hex value with the "%#lx" format.
1174         (ANDI): Likewise, and fix printed instruction name.
1175
1176 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
1177
1178         * sim-main.h (UndefinedResult, Unpredictable): New macros
1179         which currently do nothing.
1180
1181 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
1182
1183         * sim-main.h (status_UX, status_SX, status_KX, status_TS)
1184         (status_PX, status_MX, status_CU0, status_CU1, status_CU2)
1185         (status_CU3): New definitions.
1186
1187         * sim-main.h (ExceptionCause): Add new values for MIPS32
1188         and MIPS64: MDMX, MCheck, CacheErr.  Update comments
1189         for DebugBreakPoint and NMIReset to note their status in
1190         MIPS32 and MIPS64.
1191         (SignalExceptionMDMX, SignalExceptionWatch, SignalExceptionMCheck)
1192         (SignalExceptionCacheErr): New exception macros.
1193
1194 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
1195
1196         * mips.igen (check_fpu): Enable check for coprocessor 1 usability.
1197         * sim-main.h (COP_Usable): Define, but for now coprocessor 1
1198         is always enabled.
1199         (SignalExceptionCoProcessorUnusable): Take as argument the
1200         unusable coprocessor number.
1201
1202 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
1203
1204         * mips.igen: Fix formatting of all SignalException calls.
1205
1206 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
1207
1208         * sim-main.h (SIGNEXTEND): Remove.
1209
1210 2002-03-04  Chris Demetriou  <cgd@broadcom.com>
1211
1212         * mips.igen: Remove gencode comment from top of file, fix
1213         spelling in another comment.
1214
1215 2002-03-04  Chris Demetriou  <cgd@broadcom.com>
1216
1217         * mips.igen (check_fmt, check_fmt_p): New functions to check
1218         whether specific floating point formats are usable.
1219         (ABS.fmt, ADD.fmt, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
1220         (FLOOR.W.fmt, MOV.fmt, MUL.fmt, NEG.fmt, RECIP.fmt, ROUND.L.fmt)
1221         (ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt, TRUNC.L.fmt, TRUNC.W):
1222         Use the new functions.
1223         (do_c_cond_fmt): Remove format checks...
1224         (C.cond.fmta, C.cond.fmtb): And move them into all callers.
1225
1226 2002-03-03  Chris Demetriou  <cgd@broadcom.com>
1227
1228         * mips.igen: Fix formatting of check_fpu calls.
1229
1230 2002-03-03  Chris Demetriou  <cgd@broadcom.com>
1231
1232         * mips.igen (FLOOR.L.fmt): Store correct destination register.
1233
1234 2002-03-03  Chris Demetriou  <cgd@broadcom.com>
1235
1236         * mips.igen: Remove whitespace at end of lines.
1237
1238 2002-03-02  Chris Demetriou  <cgd@broadcom.com>
1239
1240         * mips.igen (loadstore_ea): New function to do effective
1241         address calculations.
1242         (do_load, do_load_left, do_load_right, LL, LDD, PREF, do_store,
1243         do_store_left, do_store_right, SC, SCD, PREFX, SWC1, SWXC1,
1244         CACHE): Use loadstore_ea to do effective address computations.
1245
1246 2002-03-02  Chris Demetriou  <cgd@broadcom.com>
1247
1248         * interp.c (load_word): Use EXTEND32 rather than SIGNEXTEND.
1249         * mips.igen (LL, CxC1, MxC1): Likewise.
1250
1251 2002-03-02  Chris Demetriou  <cgd@broadcom.com>
1252
1253         * mips.igen (LL, LLD, PREF, SC, SCD, ABS.fmt, ADD.fmt, CEIL.L.fmt,
1254         CEIL.W, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt,
1255         FLOOR.L.fmt, FLOOR.W.fmt, MADD.D, MADD.S, MOV.fmt, MOVtf.fmt,
1256         MSUB.D, MSUB.S, MUL.fmt, NEG.fmt, NMADD.D, NMADD.S, NMSUB.D,
1257         NMSUB.S, PREFX, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt,
1258         SQRT.fmt, SUB.fmt, SWC1, SWXC1, TRUNC.L.fmt, TRUNC.W, CACHE):
1259         Don't split opcode fields by hand, use the opcode field values
1260         provided by igen.
1261
1262 2002-03-01  Chris Demetriou  <cgd@broadcom.com>
1263
1264         * mips.igen (do_divu): Fix spacing.
1265
1266         * mips.igen (do_dsllv): Move to be right before DSLLV,
1267         to match the rest of the do_<shift> functions.
1268
1269 2002-03-01  Chris Demetriou  <cgd@broadcom.com>
1270
1271         * mips.igen (do_dsll, do_dsllv, DSLL32, do_dsra, DSRA32, do_dsrl,
1272         DSRL32, do_dsrlv): Trace inputs and results.
1273
1274 2002-03-01  Chris Demetriou  <cgd@broadcom.com>
1275
1276         * mips.igen (CACHE): Provide instruction-printing string.
1277
1278         * interp.c (signal_exception): Comment tokens after #endif.
1279
1280 2002-02-28  Chris Demetriou  <cgd@broadcom.com>
1281
1282         * mips.igen (LWXC1): Mark with filter "64,f", rather than just "32".
1283         (MOVtf, MxC1, MxC1, DMxC1, DMxC1, CxC1, CxC1, SQRT.fmt, MOV.fmt,
1284         NEG.fmt, ROUND.L.fmt, TRUNC.L.fmt, CEIL.L.fmt, FLOOR.L.fmt,
1285         ROUND.W.fmt, TRUNC.W, CEIL.W, FLOOR.W.fmt, RECIP.fmt, RSQRT.fmt,
1286         CVT.S.fmt, CVT.D.fmt, CVT.W.fmt, CVT.L.fmt, MOVtf.fmt, C.cond.fmta,
1287         C.cond.fmtb, SUB.fmt, MUL.fmt, DIV.fmt, MOVZ.fmt, MOVN.fmt, LDXC1,
1288         SWXC1, SDXC1, MSUB.D, MSUB.S, NMADD.S, NMADD.D, NMSUB.S, NMSUB.D,
1289         LWC1, SWC1): Add "f" to filter, since these are FP instructions.
1290
1291 2002-02-28  Chris Demetriou  <cgd@broadcom.com>
1292
1293         * mips.igen (DSRA32, DSRAV): Fix order of arguments in
1294         instruction-printing string.
1295         (LWU): Use '64' as the filter flag.
1296
1297 2002-02-28  Chris Demetriou  <cgd@broadcom.com>
1298
1299         * mips.igen (SDXC1): Fix instruction-printing string.
1300
1301 2002-02-28  Chris Demetriou  <cgd@broadcom.com>
1302
1303         * mips.igen (LDC1, SDC1): Remove mipsI model, and mark with
1304         filter flags "32,f".
1305
1306 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
1307
1308         * mips.igen (PREFX): This is a 64-bit instruction, use '64'
1309         as the filter flag.
1310
1311 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
1312
1313         * mips.igen (PREFX): Tweak instruction opcode fields (i.e.,
1314         add a comma) so that it more closely match the MIPS ISA
1315         documentation opcode partitioning.
1316         (PREF): Put useful names on opcode fields, and include
1317         instruction-printing string.
1318
1319 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
1320
1321         * mips.igen (check_u64): New function which in the future will
1322         check whether 64-bit instructions are usable and signal an
1323         exception if not.  Currently a no-op.
1324         (DADD, DADDI, DADDIU, DADDU, DDIV, DDIVU, DMULT, DMULTU, DSLL,
1325         DSLL32, DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB,
1326         DSUBU, LD, LDL, LDR, LLD, LWU, SCD, SD, SDL, SDR, DMxC1, LDXC1,
1327         LWXC1, SDXC1, SWXC1, DMFC0, DMTC0): Use check_u64.
1328
1329         * mips.igen (check_fpu): New function which in the future will
1330         check whether FPU instructions are usable and signal an exception
1331         if not.  Currently a no-op.
1332         (ABS.fmt, ADD.fmt, BC1a, BC1b, C.cond.fmta, C.cond.fmtb,
1333         CEIL.L.fmt, CEIL.W, CxC1, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt,
1334         CVT.W.fmt, DIV.fmt, DMxC1, DMxC1, FLOOR.L.fmt, FLOOR.W.fmt, LDC1,
1335         LDXC1, LWC1, LWXC1, MADD.D, MADD.S, MxC1, MOV.fmt, MOVtf,
1336         MOVtf.fmt, MOVN.fmt, MOVZ.fmt, MSUB.D, MSUB.S, MUL.fmt, NEG.fmt,
1337         NMADD.D, NMADD.S, NMSUB.D, NMSUB.S, RECIP.fmt, ROUND.L.fmt,
1338         ROUND.W.fmt, RSQRT.fmt, SDC1, SDXC1, SQRT.fmt, SUB.fmt, SWC1,
1339         SWXC1, TRUNC.L.fmt, TRUNC.W): Use check_fpu.
1340
1341 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
1342
1343         * mips.igen (do_load_left, do_load_right): Move to be immediately
1344         following do_load.
1345         (do_store_left, do_store_right): Move to be immediately following
1346         do_store.
1347
1348 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
1349
1350         * mips.igen (mipsV): New model name.  Also, add it to
1351         all instructions and functions where it is appropriate.
1352
1353 2002-02-18  Chris Demetriou  <cgd@broadcom.com>
1354
1355         * mips.igen: For all functions and instructions, list model
1356         names that support that instruction one per line.
1357
1358 2002-02-11  Chris Demetriou  <cgd@broadcom.com>
1359
1360         * mips.igen: Add some additional comments about supported
1361         models, and about which instructions go where.
1362         (BC1b, MFC0, MTC0, RFE): Sort supported models in the same
1363         order as is used in the rest of the file.
1364
1365 2002-02-11  Chris Demetriou  <cgd@broadcom.com>
1366
1367         * mips.igen (ADD, ADDI, DADDI, DSUB, SUB): Add comment
1368         indicating that ALU32_END or ALU64_END are there to check
1369         for overflow.
1370         (DADD): Likewise, but also remove previous comment about
1371         overflow checking.
1372
1373 2002-02-10  Chris Demetriou  <cgd@broadcom.com>
1374
1375         * mips.igen (DDIV, DIV, DIVU, DMULT, DMULTU, DSLL, DSLL32,
1376         DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB, DSUBU,
1377         JALR, JR, MOVN, MOVZ, MTLO, MULT, MULTU, SLL, SLLV, SLT, SLTU,
1378         SRAV, SRLV, SUB, SUBU, SYNC, XOR, MOVtf, DI, DMFC0, DMTC0, EI,
1379         ERET, RFE, TLBP, TLBR, TLBWI, TLBWR): Tweak instruction opcode
1380         fields (i.e., add and move commas) so that they more closely
1381         match the MIPS ISA documentation opcode partitioning.
1382
1383 2002-02-10  Chris Demetriou  <cgd@broadcom.com>
1384
1385         * mips.igen (ADDI): Print immediate value.
1386         (BREAK): Print code.
1387         (DADDIU, DSRAV, DSRLV): Print correct instruction name.
1388         (SLL): Print "nop" specially, and don't run the code
1389         that does the shift for the "nop" case.
1390
1391 2001-11-17  Fred Fish  <fnf@redhat.com>
1392
1393         * sim-main.h (float_operation): Move enum declaration outside
1394         of _sim_cpu struct declaration.
1395
1396 2001-04-12  Jim Blandy  <jimb@redhat.com>
1397
1398         * mips.igen (CFC1, CTC1): Pass the correct register numbers to
1399         PENDING_FILL.  Use PENDING_SCHED directly to handle the pending
1400         set of the FCSR.
1401         * sim-main.h (COCIDX): Remove definition; this isn't supported by
1402         PENDING_FILL, and you can get the intended effect gracefully by
1403         calling PENDING_SCHED directly.
1404
1405 2001-02-23  Ben Elliston  <bje@redhat.com>
1406
1407         * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Only define if not
1408         already defined elsewhere.
1409
1410 2001-02-19  Ben Elliston  <bje@redhat.com>
1411
1412         * sim-main.h (sim_monitor): Return an int.
1413         * interp.c (sim_monitor): Add return values.
1414         (signal_exception): Handle error conditions from sim_monitor.
1415
1416 2001-02-08  Ben Elliston  <bje@redhat.com>
1417
1418         * sim-main.c (load_memory): Pass cia to sim_core_read* functions.
1419         (store_memory): Likewise, pass cia to sim_core_write*.
1420
1421 2000-10-19  Frank Ch. Eigler  <fche@redhat.com>
1422
1423         On advice from Chris G. Demetriou <cgd@sibyte.com>:
1424         * sim-main.h (GPR_CLEAR): Remove unused alternative macro.
1425
1426 Thu Jul 27 22:02:05 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1427
1428         From Maciej W. Rozycki <macro@ds2.pg.gda.pl>:
1429         * Makefile.in: Don't delete *.igen when cleaning directory.
1430
1431 Wed Jul 19 18:50:51 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1432
1433         * m16.igen (break): Call SignalException not sim_engine_halt.
1434
1435 Mon Jul  3 11:13:20 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1436
1437         From Jason Eckhardt:
1438         * mips.igen (MOVZ.fmt, MOVN.fmt): Move conditional on GPR[RT].
1439
1440 Tue Jun 13 20:52:07 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1441
1442         * mips.igen (MxC1, DMxC1): Fix printf formatting.
1443
1444 2000-05-24  Michael Hayes  <mhayes@cygnus.com>
1445
1446         * mips.igen (do_dmultx): Fix typo.
1447
1448 Tue May 23 21:39:23 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1449
1450         * configure: Regenerated to track ../common/aclocal.m4 changes.
1451
1452 Fri Apr 28 20:48:36 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1453
1454         * mips.igen (DMxC1): Fix format arguments for sim_io_eprintf call.
1455
1456 2000-04-12  Frank Ch. Eigler  <fche@redhat.com>
1457
1458         * sim-main.h (GPR_CLEAR): Define macro.
1459
1460 Mon Apr 10 00:07:09 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1461
1462         * interp.c (decode_coproc): Output long using %lx and not %s.
1463
1464 2000-03-21  Frank Ch. Eigler  <fche@redhat.com>
1465
1466         * interp.c (sim_open): Sort & extend dummy memory regions for
1467         --board=jmr3904 for eCos.
1468
1469 2000-03-02  Frank Ch. Eigler  <fche@redhat.com>
1470
1471         * configure: Regenerated.
1472
1473 Tue Feb  8 18:35:01 2000  Donald Lindsay  <dlindsay@hound.cygnus.com>
1474
1475         * interp.c, mips.igen: all 5 DEADC0DE situations now have sim_io_eprintf
1476         calls, conditional on the simulator being in verbose mode.
1477
1478 Fri Feb  4 09:45:15 2000  Donald Lindsay  <dlindsay@cygnus.com>
1479
1480         * sim-main.c (cache_op): Added case arm so that CACHE ops to a secondary
1481         cache don't get ReservedInstruction traps.
1482
1483 1999-11-29  Mark Salter  <msalter@cygnus.com>
1484
1485         * dv-tx3904sio.c (tx3904sio_io_write_buffer): Use write value as a mask
1486         to clear status bits in sdisr register. This is how the hardware works.
1487
1488         * interp.c (sim_open): Added more memory aliases for jmr3904 hardware
1489         being used by cygmon.
1490
1491 1999-11-11  Andrew Haley  <aph@cygnus.com>
1492
1493         * interp.c (decode_coproc): Correctly handle DMFC0 and DMTC0
1494         instructions.
1495
1496 Thu Sep  9 15:12:08 1999  Geoffrey Keating  <geoffk@cygnus.com>
1497
1498         * mips.igen (MULT): Correct previous mis-applied patch.
1499
1500 Tue Sep  7 13:34:54 1999  Geoffrey Keating  <geoffk@cygnus.com>
1501
1502         * mips.igen (delayslot32): Handle sequence like
1503         mtc1 $at,$f12 ; jal fp_add ; mov.s $f13,$f12
1504         correctly by calling ENGINE_ISSUE_PREFIX_HOOK() before issue.
1505         (MULT): Actually pass the third register...
1506
1507 1999-09-03  Mark Salter  <msalter@cygnus.com>
1508
1509         * interp.c (sim_open): Added more memory aliases for additional
1510         hardware being touched by cygmon on jmr3904 board.
1511
1512 Thu Sep  2 18:15:53 1999  Andrew Cagney  <cagney@b1.cygnus.com>
1513
1514         * configure: Regenerated to track ../common/aclocal.m4 changes.
1515
1516 Tue Jul 27 16:36:51 1999  Andrew Cagney  <cagney@amy.cygnus.com>
1517
1518         * interp.c (sim_store_register): Handle case where client - GDB -
1519         specifies that a 4 byte register is 8 bytes in size.
1520         (sim_fetch_register): Ditto.
1521
1522 1999-07-14  Frank Ch. Eigler  <fche@cygnus.com>
1523
1524         Implement "sim firmware" option, inspired by jimb's version of 1998-01.
1525         * interp.c (firmware_option_p): New global flag: "sim firmware" given.
1526         (idt_monitor_base): Base address for IDT monitor traps.
1527         (pmon_monitor_base): Ditto for PMON.
1528         (lsipmon_monitor_base): Ditto for LSI PMON.
1529         (MONITOR_BASE, MONITOR_SIZE): Removed macros.
1530         (mips_option): Add "firmware" option with new OPTION_FIRMWARE key.
1531         (sim_firmware_command): New function.
1532         (mips_option_handler): Call it for OPTION_FIRMWARE.
1533         (sim_open): Allocate memory for idt_monitor region.  If "--board"
1534         option was given, add no monitor by default.  Add BREAK hooks only if
1535         monitors are also there.
1536
1537 Mon Jul 12 00:02:27 1999  Andrew Cagney  <cagney@amy.cygnus.com>
1538
1539         * interp.c (sim_monitor): Flush output before reading input.
1540
1541 Sun Jul 11 19:28:11 1999  Andrew Cagney  <cagney@b1.cygnus.com>
1542
1543         * tconfig.in (SIM_HANDLES_LMA): Always define.
1544
1545 Thu Jul  8 16:06:59 1999  Andrew Cagney  <cagney@b1.cygnus.com>
1546
1547         From Mark Salter <msalter@cygnus.com>:
1548         * interp.c (BOARD_BSP): Define.  Add to list of possible boards.
1549         (sim_open): Add setup for BSP board.
1550
1551 Wed Jul  7 12:45:58 1999  Andrew Cagney  <cagney@b1.cygnus.com>
1552
1553         * mips.igen (MULT, MULTU): Add syntax for two operand version.
1554         (DMFC0, DMTC0): Recognize.  Call DecodeCoproc which will report
1555         them as unimplemented.
1556
1557 1999-05-08  Felix Lee  <flee@cygnus.com>
1558
1559         * configure: Regenerated to track ../common/aclocal.m4 changes.
1560
1561 1999-04-21  Frank Ch. Eigler  <fche@cygnus.com>
1562
1563         * mips.igen (bc0f): For the TX39 only, decode this as a no-op stub.
1564
1565 Thu Apr 15 14:15:17 1999  Andrew Cagney  <cagney@amy.cygnus.com>
1566
1567         * configure.in: Any mips64vr5*-*-* target should have
1568         -DTARGET_ENABLE_FR=1.
1569         (default_endian): Any mips64vr*el-*-* target should default to
1570         LITTLE_ENDIAN.
1571         * configure: Re-generate.
1572
1573 1999-02-19  Gavin Romig-Koch  <gavin@cygnus.com>
1574
1575         * mips.igen (ldl): Extend from _16_, not 32.
1576
1577 Wed Jan 27 18:51:38 1999  Andrew Cagney  <cagney@chook.cygnus.com>
1578
1579         * interp.c (sim_store_register): Force registers written to by GDB
1580         into an un-interpreted state.
1581
1582 1999-02-05  Frank Ch. Eigler  <fche@cygnus.com>
1583
1584         * dv-tx3904sio.c (tx3904sio_tickle): After a polled I/O from the
1585         CPU, start periodic background I/O polls.
1586         (tx3904sio_poll): New function: periodic I/O poller.
1587
1588 1998-12-30  Frank Ch. Eigler  <fche@cygnus.com>
1589
1590         * mips.igen (BREAK): Call signal_exception instead of sim_engine_halt.
1591
1592 Tue Dec 29 16:03:53 1998  Rainer Orth  <ro@TechFak.Uni-Bielefeld.DE>
1593
1594         * configure.in, configure (mips64vr5*-*-*): Added missing ;; in
1595         case statement.
1596
1597 1998-12-29  Frank Ch. Eigler  <fche@cygnus.com>
1598
1599         * interp.c (sim_open): Allocate jm3904 memory in smaller chunks.
1600         (load_word): Call SIM_CORE_SIGNAL hook on error.
1601         (signal_exception): Call SIM_CPU_EXCEPTION_TRIGGER hook before
1602         starting.  For exception dispatching, pass PC instead of NULL_CIA.
1603         (decode_coproc): Use COP0_BADVADDR to store faulting address.
1604         * sim-main.h (COP0_BADVADDR): Define.
1605         (SIM_CORE_SIGNAL): Define hook to call mips_core_signal.
1606         (SIM_CPU_EXCEPTION*): Define hooks to call mips_cpu_exception*().
1607         (_sim_cpu): Add exc_* fields to store register value snapshots.
1608         * mips.igen (*): Replace memory-related SignalException* calls
1609         with references to SIM_CORE_SIGNAL hook.
1610
1611         * dv-tx3904irc.c (tx3904irc_port_event): printf format warning
1612         fix.
1613         * sim-main.c (*): Minor warning cleanups.
1614
1615 1998-12-24  Gavin Romig-Koch  <gavin@cygnus.com>
1616
1617         * m16.igen (DADDIU5): Correct type-o.
1618
1619 Mon Dec 21 10:34:48 1998  Andrew Cagney  <cagney@chook>
1620
1621         * mips.igen (do_ddiv, do_ddivu): Pacify GCC. Update hi/lo via tmp
1622         variables.
1623
1624 Wed Dec 16 18:20:28 1998  Andrew Cagney  <cagney@chook>
1625
1626         * Makefile.in (SIM_EXTRA_CFLAGS): No longer need to add .../newlib
1627         to include path.
1628         (interp.o): Add dependency on itable.h
1629         (oengine.c, gencode): Delete remaining references.
1630         (BUILT_SRC_FROM_GEN): Clean up.
1631
1632 1998-12-16  Gavin Romig-Koch  <gavin@cygnus.com>
1633
1634         * vr4run.c: New.
1635         * Makefile.in (SIM_HACK_OBJ,HACK_OBJS,HACK_GEN_SRCS,libhack.a,
1636         tmp-hack,tmp-m32-hack,tmp-m16-hack,tmp-itable-hack,
1637         tmp-run-hack) : New.
1638         * m16.igen (LD,DADDIU,DADDUI5,DADJSP,DADDIUSP,DADDI,DADDU,DSUBU,
1639         DSLL,DSRL,DSRA,DSLLV,DSRAV,DMULT,DMULTU,DDIV,DDIVU,JALX32,JALX):
1640         Drop the "64" qualifier to get the HACK generator working.
1641         Use IMMEDIATE rather than IMMED.  Use SHAMT rather than SHIFT.
1642         * mips.igen (do_daddiu,do_ddiv,do_divu): Remove the 64-only
1643         qualifier to get the hack generator working.
1644         (do_dsll,do_dsllv,do_dsra,do_dsrl,do_dsrlv): New.
1645         (DSLL): Use do_dsll.
1646         (DSLLV): Use do_dsllv.
1647         (DSRA): Use do_dsra.
1648         (DSRL): Use do_dsrl.
1649         (DSRLV): Use do_dsrlv.
1650         (BC1): Move *vr4100 to get the HACK generator working.
1651         (CxC1, DMxC1, MxC1,MACCU,MACCHI,MACCHIU): Rename to
1652         get the HACK generator working.
1653         (MACC) Rename to get the HACK generator working.
1654         (DMACC,MACCS,DMACCS): Add the 64.
1655
1656 1998-12-12  Gavin Romig-Koch  <gavin@cygnus.com>
1657
1658         * mips.igen (BC1): Renamed to BC1a and BC1b to avoid conflicts.
1659         * sim-main.h (SizeFGR): Handle TARGET_ENABLE_FR.
1660
1661 1998-12-11  Gavin Romig-Koch  <gavin@cygnus.com>
1662
1663     * mips/interp.c (DEBUG): Cleanups.
1664
1665 1998-12-10  Frank Ch. Eigler  <fche@cygnus.com>
1666
1667         * dv-tx3904sio.c (tx3904sio_io_read_buffer): Endianness fixes.
1668         (tx3904sio_tickle): fflush after a stdout character output.
1669
1670 1998-12-03  Frank Ch. Eigler  <fche@cygnus.com>
1671
1672         * interp.c (sim_close): Uninstall modules.
1673
1674 Wed Nov 25 13:41:03 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1675
1676         * sim-main.h, interp.c (sim_monitor): Change to global
1677         function.
1678
1679 Wed Nov 25 17:33:24 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1680
1681         * configure.in (vr4100): Only include vr4100 instructions in
1682         simulator.
1683         * configure: Re-generate.
1684         * m16.igen (*): Tag all mips16 instructions as also being vr4100.
1685
1686 Mon Nov 23 18:20:36 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1687
1688         * Makefile.in (SIM_CFLAGS): Do not define WITH_IGEN.
1689         * sim-main.h, sim-main.c, interp.c: Delete #if WITH_IGEN keeping
1690         true alternative.
1691
1692         * configure.in (sim_default_gen, sim_use_gen): Replace with
1693         sim_gen.
1694         (--enable-sim-igen): Delete config option. Always using IGEN.
1695         * configure: Re-generate.
1696
1697         * Makefile.in (gencode): Kill, kill, kill.
1698         * gencode.c: Ditto.
1699
1700 Mon Nov 23 18:07:36 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1701
1702         * configure.in: Configure mips64vr4100-elf nee mips64vr41* as a 64
1703         bit mips16 igen simulator.
1704         * configure: Re-generate.
1705
1706         * mips.igen (check_div_hilo, check_mult_hilo, check_mf_hilo): Mark
1707         as part of vr4100 ISA.
1708         * vr.igen: Mark all instructions as 64 bit only.
1709
1710 Mon Nov 23 17:07:37 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1711
1712         * interp.c (get_cell, sim_monitor, fetch_str, CoProcPresent):
1713         Pacify GCC.
1714
1715 Mon Nov 23 13:23:40 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1716
1717         * configure.in: Configure mips-lsi-elf nee mips*lsi* as a
1718         mipsIII/mips16 igen simulator.  Fix sim_gen VS sim_igen typos.
1719         * configure: Re-generate.
1720
1721         * m16.igen (BREAK): Define breakpoint instruction.
1722         (JALX32): Mark instruction as mips16 and not r3900.
1723         * mips.igen (C.cond.fmt): Fix typo in instruction format.
1724
1725         * sim-main.h (PENDING_FILL): Wrap C statements in do/while.
1726
1727 Sat Nov  7 09:54:38 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1728
1729         * gencode.c (build_instruction - BREAK): For MIPS16, handle BREAK
1730         insn as a debug breakpoint.
1731
1732         * sim-main.h (PENDING_SLOT_BIT): Fix, was incorrectly defined as
1733         pending.slot_size.
1734         (PENDING_SCHED): Clean up trace statement.
1735         (PENDING_SCHED): Increment PENDING_IN and PENDING_TOTAL.
1736         (PENDING_FILL): Delay write by only one cycle.
1737         (PENDING_FILL): For FSRs, write fmt_uninterpreted to FPR_STATE.
1738
1739         * sim-main.c (pending_tick): Clean up trace statements. Add trace
1740         of pending writes.
1741         (pending_tick): Fix sizes in switch statements, 4 & 8 instead of
1742         32 & 64.
1743         (pending_tick): Move incrementing of index to FOR statement.
1744         (pending_tick): Only update PENDING_OUT after a write has occured.
1745
1746         * configure.in: Add explicit mips-lsi-* target.  Use gencode to
1747         build simulator.
1748         * configure: Re-generate.
1749
1750         * interp.c (sim_engine_run OLD): Delete explicit call to
1751         PENDING_TICK. Now called via ENGINE_ISSUE_PREFIX_HOOK.
1752
1753 Sat Oct 30 09:49:10 1998  Frank Ch. Eigler  <fche@cygnus.com>
1754
1755         * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Add dummy
1756         interrupt level number to match changed SignalExceptionInterrupt
1757         macro.
1758
1759 Fri Oct  9 18:02:25 1998  Doug Evans  <devans@canuck.cygnus.com>
1760
1761         * interp.c: #include "itable.h" if WITH_IGEN.
1762         (get_insn_name): New function.
1763         (sim_open): Initialize CPU_INSN_NAME,CPU_MAX_INSNS.
1764         * sim-main.h (MAX_INSNS,INSN_NAME): Delete.
1765
1766 Mon Sep 14 12:36:44 1998  Frank Ch. Eigler  <fche@cygnus.com>
1767
1768         * configure: Rebuilt to inhale new common/aclocal.m4.
1769
1770 Tue Sep  1 15:39:18 1998  Frank Ch. Eigler  <fche@cygnus.com>
1771
1772         * dv-tx3904sio.c: Include sim-assert.h.
1773
1774 Tue Aug 25 12:49:46 1998  Frank Ch. Eigler  <fche@cygnus.com>
1775
1776         * dv-tx3904sio.c: New file: tx3904 serial I/O module.
1777         * configure.in: Add dv-tx3904sio, dv-sockser for tx39 target.
1778         Reorganize target-specific sim-hardware checks.
1779         * configure: rebuilt.
1780         * interp.c (sim_open): For tx39 target boards, set
1781         OPERATING_ENVIRONMENT, add tx3904sio devices.
1782         * tconfig.in: For tx39 target, set SIM_HANDLES_LMA for loading
1783         ROM executables.  Install dv-sockser into sim-modules list.
1784
1785         * dv-tx3904irc.c: Compiler warning clean-up.
1786         * dv-tx3904tmr.c: Compiler warning clean-up.  Remove particularly
1787         frequent hw-trace messages.
1788
1789 Fri Jul 31 18:14:16 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1790
1791         * vr.igen (MulAcc): Identify as a vr4100 specific function.
1792
1793 Sat Jul 25 16:03:14 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1794
1795         * Makefile.in (IGEN_INCLUDE): Add vr.igen.
1796
1797         * vr.igen: New file.
1798         (MAC/MADD16, DMAC/DMADD16): Implement using code from gencode.c.
1799         * mips.igen: Define vr4100 model. Include vr.igen.
1800 Mon Jun 29 09:21:07 1998  Gavin Koch  <gavin@cygnus.com>
1801
1802         * mips.igen (check_mf_hilo): Correct check.
1803
1804 Wed Jun 17 12:20:49 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1805
1806         * sim-main.h (interrupt_event): Add prototype.
1807
1808         * dv-tx3904tmr.c (tx3904tmr_io_write_buffer): Delete unused
1809         register_ptr, register_value.
1810         (deliver_tx3904tmr_tick): Fix types passed to printf fmt.
1811
1812         * sim-main.h (tracefh): Make extern.
1813
1814 Tue Jun 16 14:39:00 1998  Frank Ch. Eigler  <fche@cygnus.com>
1815
1816         * dv-tx3904tmr.c: Deschedule timer event after dispatching.
1817         Reduce unnecessarily high timer event frequency.
1818         * dv-tx3904cpu.c: Ditto for interrupt event.
1819
1820 Wed Jun 10 13:22:32 1998  Frank Ch. Eigler  <fche@cygnus.com>
1821
1822         * interp.c (decode_coproc): For TX39, add stub COP0 register #7,
1823         to allay warnings.
1824         (interrupt_event): Made non-static.
1825
1826         * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Correct accidental
1827         interchange of configuration values for external vs. internal
1828         clock dividers.
1829
1830 Tue Jun  9 12:46:24 1998  Ian Carmichael  <iancarm@cygnus.com>
1831
1832         * mips.igen (BREAK): Moved code to here for
1833         simulator-reserved break instructions.
1834         * gencode.c (build_instruction): Ditto.
1835         * interp.c (signal_exception): Code moved from here.  Non-
1836         reserved instructions now use exception vector, rather
1837         than halting sim.
1838         * sim-main.h: Moved magic constants to here.
1839
1840 Tue Jun  9 12:29:50 1998  Frank Ch. Eigler  <fche@cygnus.com>
1841
1842         * dv-tx3904cpu.c (deliver_*_interrupt,*_port_event): Set the CAUSE
1843         register upon non-zero interrupt event level, clear upon zero
1844         event value.
1845         * dv-tx3904irc.c (*_port_event): Handle deactivated interrupt signal
1846         by passing zero event value.
1847         (*_io_{read,write}_buffer): Endianness fixes.
1848         * dv-tx3904tmr.c (*_io_{read,write}_buffer): Endianness fixes.
1849         (deliver_*_tick): Reduce sim event interval to 75% of count interval.
1850
1851         * interp.c (sim_open): Added jmr3904pal board type that adds PAL-based
1852         serial I/O and timer module at base address 0xFFFF0000.
1853
1854 Tue Jun  9 11:52:29 1998  Gavin Koch  <gavin@cygnus.com>
1855
1856         * mips.igen (SWC1) : Correct the handling of ReverseEndian
1857         and BigEndianCPU.
1858
1859 Tue Jun  9 11:40:57 1998  Gavin Koch  <gavin@cygnus.com>
1860
1861         * configure.in (mips_fpu_bitsize) : Set this correctly for 32-bit mips
1862         parts.
1863         * configure: Update.
1864
1865 Thu Jun  4 15:37:33 1998  Frank Ch. Eigler  <fche@cygnus.com>
1866
1867         * dv-tx3904tmr.c: New file - implements tx3904 timer.
1868         * dv-tx3904{irc,cpu}.c: Mild reformatting.
1869         * configure.in: Include tx3904tmr in hw_device list.
1870         * configure: Rebuilt.
1871         * interp.c (sim_open): Instantiate three timer instances.
1872         Fix address typo of tx3904irc instance.
1873
1874 Tue Jun  2 15:48:02 1998  Ian Carmichael  <iancarm@cygnus.com>
1875
1876         * interp.c (signal_exception): SystemCall exception now uses
1877         the exception vector.
1878
1879 Mon Jun  1 18:18:26 1998  Frank Ch. Eigler  <fche@cygnus.com>
1880
1881         * interp.c (decode_coproc): For TX39, add stub COP0 register #3,
1882         to allay warnings.
1883
1884 Fri May 29 11:40:39 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1885
1886         * configure.in (sim_igen_filter): Match mips*tx39 not mipst*tx39.
1887
1888 Mon May 25 20:47:45 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1889
1890         * dv-tx3904cpu.c, dv-tx3904irc.c: Rename *_callback to *_method.
1891
1892         * dv-tx3904cpu.c, dv-tx3904irc.c: Include hw-main.h and
1893         sim-main.h. Declare a struct hw_descriptor instead of struct
1894         hw_device_descriptor.
1895
1896 Mon May 25 12:41:38 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1897
1898         * mips.igen (do_store_left, do_load_left): Compute nr of left and
1899         right bits and then re-align left hand bytes to correct byte
1900         lanes.  Fix incorrect computation in do_store_left when loading
1901         bytes from second word.
1902
1903 Fri May 22 13:34:20 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1904
1905         * configure.in (SIM_AC_OPTION_HARDWARE): Only enable when tx3904.
1906         * interp.c (sim_open): Only create a device tree when HW is
1907         enabled.
1908
1909         * dv-tx3904irc.c (tx3904irc_finish): Pacify GCC.
1910         * interp.c (signal_exception): Ditto.
1911
1912 Thu May 21 14:24:11 1998  Gavin Koch  <gavin@cygnus.com>
1913
1914         * gencode.c: Mark BEGEZALL as LIKELY.
1915
1916 Thu May 21 18:57:19 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1917
1918         * sim-main.h (ALU32_END): Sign extend 32 bit results.
1919         * mips.igen (ADD, SUB, ADDI, DADD, DSUB): Trace.
1920
1921 Mon May 18 18:22:42 1998  Frank Ch. Eigler  <fche@cygnus.com>
1922
1923         * configure.in (SIM_AC_OPTION_HARDWARE): Added common hardware
1924         modules.  Recognize TX39 target with "mips*tx39" pattern.
1925         * configure: Rebuilt.
1926         * sim-main.h (*): Added many macros defining bits in
1927         TX39 control registers.
1928         (SignalInterrupt): Send actual PC instead of NULL.
1929         (SignalNMIReset): New exception type.
1930         * interp.c (board): New variable for future use to identify
1931         a particular board being simulated.
1932         (mips_option_handler,mips_options): Added "--board" option.
1933         (interrupt_event): Send actual PC.
1934         (sim_open): Make memory layout conditional on board setting.
1935         (signal_exception): Initial implementation of hardware interrupt
1936         handling.  Accept another break instruction variant for simulator
1937         exit.
1938         (decode_coproc): Implement RFE instruction for TX39.
1939         (mips.igen): Decode RFE instruction as such.
1940         * configure.in (tx3904cpu,tx3904irc): Added devices for tx3904.
1941         * interp.c: Define "jmr3904" and "jmr3904debug" board types and
1942         bbegin to implement memory map.
1943         * dv-tx3904cpu.c: New file.
1944         * dv-tx3904irc.c: New file.
1945
1946 Wed May 13 14:40:11 1998  Gavin Koch  <gavin@cygnus.com>
1947
1948         * mips.igen (check_mt_hilo): Create a separate r3900 version.
1949
1950 Wed May 13 14:11:46 1998  Gavin Koch  <gavin@cygnus.com>
1951
1952         * tx.igen (madd,maddu):  Replace calls to check_op_hilo
1953         with calls to check_div_hilo.
1954
1955 Wed May 13 09:59:27 1998  Gavin Koch  <gavin@cygnus.com>
1956
1957         * mips/mips.igen (check_op_hilo,check_mult_hilo,check_div_hilo):
1958         Replace check_op_hilo with check_mult_hilo and check_div_hilo.
1959         Add special r3900 version of do_mult_hilo.
1960         (do_dmultx,do_mult,do_multu): Replace calls to check_op_hilo
1961         with calls to check_mult_hilo.
1962         (do_ddiv,do_ddivu,do_div,do_divu): Replace calls to check_op_hilo
1963         with calls to check_div_hilo.
1964
1965 Tue May 12 15:22:11 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1966
1967         * configure.in (SUBTARGET_R3900): Define for mipstx39 target.
1968         Document a replacement.
1969
1970 Fri May  8 17:48:19 1998  Ian Carmichael  <iancarm@cygnus.com>
1971
1972         * interp.c (sim_monitor): Make mon_printf work.
1973
1974 Wed May  6 19:42:19 1998  Doug Evans  <devans@canuck.cygnus.com>
1975
1976         * sim-main.h (INSN_NAME): New arg `cpu'.
1977
1978 Tue Apr 28 18:33:31 1998  Geoffrey Noer  <noer@cygnus.com>
1979
1980         * configure: Regenerated to track ../common/aclocal.m4 changes.
1981
1982 Sun Apr 26 15:31:55 1998  Tom Tromey  <tromey@creche>
1983
1984         * configure: Regenerated to track ../common/aclocal.m4 changes.
1985         * config.in: Ditto.
1986
1987 Sun Apr 26 15:20:01 1998  Tom Tromey  <tromey@cygnus.com>
1988
1989         * acconfig.h: New file.
1990         * configure.in: Reverted change of Apr 24; use sinclude again.
1991
1992 Fri Apr 24 14:16:40 1998  Tom Tromey  <tromey@creche>
1993
1994         * configure: Regenerated to track ../common/aclocal.m4 changes.
1995         * config.in: Ditto.
1996
1997 Fri Apr 24 11:19:20 1998  Tom Tromey  <tromey@cygnus.com>
1998
1999         * configure.in: Don't call sinclude.
2000
2001 Fri Apr 24 11:35:01 1998  Andrew Cagney  <cagney@chook.cygnus.com>
2002
2003         * mips.igen (do_store_left): Pass 0 not NULL to store_memory.
2004
2005 Tue Apr 21 11:59:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2006
2007         * mips.igen (ERET): Implement.
2008
2009         * interp.c (decode_coproc): Return sign-extended EPC.
2010
2011         * mips.igen (ANDI, LUI, MFC0): Add tracing code.
2012
2013         * interp.c (signal_exception): Do not ignore Trap.
2014         (signal_exception): On TRAP, restart at exception address.
2015         (HALT_INSTRUCTION, HALT_INSTRUCTION_MASK): Define.
2016         (signal_exception): Update.
2017         (sim_open): Patch V_COMMON interrupt vector with an abort sequence
2018         so that TRAP instructions are caught.
2019
2020 Mon Apr 20 11:26:55 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2021
2022         * sim-main.h (struct hilo_access, struct hilo_history): Define,
2023         contains HI/LO access history.
2024         (struct _sim_cpu): Make hiaccess and loaccess of type hilo_access.
2025         (HIACCESS, LOACCESS): Delete, replace with
2026         (HIHISTORY, LOHISTORY): New macros.
2027         (CHECKHILO): Delete all, moved to mips.igen
2028
2029         * gencode.c (build_instruction): Do not generate checks for
2030         correct HI/LO register usage.
2031
2032         * interp.c (old_engine_run): Delete checks for correct HI/LO
2033         register usage.
2034
2035         * mips.igen (check_mt_hilo, check_mf_hilo, check_op_hilo,
2036         check_mf_cycles): New functions.
2037         (do_mfhi, do_mflo, "mthi", "mtlo", do_ddiv, do_ddivu, do_div,
2038         do_divu, domultx, do_mult, do_multu): Use.
2039
2040         * tx.igen ("madd", "maddu"): Use.
2041
2042 Wed Apr 15 18:31:54 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2043
2044         * mips.igen (DSRAV): Use function do_dsrav.
2045         (SRAV): Use new function do_srav.
2046
2047         * m16.igen (BEQZ, BNEZ): Compare GPR[TRX] not GPR[RX].
2048         (B): Sign extend 11 bit immediate.
2049         (EXT-B*): Shift 16 bit immediate left by 1.
2050         (ADDIU*): Don't sign extend immediate value.
2051
2052 Wed Apr 15 10:32:15 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2053
2054         * m16run.c (sim_engine_run): Restore CIA after handling an event.
2055
2056         * sim-main.h (DELAY_SLOT, NULLIFY_NEXT_INSTRUCTION): For IGEN, use
2057         functions.
2058
2059         * mips.igen (delayslot32, nullify_next_insn): New functions.
2060         (m16.igen): Always include.
2061         (do_*): Add more tracing.
2062
2063         * m16.igen (delayslot16): Add NIA argument, could be called by a
2064         32 bit MIPS16 instruction.
2065
2066         * interp.c (ifetch16): Move function from here.
2067         * sim-main.c (ifetch16): To here.
2068
2069         * sim-main.c (ifetch16, ifetch32): Update to match current
2070         implementations of LH, LW.
2071         (signal_exception): Don't print out incorrect hex value of illegal
2072         instruction.
2073
2074 Wed Apr 15 00:17:25 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2075
2076         * m16run.c (sim_engine_run): Use IMEM16 and IMEM32 to fetch an
2077         instruction.
2078
2079         * m16.igen: Implement MIPS16 instructions.
2080
2081         * mips.igen (do_addiu, do_addu, do_and, do_daddiu, do_daddu,
2082         do_ddiv, do_ddivu, do_div, do_divu, do_dmultx, do_dmultu, do_srav,
2083         do_dsubu, do_mfhi, do_mflo, do_mult, do_multu, do_nor, do_or,
2084         do_sll, do_sllv, do_slt, do_slti, do_sltiu, do_sltu, do_sra,
2085         do_srl, do_srlv, do_subu, do_xor, do_xori): New functions.  Move
2086         bodies of corresponding code from 32 bit insn to these.  Also used
2087         by MIPS16 versions of functions.
2088
2089         * sim-main.h (RAIDX, T8IDX, T8, SPIDX): Define.
2090         (IMEM16): Drop NR argument from macro.
2091
2092 Sat Apr  4 22:39:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2093
2094         * Makefile.in (SIM_OBJS): Add sim-main.o.
2095
2096         * sim-main.h (address_translation, load_memory, store_memory,
2097         cache_op, sync_operation, prefetch, ifetch32, pending_tick): Mark
2098         as INLINE_SIM_MAIN.
2099         (pr_addr, pr_uword64): Declare.
2100         (sim-main.c): Include when H_REVEALS_MODULE_P.
2101
2102         * interp.c (address_translation, load_memory, store_memory,
2103         cache_op, sync_operation, prefetch, ifetch32, pending_tick): Move
2104         from here.
2105         * sim-main.c: To here. Fix compilation problems.
2106
2107         * configure.in: Enable inlining.
2108         * configure: Re-config.
2109
2110 Sat Apr  4 20:36:25 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2111
2112         * configure: Regenerated to track ../common/aclocal.m4 changes.
2113
2114 Fri Apr  3 04:32:35 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2115
2116         * mips.igen: Include tx.igen.
2117         * Makefile.in (IGEN_INCLUDE): Add tx.igen.
2118         * tx.igen: New file, contains MADD and MADDU.
2119
2120         * interp.c (load_memory): When shifting bytes, use LOADDRMASK not
2121         the hardwired constant `7'.
2122         (store_memory): Ditto.
2123         (LOADDRMASK): Move definition to sim-main.h.
2124
2125         mips.igen (MTC0): Enable for r3900.
2126         (ADDU): Add trace.
2127
2128         mips.igen (do_load_byte): Delete.
2129         (do_load, do_store, do_load_left, do_load_write, do_store_left,
2130         do_store_right): New functions.
2131         (SW*, LW*, SD*, LD*, SH, LH, SB, LB): Use.
2132
2133         configure.in: Let the tx39 use igen again.
2134         configure: Update.
2135
2136 Thu Apr  2 10:59:39 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2137
2138         * interp.c (sim_monitor): get_mem_info returns a 4 byte quantity,
2139         not an address sized quantity.  Return zero for cache sizes.
2140
2141 Wed Apr  1 23:47:53 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2142
2143         * mips.igen (r3900): r3900 does not support 64 bit integer
2144         operations.
2145
2146 Mon Mar 30 14:46:05 1998  Gavin Koch  <gavin@cygnus.com>
2147
2148         * configure.in (mipstx39*-*-*): Use gencode simulator rather
2149         than igen one.
2150         * configure : Rebuild.
2151
2152 Fri Mar 27 16:15:52 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2153
2154         * configure: Regenerated to track ../common/aclocal.m4 changes.
2155
2156 Fri Mar 27 15:01:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2157
2158         * interp.c (mips_option_handler): Iterate over MAX_NR_PROCESSORS.
2159
2160 Wed Mar 25 16:44:27 1998  Ian Carmichael  <iancarm@cygnus.com>
2161
2162         * configure: Regenerated to track ../common/aclocal.m4 changes.
2163         * config.in: Regenerated to track ../common/aclocal.m4 changes.
2164
2165 Wed Mar 25 12:35:29 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2166
2167         * configure: Regenerated to track ../common/aclocal.m4 changes.
2168
2169 Wed Mar 25 10:05:46 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2170
2171         * interp.c (Max, Min): Comment out functions. Not yet used.
2172
2173 Wed Mar 18 12:38:12 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2174
2175         * configure: Regenerated to track ../common/aclocal.m4 changes.
2176
2177 Tue Mar 17 19:05:20 1998  Frank Ch. Eigler  <fche@cygnus.com>
2178
2179         * Makefile.in (MIPS_EXTRA_LIBS, SIM_EXTRA_LIBS): Added
2180         configurable settings for stand-alone simulator.
2181
2182         * configure.in: Added X11 search, just in case.
2183
2184         * configure: Regenerated.
2185
2186 Wed Mar 11 14:09:10 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2187
2188         * interp.c (sim_write, sim_read, load_memory, store_memory):
2189         Replace sim_core_*_map with read_map, write_map, exec_map resp.
2190
2191 Tue Mar  3 13:58:43 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2192
2193         * sim-main.h (GETFCC): Return an unsigned value.
2194
2195 Tue Mar  3 13:21:37 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2196
2197         * mips.igen (DIV): Fix check for -1 / MIN_INT.
2198         (DADD): Result destination is RD not RT.
2199
2200 Fri Feb 27 13:49:49 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2201
2202         * sim-main.h (HIACCESS, LOACCESS): Always define.
2203
2204         * mdmx.igen (Maxi, Mini): Rename Max, Min.
2205
2206         * interp.c (sim_info): Delete.
2207
2208 Fri Feb 27 18:41:01 1998  Doug Evans  <devans@canuck.cygnus.com>
2209
2210         * interp.c (DECLARE_OPTION_HANDLER): Use it.
2211         (mips_option_handler): New argument `cpu'.
2212         (sim_open): Update call to sim_add_option_table.
2213
2214 Wed Feb 25 18:56:22 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2215
2216         * mips.igen (CxC1): Add tracing.
2217
2218 Fri Feb 20 17:43:21 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2219
2220         * sim-main.h (Max, Min): Declare.
2221
2222         * interp.c (Max, Min): New functions.
2223
2224         * mips.igen (BC1): Add tracing.
2225
2226 Thu Feb 19 14:50:00 1998  John Metzler  <jmetzler@cygnus.com>
2227
2228         * interp.c Added memory map for stack in vr4100
2229
2230 Thu Feb 19 10:21:21 1998  Gavin Koch  <gavin@cygnus.com>
2231
2232         * interp.c (load_memory): Add missing "break"'s.
2233
2234 Tue Feb 17 12:45:35 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2235
2236         * interp.c (sim_store_register, sim_fetch_register): Pass in
2237         length parameter.  Return -1.
2238
2239 Tue Feb 10 11:57:40 1998  Ian Carmichael  <iancarm@cygnus.com>
2240
2241         * interp.c: Added hardware init hook, fixed warnings.
2242
2243 Sat Feb  7 17:16:20 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2244
2245         * Makefile.in (itable.h itable.c): Depend on SIM_@sim_gen@_ALL.
2246
2247 Tue Feb  3 11:36:02 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2248
2249         * interp.c (ifetch16): New function.
2250
2251         * sim-main.h (IMEM32): Rename IMEM.
2252         (IMEM16_IMMED): Define.
2253         (IMEM16): Define.
2254         (DELAY_SLOT): Update.
2255
2256         * m16run.c (sim_engine_run): New file.
2257
2258         * m16.igen: All instructions except LB.
2259         (LB): Call do_load_byte.
2260         * mips.igen (do_load_byte): New function.
2261         (LB): Call do_load_byte.
2262
2263         * mips.igen: Move spec for insn bit size and high bit from here.
2264         * Makefile.in (tmp-igen, tmp-m16): To here.
2265
2266         * m16.dc: New file, decode mips16 instructions.
2267
2268         * Makefile.in (SIM_NO_ALL): Define.
2269         (tmp-m16): Generate both 16 bit and 32 bit simulator engines.
2270
2271 Tue Feb  3 11:28:00 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2272
2273         * configure.in (mips_fpu_bitsize): For tx39, restrict floating
2274         point unit to 32 bit registers.
2275         * configure: Re-generate.
2276
2277 Sun Feb  1 15:47:14 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2278
2279         * configure.in (sim_use_gen): Make IGEN the default simulator
2280         generator for generic 32 and 64 bit mips targets.
2281         * configure: Re-generate.
2282
2283 Sun Feb  1 16:52:37 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2284
2285         * sim-main.h (SizeFGR): Determine from floating-point and not gpr
2286         bitsize.
2287
2288         * interp.c (sim_fetch_register, sim_store_register): Read/write
2289         FGR from correct location.
2290         (sim_open): Set size of FGR's according to
2291         WITH_TARGET_FLOATING_POINT_BITSIZE.
2292
2293         * sim-main.h (FGR): Store floating point registers in a separate
2294         array.
2295
2296 Sun Feb  1 16:47:51 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2297
2298         * configure: Regenerated to track ../common/aclocal.m4 changes.
2299
2300 Tue Feb  3 00:10:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2301
2302         * interp.c (ColdReset): Call PENDING_INVALIDATE.
2303
2304         * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Call PENDING_TICK.
2305
2306         * interp.c (pending_tick): New function.  Deliver pending writes.
2307
2308         * sim-main.h (PENDING_FILL, PENDING_TICK, PENDING_SCHED,
2309         PENDING_BIT, PENDING_INVALIDATE): Re-write pipeline code so that
2310         it can handle mixed sized quantites and single bits.
2311
2312 Mon Feb  2 17:43:15 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2313
2314         * interp.c (oengine.h): Do not include when building with IGEN.
2315         (sim_open): Replace GPRLEN by WITH_TARGET_WORD_BITSIZE.
2316         (sim_info): Ditto for PROCESSOR_64BIT.
2317         (sim_monitor): Replace ut_reg with unsigned_word.
2318         (*): Ditto for t_reg.
2319         (LOADDRMASK): Define.
2320         (sim_open): Remove defunct check that host FP is IEEE compliant,
2321         using software to emulate floating point.
2322         (value_fpr, ...): Always compile, was conditional on HASFPU.
2323
2324 Sun Feb  1 11:15:29 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2325
2326         * sim-main.h (sim_state): Make the cpu array MAX_NR_PROCESSORS in
2327         size.
2328
2329         * interp.c (SD, CPU): Define.
2330         (mips_option_handler): Set flags in each CPU.
2331         (interrupt_event): Assume CPU 0 is the one being iterrupted.
2332         (sim_close): Do not clear STATE, deleted anyway.
2333         (sim_write, sim_read): Assume CPU zero's vm should be used for
2334         data transfers.
2335         (sim_create_inferior): Set the PC for all processors.
2336         (sim_monitor, store_word, load_word, mips16_entry): Add cpu
2337         argument.
2338         (mips16_entry): Pass correct nr of args to store_word, load_word.
2339         (ColdReset): Cold reset all cpu's.
2340         (signal_exception): Pass cpu to sim_monitor & mips16_entry.
2341         (sim_monitor, load_memory, store_memory, signal_exception): Use
2342         `CPU' instead of STATE_CPU.
2343
2344
2345         * sim-main.h: Replace uses of STATE_CPU with CPU. Replace sd with
2346         SD or CPU_.
2347
2348         * sim-main.h (signal_exception): Add sim_cpu arg.
2349         (SignalException*): Pass both SD and CPU to signal_exception.
2350         * interp.c (signal_exception): Update.
2351
2352         * sim-main.h (value_fpr, store_fpr, dotrace, ifetch32), interp.c:
2353         Ditto
2354         (sync_operation, prefetch, cache_op, store_memory, load_memory,
2355         address_translation): Ditto
2356         (decode_coproc, cop_lw, cop_ld, cop_sw, cop_sd): Ditto.
2357
2358 Sat Jan 31 18:15:41 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2359
2360         * configure: Regenerated to track ../common/aclocal.m4 changes.
2361
2362 Sat Jan 31 14:49:24 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2363
2364         * interp.c (sim_engine_run): Add `nr_cpus' argument.
2365
2366         * mips.igen (model): Map processor names onto BFD name.
2367
2368         * sim-main.h (CPU_CIA): Delete.
2369         (SET_CIA, GET_CIA): Define
2370
2371 Wed Jan 21 16:16:27 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2372
2373         * sim-main.h (GPR_SET): Define, used by igen when zeroing a
2374         regiser.
2375
2376         * configure.in (default_endian): Configure a big-endian simulator
2377         by default.
2378         * configure: Re-generate.
2379
2380 Mon Jan 19 22:26:29 1998  Doug Evans  <devans@seba>
2381
2382         * configure: Regenerated to track ../common/aclocal.m4 changes.
2383
2384 Mon Jan  5 20:38:54 1998  Mark Alexander  <marka@cygnus.com>
2385
2386         * interp.c (sim_monitor): Handle Densan monitor outbyte
2387         and inbyte functions.
2388
2389 1997-12-29  Felix Lee  <flee@cygnus.com>
2390
2391         * interp.c (sim_engine_run): msvc cpp barfs on #if (a==b!=c).
2392
2393 Wed Dec 17 14:48:20 1997  Jeffrey A Law  (law@cygnus.com)
2394
2395         * Makefile.in (tmp-igen): Arrange for $zero to always be
2396         reset to zero after every instruction.
2397
2398 Mon Dec 15 23:17:11 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2399
2400         * configure: Regenerated to track ../common/aclocal.m4 changes.
2401         * config.in: Ditto.
2402
2403 Wed Dec 10 17:10:45 1997  Jeffrey A Law  (law@cygnus.com)
2404
2405         * mips.igen (MSUB): Fix to work like MADD.
2406         * gencode.c (MSUB): Similarly.
2407
2408 Thu Dec  4 09:21:05 1997  Doug Evans  <devans@canuck.cygnus.com>
2409
2410         * configure: Regenerated to track ../common/aclocal.m4 changes.
2411
2412 Wed Nov 26 11:00:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2413
2414         * mips.igen (LWC1): Correct assembler - lwc1 not swc1.
2415
2416 Sun Nov 23 01:45:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2417
2418         * sim-main.h (sim-fpu.h): Include.
2419
2420         * interp.c (convert, SquareRoot, Recip, Divide, Multiply, Sub,
2421         Add, Negate, AbsoluteValue, Equal, Less, Infinity, NaN): Rewrite
2422         using host independant sim_fpu module.
2423
2424 Thu Nov 20 19:56:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2425
2426         * interp.c (signal_exception): Report internal errors with SIGABRT
2427         not SIGQUIT.
2428
2429         * sim-main.h (C0_CONFIG): New register.
2430         (signal.h): No longer include.
2431
2432         * interp.c (decode_coproc): Allow access C0_CONFIG to register.
2433
2434 Tue Nov 18 15:33:48 1997  Doug Evans  <devans@canuck.cygnus.com>
2435
2436         * Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS).
2437
2438 Fri Nov 14 11:56:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2439
2440         * mips.igen: Tag vr5000 instructions.
2441         (ANDI): Was missing mipsIV model, fix assembler syntax.
2442         (do_c_cond_fmt): New function.
2443         (C.cond.fmt): Handle mips I-III which do not support CC field
2444         separatly.
2445         (bc1): Handle mips IV which do not have a delaed FCC separatly.
2446         (SDR): Mask paddr when BigEndianMem, not the converse as specified
2447         in IV3.2 spec.
2448         (DMULT, DMULTU): Force use of hosts 64bit multiplication.  Handle
2449         vr5000 which saves LO in a GPR separatly.
2450
2451         * configure.in (enable-sim-igen): For vr5000, select vr5000
2452         specific instructions.
2453         * configure: Re-generate.
2454
2455 Wed Nov 12 14:42:52 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2456
2457         * Makefile.in (SIM_OBJS): Add sim-fpu module.
2458
2459         * interp.c (store_fpr), sim-main.h: Add separate fmt_uninterpreted_32 and
2460         fmt_uninterpreted_64 bit cases to switch.  Convert to
2461         fmt_formatted,
2462
2463         * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Define,
2464
2465         * mips.igen (SWR): Mask paddr when BigEndianMem, not the converse
2466         as specified in IV3.2 spec.
2467         (MTC1, DMTC1): Call StoreFPR to store the GPR in the FPR.
2468
2469 Tue Nov 11 12:38:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2470
2471         * mips.igen: Delay slot branches add OFFSET to NIA not CIA.
2472         (MFC0, MTC0, SWC1, LWC1, SDC1, LDC1): Implement.
2473         (MTC1, MFC1, DMTC1, DMFC1, CFC1, CTC1): Implement separate non
2474         PENDING_FILL versions of instructions.  Simplify.
2475         (X): New function.
2476         (MULT, MULTU): Implement separate RD==0 and RD!=0 versions of
2477         instructions.
2478         (BEQZ, ..., SLT, SLTI, TLT, TLE, TLI, ...): Explicitly cast GPR to
2479         a signed value.
2480         (MTHI, MFHI): Disable code checking HI-LO.
2481
2482         * sim-main.h (dotrace,tracefh), interp.c: Make dotrace & tracefh
2483         global.
2484         (NULLIFY_NEXT_INSTRUCTION): Call dotrace.
2485
2486 Thu Nov  6 16:36:35 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2487
2488         * gencode.c (build_mips16_operands): Replace IPC with cia.
2489
2490         * interp.c (sim_monitor, signal_exception, cache_op, store_fpr,
2491         value_fpr, cop_ld, cop_lw, cop_sw, cop_sd, decode_coproc): Replace
2492         IPC to `cia'.
2493         (UndefinedResult): Replace function with macro/function
2494         combination.
2495         (sim_engine_run): Don't save PC in IPC.
2496
2497         * sim-main.h (IPC): Delete.
2498
2499
2500         * interp.c (signal_exception, store_word, load_word,
2501         address_translation, load_memory, store_memory, cache_op,
2502         prefetch, sync_operation, ifetch, value_fpr, store_fpr, convert,
2503         cop_lw, cop_ld, cop_sw, cop_sd, decode_coproc, sim_monitor): Add
2504         current instruction address - cia - argument.
2505         (sim_read, sim_write): Call address_translation directly.
2506         (sim_engine_run): Rename variable vaddr to cia.
2507         (signal_exception): Pass cia to sim_monitor
2508
2509         * sim-main.h (SignalException, LoadWord, StoreWord, CacheOp,
2510         Prefetch, SyncOperation, ValueFPR, StoreFPR, Convert, COP_LW,
2511         COP_LD, COP_SW, COP_SD, DecodeCoproc): Update.
2512
2513         * sim-main.h (SignalExceptionSimulatorFault): Delete definition.
2514         * interp.c (sim_open): Replace SignalExceptionSimulatorFault with
2515         SIM_ASSERT.
2516
2517         * interp.c (signal_exception): Pass restart address to
2518         sim_engine_restart.
2519
2520         * Makefile.in (semantics.o, engine.o, support.o, itable.o,
2521         idecode.o): Add dependency.
2522
2523         * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESUME_HOOK):
2524         Delete definitions
2525         (DELAY_SLOT): Update NIA not PC with branch address.
2526         (NULLIFY_NEXT_INSTRUCTION): Set NIA to instruction after next.
2527
2528         * mips.igen: Use CIA not PC in branch calculations.
2529         (illegal): Call SignalException.
2530         (BEQ, ADDIU): Fix assembler.
2531
2532 Wed Nov  5 12:19:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2533
2534         * m16.igen (JALX): Was missing.
2535
2536         * configure.in (enable-sim-igen): New configuration option.
2537         * configure: Re-generate.
2538
2539         * sim-main.h (MAX_INSNS, INSN_NAME): Define.
2540
2541         * interp.c (load_memory, store_memory): Delete parameter RAW.
2542         (sim_read, sim_write): Use sim_core_{read,write}_buffer directly
2543         bypassing {load,store}_memory.
2544
2545         * sim-main.h (ByteSwapMem): Delete definition.
2546
2547         * Makefile.in (SIM_OBJS): Add sim-memopt module.
2548
2549         * interp.c (sim_do_command, sim_commands): Delete mips specific
2550         commands.  Handled by module sim-options.
2551
2552         * sim-main.h (SIM_HAVE_FLATMEM): Undefine, use sim-core.o module.
2553         (WITH_MODULO_MEMORY): Define.
2554
2555         * interp.c (sim_info): Delete code printing memory size.
2556
2557         * interp.c (mips_size): Nee sim_size, delete function.
2558         (power2): Delete.
2559         (monitor, monitor_base, monitor_size): Delete global variables.
2560         (sim_open, sim_close): Delete code creating monitor and other
2561         memory regions.  Use sim-memopts module, via sim_do_commandf, to
2562         manage memory regions.
2563         (load_memory, store_memory): Use sim-core for memory model.
2564
2565         * interp.c (address_translation): Delete all memory map code
2566         except line forcing 32 bit addresses.
2567
2568 Wed Nov  5 11:21:11 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2569
2570         * sim-main.h (WITH_TRACE): Delete definition.  Enables common
2571         trace options.
2572
2573         * interp.c (logfh, logfile): Delete globals.
2574         (sim_open, sim_close): Delete code opening & closing log file.
2575         (mips_option_handler): Delete -l and -n options.
2576         (OPTION mips_options): Ditto.
2577
2578         * interp.c (OPTION mips_options): Rename option trace to dinero.
2579         (mips_option_handler): Update.
2580
2581 Wed Nov  5 09:35:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2582
2583         * interp.c (fetch_str): New function.
2584         (sim_monitor): Rewrite using sim_read & sim_write.
2585         (sim_open): Check magic number.
2586         (sim_open): Write monitor vectors into memory using sim_write.
2587         (MONITOR_BASE, MONITOR_SIZE, MEM_SIZE): Define.
2588         (sim_read, sim_write): Simplify - transfer data one byte at a
2589         time.
2590         (load_memory, store_memory): Clarify meaning of parameter RAW.
2591
2592         * sim-main.h (isHOST): Defete definition.
2593         (isTARGET): Mark as depreciated.
2594         (address_translation): Delete parameter HOST.
2595
2596         * interp.c (address_translation): Delete parameter HOST.
2597
2598 Wed Oct 29 11:13:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2599
2600         * mips.igen:
2601
2602         * Makefile.in (IGEN_INCLUDE): Files included by mips.igen.
2603         (tmp-igen, tmp-m16): Depend on IGEN_INCLUDE.
2604
2605 Tue Oct 28 11:06:47 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2606
2607         * mips.igen: Add model filter field to records.
2608
2609 Mon Oct 27 17:53:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2610
2611         * Makefile.in (SIM_NO_CFLAGS): Define.  Define WITH_IGEN=0.
2612
2613         interp.c (sim_engine_run): Do not compile function sim_engine_run
2614         when WITH_IGEN == 1.
2615
2616         * configure.in (sim_igen_flags, sim_m16_flags): Set according to
2617         target architecture.
2618
2619         Makefile.in (tmp-igen, tmp-m16): Drop -F and -M options to
2620         igen. Replace with configuration variables sim_igen_flags /
2621         sim_m16_flags.
2622
2623         * m16.igen: New file.  Copy mips16 insns here.
2624         * mips.igen: From here.
2625
2626 Mon Oct 27 13:53:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2627
2628         * Makefile.in (SIM_NO_OBJ): Define, move SIM_M16_OBJ, SIM_IGEN_OBJ
2629         to top.
2630         (tmp-igen, tmp-m16): Pass -I srcdir to igen.
2631
2632 Sat Oct 25 16:51:40 1997  Gavin Koch  <gavin@cygnus.com>
2633
2634         * gencode.c (build_instruction): Follow sim_write's lead in using
2635         BigEndianMem instead of !ByteSwapMem.
2636
2637 Fri Oct 24 17:41:49 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2638
2639         * configure.in (sim_gen): Dependent on target, select type of
2640         generator.  Always select old style generator.
2641
2642         configure: Re-generate.
2643
2644         Makefile.in (tmp-igen, tmp-m16, clean-m16, clean-igen): New
2645         targets.
2646         (SIM_M16_CFLAGS, SIM_M16_ALL, SIM_M16_OBJ, BUILT_SRC_FROM_M16,
2647         SIM_IGEN_CFLAGS, SIM_IGEN_ALL, SIM_IGEN_OBJ, BUILT_SRC_FROM_IGEN,
2648         IGEN_TRACE, IGEN_INSN, IGEN_DC): Define
2649         (SIM_EXTRA_CFLAGS, SIM_EXTRA_ALL, SIM_OBJS): Add member
2650         SIM_@sim_gen@_*, set by autoconf.
2651
2652 Wed Oct 22 12:52:06 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2653
2654         * sim-main.h (NULLIFY_NEXT_INSTRUCTION, DELAY_SLOT): Define.
2655
2656         * interp.c (ColdReset): Remove #ifdef HASFPU, check
2657         CURRENT_FLOATING_POINT instead.
2658
2659         * interp.c (ifetch32): New function. Fetch 32 bit instruction.
2660         (address_translation): Raise exception InstructionFetch when
2661         translation fails and isINSTRUCTION.
2662
2663         * interp.c (sim_open, sim_write, sim_monitor, store_word,
2664         sim_engine_run): Change type of of vaddr and paddr to
2665         address_word.
2666         (address_translation, prefetch, load_memory, store_memory,
2667         cache_op): Change type of vAddr and pAddr to address_word.
2668
2669         * gencode.c (build_instruction): Change type of vaddr and paddr to
2670         address_word.
2671
2672 Mon Oct 20 15:29:04 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2673
2674         * sim-main.h (ALU64_END, ALU32_END): Use ALU*_OVERFLOW_RESULT
2675         macro to obtain result of ALU op.
2676
2677 Tue Oct 21 17:39:14 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2678
2679         * interp.c (sim_info): Call profile_print.
2680
2681 Mon Oct 20 13:31:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2682
2683         * Makefile.in (SIM_OBJS): Add sim-profile.o module.
2684
2685         * sim-main.h (WITH_PROFILE): Do not define, defined in
2686         common/sim-config.h.  Use sim-profile module.
2687         (simPROFILE): Delete defintion.
2688
2689         * interp.c (PROFILE): Delete definition.
2690         (mips_option_handler): Delete 'p', 'y' and 'x' profile options.
2691         (sim_close): Delete code writing profile histogram.
2692         (mips_set_profile, mips_set_profile_size, writeout16, writeout32):
2693         Delete.
2694         (sim_engine_run): Delete code profiling the PC.
2695
2696 Mon Oct 20 13:31:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2697
2698         * sim-main.h (SIGNEXTEND): Force type of result to unsigned_word.
2699
2700         * interp.c (sim_monitor): Make register pointers of type
2701         unsigned_word*.
2702
2703         * sim-main.h: Make registers of type unsigned_word not
2704         signed_word.
2705
2706 Thu Oct 16 10:31:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2707
2708         * interp.c (sync_operation): Rename from SyncOperation, make
2709         global, add SD argument.
2710         (prefetch): Rename from Prefetch, make global, add SD argument.
2711         (decode_coproc): Make global.
2712
2713         * sim-main.h (SyncOperation, DecodeCoproc, Pefetch): Define.
2714
2715         * gencode.c (build_instruction): Generate DecodeCoproc not
2716         decode_coproc calls.
2717
2718         * interp.c (SETFCC, GETFCC, PREVCOC1): Move to sim-main.h
2719         (SizeFGR): Move to sim-main.h
2720         (simHALTEX, simHALTIN, simTRACE, simPROFILE, simDELAYSLOT,
2721         simSIGINT, simJALDELAYSLOT): Move to sim-main.h
2722         (FP_FLAGS, FP_ENABLE, FP_CAUSE, IR, UF, OF, DZ, IO, UO): Move to
2723         sim-main.h.
2724         (FP_FS, FP_MASK_RM, FP_SH_RM, FP_RM_NEAREST, FP_RM_TOPINF,
2725         FP_RM_TOMINF, GETRM): Move to sim-main.h.
2726         (Uncached, CachedNoncoherent, CachedCoherent, Cached,
2727         isINSTRUCTION, ..., AccessLength_BYTE, ...): Move to sim-main.h.
2728         (UserMode, BigEndianMem, ByteSwapMem, ReverseEndian,
2729         BigEndianCPU, status_KSU_mask, ...). Moved to sim-main.h
2730
2731         * sim-main.h (ALU32_END, ALU64_END): Define. When overflow raise
2732         exception.
2733         (sim-alu.h): Include.
2734         (NULLIFY_NIA, NULL_CIA, CPU_CIA): Define.
2735         (sim_cia): Typedef to instruction_address.
2736
2737 Thu Oct 16 10:31:41 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2738
2739         * Makefile.in (interp.o): Rename generated file engine.c to
2740         oengine.c.
2741
2742         * interp.c: Update.
2743
2744 Thu Oct 16 10:31:40 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2745
2746         * gencode.c (build_instruction): Use FPR_STATE not fpr_state.
2747
2748 Thu Oct 16 10:31:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2749
2750         * gencode.c (build_instruction): For "FPSQRT", output correct
2751         number of arguments to Recip.
2752
2753 Tue Oct 14 17:38:18 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2754
2755         * Makefile.in (interp.o): Depends on sim-main.h
2756
2757         * interp.c (mips16_entry, ColdReset,dotrace): Add SD argument. Use GPR not registers.
2758
2759         * sim-main.h (sim_cpu): Add registers, register_widths, fpr_state,
2760         ipc, dspc, pending_*, hiaccess, loaccess, state, dsstate fields.
2761         (REGISTERS, REGISTER_WIDTHS, FPR_STATE, IPC, DSPC, PENDING_*,
2762         STATE, DSSTATE): Define
2763         (GPR, FGRIDX, ..): Define.
2764
2765         * interp.c (registers, register_widths, fpr_state, ipc, dspc,
2766         pending_*, hiaccess, loaccess, state, dsstate): Delete globals.
2767         (GPR, FGRIDX, ...): Delete macros.
2768
2769         * interp.c: Update names to match defines from sim-main.h
2770
2771 Tue Oct 14 15:11:45 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2772
2773         * interp.c (sim_monitor): Add SD argument.
2774         (sim_warning): Delete.  Replace calls with calls to
2775         sim_io_eprintf.
2776         (sim_error): Delete. Replace calls with sim_io_error.
2777         (open_trace, writeout32, writeout16, getnum): Add SD argument.
2778         (mips_set_profile): Rename from sim_set_profile. Add SD argument.
2779         (mips_set_profile_size): Rename from sim_set_profile_size. Add SD
2780         argument.
2781         (mips_size): Rename from sim_size. Add SD argument.
2782
2783         * interp.c (simulator): Delete global variable.
2784         (callback): Delete global variable.
2785         (mips_option_handler, sim_open, sim_write, sim_read,
2786         sim_store_register, sim_fetch_register, sim_info, sim_do_command,
2787         sim_size,sim_monitor): Use sim_io_* not callback->*.
2788         (sim_open): ZALLOC simulator struct.
2789         (PROFILE): Do not define.
2790
2791 Tue Oct 14 13:35:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2792
2793         * interp.c (sim_open), support.h: Replace CHECKSIM macro found in
2794         support.h with corresponding code.
2795
2796         * sim-main.h (word64, uword64), support.h: Move definition to
2797         sim-main.h.
2798         (WORD64LO, WORD64HI, SET64LO, SET64HI, WORD64, UWORD64): Ditto.
2799
2800         * support.h: Delete
2801         * Makefile.in: Update dependencies
2802         * interp.c: Do not include.
2803
2804 Tue Oct 14 13:35:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2805
2806         * interp.c (address_translation, load_memory, store_memory,
2807         cache_op): Rename to from AddressTranslation et.al., make global,
2808         add SD argument
2809
2810         * sim-main.h (AddressTranslation, LoadMemory, StoreMemory,
2811         CacheOp): Define.
2812
2813         * interp.c (SignalException): Rename to signal_exception, make
2814         global.
2815
2816         * interp.c (Interrupt, ...): Move definitions to sim-main.h.
2817
2818         * sim-main.h (SignalException, SignalExceptionInterrupt,
2819         SignalExceptionInstructionFetch, SignalExceptionAddressStore,
2820         SignalExceptionAddressLoad, SignalExceptionSimulatorFault,
2821         SignalExceptionIntegerOverflow, SignalExceptionCoProcessorUnusable):
2822         Define.
2823
2824         * interp.c, support.h: Use.
2825
2826 Tue Oct 14 13:19:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2827
2828         * interp.c (ValueFPR, StoreFPR), sim-main.h: Make global, rename
2829         to value_fpr / store_fpr. Add SD argument.
2830         (NaN, Infinity, Less, Equal, AbsoluteValue, Negate, Add, Sub,
2831         Multiply, Divide, Recip, SquareRoot, Convert): Make global.
2832
2833         * sim-main.h (ValueFPR, StoreFPR): Define.
2834
2835 Tue Oct 14 13:06:55 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2836
2837         * interp.c (sim_engine_run): Check consistency between configure
2838         WITH_TARGET_WORD_BITSIZE and WITH_FLOATING_POINT and gensim GPRLEN
2839         and HASFPU.
2840
2841         * configure.in (mips_bitsize): Configure WITH_TARGET_WORD_BITSIZE.
2842         (mips_fpu): Configure WITH_FLOATING_POINT.
2843         (mips_endian): Configure WITH_TARGET_ENDIAN.
2844         * configure: Update.
2845
2846 Fri Oct  3 09:28:00 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2847
2848         * configure: Regenerated to track ../common/aclocal.m4 changes.
2849
2850 Mon Sep 29 14:45:00 1997  Bob Manson  <manson@charmed.cygnus.com>
2851
2852         * configure: Regenerated.
2853
2854 Fri Sep 26 12:48:18 1997  Mark Alexander  <marka@cygnus.com>
2855
2856         * interp.c: Allow Debug, DEPC, and EPC registers to be examined in GDB.
2857
2858 Thu Sep 25 11:15:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2859
2860         * gencode.c (print_igen_insn_models): Assume certain architectures
2861         include all mips* instructions.
2862         (print_igen_insn_format): Use data_size==-1 as marker for MIPS16
2863         instruction.
2864
2865         * Makefile.in (tmp.igen): Add target. Generate igen input from
2866         gencode file.
2867
2868         * gencode.c (FEATURE_IGEN): Define.
2869         (main): Add --igen option.  Generate output in igen format.
2870         (process_instructions): Format output according to igen option.
2871         (print_igen_insn_format): New function.
2872         (print_igen_insn_models): New function.
2873         (process_instructions): Only issue warnings and ignore
2874         instructions when no FEATURE_IGEN.
2875
2876 Wed Sep 24 17:38:57 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2877
2878         * interp.c (COP_SD, COP_LD): Add UNUSED to pacify GCC for some
2879         MIPS targets.
2880
2881 Tue Sep 23 11:04:38 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2882
2883         * configure: Regenerated to track ../common/aclocal.m4 changes.
2884
2885 Tue Sep 23 10:19:51 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2886
2887         * Makefile.in (SIM_ALIGNMENT, SIM_ENDIAN, SIM_HOSTENDIAN,
2888         SIM_RESERVED_BITS): Delete, moved to common.
2889         (SIM_EXTRA_CFLAGS): Update.
2890
2891 Mon Sep 22 11:46:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2892
2893         * configure.in: Configure non-strict memory alignment.
2894         * configure: Regenerated to track ../common/aclocal.m4 changes.
2895
2896 Fri Sep 19 17:45:25 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2897
2898         * configure: Regenerated to track ../common/aclocal.m4 changes.
2899
2900 Sat Sep 20 14:07:28 1997  Gavin Koch  <gavin@cygnus.com>
2901
2902         * gencode.c (SDBBP,DERET): Added (3900) insns.
2903         (RFE): Turn on for 3900.
2904         * interp.c (DebugBreakPoint,DEPC,Debug,Debug_*): Added.
2905         (dsstate): Made global.
2906         (SUBTARGET_R3900): Added.
2907         (CANCELDELAYSLOT): New.
2908         (SignalException): Ignore SystemCall rather than ignore and
2909         terminate.  Add DebugBreakPoint handling.
2910         (decode_coproc): New insns RFE, DERET; and new registers Debug
2911         and DEPC protected by SUBTARGET_R3900.
2912         (sim_engine_run): Use CANCELDELAYSLOT rather than clearing
2913         bits explicitly.
2914         * Makefile.in,configure.in: Add mips subtarget option.
2915         * configure: Update.
2916
2917 Fri Sep 19 09:33:27 1997  Gavin Koch  <gavin@cygnus.com>
2918
2919         * gencode.c: Add r3900 (tx39).
2920
2921
2922 Tue Sep 16 15:52:04 1997  Gavin Koch  <gavin@cygnus.com>
2923
2924         * gencode.c (build_instruction): Don't need to subtract 4 for
2925         JALR, just 2.
2926
2927 Tue Sep 16 11:32:28 1997  Gavin Koch  <gavin@cygnus.com>
2928
2929         * interp.c: Correct some HASFPU problems.
2930
2931 Mon Sep 15 17:36:15 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2932
2933         * configure: Regenerated to track ../common/aclocal.m4 changes.
2934
2935 Fri Sep 12 12:01:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2936
2937         * interp.c (mips_options): Fix samples option short form, should
2938         be `x'.
2939
2940 Thu Sep 11 09:35:29 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2941
2942         * interp.c (sim_info): Enable info code.  Was just returning.
2943
2944 Tue Sep  9 17:30:57 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2945
2946         * interp.c (decode_coproc): Clarify warning about unsuported MTC0,
2947         MFC0.
2948
2949 Tue Sep  9 16:28:28 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2950
2951         * gencode.c (build_instruction): Use SIGNED64 for 64 bit
2952         constants.
2953         (build_instruction): Ditto for LL.
2954
2955 Thu Sep  4 17:21:23 1997  Doug Evans  <dje@seba>
2956
2957         * configure: Regenerated to track ../common/aclocal.m4 changes.
2958
2959 Wed Aug 27 18:13:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2960
2961         * configure: Regenerated to track ../common/aclocal.m4 changes.
2962         * config.in: Ditto.
2963
2964 Wed Aug 27 14:12:27 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2965
2966         * interp.c (sim_open): Add call to sim_analyze_program, update
2967         call to sim_config.
2968
2969 Tue Aug 26 10:40:07 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2970
2971         * interp.c (sim_kill): Delete.
2972         (sim_create_inferior): Add ABFD argument. Set PC from same.
2973         (sim_load): Move code initializing trap handlers from here.
2974         (sim_open): To here.
2975         (sim_load): Delete, use sim-hload.c.
2976
2977         * Makefile.in (SIM_OBJS): Add sim-hload.o module.
2978
2979 Mon Aug 25 17:50:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2980
2981         * configure: Regenerated to track ../common/aclocal.m4 changes.
2982         * config.in: Ditto.
2983
2984 Mon Aug 25 15:59:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2985
2986         * interp.c (sim_open): Add ABFD argument.
2987         (sim_load): Move call to sim_config from here.
2988         (sim_open): To here.  Check return status.
2989
2990 Fri Jul 25 15:00:45 1997  Gavin Koch  <gavin@cygnus.com>
2991
2992         * gencode.c (build_instruction): Two arg MADD should
2993         not assign result to $0.
2994
2995 Thu Jun 26 12:13:17 1997  Angela Marie Thomas (angela@cygnus.com)
2996
2997         * sim/mips/configure: Change default_sim_endian to 0 (bi-endian)
2998         * sim/mips/configure.in: Regenerate.
2999
3000 Wed Jul  9 10:29:21 1997  Andrew Cagney  <cagney@critters.cygnus.com>
3001
3002         * interp.c (SUB_REG_UW, SUB_REG_SW, SUB_REG_*): Use more explicit
3003         signed8, unsigned8 et.al. types.
3004
3005         * interp.c (SUB_REG_FETCH): Handle both little and big endian
3006         hosts when selecting subreg.
3007
3008 Wed Jul  2 11:54:10 1997  Jeffrey A Law  (law@cygnus.com)
3009
3010         * interp.c (sim_engine_run): Reset the ZERO register to zero
3011         regardless of FEATURE_WARN_ZERO.
3012         * gencode.c (FEATURE_WARNINGS): Remove FEATURE_WARN_ZERO.
3013
3014 Wed Jun  4 10:43:14 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3015
3016         * interp.c (decode_coproc): Implement MTC0 N, CAUSE.
3017         (SignalException): For BreakPoints ignore any mode bits and just
3018         save the PC.
3019         (SignalException): Always set the CAUSE register.
3020
3021 Tue Jun  3 05:00:33 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3022
3023         * interp.c (SignalException): Clear the simDELAYSLOT flag when an
3024         exception has been taken.
3025
3026         * interp.c: Implement the ERET and mt/f sr instructions.
3027
3028 Sat May 31 00:44:16 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3029
3030         * interp.c (SignalException): Don't bother restarting an
3031         interrupt.
3032
3033 Fri May 30 23:41:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3034
3035         * interp.c (SignalException): Really take an interrupt.
3036         (interrupt_event): Only deliver interrupts when enabled.
3037
3038 Tue May 27 20:08:06 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3039
3040         * interp.c (sim_info): Only print info when verbose.
3041         (sim_info) Use sim_io_printf for output.
3042
3043 Tue May 27 14:22:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3044
3045         * interp.c (CoProcPresent): Add UNUSED attribute - not used by all
3046         mips architectures.
3047
3048 Tue May 27 14:22:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3049
3050         * interp.c (sim_do_command): Check for common commands if a
3051         simulator specific command fails.
3052
3053 Thu May 22 09:32:03 1997  Gavin Koch  <gavin@cygnus.com>
3054
3055         * interp.c (sim_engine_run): ifdef out uses of simSTOP, simSTEP
3056         and simBE when DEBUG is defined.
3057
3058 Wed May 21 09:08:10 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3059
3060         * interp.c (interrupt_event): New function.  Pass exception event
3061         onto exception handler.
3062
3063         * configure.in: Check for stdlib.h.
3064         * configure: Regenerate.
3065
3066         * gencode.c (build_instruction): Add UNUSED attribute to tempS
3067         variable declaration.
3068         (build_instruction): Initialize memval1.
3069         (build_instruction): Add UNUSED attribute to byte, bigend,
3070         reverse.
3071         (build_operands): Ditto.
3072
3073         * interp.c: Fix GCC warnings.
3074         (sim_get_quit_code): Delete.
3075
3076         * configure.in: Add INLINE, ENDIAN, HOSTENDIAN and WARNINGS.
3077         * Makefile.in: Ditto.
3078         * configure: Re-generate.
3079
3080         * Makefile.in (SIM_OBJS): Add sim-watch.o module.
3081
3082 Tue May 20 15:08:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3083
3084         * interp.c (mips_option_handler): New function parse argumes using
3085         sim-options.
3086         (myname): Replace with STATE_MY_NAME.
3087         (sim_open): Delete check for host endianness - performed by
3088         sim_config.
3089         (simHOSTBE, simBE): Delete, replaced by sim-endian flags.
3090         (sim_open): Move much of the initialization from here.
3091         (sim_load): To here.  After the image has been loaded and
3092         endianness set.
3093         (sim_open): Move ColdReset from here.
3094         (sim_create_inferior): To here.
3095         (sim_open): Make FP check less dependant on host endianness.
3096
3097         * Makefile.in (SIM_RUN_OBJS): Set to nrun.o - use new version or
3098         run.
3099         * interp.c (sim_set_callbacks): Delete.
3100
3101         * interp.c (membank, membank_base, membank_size): Replace with
3102         STATE_MEMORY, STATE_MEM_SIZE, STATE_MEM_BASE.
3103         (sim_open): Remove call to callback->init. gdb/run do this.
3104
3105         * interp.c: Update
3106
3107         * sim-main.h (SIM_HAVE_FLATMEM): Define.
3108
3109         * interp.c (big_endian_p): Delete, replaced by
3110         current_target_byte_order.
3111
3112 Tue May 20 13:55:00 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3113
3114         * interp.c (host_read_long, host_read_word, host_swap_word,
3115         host_swap_long): Delete. Using common sim-endian.
3116         (sim_fetch_register, sim_store_register): Use H2T.
3117         (pipeline_ticks): Delete.  Handled by sim-events.
3118         (sim_info): Update.
3119         (sim_engine_run): Update.
3120
3121 Tue May 20 13:42:03 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3122
3123         * interp.c (sim_stop_reason): Move code determining simEXCEPTION
3124         reason from here.
3125         (SignalException): To here. Signal using sim_engine_halt.
3126         (sim_stop_reason): Delete, moved to common.
3127
3128 Tue May 20 10:19:48 1997  Andrew Cagney  <cagney@b2.cygnus.com>
3129
3130         * interp.c (sim_open): Add callback argument.
3131         (sim_set_callbacks): Delete SIM_DESC argument.
3132         (sim_size): Ditto.
3133
3134 Mon May 19 18:20:38 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3135
3136         * Makefile.in (SIM_OBJS): Add common modules.
3137
3138         * interp.c (sim_set_callbacks): Also set SD callback.
3139         (set_endianness, xfer_*, swap_*): Delete.
3140         (host_read_word, host_read_long, host_swap_word, host_swap_long):
3141         Change to functions using sim-endian macros.
3142         (control_c, sim_stop): Delete, use common version.
3143         (simulate): Convert into.
3144         (sim_engine_run): This function.
3145         (sim_resume): Delete.
3146
3147         * interp.c (simulation): New variable - the simulator object.
3148         (sim_kind): Delete global - merged into simulation.
3149         (sim_load): Cleanup.  Move PC assignment from here.
3150         (sim_create_inferior): To here.
3151
3152         * sim-main.h: New file.
3153         * interp.c (sim-main.h): Include.
3154
3155 Thu Apr 24 00:39:51 1997  Doug Evans  <dje@canuck.cygnus.com>
3156
3157         * configure: Regenerated to track ../common/aclocal.m4 changes.
3158
3159 Wed Apr 23 17:32:19 1997  Doug Evans  <dje@canuck.cygnus.com>
3160
3161         * tconfig.in (SIM_HAVE_BIENDIAN): Define.
3162
3163 Mon Apr 21 17:16:13 1997  Gavin Koch  <gavin@cygnus.com>
3164
3165         * gencode.c (build_instruction): DIV instructions: check
3166         for division by zero and integer overflow before using
3167         host's division operation.
3168
3169 Thu Apr 17 03:18:14 1997  Doug Evans  <dje@canuck.cygnus.com>
3170
3171         * Makefile.in (SIM_OBJS): Add sim-load.o.
3172         * interp.c: #include bfd.h.
3173         (target_byte_order): Delete.
3174         (sim_kind, myname, big_endian_p): New static locals.
3175         (sim_open): Set sim_kind, myname.  Move call to set_endianness to
3176         after argument parsing.  Recognize -E arg, set endianness accordingly.
3177         (sim_load): Return SIM_RC.  New arg abfd.  Call sim_load_file to
3178         load file into simulator.  Set PC from bfd.
3179         (sim_create_inferior): Return SIM_RC.  Delete arg start_address.
3180         (set_endianness): Use big_endian_p instead of target_byte_order.
3181
3182 Wed Apr 16 17:55:37 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3183
3184         * interp.c (sim_size): Delete prototype - conflicts with
3185         definition in remote-sim.h.  Correct definition.
3186
3187 Mon Apr  7 15:45:02 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
3188
3189         * configure: Regenerated to track ../common/aclocal.m4 changes.
3190         * config.in: Ditto.
3191
3192 Wed Apr  2 15:06:28 1997  Doug Evans  <dje@canuck.cygnus.com>
3193
3194         * interp.c (sim_open): New arg `kind'.
3195
3196         * configure: Regenerated to track ../common/aclocal.m4 changes.
3197
3198 Wed Apr  2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3199
3200         * configure: Regenerated to track ../common/aclocal.m4 changes.
3201
3202 Tue Mar 25 11:38:22 1997  Doug Evans  <dje@canuck.cygnus.com>
3203
3204         * interp.c (sim_open): Set optind to 0 before calling getopt.
3205
3206 Wed Mar 19 01:14:00 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
3207
3208         * configure: Regenerated to track ../common/aclocal.m4 changes.
3209
3210 Mon Mar 17 10:52:59 1997  Gavin Koch  <gavin@cetus.cygnus.com>
3211
3212         * interp.c : Replace uses of pr_addr with pr_uword64
3213         where the bit length is always 64 independent of SIM_ADDR.
3214         (pr_uword64) : added.
3215
3216 Mon Mar 17 15:10:07 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
3217
3218         * configure: Re-generate.
3219
3220 Fri Mar 14 10:34:11 1997  Michael Meissner  <meissner@cygnus.com>
3221
3222         * configure: Regenerate to track ../common/aclocal.m4 changes.
3223
3224 Thu Mar 13 12:51:36 1997  Doug Evans  <dje@canuck.cygnus.com>
3225
3226         * interp.c (sim_open): New SIM_DESC result.  Argument is now
3227         in argv form.
3228         (other sim_*): New SIM_DESC argument.
3229
3230 Mon Feb 24 22:47:14 1997  Dawn Perchik  <dawn@cygnus.com>
3231
3232         * interp.c: Fix printing of addresses for non-64-bit targets.
3233         (pr_addr): Add function to print address based on size.
3234
3235 Wed Feb 19 14:42:09 1997  Mark Alexander  <marka@cygnus.com>
3236
3237         * interp.c (simopen): Add support for LSI MiniRISC PMON vectors.
3238
3239 Thu Feb 13 14:08:30 1997  Ian Lance Taylor  <ian@cygnus.com>
3240
3241         * gencode.c (build_mips16_operands): Correct computation of base
3242         address for extended PC relative instruction.
3243
3244 Thu Feb  6 17:16:15 1997  Ian Lance Taylor  <ian@cygnus.com>
3245
3246         * interp.c (mips16_entry): Add support for floating point cases.
3247         (SignalException): Pass floating point cases to mips16_entry.
3248         (ValueFPR): Don't restrict fmt_single and fmt_word to even
3249         registers.
3250         (StoreFPR): Likewise.  Also, don't clobber fpr + 1 for fmt_single
3251         or fmt_word.
3252         (COP_LW): Pass fmt_word rather than fmt_uninterpreted to StoreFPR,
3253         and then set the state to fmt_uninterpreted.
3254         (COP_SW): Temporarily set the state to fmt_word while calling
3255         ValueFPR.
3256
3257 Tue Feb  4 16:48:25 1997  Ian Lance Taylor  <ian@cygnus.com>
3258
3259         * gencode.c (build_instruction): The high order may be set in the
3260         comparison flags at any ISA level, not just ISA 4.
3261
3262 Tue Feb  4 13:33:30 1997  Doug Evans  <dje@canuck.cygnus.com>
3263
3264         * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
3265         COMMON_{PRE,POST}_CONFIG_FRAG instead.
3266         * configure.in: sinclude ../common/aclocal.m4.
3267         * configure: Regenerated.
3268
3269 Fri Jan 31 11:11:45 1997  Ian Lance Taylor  <ian@cygnus.com>
3270
3271         * configure: Rebuild after change to aclocal.m4.
3272
3273 Thu Jan 23 11:46:23 1997  Stu Grossman  (grossman@critters.cygnus.com)
3274
3275         * configure configure.in Makefile.in:  Update to new configure
3276         scheme which is more compatible with WinGDB builds.
3277         * configure.in:  Improve comment on how to run autoconf.
3278         * configure:  Re-run autoconf to get new ../common/aclocal.m4.
3279         * Makefile.in:  Use autoconf substitution to install common
3280         makefile fragment.
3281
3282 Wed Jan  8 12:39:03 1997  Jim Wilson  <wilson@cygnus.com>
3283
3284         * gencode.c (build_instruction): Use BigEndianCPU instead of
3285         ByteSwapMem.
3286
3287 Thu Jan 02 22:23:04 1997  Mark Alexander  <marka@cygnus.com>
3288
3289         * interp.c (sim_monitor): Make output to stdout visible in
3290         wingdb's I/O log window.
3291
3292 Tue Dec 31 07:04:00 1996  Mark Alexander  <marka@cygnus.com>
3293
3294         * support.h: Undo previous change to SIGTRAP
3295         and SIGQUIT values.
3296
3297 Mon Dec 30 17:36:06 1996  Ian Lance Taylor  <ian@cygnus.com>
3298
3299         * interp.c (store_word, load_word): New static functions.
3300         (mips16_entry): New static function.
3301         (SignalException): Look for mips16 entry and exit instructions.
3302         (simulate): Use the correct index when setting fpr_state after
3303         doing a pending move.
3304
3305 Sun Dec 29 09:37:18 1996  Mark Alexander  <marka@cygnus.com>
3306
3307         * interp.c: Fix byte-swapping code throughout to work on
3308         both little- and big-endian hosts.
3309
3310 Sun Dec 29 09:18:32 1996  Mark Alexander  <marka@cygnus.com>
3311
3312         * support.h: Make definitions of SIGTRAP and SIGQUIT consistent
3313         with gdb/config/i386/xm-windows.h.
3314
3315 Fri Dec 27 22:48:51 1996  Mark Alexander  <marka@cygnus.com>
3316
3317         * gencode.c (build_instruction): Work around MSVC++ code gen bug
3318         that messes up arithmetic shifts.
3319
3320 Fri Dec 20 11:04:05 1996  Stu Grossman  (grossman@critters.cygnus.com)
3321
3322         * support.h:  Use _WIN32 instead of __WIN32__.  Also add defs for
3323         SIGTRAP and SIGQUIT for _WIN32.
3324
3325 Thu Dec 19 14:07:27 1996  Ian Lance Taylor  <ian@cygnus.com>
3326
3327         * gencode.c (build_instruction) [MUL]: Cast operands to word64, to
3328         force a 64 bit multiplication.
3329         (build_instruction) [OR]: In mips16 mode, don't do anything if the
3330         destination register is 0, since that is the default mips16 nop
3331         instruction.
3332
3333 Mon Dec 16 14:59:38 1996  Ian Lance Taylor  <ian@cygnus.com>
3334
3335         * gencode.c (MIPS16_DECODE): SWRASP is I8, not RI.
3336         (build_endian_shift): Don't check proc64.
3337         (build_instruction): Always set memval to uword64.  Cast op2 to
3338         uword64 when shifting it left in memory instructions.  Always use
3339         the same code for stores--don't special case proc64.
3340
3341         * gencode.c (build_mips16_operands): Fix base PC value for PC
3342         relative operands.
3343         (build_instruction): Call JALDELAYSLOT rather than DELAYSLOT for a
3344         jal instruction.
3345         * interp.c (simJALDELAYSLOT): Define.
3346         (JALDELAYSLOT): Define.
3347         (INDELAYSLOT, INJALDELAYSLOT): Define.
3348         (simulate): Clear simJALDELAYSLOT when simDELAYSLOT is cleared.
3349
3350 Tue Dec 24 22:11:20 1996  Angela Marie Thomas (angela@cygnus.com)
3351
3352         * interp.c (sim_open): add flush_cache as a PMON routine
3353         (sim_monitor): handle flush_cache by ignoring it
3354
3355 Wed Dec 11 13:53:51 1996  Jim Wilson  <wilson@cygnus.com>
3356
3357         * gencode.c (build_instruction): Use !ByteSwapMem instead of
3358         BigEndianMem.
3359         * interp.c (CONFIG, config_EP_{mask,shift,D,DxxDxx, config_BE): Delete.
3360         (BigEndianMem): Rename to ByteSwapMem and change sense.
3361         (BigEndianCPU, sim_write, LoadMemory, StoreMemory): Change
3362         BigEndianMem references to !ByteSwapMem.
3363         (set_endianness): New function, with prototype.
3364         (sim_open): Call set_endianness.
3365         (sim_info): Use simBE instead of BigEndianMem.
3366         (xfer_direct_word, xfer_direct_long, swap_direct_word,
3367         swap_direct_long, xfer_big_word, xfer_big_long, xfer_little_word,
3368         xfer_little_long, swap_word, swap_long): Delete unnecessary MSC_VER
3369         ifdefs, keeping the prototype declaration.
3370         (swap_word): Rewrite correctly.
3371         (ColdReset): Delete references to CONFIG.  Delete endianness related
3372         code; moved to set_endianness.
3373
3374 Tue Dec 10 11:32:04 1996  Jim Wilson  <wilson@cygnus.com>
3375
3376         * gencode.c (build_instruction, case JUMP): Truncate PC to 32 bits.
3377         * interp.c (CHECKHILO): Define away.
3378         (simSIGINT): New macro.
3379         (membank_size): Increase from 1MB to 2MB.
3380         (control_c): New function.
3381         (sim_resume): Rename parameter signal to signal_number.  Add local
3382         variable prev.  Call signal before and after simulate.
3383         (sim_stop_reason): Add simSIGINT support.
3384         (sim_warning, sim_error, dotrace, SignalException): Define as stdarg
3385         functions always.
3386         (sim_warning): Delete call to SignalException.  Do call printf_filtered
3387         if logfh is NULL.
3388         (AddressTranslation): Add #ifdef DEBUG around debugging message and
3389         a call to sim_warning.
3390
3391 Wed Nov 27 11:53:50 1996  Ian Lance Taylor  <ian@cygnus.com>
3392
3393         * gencode.c (process_instructions): If ! proc64, skip DOUBLEWORD
3394         16 bit instructions.
3395
3396 Tue Nov 26 11:53:12 1996  Ian Lance Taylor  <ian@cygnus.com>
3397
3398         Add support for mips16 (16 bit MIPS implementation):
3399         * gencode.c (inst_type): Add mips16 instruction encoding types.
3400         (GETDATASIZEINSN): Define.
3401         (MIPS_DECODE): Add REG flag to dsllv, dsrav, and dsrlv.  Add
3402         jalx.  Add LEFT flag to mfhi and mflo.  Add RIGHT flag to mthi and
3403         mtlo.
3404         (MIPS16_DECODE): New table, for mips16 instructions.
3405         (bitmap_val): New static function.
3406         (struct mips16_op): Define.
3407         (mips16_op_table): New table, for mips16 operands.
3408         (build_mips16_operands): New static function.
3409         (process_instructions): If PC is odd, decode a mips16
3410         instruction.  Break out instruction handling into new
3411         build_instruction function.
3412         (build_instruction): New static function, broken out of
3413         process_instructions.  Check modifiers rather than flags for SHIFT
3414         bit count and m[ft]{hi,lo} direction.
3415         (usage): Pass program name to fprintf.
3416         (main): Remove unused variable this_option_optind.  Change
3417         ``*loptarg++'' to ``loptarg++''.
3418         (my_strtoul): Parenthesize && within ||.
3419         * interp.c (LoadMemory): Accept a halfword pAddr if vAddr is odd.
3420         (simulate): If PC is odd, fetch a 16 bit instruction, and
3421         increment PC by 2 rather than 4.
3422         * configure.in: Add case for mips16*-*-*.
3423         * configure: Rebuild.
3424
3425 Fri Nov 22 08:49:36 1996  Mark Alexander  <marka@cygnus.com>
3426
3427         * interp.c: Allow -t to enable tracing in standalone simulator.
3428         Fix garbage output in trace file and error messages.
3429
3430 Wed Nov 20 01:54:37 1996  Doug Evans  <dje@canuck.cygnus.com>
3431
3432         * Makefile.in: Delete stuff moved to ../common/Make-common.in.
3433         (SIM_{OBJS,EXTRA_CFLAGS,EXTRA_CLEAN}): Define.
3434         * configure.in: Simplify using macros in ../common/aclocal.m4.
3435         * configure: Regenerated.
3436         * tconfig.in: New file.
3437
3438 Tue Nov 12 13:34:00 1996  Dawn Perchik  <dawn@cygnus.com>
3439
3440         * interp.c: Fix bugs in 64-bit port.
3441         Use ansi function declarations for msvc compiler.
3442         Initialize and test file pointer in trace code.
3443         Prevent duplicate definition of LAST_EMED_REGNUM.
3444
3445 Tue Oct 15 11:07:06 1996  Mark Alexander  <marka@cygnus.com>
3446
3447         * interp.c (xfer_big_long): Prevent unwanted sign extension.
3448
3449 Thu Sep 26 17:35:00 1996  James G. Smith  <jsmith@cygnus.co.uk>
3450
3451         * interp.c (SignalException): Check for explicit terminating
3452         breakpoint value.
3453         * gencode.c: Pass instruction value through SignalException()
3454         calls for Trap, Breakpoint and Syscall.
3455
3456 Thu Sep 26 11:35:17 1996  James G. Smith  <jsmith@cygnus.co.uk>
3457
3458         * interp.c (SquareRoot): Add HAVE_SQRT check to ensure sqrt() is
3459         only used on those hosts that provide it.
3460         * configure.in: Add sqrt() to list of functions to be checked for.
3461         * config.in: Re-generated.
3462         * configure: Re-generated.
3463
3464 Fri Sep 20 15:47:12 1996  Ian Lance Taylor  <ian@cygnus.com>
3465
3466         * gencode.c (process_instructions): Call build_endian_shift when
3467         expanding STORE RIGHT, to fix swr.
3468         * support.h (SIGNEXTEND): If the sign bit is not set, explicitly
3469         clear the high bits.
3470         * interp.c (Convert): Fix fmt_single to fmt_long to not truncate.
3471         Fix float to int conversions to produce signed values.
3472
3473 Thu Sep 19 15:34:17 1996  Ian Lance Taylor  <ian@cygnus.com>
3474
3475         * gencode.c (MIPS_DECODE): Set UNSIGNED for multu instruction.
3476         (process_instructions): Correct handling of nor instruction.
3477         Correct shift count for 32 bit shift instructions. Correct sign
3478         extension for arithmetic shifts to not shift the number of bits in
3479         the type.  Fix 64 bit multiply high word calculation.  Fix 32 bit
3480         unsigned multiply.  Fix ldxc1 and friends to use coprocessor 1.
3481         Fix madd.
3482         * interp.c (CHECKHILO): Don't set HIACCESS, LOACCESS, or HLPC.
3483         It's OK to have a mult follow a mult.  What's not OK is to have a
3484         mult follow an mfhi.
3485         (Convert): Comment out incorrect rounding code.
3486
3487 Mon Sep 16 11:38:16 1996  James G. Smith  <jsmith@cygnus.co.uk>
3488
3489         * interp.c (sim_monitor): Improved monitor printf
3490         simulation. Tidied up simulator warnings, and added "--log" option
3491         for directing warning message output.
3492         * gencode.c: Use sim_warning() rather than WARNING macro.
3493
3494 Thu Aug 22 15:03:12 1996  Ian Lance Taylor  <ian@cygnus.com>
3495
3496         * Makefile.in (gencode): Depend upon gencode.o, getopt.o, and
3497         getopt1.o, rather than on gencode.c.  Link objects together.
3498         Don't link against -liberty.
3499         (gencode.o, getopt.o, getopt1.o): New targets.
3500         * gencode.c: Include <ctype.h> and "ansidecl.h".
3501         (AND): Undefine after including "ansidecl.h".
3502         (ULONG_MAX): Define if not defined.
3503         (OP_*): Don't define macros; now defined in opcode/mips.h.
3504         (main): Call my_strtoul rather than strtoul.
3505         (my_strtoul): New static function.
3506
3507 Wed Jul 17 18:12:38 1996  Stu Grossman  (grossman@critters.cygnus.com)
3508
3509         * gencode.c (process_instructions):  Generate word64 and uword64
3510         instead of `long long' and `unsigned long long' data types.
3511         * interp.c:  #include sysdep.h to get signals, and define default
3512         for SIGBUS.
3513         * (Convert):  Work around for Visual-C++ compiler bug with type
3514         conversion.
3515         * support.h:  Make things compile under Visual-C++ by using
3516         __int64 instead of `long long'.  Change many refs to long long
3517         into word64/uword64 typedefs.
3518
3519 Wed Jun 26 12:24:55 1996  Jason Molenda  (crash@godzilla.cygnus.co.jp)
3520
3521         * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
3522         INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
3523         (docdir): Removed.
3524         * configure.in (AC_PREREQ): autoconf 2.5 or higher.
3525         (AC_PROG_INSTALL): Added.
3526         (AC_PROG_CC): Moved to before configure.host call.
3527         * configure: Rebuilt.
3528
3529 Wed Jun  5 08:28:13 1996  James G. Smith  <jsmith@cygnus.co.uk>
3530
3531         * configure.in: Define @SIMCONF@ depending on mips target.
3532         * configure: Rebuild.
3533         * Makefile.in (run): Add @SIMCONF@ to control simulator
3534         construction.
3535         * gencode.c: Change LOADDRMASK to 64bit memory model only.
3536         * interp.c: Remove some debugging, provide more detailed error
3537         messages, update memory accesses to use LOADDRMASK.
3538
3539 Mon Jun  3 11:55:03 1996  Ian Lance Taylor  <ian@cygnus.com>
3540
3541         * configure.in: Add calls to AC_CONFIG_HEADER, AC_CHECK_HEADERS,
3542         AC_CHECK_LIB, and AC_CHECK_FUNCS.  Change AC_OUTPUT to set
3543         stamp-h.
3544         * configure: Rebuild.
3545         * config.in: New file, generated by autoheader.
3546         * interp.c: Include "config.h".  Include <stdlib.h>, <string.h>,
3547         and <strings.h> if they exist.  Replace #ifdef sun with #ifdef
3548         HAVE_ANINT and HAVE_AINT, as appropriate.
3549         * Makefile.in (run): Use @LIBS@ rather than -lm.
3550         (interp.o): Depend upon config.h.
3551         (Makefile): Just rebuild Makefile.
3552         (clean): Remove stamp-h.
3553         (mostlyclean): Make the same as clean, not as distclean.
3554         (config.h, stamp-h): New targets.
3555
3556 Fri May 10 00:41:17 1996  James G. Smith  <jsmith@cygnus.co.uk>
3557
3558         * interp.c (ColdReset): Fix boolean test. Make all simulator
3559         globals static.
3560
3561 Wed May  8 15:12:58 1996  James G. Smith  <jsmith@cygnus.co.uk>
3562
3563         * interp.c (xfer_direct_word, xfer_direct_long,
3564         swap_direct_word, swap_direct_long, xfer_big_word,
3565         xfer_big_long, xfer_little_word, xfer_little_long,
3566         swap_word,swap_long): Added.
3567         * interp.c (ColdReset): Provide function indirection to
3568         host<->simulated_target transfer routines.
3569         * interp.c (sim_store_register, sim_fetch_register): Updated to
3570         make use of indirected transfer routines.
3571
3572 Fri Apr 19 15:48:24 1996  James G. Smith  <jsmith@cygnus.co.uk>
3573
3574         * gencode.c (process_instructions): Ensure FP ABS instruction
3575         recognised.
3576         * interp.c (AbsoluteValue): Add routine. Also provide simple PMON
3577         system call support.
3578
3579 Wed Apr 10 09:51:38 1996  James G. Smith  <jsmith@cygnus.co.uk>
3580
3581         * interp.c (sim_do_command): Complain if callback structure not
3582         initialised.
3583
3584 Thu Mar 28 13:50:51 1996  James G. Smith  <jsmith@cygnus.co.uk>
3585
3586         * interp.c (Convert): Provide round-to-nearest and round-to-zero
3587         support for Sun hosts.
3588         * Makefile.in (gencode): Ensure the host compiler and libraries
3589         used for cross-hosted build.
3590
3591 Wed Mar 27 14:42:12 1996  James G. Smith  <jsmith@cygnus.co.uk>
3592
3593         * interp.c, gencode.c: Some more (TODO) tidying.
3594
3595 Thu Mar  7 11:19:33 1996  James G. Smith  <jsmith@cygnus.co.uk>
3596
3597         * gencode.c, interp.c: Replaced explicit long long references with
3598         WORD64HI, WORD64LO, SET64HI and SET64LO macro calls.
3599         * support.h (SET64LO, SET64HI): Macros added.
3600
3601 Wed Feb 21 12:16:21 1996  Ian Lance Taylor  <ian@cygnus.com>
3602
3603         * configure: Regenerate with autoconf 2.7.
3604
3605 Tue Jan 30 08:48:18 1996  Fred Fish  <fnf@cygnus.com>
3606
3607         * interp.c (LoadMemory): Enclose text following #endif in /* */.
3608         * support.h: Remove superfluous "1" from #if.
3609         * support.h (CHECKSIM): Remove stray 'a' at end of line.
3610
3611 Mon Dec  4 11:44:40 1995  Jamie Smith  <jsmith@cygnus.com>
3612
3613         * interp.c (StoreFPR): Control UndefinedResult() call on
3614         WARN_RESULT manifest.
3615
3616 Fri Dec  1 16:37:19 1995  James G. Smith  <jsmith@cygnus.co.uk>
3617
3618         * gencode.c: Tidied instruction decoding, and added FP instruction
3619         support.
3620
3621         * interp.c: Added dineroIII, and BSD profiling support. Also
3622         run-time FP handling.
3623
3624 Sun Oct 22 00:57:18 1995  James G. Smith  <jsmith@pasanda.cygnus.co.uk>
3625
3626         * Changelog, Makefile.in, README.Cygnus, configure, configure.in,
3627         gencode.c, interp.c, support.h: created.