1 2007-06-28 Richard Sandiford <richard@codesourcery.com>
3 * configure.ac, configure: Revert last patch.
5 2007-06-26 Richard Sandiford <richard@codesourcery.com>
7 * configure.ac (sim_mipsisa3264_configs): New variable.
8 (mipsis32*-*-, mipsisa32r2*-*-*, mips64*-*-*, mips64r2*-*-*): Make
9 every configuration support all four targets, using the triplet to
10 determine the default.
11 * configure: Regenerate.
13 2007-06-25 Richard Sandiford <richard@codesourcery.com>
15 * Makefile.in (m16run.o): New rule.
17 2007-05-15 Thiemo Seufer <ths@mips.com>
19 * mips3264r2.igen (DSHD): Fix compile warning.
21 2007-05-14 Thiemo Seufer <ths@mips.com>
23 * mips.igen (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL,
24 CVT.S.PU, FLOOR.L.fmt, LDXC1, LUXC1, LWXC1, MADD.fmt, MSUB.fmt,
25 NMADD.fmt, NMSUB.fmt, PLL.PS, PLU.PS, PREFX, PUL.PS, PUU.PS,
26 RECIP.fmt, ROUND.L.fmt, RSQRT.fmt, SWXC1, TRUNC.L.fmt): Add support
29 2007-03-01 Thiemo Seufer <ths@mips.com>
31 * mips.igen (MFHI, MFLO, MTHI, MTLO): Restore support for mips32
34 2007-02-20 Thiemo Seufer <ths@mips.com>
36 * dsp.igen: Update copyright notice.
37 * dsp2.igen: Fix copyright notice.
39 2007-02-20 Thiemo Seufer <ths@mips.com>
40 Chao-Ying Fu <fu@mips.com>
42 * Makefile.in (IGEN_INCLUDE): Add dsp2.igen.
43 * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
44 Add dsp2 to sim_igen_machine.
45 * configure: Regenerate.
46 * dsp.igen (do_ph_op): Add MUL support when op = 2.
47 (do_ph_mulq): New function to support mulq_rs.ph and mulq_s.ph.
48 (mulq_rs.ph): Use do_ph_mulq.
49 (MFHI, MFLO, MTHI, MTLO): Move these instructions to mips.igen.
50 * mips.igen: Add dsp2 model and include dsp2.igen.
51 (MFHI, MFLO, MTHI, MTLO): Extend these instructions for
52 for *mips32r2, *mips64r2, *dsp.
53 (MADD, MADDU, MSUB, MSUBU, MULT, MULTU): Extend these instructions
54 for *mips32r2, *mips64r2, *dsp2.
55 * dsp2.igen: New file for MIPS DSP REV 2 ASE.
57 2007-02-19 Thiemo Seufer <ths@mips.com>
58 Nigel Stephens <nigel@mips.com>
60 * mips.igen (jalr.hb, jr.hb): Add decoder for mip32r2/mips64r2
61 jumps with hazard barrier.
63 2007-02-19 Thiemo Seufer <ths@mips.com>
64 Nigel Stephens <nigel@mips.com>
66 * interp.c (sim_monitor): Flush stdout and stderr file descriptors
67 after each call to sim_io_write.
69 2007-02-19 Thiemo Seufer <ths@mips.com>
70 Nigel Stephens <nigel@mips.com>
72 * interp.c (ColdReset): Set CP0 Config0 to reflect the address size
73 supported by this simulator.
74 (decode_coproc): Recognise additional CP0 Config registers
77 2007-02-19 Thiemo Seufer <ths@mips.com>
78 Nigel Stephens <nigel@mips.com>
79 David Ung <davidu@mips.com>
81 * cp1.c (value_fpr): Don't inherit existing FPR_STATE for
82 uninterpreted formats. If fmt is one of the uninterpreted types
83 don't update the FPR_STATE. Handle fmt_uninterpreted_32 like
84 fmt_word, and fmt_uninterpreted_64 like fmt_long.
85 (store_fpr): When writing an invalid odd register, set the
86 matching even register to fmt_unknown, not the following register.
87 * interp.c (sim_open): If STATE_MEM_SIZE isn't set then set it to
88 the the memory window at offset 0 set by --memory-size command
90 (sim_store_register): Handle storing 4 bytes to an 8 byte floating
92 (sim_fetch_register): Likewise for reading 4 bytes from an 8 byte
94 (sim_monitor): When returning the memory size to the MIPS
95 application, use the value in STATE_MEM_SIZE, not an arbitrary
97 (cop_lw): Don' mess around with FPR_STATE, just pass
98 fmt_uninterpreted_32 to StoreFPR.
100 (cop_ld): Pass fmt_uninterpreted_64 not fmt_uninterpreted.
102 * mips.igen (not_word_value): Single version for mips32, mips64
105 2007-02-19 Thiemo Seufer <ths@mips.com>
106 Nigel Stephens <nigel@mips.com>
108 * interp.c (MEM_SIZE): Increase default memory size from 2 to 8
111 2007-02-17 Thiemo Seufer <ths@mips.com>
113 * configure.ac (mips*-sde-elf*): Move in front of generic machine
115 * configure: Regenerate.
117 2007-02-17 Thiemo Seufer <ths@mips.com>
119 * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
120 Add mdmx to sim_igen_machine.
121 (mipsisa64*-*-*): Likewise. Remove dsp.
122 (mipsisa32*-*-*): Remove dsp.
123 * configure: Regenerate.
125 2007-02-13 Thiemo Seufer <ths@mips.com>
127 * configure.ac: Add mips*-sde-elf* target.
128 * configure: Regenerate.
130 2006-12-21 Hans-Peter Nilsson <hp@axis.com>
132 * acconfig.h: Remove.
133 * config.in, configure: Regenerate.
135 2006-11-07 Thiemo Seufer <ths@mips.com>
137 * dsp.igen (do_w_op): Fix compiler warning.
139 2006-08-29 Thiemo Seufer <ths@mips.com>
140 David Ung <davidu@mips.com>
142 * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*): Add smartmips to
144 * configure: Regenerate.
145 * mips.igen (model): Add smartmips.
146 (MADDU): Increment ACX if carry.
147 (do_mult): Clear ACX.
148 (ROR,RORV): Add smartmips.
149 (include): Include smartmips.igen.
150 * sim-main.h (ACX): Set to REGISTERS[89].
151 * smartmips.igen: New file.
153 2006-08-29 Thiemo Seufer <ths@mips.com>
154 David Ung <davidu@mips.com>
156 * Makefile.in (IGEN_INCLUDE): Add missing includes for m16e.igen and
157 mips3264r2.igen. Add missing dependency rules.
158 * m16e.igen: Support for mips16e save/restore instructions.
160 2006-06-13 Richard Earnshaw <rearnsha@arm.com>
162 * configure: Regenerated.
164 2006-06-05 Daniel Jacobowitz <dan@codesourcery.com>
166 * configure: Regenerated.
168 2006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
170 * configure: Regenerated.
172 2006-05-15 Chao-ying Fu <fu@mips.com>
174 * dsp.igen (do_ph_shift, do_w_shra): Fix bugs for rounding instructions.
176 2006-04-18 Nick Clifton <nickc@redhat.com>
178 * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Add missing break
181 2006-03-29 Hans-Peter Nilsson <hp@axis.com>
183 * configure: Regenerate.
185 2005-12-14 Chao-ying Fu <fu@mips.com>
187 * Makefile.in (SIM_OBJS): Add dsp.o.
188 (dsp.o): New dependency.
189 (IGEN_INCLUDE): Add dsp.igen.
190 * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*, mipsisa64r2*-*-*,
191 mipsisa64*-*-*): Add dsp to sim_igen_machine.
192 * configure: Regenerate.
193 * mips.igen: Add dsp model and include dsp.igen.
194 (MFHI, MFLO, MTHI, MTLO): Remove mips32, mips32r2, mips64, mips64r2,
195 because these instructions are extended in DSP ASE.
196 * sim-main.h (LAST_EMBED_REGNUM): Change from 89 to 96 because of
197 adding 6 DSP accumulator registers and 1 DSP control register.
198 (AC0LOIDX, AC0HIIDX, AC1LOIDX, AC1HIIDX, AC2LOIDX, AC2HIIDX, AC3LOIDX,
199 AC3HIIDX, DSPLO, DSPHI, DSPCRIDX, DSPCR, DSPCR_POS_SHIFT,
200 DSPCR_POS_MASK, DSPCR_POS_SMASK, DSPCR_SCOUNT_SHIFT, DSPCR_SCOUNT_MASK,
201 DSPCR_SCOUNT_SMASK, DSPCR_CARRY_SHIFT, DSPCR_CARRY_MASK,
202 DSPCR_CARRY_SMASK, DSPCR_CARRY, DSPCR_EFI_SHIFT, DSPCR_EFI_MASK,
203 DSPCR_EFI_SMASK, DSPCR_EFI, DSPCR_OUFLAG_SHIFT, DSPCR_OUFLAG_MASK,
204 DSPCR_OUFLAG_SMASK, DSPCR_OUFLAG4, DSPCR_OUFLAG5, DSPCR_OUFLAG6,
205 DSPCR_OUFLAG7, DSPCR_CCOND_SHIFT, DSPCR_CCOND_MASK,
206 DSPCR_CCOND_SMASK): New define.
207 (DSPLO_REGNUM, DSPHI_REGNUM): New array for DSP accumulators.
208 * dsp.c, dsp.igen: New files for MIPS DSP ASE.
210 2005-07-08 Ian Lance Taylor <ian@airs.com>
212 * tconfig.in (SIM_QUIET_NAN_NEGATED): Define.
214 2005-06-16 David Ung <davidu@mips.com>
215 Nigel Stephens <nigel@mips.com>
217 * mips.igen: New mips16e model and include m16e.igen.
218 (check_u64): Add mips16e tag.
219 * m16e.igen: New file for MIPS16e instructions.
220 * configure.ac (mipsisa32*-*-*, mipsisa32r2*-*-*, mipsisa64*-*-*,
221 mipsisa64r2*-*-*): Change sim_gen to M16, add mips16 and mips16e
223 * configure: Regenerate.
225 2005-05-26 David Ung <davidu@mips.com>
227 * mips.igen (mips32r2, mips64r2): New ISA models. Add new model
228 tags to all instructions which are applicable to the new ISAs.
229 (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Add, moved from
231 * mips3264r2.igen: New file for MIPS 32/64 revision 2 specific
233 * vr.igen (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Move
235 * configure.ac (mipsisa32r2*-*-*, mipsisa64r2*-*-*): Add new targets.
236 * configure: Regenerate.
238 2005-03-23 Mark Kettenis <kettenis@gnu.org>
240 * configure: Regenerate.
242 2005-01-14 Andrew Cagney <cagney@gnu.org>
244 * configure.ac: Sinclude aclocal.m4 before common.m4. Add
245 explicit call to AC_CONFIG_HEADER.
246 * configure: Regenerate.
248 2005-01-12 Andrew Cagney <cagney@gnu.org>
250 * configure.ac: Update to use ../common/common.m4.
251 * configure: Re-generate.
253 2005-01-11 Andrew Cagney <cagney@localhost.localdomain>
255 * configure: Regenerated to track ../common/aclocal.m4 changes.
257 2005-01-07 Andrew Cagney <cagney@gnu.org>
259 * configure.ac: Rename configure.in, require autoconf 2.59.
260 * configure: Re-generate.
262 2004-12-08 Hans-Peter Nilsson <hp@axis.com>
264 * configure: Regenerate for ../common/aclocal.m4 update.
266 2004-09-24 Monika Chaddha <monika@acmet.com>
268 Committed by Andrew Cagney.
269 * m16.igen (CMP, CMPI): Fix assembler.
271 2004-08-18 Chris Demetriou <cgd@broadcom.com>
273 * configure.in (mipsisa64sb1*-*-*): Add mips3d to sim_igen_machine.
274 * configure: Regenerate.
276 2004-06-25 Chris Demetriou <cgd@broadcom.com>
278 * configure.in (sim_m16_machine): Include mipsIII.
279 * configure: Regenerate.
281 2004-05-11 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
283 * mips/interp.c (decode_coproc): Sign-extend the address retrieved
285 * mips/sim-main.h (COP0_BADVADDR): Remove a cast.
287 2004-04-10 Chris Demetriou <cgd@broadcom.com>
289 * sb1.igen (DIV.PS, RECIP.PS, RSQRT.PS, SQRT.PS): New.
291 2004-04-09 Chris Demetriou <cgd@broadcom.com>
293 * mips.igen (check_fmt): Remove.
294 (ABS.fmt, ADD.fmt, C.cond.fmta, C.cond.fmtb, CEIL.L.fmt, CEIL.W)
295 (CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt, FLOOR.L.fmt)
296 (FLOOR.W.fmt, MADD.fmt, MOV.fmt, MOVtf.fmt, MOVN.fmt, MOVZ.fmt)
297 (MSUB.fmt, MUL.fmt, NEG.fmt, NMADD.fmt, NMSUB.fmt, RECIP.fmt)
298 (ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt)
299 (TRUNC.L.fmt, TRUNC.W): Explicitly specify allowed FPU formats.
300 (check_fmt_p, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
301 (FLOOR.W.fmt, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt)
302 (SQRT.fmt, TRUNC.L.fmt, TRUNC.W): Remove all uses of check_fmt.
303 (C.cnd.fmta): Remove incorrect call to check_fmt_p.
305 2004-04-09 Chris Demetriou <cgd@broadcom.com>
307 * sb1.igen (check_sbx): New function.
308 (PABSDIFF.fmt, PABSDIFC.fmt, PAVG.fmt): Use check_sbx.
310 2004-03-29 Chris Demetriou <cgd@broadcom.com>
311 Richard Sandiford <rsandifo@redhat.com>
313 * sim-main.h (MIPS_MACH_HAS_MT_HILO_HAZARD)
314 (MIPS_MACH_HAS_MULT_HILO_HAZARD, MIPS_MACH_HAS_DIV_HILO_HAZARD): New.
315 * mips.igen (check_mt_hilo, check_mult_hilo, check_div_hilo): Provide
316 separate implementations for mipsIV and mipsV. Use new macros to
317 determine whether the restrictions apply.
319 2004-01-19 Chris Demetriou <cgd@broadcom.com>
321 * mips.igen (check_mf_cycles, check_mt_hilo, check_mf_hilo)
322 (check_mult_hilo): Improve comments.
323 (check_div_hilo): Likewise. Also, fork off a new version
324 to handle mips32/mips64 (since there are no hazards to check
327 2003-06-17 Richard Sandiford <rsandifo@redhat.com>
329 * mips.igen (do_dmultx): Fix check for negative operands.
331 2003-05-16 Ian Lance Taylor <ian@airs.com>
333 * Makefile.in (SHELL): Make sure this is defined.
334 (various): Use $(SHELL) whenever we invoke move-if-change.
336 2003-05-03 Chris Demetriou <cgd@broadcom.com>
338 * cp1.c: Tweak attribution slightly.
341 * mdmx.igen: Likewise.
342 * mips3d.igen: Likewise.
343 * sb1.igen: Likewise.
345 2003-04-15 Richard Sandiford <rsandifo@redhat.com>
347 * vr.igen (do_vr_mul_op): Zero-extend the low 32 bits of
350 2003-02-27 Andrew Cagney <cagney@redhat.com>
352 * interp.c (sim_open): Rename _bfd to bfd.
353 (sim_create_inferior): Ditto.
355 2003-01-14 Chris Demetriou <cgd@broadcom.com>
357 * mips.igen (LUXC1, SUXC1): New, for mipsV and mips64.
359 2003-01-14 Chris Demetriou <cgd@broadcom.com>
361 * mips.igen (EI, DI): Remove.
363 2003-01-05 Richard Sandiford <rsandifo@redhat.com>
365 * Makefile.in (tmp-run-multi): Fix mips16 filter.
367 2003-01-04 Richard Sandiford <rsandifo@redhat.com>
368 Andrew Cagney <ac131313@redhat.com>
369 Gavin Romig-Koch <gavin@redhat.com>
370 Graydon Hoare <graydon@redhat.com>
371 Aldy Hernandez <aldyh@redhat.com>
372 Dave Brolley <brolley@redhat.com>
373 Chris Demetriou <cgd@broadcom.com>
375 * configure.in (mips64vr*): Define TARGET_ENABLE_FR to 1.
376 (sim_mach_default): New variable.
377 (mips64vr-*-*, mips64vrel-*-*): New configurations.
378 Add a new simulator generator, MULTI.
379 * configure: Regenerate.
380 * Makefile.in (SIM_MULTI_OBJ, SIM_EXTRA_DISTCLEAN): New variables.
381 (multi-run.o): New dependency.
382 (SIM_MULTI_ALL, SIM_MULTI_IGEN_CONFIGS): New variables.
383 (tmp-mach-multi, tmp-itable-multi, tmp-run-multi): New rules.
384 (tmp-multi): Combine them.
385 (BUILT_SRC_FROM_MULTI): New variable. Depend on tmp-multi.
386 (clean-extra): Remove sources in BUILT_SRC_FROM_MULTI.
387 (distclean-extra): New rule.
388 * sim-main.h: Include bfd.h.
389 (MIPS_MACH): New macro.
390 * mips.igen (vr4120, vr5400, vr5500): New models.
391 (clo, clz, dclo, dclz, madd, maddu, msub, msub, mul): Add *vr5500.
392 * vr.igen: Replace with new version.
394 2003-01-04 Chris Demetriou <cgd@broadcom.com>
396 * configure.in: Use SIM_AC_OPTION_RESERVED_BITS(1).
397 * configure: Regenerate.
399 2002-12-31 Chris Demetriou <cgd@broadcom.com>
401 * sim-main.h (check_branch_bug, mark_branch_bug): Remove.
402 * mips.igen: Remove all invocations of check_branch_bug and
405 2002-12-16 Chris Demetriou <cgd@broadcom.com>
407 * tconfig.in: Include "gdb/callback.h" and "gdb/remote-sim.h".
409 2002-07-30 Chris Demetriou <cgd@broadcom.com>
411 * mips.igen (do_load_double, do_store_double): New functions.
412 (LDC1, SDC1): Rename to...
413 (LDC1b, SDC1b): respectively.
414 (LDC1a, SDC1a): New instructions for MIPS II and MIPS32 support.
416 2002-07-29 Michael Snyder <msnyder@redhat.com>
418 * cp1.c (fp_recip2): Modify initialization expression so that
419 GCC will recognize it as constant.
421 2002-06-18 Chris Demetriou <cgd@broadcom.com>
423 * mdmx.c (SD_): Delete.
424 (Unpredictable): Re-define, for now, to directly invoke
425 unpredictable_action().
426 (mdmx_acc_op): Fix error in .ob immediate handling.
428 2002-06-18 Andrew Cagney <cagney@redhat.com>
430 * interp.c (sim_firmware_command): Initialize `address'.
432 2002-06-16 Andrew Cagney <ac131313@redhat.com>
434 * configure: Regenerated to track ../common/aclocal.m4 changes.
436 2002-06-14 Chris Demetriou <cgd@broadcom.com>
437 Ed Satterthwaite <ehs@broadcom.com>
439 * mips3d.igen: New file which contains MIPS-3D ASE instructions.
440 * Makefile.in (IGEN_INCLUDE): Add mips3d.igen.
441 * mips.igen: Include mips3d.igen.
442 (mips3d): New model name for MIPS-3D ASE instructions.
443 (CVT.W.fmt): Don't use this instruction for word (source) format
445 * cp1.c (fp_binary_r, fp_add_r, fp_mul_r, fpu_inv1, fpu_inv1_32)
446 (fpu_inv1_64, fp_recip1, fp_recip2, fpu_inv_sqrt1, fpu_inv_sqrt1_32)
447 (fpu_inv_sqrt1_64, fp_rsqrt1, fp_rsqrt2): New functions.
448 (NR_FRAC_GUARD, IMPLICIT_1): New macros.
449 * sim-main.h (fmt_pw, CompareAbs, AddR, MultiplyR, Recip1, Recip2)
450 (RSquareRoot1, RSquareRoot2): New macros.
451 (fp_add_r, fp_mul_r, fp_recip1, fp_recip2, fp_rsqrt1)
452 (fp_rsqrt2): New functions.
453 * configure.in: Add MIPS-3D support to mipsisa64 simulator.
454 * configure: Regenerate.
456 2002-06-13 Chris Demetriou <cgd@broadcom.com>
457 Ed Satterthwaite <ehs@broadcom.com>
459 * cp1.c (FP_PS_upper, FP_PS_lower, FP_PS_cat, FPQNaN_PS): New macros.
460 (value_fpr, store_fpr, fp_cmp, fp_unary, fp_binary, fp_mac)
461 (fp_inv_sqrt, fpu_format_name): Add paired-single support.
462 (convert): Note that this function is not used for paired-single
464 (ps_lower, ps_upper, pack_ps, convert_ps): New functions.
465 * mips.igen (FMT, MOVtf.fmt): Add paired-single support.
466 (check_fmt_p): Enable paired-single support.
467 (ALNV.PS, CVT.PS.S, CVT.S.PL, CVT.S.PU, PLL.PS, PLU.PS, PUL.PS)
468 (PUU.PS): New instructions.
469 (CVT.S.fmt): Don't use this instruction for paired-single format
471 * sim-main.h (FP_formats): New value 'fmt_ps.'
472 (ps_lower, ps_upper, pack_ps, convert_ps): New prototypes.
473 (PSLower, PSUpper, PackPS, ConvertPS): New macros.
475 2002-06-12 Chris Demetriou <cgd@broadcom.com>
477 * mips.igen: Fix formatting of function calls in
480 2002-06-12 Chris Demetriou <cgd@broadcom.com>
482 * mips.igen (MOVN, MOVZ): Trace result.
483 (TNEI): Print "tnei" as the opcode name in traces.
484 (CEIL.W): Add disassembly string for traces.
485 (RSQRT.fmt): Make location of disassembly string consistent
486 with other instructions.
488 2002-06-12 Chris Demetriou <cgd@broadcom.com>
490 * mips.igen (X): Delete unused function.
492 2002-06-08 Andrew Cagney <cagney@redhat.com>
494 * interp.c: Include "gdb/callback.h" and "gdb/remote-sim.h".
496 2002-06-07 Chris Demetriou <cgd@broadcom.com>
497 Ed Satterthwaite <ehs@broadcom.com>
499 * cp1.c (inner_mac, fp_mac, inner_rsqrt, fp_inv_sqrt)
500 (fp_rsqrt, fp_madd, fp_msub, fp_nmadd, fp_nmsub): New functions.
501 * sim-main.h (fp_rsqrt, fp_madd, fp_msub, fp_nmadd)
502 (fp_nmsub): New prototypes.
503 (RSquareRoot, MultiplyAdd, MultiplySub, NegMultiplyAdd)
504 (NegMultiplySub): New defines.
505 * mips.igen (RSQRT.fmt): Use RSquareRoot().
506 (MADD.D, MADD.S): Replace with...
507 (MADD.fmt): New instruction.
508 (MSUB.D, MSUB.S): Replace with...
509 (MSUB.fmt): New instruction.
510 (NMADD.D, NMADD.S): Replace with...
511 (NMADD.fmt): New instruction.
512 (NMSUB.D, MSUB.S): Replace with...
513 (NMSUB.fmt): New instruction.
515 2002-06-07 Chris Demetriou <cgd@broadcom.com>
516 Ed Satterthwaite <ehs@broadcom.com>
518 * cp1.c: Fix more comment spelling and formatting.
519 (value_fcr, store_fcr): Use fenr_FS rather than hard-coding value.
520 (denorm_mode): New function.
521 (fpu_unary, fpu_binary): Round results after operation, collect
522 status from rounding operations, and update the FCSR.
523 (convert): Collect status from integer conversions and rounding
524 operations, and update the FCSR. Adjust NaN values that result
525 from conversions. Convert to use sim_io_eprintf rather than
526 fprintf, and remove some debugging code.
527 * cp1.h (fenr_FS): New define.
529 2002-06-07 Chris Demetriou <cgd@broadcom.com>
531 * cp1.c (convert): Remove unusable debugging code, and move MIPS
532 rounding mode to sim FP rounding mode flag conversion code into...
533 (rounding_mode): New function.
535 2002-06-07 Chris Demetriou <cgd@broadcom.com>
537 * cp1.c: Clean up formatting of a few comments.
538 (value_fpr): Reformat switch statement.
540 2002-06-06 Chris Demetriou <cgd@broadcom.com>
541 Ed Satterthwaite <ehs@broadcom.com>
544 * sim-main.h: Include cp1.h.
545 (SETFCC, GETFCC, IR, UF, OF, DX, IO, UO, FP_FLAGS, FP_ENABLE)
546 (FP_CAUSE, GETFS, FP_RM_NEAREST, FP_RM_TOZERO, FP_RM_TOPINF)
547 (FP_RM_TOMINF, GETRM): Remove. Moved to cp1.h.
548 (FP_FS, FP_MASK_RM, FP_SH_RM, Nan, Less, Equal): Remove.
549 (value_fcr, store_fcr, test_fcsr, fp_cmp): New prototypes.
550 (ValueFCR, StoreFCR, TestFCSR, Compare): New macros.
551 * cp1.c: Don't include sim-fpu.h; already included by
552 sim-main.h. Clean up formatting of some comments.
553 (NaN, Equal, Less): Remove.
554 (test_fcsr, value_fcr, store_fcr, update_fcsr, fp_test)
555 (fp_cmp): New functions.
556 * mips.igen (do_c_cond_fmt): Remove.
557 (C.cond.fmta, C.cond.fmtb): Replace uses of do_c_cond_fmt_a with
558 Compare. Add result tracing.
559 (CxC1): Remove, replace with...
560 (CFC1a, CFC1b, CFC1c, CTC1a, CTC1b, CTC1c): New instructions.
561 (DMxC1): Remove, replace with...
562 (DMFC1a, DMFC1b, DMTC1a, DMTC1b): New instructions.
563 (MxC1): Remove, replace with...
564 (MFC1a, MFC1b, MTC1a, MTC1b): New instructions.
566 2002-06-04 Chris Demetriou <cgd@broadcom.com>
568 * sim-main.h (FGRIDX): Remove, replace all uses with...
569 (FGR_BASE): New macro.
570 (FP0_REGNUM, FCRCS_REGNUM, FCRIR_REGNUM): New macros.
571 (_sim_cpu): Move 'fgr' member to be right before 'fpr_state' member.
572 (NR_FGR, FGR): Likewise.
573 * interp.c: Replace all uses of FGRIDX with FGR_BASE.
574 * mips.igen: Likewise.
576 2002-06-04 Chris Demetriou <cgd@broadcom.com>
578 * cp1.c: Add an FSF Copyright notice to this file.
580 2002-06-04 Chris Demetriou <cgd@broadcom.com>
581 Ed Satterthwaite <ehs@broadcom.com>
583 * cp1.c (Infinity): Remove.
584 * sim-main.h (Infinity): Likewise.
586 * cp1.c (fp_unary, fp_binary): New functions.
587 (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div, fp_recip)
588 (fp_sqrt): New functions, implemented in terms of the above.
589 (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
590 (Recip, SquareRoot): Remove (replaced by functions above).
591 * sim-main.h (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div)
592 (fp_recip, fp_sqrt): New prototypes.
593 (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
594 (Recip, SquareRoot): Replace prototypes with #defines which
595 invoke the functions above.
597 2002-06-03 Chris Demetriou <cgd@broadcom.com>
599 * sim-main.h (Nan, Infinity, Less, Equal, AbsoluteValue, Negate)
600 (Add, Sub, Multiply, Divide, Recip, SquareRoot): Move lower in
601 file, remove PARAMS from prototypes.
602 (value_fpr, store_fpr, convert): Likewise. Use SIM_STATE to provide
603 simulator state arguments.
604 (ValueFPR, StoreFPR, Convert): Move lower in file. Use SIM_ARGS to
605 pass simulator state arguments.
606 * cp1.c (SD): Redefine as CPU_STATE(cpu).
607 (store_fpr, convert): Remove 'sd' argument.
608 (value_fpr): Likewise. Convert to use 'SD' instead.
610 2002-06-03 Chris Demetriou <cgd@broadcom.com>
612 * cp1.c (Min, Max): Remove #if 0'd functions.
613 * sim-main.h (Min, Max): Remove.
615 2002-06-03 Chris Demetriou <cgd@broadcom.com>
617 * cp1.c: fix formatting of switch case and default labels.
618 * interp.c: Likewise.
619 * sim-main.c: Likewise.
621 2002-06-03 Chris Demetriou <cgd@broadcom.com>
623 * cp1.c: Clean up comments which describe FP formats.
624 (FPQNaN_DOUBLE, FPQNaN_LONG): Generate using UNSIGNED64.
626 2002-06-03 Chris Demetriou <cgd@broadcom.com>
627 Ed Satterthwaite <ehs@broadcom.com>
629 * configure.in (mipsisa64sb1*-*-*): New target for supporting
630 Broadcom SiByte SB-1 processor configurations.
631 * configure: Regenerate.
632 * sb1.igen: New file.
633 * mips.igen: Include sb1.igen.
635 * Makefile.in (IGEN_INCLUDE): Add sb1.igen.
636 * mdmx.igen: Add "sb1" model to all appropriate functions and
638 * mdmx.c (AbsDiffOB, AvgOB, AccAbsDiffOB): New functions.
639 (ob_func, ob_acc): Reference the above.
640 (qh_acc): Adjust to keep the same size as ob_acc.
641 * sim-main.h (status_SBX, MX_VECT_ABSD, MX_VECT_AVG, MX_AbsDiff)
642 (MX_Avg, MX_VECT_ABSDA, MX_AbsDiffC): New macros.
644 2002-06-03 Chris Demetriou <cgd@broadcom.com>
646 * Makefile.in (IGEN_INCLUDE): Add mdmx.igen.
648 2002-06-02 Chris Demetriou <cgd@broadcom.com>
649 Ed Satterthwaite <ehs@broadcom.com>
651 * mips.igen (mdmx): New (pseudo-)model.
652 * mdmx.c, mdmx.igen: New files.
653 * Makefile.in (SIM_OBJS): Add mdmx.o.
654 * sim-main.h (MDMX_accumulator, MX_fmtsel, signed24, signed48):
656 (ACC, MX_Add, MX_AddA, MX_AddL, MX_And, MX_C_EQ, MX_C_LT, MX_Comp)
657 (MX_FMT_OB, MX_FMT_QH, MX_Max, MX_Min, MX_Msgn, MX_Mul, MX_MulA)
658 (MX_MulL, MX_MulS, MX_MulSL, MX_Nor, MX_Or, MX_Pick, MX_RAC)
659 (MX_RAC_H, MX_RAC_L, MX_RAC_M, MX_RNAS, MX_RNAU, MX_RND_AS)
660 (MX_RND_AU, MX_RND_ES, MX_RND_EU, MX_RND_ZS, MX_RND_ZU, MX_RNES)
661 (MX_RNEU, MX_RZS, MX_RZU, MX_SHFL, MX_ShiftLeftLogical)
662 (MX_ShiftRightArith, MX_ShiftRightLogical, MX_Sub, MX_SubA, MX_SubL)
663 (MX_VECT_ADD, MX_VECT_ADDA, MX_VECT_ADDL, MX_VECT_AND)
664 (MX_VECT_MAX, MX_VECT_MIN, MX_VECT_MSGN, MX_VECT_MUL, MX_VECT_MULA)
665 (MX_VECT_MULL, MX_VECT_MULS, MX_VECT_MULSL, MX_VECT_NOR)
666 (MX_VECT_OR, MX_VECT_SLL, MX_VECT_SRA, MX_VECT_SRL, MX_VECT_SUB)
667 (MX_VECT_SUBA, MX_VECT_SUBL, MX_VECT_XOR, MX_WACH, MX_WACL, MX_Xor)
668 (SIM_ARGS, SIM_STATE, UnpredictableResult, fmt_mdmx, ob_fmtsel)
669 (qh_fmtsel): New macros.
670 (_sim_cpu): New member "acc".
671 (mdmx_acc_op, mdmx_cc_op, mdmx_cpr_op, mdmx_pick_op, mdmx_rac_op)
672 (mdmx_round_op, mdmx_shuffle, mdmx_wach, mdmx_wacl): New functions.
674 2002-05-01 Chris Demetriou <cgd@broadcom.com>
676 * interp.c: Use 'deprecated' rather than 'depreciated.'
677 * sim-main.h: Likewise.
679 2002-05-01 Chris Demetriou <cgd@broadcom.com>
681 * cp1.c (store_fpr): Remove #ifdef'd out call to UndefinedResult
682 which wouldn't compile anyway.
683 * sim-main.h (unpredictable_action): New function prototype.
684 (Unpredictable): Define to call igen function unpredictable().
685 (NotWordValue): New macro to call igen function not_word_value().
686 (UndefinedResult): Remove.
687 * interp.c (undefined_result): Remove.
688 (unpredictable_action): New function.
689 * mips.igen (not_word_value, unpredictable): New functions.
690 (ADD, ADDI, do_addiu, do_addu, BGEZAL, BGEZALL, BLTZAL, BLTZALL)
691 (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, do_mult, do_multu)
692 (do_sra, do_srav, do_srl, do_srlv, SUB, do_subu): Invoke
693 NotWordValue() to check for unpredictable inputs, then
694 Unpredictable() to handle them.
696 2002-02-24 Chris Demetriou <cgd@broadcom.com>
698 * mips.igen: Fix formatting of calls to Unpredictable().
700 2002-04-20 Andrew Cagney <ac131313@redhat.com>
702 * interp.c (sim_open): Revert previous change.
704 2002-04-18 Alexandre Oliva <aoliva@redhat.com>
706 * interp.c (sim_open): Disable chunk of code that wrote code in
707 vector table entries.
709 2002-03-19 Chris Demetriou <cgd@broadcom.com>
711 * cp1.c (FP_S_s, FP_D_s, FP_S_be, FP_D_be, FP_S_e, FP_D_e, FP_S_f)
712 (FP_D_f, FP_S_fb, FP_D_fb, FPINF_SINGLE, FPINF_DOUBLE): Remove
715 2002-03-19 Chris Demetriou <cgd@broadcom.com>
717 * cp1.c: Fix many formatting issues.
719 2002-03-19 Chris G. Demetriou <cgd@broadcom.com>
721 * cp1.c (fpu_format_name): New function to replace...
722 (DOFMT): This. Delete, and update all callers.
723 (fpu_rounding_mode_name): New function to replace...
724 (RMMODE): This. Delete, and update all callers.
726 2002-03-19 Chris G. Demetriou <cgd@broadcom.com>
728 * interp.c: Move FPU support routines from here to...
729 * cp1.c: Here. New file.
730 * Makefile.in (SIM_OBJS): Add cp1.o to object list.
733 2002-03-12 Chris Demetriou <cgd@broadcom.com>
735 * configure.in (mipsisa32*-*-*, mipsisa64*-*-*): New targets.
736 * mips.igen (mips32, mips64): New models, add to all instructions
737 and functions as appropriate.
738 (loadstore_ea, check_u64): New variant for model mips64.
739 (check_fmt_p): New variant for models mipsV and mips64, remove
740 mipsV model marking fro other variant.
743 (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, SLLb): New instructions
744 for mips32 and mips64.
745 (DCLO, DCLZ): New instructions for mips64.
747 2002-03-07 Chris Demetriou <cgd@broadcom.com>
749 * mips.igen (BREAK, LUI, ORI, SYSCALL, XORI): Print
750 immediate or code as a hex value with the "%#lx" format.
751 (ANDI): Likewise, and fix printed instruction name.
753 2002-03-05 Chris Demetriou <cgd@broadcom.com>
755 * sim-main.h (UndefinedResult, Unpredictable): New macros
756 which currently do nothing.
758 2002-03-05 Chris Demetriou <cgd@broadcom.com>
760 * sim-main.h (status_UX, status_SX, status_KX, status_TS)
761 (status_PX, status_MX, status_CU0, status_CU1, status_CU2)
762 (status_CU3): New definitions.
764 * sim-main.h (ExceptionCause): Add new values for MIPS32
765 and MIPS64: MDMX, MCheck, CacheErr. Update comments
766 for DebugBreakPoint and NMIReset to note their status in
768 (SignalExceptionMDMX, SignalExceptionWatch, SignalExceptionMCheck)
769 (SignalExceptionCacheErr): New exception macros.
771 2002-03-05 Chris Demetriou <cgd@broadcom.com>
773 * mips.igen (check_fpu): Enable check for coprocessor 1 usability.
774 * sim-main.h (COP_Usable): Define, but for now coprocessor 1
776 (SignalExceptionCoProcessorUnusable): Take as argument the
777 unusable coprocessor number.
779 2002-03-05 Chris Demetriou <cgd@broadcom.com>
781 * mips.igen: Fix formatting of all SignalException calls.
783 2002-03-05 Chris Demetriou <cgd@broadcom.com>
785 * sim-main.h (SIGNEXTEND): Remove.
787 2002-03-04 Chris Demetriou <cgd@broadcom.com>
789 * mips.igen: Remove gencode comment from top of file, fix
790 spelling in another comment.
792 2002-03-04 Chris Demetriou <cgd@broadcom.com>
794 * mips.igen (check_fmt, check_fmt_p): New functions to check
795 whether specific floating point formats are usable.
796 (ABS.fmt, ADD.fmt, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
797 (FLOOR.W.fmt, MOV.fmt, MUL.fmt, NEG.fmt, RECIP.fmt, ROUND.L.fmt)
798 (ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt, TRUNC.L.fmt, TRUNC.W):
799 Use the new functions.
800 (do_c_cond_fmt): Remove format checks...
801 (C.cond.fmta, C.cond.fmtb): And move them into all callers.
803 2002-03-03 Chris Demetriou <cgd@broadcom.com>
805 * mips.igen: Fix formatting of check_fpu calls.
807 2002-03-03 Chris Demetriou <cgd@broadcom.com>
809 * mips.igen (FLOOR.L.fmt): Store correct destination register.
811 2002-03-03 Chris Demetriou <cgd@broadcom.com>
813 * mips.igen: Remove whitespace at end of lines.
815 2002-03-02 Chris Demetriou <cgd@broadcom.com>
817 * mips.igen (loadstore_ea): New function to do effective
818 address calculations.
819 (do_load, do_load_left, do_load_right, LL, LDD, PREF, do_store,
820 do_store_left, do_store_right, SC, SCD, PREFX, SWC1, SWXC1,
821 CACHE): Use loadstore_ea to do effective address computations.
823 2002-03-02 Chris Demetriou <cgd@broadcom.com>
825 * interp.c (load_word): Use EXTEND32 rather than SIGNEXTEND.
826 * mips.igen (LL, CxC1, MxC1): Likewise.
828 2002-03-02 Chris Demetriou <cgd@broadcom.com>
830 * mips.igen (LL, LLD, PREF, SC, SCD, ABS.fmt, ADD.fmt, CEIL.L.fmt,
831 CEIL.W, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt,
832 FLOOR.L.fmt, FLOOR.W.fmt, MADD.D, MADD.S, MOV.fmt, MOVtf.fmt,
833 MSUB.D, MSUB.S, MUL.fmt, NEG.fmt, NMADD.D, NMADD.S, NMSUB.D,
834 NMSUB.S, PREFX, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt,
835 SQRT.fmt, SUB.fmt, SWC1, SWXC1, TRUNC.L.fmt, TRUNC.W, CACHE):
836 Don't split opcode fields by hand, use the opcode field values
839 2002-03-01 Chris Demetriou <cgd@broadcom.com>
841 * mips.igen (do_divu): Fix spacing.
843 * mips.igen (do_dsllv): Move to be right before DSLLV,
844 to match the rest of the do_<shift> functions.
846 2002-03-01 Chris Demetriou <cgd@broadcom.com>
848 * mips.igen (do_dsll, do_dsllv, DSLL32, do_dsra, DSRA32, do_dsrl,
849 DSRL32, do_dsrlv): Trace inputs and results.
851 2002-03-01 Chris Demetriou <cgd@broadcom.com>
853 * mips.igen (CACHE): Provide instruction-printing string.
855 * interp.c (signal_exception): Comment tokens after #endif.
857 2002-02-28 Chris Demetriou <cgd@broadcom.com>
859 * mips.igen (LWXC1): Mark with filter "64,f", rather than just "32".
860 (MOVtf, MxC1, MxC1, DMxC1, DMxC1, CxC1, CxC1, SQRT.fmt, MOV.fmt,
861 NEG.fmt, ROUND.L.fmt, TRUNC.L.fmt, CEIL.L.fmt, FLOOR.L.fmt,
862 ROUND.W.fmt, TRUNC.W, CEIL.W, FLOOR.W.fmt, RECIP.fmt, RSQRT.fmt,
863 CVT.S.fmt, CVT.D.fmt, CVT.W.fmt, CVT.L.fmt, MOVtf.fmt, C.cond.fmta,
864 C.cond.fmtb, SUB.fmt, MUL.fmt, DIV.fmt, MOVZ.fmt, MOVN.fmt, LDXC1,
865 SWXC1, SDXC1, MSUB.D, MSUB.S, NMADD.S, NMADD.D, NMSUB.S, NMSUB.D,
866 LWC1, SWC1): Add "f" to filter, since these are FP instructions.
868 2002-02-28 Chris Demetriou <cgd@broadcom.com>
870 * mips.igen (DSRA32, DSRAV): Fix order of arguments in
871 instruction-printing string.
872 (LWU): Use '64' as the filter flag.
874 2002-02-28 Chris Demetriou <cgd@broadcom.com>
876 * mips.igen (SDXC1): Fix instruction-printing string.
878 2002-02-28 Chris Demetriou <cgd@broadcom.com>
880 * mips.igen (LDC1, SDC1): Remove mipsI model, and mark with
883 2002-02-27 Chris Demetriou <cgd@broadcom.com>
885 * mips.igen (PREFX): This is a 64-bit instruction, use '64'
888 2002-02-27 Chris Demetriou <cgd@broadcom.com>
890 * mips.igen (PREFX): Tweak instruction opcode fields (i.e.,
891 add a comma) so that it more closely match the MIPS ISA
892 documentation opcode partitioning.
893 (PREF): Put useful names on opcode fields, and include
894 instruction-printing string.
896 2002-02-27 Chris Demetriou <cgd@broadcom.com>
898 * mips.igen (check_u64): New function which in the future will
899 check whether 64-bit instructions are usable and signal an
900 exception if not. Currently a no-op.
901 (DADD, DADDI, DADDIU, DADDU, DDIV, DDIVU, DMULT, DMULTU, DSLL,
902 DSLL32, DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB,
903 DSUBU, LD, LDL, LDR, LLD, LWU, SCD, SD, SDL, SDR, DMxC1, LDXC1,
904 LWXC1, SDXC1, SWXC1, DMFC0, DMTC0): Use check_u64.
906 * mips.igen (check_fpu): New function which in the future will
907 check whether FPU instructions are usable and signal an exception
908 if not. Currently a no-op.
909 (ABS.fmt, ADD.fmt, BC1a, BC1b, C.cond.fmta, C.cond.fmtb,
910 CEIL.L.fmt, CEIL.W, CxC1, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt,
911 CVT.W.fmt, DIV.fmt, DMxC1, DMxC1, FLOOR.L.fmt, FLOOR.W.fmt, LDC1,
912 LDXC1, LWC1, LWXC1, MADD.D, MADD.S, MxC1, MOV.fmt, MOVtf,
913 MOVtf.fmt, MOVN.fmt, MOVZ.fmt, MSUB.D, MSUB.S, MUL.fmt, NEG.fmt,
914 NMADD.D, NMADD.S, NMSUB.D, NMSUB.S, RECIP.fmt, ROUND.L.fmt,
915 ROUND.W.fmt, RSQRT.fmt, SDC1, SDXC1, SQRT.fmt, SUB.fmt, SWC1,
916 SWXC1, TRUNC.L.fmt, TRUNC.W): Use check_fpu.
918 2002-02-27 Chris Demetriou <cgd@broadcom.com>
920 * mips.igen (do_load_left, do_load_right): Move to be immediately
922 (do_store_left, do_store_right): Move to be immediately following
925 2002-02-27 Chris Demetriou <cgd@broadcom.com>
927 * mips.igen (mipsV): New model name. Also, add it to
928 all instructions and functions where it is appropriate.
930 2002-02-18 Chris Demetriou <cgd@broadcom.com>
932 * mips.igen: For all functions and instructions, list model
933 names that support that instruction one per line.
935 2002-02-11 Chris Demetriou <cgd@broadcom.com>
937 * mips.igen: Add some additional comments about supported
938 models, and about which instructions go where.
939 (BC1b, MFC0, MTC0, RFE): Sort supported models in the same
940 order as is used in the rest of the file.
942 2002-02-11 Chris Demetriou <cgd@broadcom.com>
944 * mips.igen (ADD, ADDI, DADDI, DSUB, SUB): Add comment
945 indicating that ALU32_END or ALU64_END are there to check
947 (DADD): Likewise, but also remove previous comment about
950 2002-02-10 Chris Demetriou <cgd@broadcom.com>
952 * mips.igen (DDIV, DIV, DIVU, DMULT, DMULTU, DSLL, DSLL32,
953 DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB, DSUBU,
954 JALR, JR, MOVN, MOVZ, MTLO, MULT, MULTU, SLL, SLLV, SLT, SLTU,
955 SRAV, SRLV, SUB, SUBU, SYNC, XOR, MOVtf, DI, DMFC0, DMTC0, EI,
956 ERET, RFE, TLBP, TLBR, TLBWI, TLBWR): Tweak instruction opcode
957 fields (i.e., add and move commas) so that they more closely
958 match the MIPS ISA documentation opcode partitioning.
960 2002-02-10 Chris Demetriou <cgd@broadcom.com>
962 * mips.igen (ADDI): Print immediate value.
964 (DADDIU, DSRAV, DSRLV): Print correct instruction name.
965 (SLL): Print "nop" specially, and don't run the code
966 that does the shift for the "nop" case.
968 2001-11-17 Fred Fish <fnf@redhat.com>
970 * sim-main.h (float_operation): Move enum declaration outside
971 of _sim_cpu struct declaration.
973 2001-04-12 Jim Blandy <jimb@redhat.com>
975 * mips.igen (CFC1, CTC1): Pass the correct register numbers to
976 PENDING_FILL. Use PENDING_SCHED directly to handle the pending
978 * sim-main.h (COCIDX): Remove definition; this isn't supported by
979 PENDING_FILL, and you can get the intended effect gracefully by
980 calling PENDING_SCHED directly.
982 2001-02-23 Ben Elliston <bje@redhat.com>
984 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Only define if not
985 already defined elsewhere.
987 2001-02-19 Ben Elliston <bje@redhat.com>
989 * sim-main.h (sim_monitor): Return an int.
990 * interp.c (sim_monitor): Add return values.
991 (signal_exception): Handle error conditions from sim_monitor.
993 2001-02-08 Ben Elliston <bje@redhat.com>
995 * sim-main.c (load_memory): Pass cia to sim_core_read* functions.
996 (store_memory): Likewise, pass cia to sim_core_write*.
998 2000-10-19 Frank Ch. Eigler <fche@redhat.com>
1000 On advice from Chris G. Demetriou <cgd@sibyte.com>:
1001 * sim-main.h (GPR_CLEAR): Remove unused alternative macro.
1003 Thu Jul 27 22:02:05 2000 Andrew Cagney <cagney@b1.cygnus.com>
1005 From Maciej W. Rozycki <macro@ds2.pg.gda.pl>:
1006 * Makefile.in: Don't delete *.igen when cleaning directory.
1008 Wed Jul 19 18:50:51 2000 Andrew Cagney <cagney@b1.cygnus.com>
1010 * m16.igen (break): Call SignalException not sim_engine_halt.
1012 Mon Jul 3 11:13:20 2000 Andrew Cagney <cagney@b1.cygnus.com>
1014 From Jason Eckhardt:
1015 * mips.igen (MOVZ.fmt, MOVN.fmt): Move conditional on GPR[RT].
1017 Tue Jun 13 20:52:07 2000 Andrew Cagney <cagney@b1.cygnus.com>
1019 * mips.igen (MxC1, DMxC1): Fix printf formatting.
1021 2000-05-24 Michael Hayes <mhayes@cygnus.com>
1023 * mips.igen (do_dmultx): Fix typo.
1025 Tue May 23 21:39:23 2000 Andrew Cagney <cagney@b1.cygnus.com>
1027 * configure: Regenerated to track ../common/aclocal.m4 changes.
1029 Fri Apr 28 20:48:36 2000 Andrew Cagney <cagney@b1.cygnus.com>
1031 * mips.igen (DMxC1): Fix format arguments for sim_io_eprintf call.
1033 2000-04-12 Frank Ch. Eigler <fche@redhat.com>
1035 * sim-main.h (GPR_CLEAR): Define macro.
1037 Mon Apr 10 00:07:09 2000 Andrew Cagney <cagney@b1.cygnus.com>
1039 * interp.c (decode_coproc): Output long using %lx and not %s.
1041 2000-03-21 Frank Ch. Eigler <fche@redhat.com>
1043 * interp.c (sim_open): Sort & extend dummy memory regions for
1044 --board=jmr3904 for eCos.
1046 2000-03-02 Frank Ch. Eigler <fche@redhat.com>
1048 * configure: Regenerated.
1050 Tue Feb 8 18:35:01 2000 Donald Lindsay <dlindsay@hound.cygnus.com>
1052 * interp.c, mips.igen: all 5 DEADC0DE situations now have sim_io_eprintf
1053 calls, conditional on the simulator being in verbose mode.
1055 Fri Feb 4 09:45:15 2000 Donald Lindsay <dlindsay@cygnus.com>
1057 * sim-main.c (cache_op): Added case arm so that CACHE ops to a secondary
1058 cache don't get ReservedInstruction traps.
1060 1999-11-29 Mark Salter <msalter@cygnus.com>
1062 * dv-tx3904sio.c (tx3904sio_io_write_buffer): Use write value as a mask
1063 to clear status bits in sdisr register. This is how the hardware works.
1065 * interp.c (sim_open): Added more memory aliases for jmr3904 hardware
1066 being used by cygmon.
1068 1999-11-11 Andrew Haley <aph@cygnus.com>
1070 * interp.c (decode_coproc): Correctly handle DMFC0 and DMTC0
1073 Thu Sep 9 15:12:08 1999 Geoffrey Keating <geoffk@cygnus.com>
1075 * mips.igen (MULT): Correct previous mis-applied patch.
1077 Tue Sep 7 13:34:54 1999 Geoffrey Keating <geoffk@cygnus.com>
1079 * mips.igen (delayslot32): Handle sequence like
1080 mtc1 $at,$f12 ; jal fp_add ; mov.s $f13,$f12
1081 correctly by calling ENGINE_ISSUE_PREFIX_HOOK() before issue.
1082 (MULT): Actually pass the third register...
1084 1999-09-03 Mark Salter <msalter@cygnus.com>
1086 * interp.c (sim_open): Added more memory aliases for additional
1087 hardware being touched by cygmon on jmr3904 board.
1089 Thu Sep 2 18:15:53 1999 Andrew Cagney <cagney@b1.cygnus.com>
1091 * configure: Regenerated to track ../common/aclocal.m4 changes.
1093 Tue Jul 27 16:36:51 1999 Andrew Cagney <cagney@amy.cygnus.com>
1095 * interp.c (sim_store_register): Handle case where client - GDB -
1096 specifies that a 4 byte register is 8 bytes in size.
1097 (sim_fetch_register): Ditto.
1099 1999-07-14 Frank Ch. Eigler <fche@cygnus.com>
1101 Implement "sim firmware" option, inspired by jimb's version of 1998-01.
1102 * interp.c (firmware_option_p): New global flag: "sim firmware" given.
1103 (idt_monitor_base): Base address for IDT monitor traps.
1104 (pmon_monitor_base): Ditto for PMON.
1105 (lsipmon_monitor_base): Ditto for LSI PMON.
1106 (MONITOR_BASE, MONITOR_SIZE): Removed macros.
1107 (mips_option): Add "firmware" option with new OPTION_FIRMWARE key.
1108 (sim_firmware_command): New function.
1109 (mips_option_handler): Call it for OPTION_FIRMWARE.
1110 (sim_open): Allocate memory for idt_monitor region. If "--board"
1111 option was given, add no monitor by default. Add BREAK hooks only if
1112 monitors are also there.
1114 Mon Jul 12 00:02:27 1999 Andrew Cagney <cagney@amy.cygnus.com>
1116 * interp.c (sim_monitor): Flush output before reading input.
1118 Sun Jul 11 19:28:11 1999 Andrew Cagney <cagney@b1.cygnus.com>
1120 * tconfig.in (SIM_HANDLES_LMA): Always define.
1122 Thu Jul 8 16:06:59 1999 Andrew Cagney <cagney@b1.cygnus.com>
1124 From Mark Salter <msalter@cygnus.com>:
1125 * interp.c (BOARD_BSP): Define. Add to list of possible boards.
1126 (sim_open): Add setup for BSP board.
1128 Wed Jul 7 12:45:58 1999 Andrew Cagney <cagney@b1.cygnus.com>
1130 * mips.igen (MULT, MULTU): Add syntax for two operand version.
1131 (DMFC0, DMTC0): Recognize. Call DecodeCoproc which will report
1132 them as unimplemented.
1134 1999-05-08 Felix Lee <flee@cygnus.com>
1136 * configure: Regenerated to track ../common/aclocal.m4 changes.
1138 1999-04-21 Frank Ch. Eigler <fche@cygnus.com>
1140 * mips.igen (bc0f): For the TX39 only, decode this as a no-op stub.
1142 Thu Apr 15 14:15:17 1999 Andrew Cagney <cagney@amy.cygnus.com>
1144 * configure.in: Any mips64vr5*-*-* target should have
1145 -DTARGET_ENABLE_FR=1.
1146 (default_endian): Any mips64vr*el-*-* target should default to
1148 * configure: Re-generate.
1150 1999-02-19 Gavin Romig-Koch <gavin@cygnus.com>
1152 * mips.igen (ldl): Extend from _16_, not 32.
1154 Wed Jan 27 18:51:38 1999 Andrew Cagney <cagney@chook.cygnus.com>
1156 * interp.c (sim_store_register): Force registers written to by GDB
1157 into an un-interpreted state.
1159 1999-02-05 Frank Ch. Eigler <fche@cygnus.com>
1161 * dv-tx3904sio.c (tx3904sio_tickle): After a polled I/O from the
1162 CPU, start periodic background I/O polls.
1163 (tx3904sio_poll): New function: periodic I/O poller.
1165 1998-12-30 Frank Ch. Eigler <fche@cygnus.com>
1167 * mips.igen (BREAK): Call signal_exception instead of sim_engine_halt.
1169 Tue Dec 29 16:03:53 1998 Rainer Orth <ro@TechFak.Uni-Bielefeld.DE>
1171 * configure.in, configure (mips64vr5*-*-*): Added missing ;; in
1174 1998-12-29 Frank Ch. Eigler <fche@cygnus.com>
1176 * interp.c (sim_open): Allocate jm3904 memory in smaller chunks.
1177 (load_word): Call SIM_CORE_SIGNAL hook on error.
1178 (signal_exception): Call SIM_CPU_EXCEPTION_TRIGGER hook before
1179 starting. For exception dispatching, pass PC instead of NULL_CIA.
1180 (decode_coproc): Use COP0_BADVADDR to store faulting address.
1181 * sim-main.h (COP0_BADVADDR): Define.
1182 (SIM_CORE_SIGNAL): Define hook to call mips_core_signal.
1183 (SIM_CPU_EXCEPTION*): Define hooks to call mips_cpu_exception*().
1184 (_sim_cpu): Add exc_* fields to store register value snapshots.
1185 * mips.igen (*): Replace memory-related SignalException* calls
1186 with references to SIM_CORE_SIGNAL hook.
1188 * dv-tx3904irc.c (tx3904irc_port_event): printf format warning
1190 * sim-main.c (*): Minor warning cleanups.
1192 1998-12-24 Gavin Romig-Koch <gavin@cygnus.com>
1194 * m16.igen (DADDIU5): Correct type-o.
1196 Mon Dec 21 10:34:48 1998 Andrew Cagney <cagney@chook>
1198 * mips.igen (do_ddiv, do_ddivu): Pacify GCC. Update hi/lo via tmp
1201 Wed Dec 16 18:20:28 1998 Andrew Cagney <cagney@chook>
1203 * Makefile.in (SIM_EXTRA_CFLAGS): No longer need to add .../newlib
1205 (interp.o): Add dependency on itable.h
1206 (oengine.c, gencode): Delete remaining references.
1207 (BUILT_SRC_FROM_GEN): Clean up.
1209 1998-12-16 Gavin Romig-Koch <gavin@cygnus.com>
1212 * Makefile.in (SIM_HACK_OBJ,HACK_OBJS,HACK_GEN_SRCS,libhack.a,
1213 tmp-hack,tmp-m32-hack,tmp-m16-hack,tmp-itable-hack,
1214 tmp-run-hack) : New.
1215 * m16.igen (LD,DADDIU,DADDUI5,DADJSP,DADDIUSP,DADDI,DADDU,DSUBU,
1216 DSLL,DSRL,DSRA,DSLLV,DSRAV,DMULT,DMULTU,DDIV,DDIVU,JALX32,JALX):
1217 Drop the "64" qualifier to get the HACK generator working.
1218 Use IMMEDIATE rather than IMMED. Use SHAMT rather than SHIFT.
1219 * mips.igen (do_daddiu,do_ddiv,do_divu): Remove the 64-only
1220 qualifier to get the hack generator working.
1221 (do_dsll,do_dsllv,do_dsra,do_dsrl,do_dsrlv): New.
1222 (DSLL): Use do_dsll.
1223 (DSLLV): Use do_dsllv.
1224 (DSRA): Use do_dsra.
1225 (DSRL): Use do_dsrl.
1226 (DSRLV): Use do_dsrlv.
1227 (BC1): Move *vr4100 to get the HACK generator working.
1228 (CxC1, DMxC1, MxC1,MACCU,MACCHI,MACCHIU): Rename to
1229 get the HACK generator working.
1230 (MACC) Rename to get the HACK generator working.
1231 (DMACC,MACCS,DMACCS): Add the 64.
1233 1998-12-12 Gavin Romig-Koch <gavin@cygnus.com>
1235 * mips.igen (BC1): Renamed to BC1a and BC1b to avoid conflicts.
1236 * sim-main.h (SizeFGR): Handle TARGET_ENABLE_FR.
1238 1998-12-11 Gavin Romig-Koch <gavin@cygnus.com>
1240 * mips/interp.c (DEBUG): Cleanups.
1242 1998-12-10 Frank Ch. Eigler <fche@cygnus.com>
1244 * dv-tx3904sio.c (tx3904sio_io_read_buffer): Endianness fixes.
1245 (tx3904sio_tickle): fflush after a stdout character output.
1247 1998-12-03 Frank Ch. Eigler <fche@cygnus.com>
1249 * interp.c (sim_close): Uninstall modules.
1251 Wed Nov 25 13:41:03 1998 Andrew Cagney <cagney@b1.cygnus.com>
1253 * sim-main.h, interp.c (sim_monitor): Change to global
1256 Wed Nov 25 17:33:24 1998 Andrew Cagney <cagney@b1.cygnus.com>
1258 * configure.in (vr4100): Only include vr4100 instructions in
1260 * configure: Re-generate.
1261 * m16.igen (*): Tag all mips16 instructions as also being vr4100.
1263 Mon Nov 23 18:20:36 1998 Andrew Cagney <cagney@b1.cygnus.com>
1265 * Makefile.in (SIM_CFLAGS): Do not define WITH_IGEN.
1266 * sim-main.h, sim-main.c, interp.c: Delete #if WITH_IGEN keeping
1269 * configure.in (sim_default_gen, sim_use_gen): Replace with
1271 (--enable-sim-igen): Delete config option. Always using IGEN.
1272 * configure: Re-generate.
1274 * Makefile.in (gencode): Kill, kill, kill.
1277 Mon Nov 23 18:07:36 1998 Andrew Cagney <cagney@b1.cygnus.com>
1279 * configure.in: Configure mips64vr4100-elf nee mips64vr41* as a 64
1280 bit mips16 igen simulator.
1281 * configure: Re-generate.
1283 * mips.igen (check_div_hilo, check_mult_hilo, check_mf_hilo): Mark
1284 as part of vr4100 ISA.
1285 * vr.igen: Mark all instructions as 64 bit only.
1287 Mon Nov 23 17:07:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
1289 * interp.c (get_cell, sim_monitor, fetch_str, CoProcPresent):
1292 Mon Nov 23 13:23:40 1998 Andrew Cagney <cagney@b1.cygnus.com>
1294 * configure.in: Configure mips-lsi-elf nee mips*lsi* as a
1295 mipsIII/mips16 igen simulator. Fix sim_gen VS sim_igen typos.
1296 * configure: Re-generate.
1298 * m16.igen (BREAK): Define breakpoint instruction.
1299 (JALX32): Mark instruction as mips16 and not r3900.
1300 * mips.igen (C.cond.fmt): Fix typo in instruction format.
1302 * sim-main.h (PENDING_FILL): Wrap C statements in do/while.
1304 Sat Nov 7 09:54:38 1998 Andrew Cagney <cagney@b1.cygnus.com>
1306 * gencode.c (build_instruction - BREAK): For MIPS16, handle BREAK
1307 insn as a debug breakpoint.
1309 * sim-main.h (PENDING_SLOT_BIT): Fix, was incorrectly defined as
1311 (PENDING_SCHED): Clean up trace statement.
1312 (PENDING_SCHED): Increment PENDING_IN and PENDING_TOTAL.
1313 (PENDING_FILL): Delay write by only one cycle.
1314 (PENDING_FILL): For FSRs, write fmt_uninterpreted to FPR_STATE.
1316 * sim-main.c (pending_tick): Clean up trace statements. Add trace
1318 (pending_tick): Fix sizes in switch statements, 4 & 8 instead of
1320 (pending_tick): Move incrementing of index to FOR statement.
1321 (pending_tick): Only update PENDING_OUT after a write has occured.
1323 * configure.in: Add explicit mips-lsi-* target. Use gencode to
1325 * configure: Re-generate.
1327 * interp.c (sim_engine_run OLD): Delete explicit call to
1328 PENDING_TICK. Now called via ENGINE_ISSUE_PREFIX_HOOK.
1330 Sat Oct 30 09:49:10 1998 Frank Ch. Eigler <fche@cygnus.com>
1332 * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Add dummy
1333 interrupt level number to match changed SignalExceptionInterrupt
1336 Fri Oct 9 18:02:25 1998 Doug Evans <devans@canuck.cygnus.com>
1338 * interp.c: #include "itable.h" if WITH_IGEN.
1339 (get_insn_name): New function.
1340 (sim_open): Initialize CPU_INSN_NAME,CPU_MAX_INSNS.
1341 * sim-main.h (MAX_INSNS,INSN_NAME): Delete.
1343 Mon Sep 14 12:36:44 1998 Frank Ch. Eigler <fche@cygnus.com>
1345 * configure: Rebuilt to inhale new common/aclocal.m4.
1347 Tue Sep 1 15:39:18 1998 Frank Ch. Eigler <fche@cygnus.com>
1349 * dv-tx3904sio.c: Include sim-assert.h.
1351 Tue Aug 25 12:49:46 1998 Frank Ch. Eigler <fche@cygnus.com>
1353 * dv-tx3904sio.c: New file: tx3904 serial I/O module.
1354 * configure.in: Add dv-tx3904sio, dv-sockser for tx39 target.
1355 Reorganize target-specific sim-hardware checks.
1356 * configure: rebuilt.
1357 * interp.c (sim_open): For tx39 target boards, set
1358 OPERATING_ENVIRONMENT, add tx3904sio devices.
1359 * tconfig.in: For tx39 target, set SIM_HANDLES_LMA for loading
1360 ROM executables. Install dv-sockser into sim-modules list.
1362 * dv-tx3904irc.c: Compiler warning clean-up.
1363 * dv-tx3904tmr.c: Compiler warning clean-up. Remove particularly
1364 frequent hw-trace messages.
1366 Fri Jul 31 18:14:16 1998 Andrew Cagney <cagney@b1.cygnus.com>
1368 * vr.igen (MulAcc): Identify as a vr4100 specific function.
1370 Sat Jul 25 16:03:14 1998 Andrew Cagney <cagney@b1.cygnus.com>
1372 * Makefile.in (IGEN_INCLUDE): Add vr.igen.
1374 * vr.igen: New file.
1375 (MAC/MADD16, DMAC/DMADD16): Implement using code from gencode.c.
1376 * mips.igen: Define vr4100 model. Include vr.igen.
1377 Mon Jun 29 09:21:07 1998 Gavin Koch <gavin@cygnus.com>
1379 * mips.igen (check_mf_hilo): Correct check.
1381 Wed Jun 17 12:20:49 1998 Andrew Cagney <cagney@b1.cygnus.com>
1383 * sim-main.h (interrupt_event): Add prototype.
1385 * dv-tx3904tmr.c (tx3904tmr_io_write_buffer): Delete unused
1386 register_ptr, register_value.
1387 (deliver_tx3904tmr_tick): Fix types passed to printf fmt.
1389 * sim-main.h (tracefh): Make extern.
1391 Tue Jun 16 14:39:00 1998 Frank Ch. Eigler <fche@cygnus.com>
1393 * dv-tx3904tmr.c: Deschedule timer event after dispatching.
1394 Reduce unnecessarily high timer event frequency.
1395 * dv-tx3904cpu.c: Ditto for interrupt event.
1397 Wed Jun 10 13:22:32 1998 Frank Ch. Eigler <fche@cygnus.com>
1399 * interp.c (decode_coproc): For TX39, add stub COP0 register #7,
1401 (interrupt_event): Made non-static.
1403 * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Correct accidental
1404 interchange of configuration values for external vs. internal
1407 Tue Jun 9 12:46:24 1998 Ian Carmichael <iancarm@cygnus.com>
1409 * mips.igen (BREAK): Moved code to here for
1410 simulator-reserved break instructions.
1411 * gencode.c (build_instruction): Ditto.
1412 * interp.c (signal_exception): Code moved from here. Non-
1413 reserved instructions now use exception vector, rather
1415 * sim-main.h: Moved magic constants to here.
1417 Tue Jun 9 12:29:50 1998 Frank Ch. Eigler <fche@cygnus.com>
1419 * dv-tx3904cpu.c (deliver_*_interrupt,*_port_event): Set the CAUSE
1420 register upon non-zero interrupt event level, clear upon zero
1422 * dv-tx3904irc.c (*_port_event): Handle deactivated interrupt signal
1423 by passing zero event value.
1424 (*_io_{read,write}_buffer): Endianness fixes.
1425 * dv-tx3904tmr.c (*_io_{read,write}_buffer): Endianness fixes.
1426 (deliver_*_tick): Reduce sim event interval to 75% of count interval.
1428 * interp.c (sim_open): Added jmr3904pal board type that adds PAL-based
1429 serial I/O and timer module at base address 0xFFFF0000.
1431 Tue Jun 9 11:52:29 1998 Gavin Koch <gavin@cygnus.com>
1433 * mips.igen (SWC1) : Correct the handling of ReverseEndian
1436 Tue Jun 9 11:40:57 1998 Gavin Koch <gavin@cygnus.com>
1438 * configure.in (mips_fpu_bitsize) : Set this correctly for 32-bit mips
1440 * configure: Update.
1442 Thu Jun 4 15:37:33 1998 Frank Ch. Eigler <fche@cygnus.com>
1444 * dv-tx3904tmr.c: New file - implements tx3904 timer.
1445 * dv-tx3904{irc,cpu}.c: Mild reformatting.
1446 * configure.in: Include tx3904tmr in hw_device list.
1447 * configure: Rebuilt.
1448 * interp.c (sim_open): Instantiate three timer instances.
1449 Fix address typo of tx3904irc instance.
1451 Tue Jun 2 15:48:02 1998 Ian Carmichael <iancarm@cygnus.com>
1453 * interp.c (signal_exception): SystemCall exception now uses
1454 the exception vector.
1456 Mon Jun 1 18:18:26 1998 Frank Ch. Eigler <fche@cygnus.com>
1458 * interp.c (decode_coproc): For TX39, add stub COP0 register #3,
1461 Fri May 29 11:40:39 1998 Andrew Cagney <cagney@b1.cygnus.com>
1463 * configure.in (sim_igen_filter): Match mips*tx39 not mipst*tx39.
1465 Mon May 25 20:47:45 1998 Andrew Cagney <cagney@b1.cygnus.com>
1467 * dv-tx3904cpu.c, dv-tx3904irc.c: Rename *_callback to *_method.
1469 * dv-tx3904cpu.c, dv-tx3904irc.c: Include hw-main.h and
1470 sim-main.h. Declare a struct hw_descriptor instead of struct
1471 hw_device_descriptor.
1473 Mon May 25 12:41:38 1998 Andrew Cagney <cagney@b1.cygnus.com>
1475 * mips.igen (do_store_left, do_load_left): Compute nr of left and
1476 right bits and then re-align left hand bytes to correct byte
1477 lanes. Fix incorrect computation in do_store_left when loading
1478 bytes from second word.
1480 Fri May 22 13:34:20 1998 Andrew Cagney <cagney@b1.cygnus.com>
1482 * configure.in (SIM_AC_OPTION_HARDWARE): Only enable when tx3904.
1483 * interp.c (sim_open): Only create a device tree when HW is
1486 * dv-tx3904irc.c (tx3904irc_finish): Pacify GCC.
1487 * interp.c (signal_exception): Ditto.
1489 Thu May 21 14:24:11 1998 Gavin Koch <gavin@cygnus.com>
1491 * gencode.c: Mark BEGEZALL as LIKELY.
1493 Thu May 21 18:57:19 1998 Andrew Cagney <cagney@b1.cygnus.com>
1495 * sim-main.h (ALU32_END): Sign extend 32 bit results.
1496 * mips.igen (ADD, SUB, ADDI, DADD, DSUB): Trace.
1498 Mon May 18 18:22:42 1998 Frank Ch. Eigler <fche@cygnus.com>
1500 * configure.in (SIM_AC_OPTION_HARDWARE): Added common hardware
1501 modules. Recognize TX39 target with "mips*tx39" pattern.
1502 * configure: Rebuilt.
1503 * sim-main.h (*): Added many macros defining bits in
1504 TX39 control registers.
1505 (SignalInterrupt): Send actual PC instead of NULL.
1506 (SignalNMIReset): New exception type.
1507 * interp.c (board): New variable for future use to identify
1508 a particular board being simulated.
1509 (mips_option_handler,mips_options): Added "--board" option.
1510 (interrupt_event): Send actual PC.
1511 (sim_open): Make memory layout conditional on board setting.
1512 (signal_exception): Initial implementation of hardware interrupt
1513 handling. Accept another break instruction variant for simulator
1515 (decode_coproc): Implement RFE instruction for TX39.
1516 (mips.igen): Decode RFE instruction as such.
1517 * configure.in (tx3904cpu,tx3904irc): Added devices for tx3904.
1518 * interp.c: Define "jmr3904" and "jmr3904debug" board types and
1519 bbegin to implement memory map.
1520 * dv-tx3904cpu.c: New file.
1521 * dv-tx3904irc.c: New file.
1523 Wed May 13 14:40:11 1998 Gavin Koch <gavin@cygnus.com>
1525 * mips.igen (check_mt_hilo): Create a separate r3900 version.
1527 Wed May 13 14:11:46 1998 Gavin Koch <gavin@cygnus.com>
1529 * tx.igen (madd,maddu): Replace calls to check_op_hilo
1530 with calls to check_div_hilo.
1532 Wed May 13 09:59:27 1998 Gavin Koch <gavin@cygnus.com>
1534 * mips/mips.igen (check_op_hilo,check_mult_hilo,check_div_hilo):
1535 Replace check_op_hilo with check_mult_hilo and check_div_hilo.
1536 Add special r3900 version of do_mult_hilo.
1537 (do_dmultx,do_mult,do_multu): Replace calls to check_op_hilo
1538 with calls to check_mult_hilo.
1539 (do_ddiv,do_ddivu,do_div,do_divu): Replace calls to check_op_hilo
1540 with calls to check_div_hilo.
1542 Tue May 12 15:22:11 1998 Andrew Cagney <cagney@b1.cygnus.com>
1544 * configure.in (SUBTARGET_R3900): Define for mipstx39 target.
1545 Document a replacement.
1547 Fri May 8 17:48:19 1998 Ian Carmichael <iancarm@cygnus.com>
1549 * interp.c (sim_monitor): Make mon_printf work.
1551 Wed May 6 19:42:19 1998 Doug Evans <devans@canuck.cygnus.com>
1553 * sim-main.h (INSN_NAME): New arg `cpu'.
1555 Tue Apr 28 18:33:31 1998 Geoffrey Noer <noer@cygnus.com>
1557 * configure: Regenerated to track ../common/aclocal.m4 changes.
1559 Sun Apr 26 15:31:55 1998 Tom Tromey <tromey@creche>
1561 * configure: Regenerated to track ../common/aclocal.m4 changes.
1564 Sun Apr 26 15:20:01 1998 Tom Tromey <tromey@cygnus.com>
1566 * acconfig.h: New file.
1567 * configure.in: Reverted change of Apr 24; use sinclude again.
1569 Fri Apr 24 14:16:40 1998 Tom Tromey <tromey@creche>
1571 * configure: Regenerated to track ../common/aclocal.m4 changes.
1574 Fri Apr 24 11:19:20 1998 Tom Tromey <tromey@cygnus.com>
1576 * configure.in: Don't call sinclude.
1578 Fri Apr 24 11:35:01 1998 Andrew Cagney <cagney@chook.cygnus.com>
1580 * mips.igen (do_store_left): Pass 0 not NULL to store_memory.
1582 Tue Apr 21 11:59:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
1584 * mips.igen (ERET): Implement.
1586 * interp.c (decode_coproc): Return sign-extended EPC.
1588 * mips.igen (ANDI, LUI, MFC0): Add tracing code.
1590 * interp.c (signal_exception): Do not ignore Trap.
1591 (signal_exception): On TRAP, restart at exception address.
1592 (HALT_INSTRUCTION, HALT_INSTRUCTION_MASK): Define.
1593 (signal_exception): Update.
1594 (sim_open): Patch V_COMMON interrupt vector with an abort sequence
1595 so that TRAP instructions are caught.
1597 Mon Apr 20 11:26:55 1998 Andrew Cagney <cagney@b1.cygnus.com>
1599 * sim-main.h (struct hilo_access, struct hilo_history): Define,
1600 contains HI/LO access history.
1601 (struct _sim_cpu): Make hiaccess and loaccess of type hilo_access.
1602 (HIACCESS, LOACCESS): Delete, replace with
1603 (HIHISTORY, LOHISTORY): New macros.
1604 (CHECKHILO): Delete all, moved to mips.igen
1606 * gencode.c (build_instruction): Do not generate checks for
1607 correct HI/LO register usage.
1609 * interp.c (old_engine_run): Delete checks for correct HI/LO
1612 * mips.igen (check_mt_hilo, check_mf_hilo, check_op_hilo,
1613 check_mf_cycles): New functions.
1614 (do_mfhi, do_mflo, "mthi", "mtlo", do_ddiv, do_ddivu, do_div,
1615 do_divu, domultx, do_mult, do_multu): Use.
1617 * tx.igen ("madd", "maddu"): Use.
1619 Wed Apr 15 18:31:54 1998 Andrew Cagney <cagney@b1.cygnus.com>
1621 * mips.igen (DSRAV): Use function do_dsrav.
1622 (SRAV): Use new function do_srav.
1624 * m16.igen (BEQZ, BNEZ): Compare GPR[TRX] not GPR[RX].
1625 (B): Sign extend 11 bit immediate.
1626 (EXT-B*): Shift 16 bit immediate left by 1.
1627 (ADDIU*): Don't sign extend immediate value.
1629 Wed Apr 15 10:32:15 1998 Andrew Cagney <cagney@b1.cygnus.com>
1631 * m16run.c (sim_engine_run): Restore CIA after handling an event.
1633 * sim-main.h (DELAY_SLOT, NULLIFY_NEXT_INSTRUCTION): For IGEN, use
1636 * mips.igen (delayslot32, nullify_next_insn): New functions.
1637 (m16.igen): Always include.
1638 (do_*): Add more tracing.
1640 * m16.igen (delayslot16): Add NIA argument, could be called by a
1641 32 bit MIPS16 instruction.
1643 * interp.c (ifetch16): Move function from here.
1644 * sim-main.c (ifetch16): To here.
1646 * sim-main.c (ifetch16, ifetch32): Update to match current
1647 implementations of LH, LW.
1648 (signal_exception): Don't print out incorrect hex value of illegal
1651 Wed Apr 15 00:17:25 1998 Andrew Cagney <cagney@b1.cygnus.com>
1653 * m16run.c (sim_engine_run): Use IMEM16 and IMEM32 to fetch an
1656 * m16.igen: Implement MIPS16 instructions.
1658 * mips.igen (do_addiu, do_addu, do_and, do_daddiu, do_daddu,
1659 do_ddiv, do_ddivu, do_div, do_divu, do_dmultx, do_dmultu, do_srav,
1660 do_dsubu, do_mfhi, do_mflo, do_mult, do_multu, do_nor, do_or,
1661 do_sll, do_sllv, do_slt, do_slti, do_sltiu, do_sltu, do_sra,
1662 do_srl, do_srlv, do_subu, do_xor, do_xori): New functions. Move
1663 bodies of corresponding code from 32 bit insn to these. Also used
1664 by MIPS16 versions of functions.
1666 * sim-main.h (RAIDX, T8IDX, T8, SPIDX): Define.
1667 (IMEM16): Drop NR argument from macro.
1669 Sat Apr 4 22:39:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
1671 * Makefile.in (SIM_OBJS): Add sim-main.o.
1673 * sim-main.h (address_translation, load_memory, store_memory,
1674 cache_op, sync_operation, prefetch, ifetch32, pending_tick): Mark
1676 (pr_addr, pr_uword64): Declare.
1677 (sim-main.c): Include when H_REVEALS_MODULE_P.
1679 * interp.c (address_translation, load_memory, store_memory,
1680 cache_op, sync_operation, prefetch, ifetch32, pending_tick): Move
1682 * sim-main.c: To here. Fix compilation problems.
1684 * configure.in: Enable inlining.
1685 * configure: Re-config.
1687 Sat Apr 4 20:36:25 1998 Andrew Cagney <cagney@b1.cygnus.com>
1689 * configure: Regenerated to track ../common/aclocal.m4 changes.
1691 Fri Apr 3 04:32:35 1998 Andrew Cagney <cagney@b1.cygnus.com>
1693 * mips.igen: Include tx.igen.
1694 * Makefile.in (IGEN_INCLUDE): Add tx.igen.
1695 * tx.igen: New file, contains MADD and MADDU.
1697 * interp.c (load_memory): When shifting bytes, use LOADDRMASK not
1698 the hardwired constant `7'.
1699 (store_memory): Ditto.
1700 (LOADDRMASK): Move definition to sim-main.h.
1702 mips.igen (MTC0): Enable for r3900.
1705 mips.igen (do_load_byte): Delete.
1706 (do_load, do_store, do_load_left, do_load_write, do_store_left,
1707 do_store_right): New functions.
1708 (SW*, LW*, SD*, LD*, SH, LH, SB, LB): Use.
1710 configure.in: Let the tx39 use igen again.
1713 Thu Apr 2 10:59:39 1998 Andrew Cagney <cagney@b1.cygnus.com>
1715 * interp.c (sim_monitor): get_mem_info returns a 4 byte quantity,
1716 not an address sized quantity. Return zero for cache sizes.
1718 Wed Apr 1 23:47:53 1998 Andrew Cagney <cagney@b1.cygnus.com>
1720 * mips.igen (r3900): r3900 does not support 64 bit integer
1723 Mon Mar 30 14:46:05 1998 Gavin Koch <gavin@cygnus.com>
1725 * configure.in (mipstx39*-*-*): Use gencode simulator rather
1727 * configure : Rebuild.
1729 Fri Mar 27 16:15:52 1998 Andrew Cagney <cagney@b1.cygnus.com>
1731 * configure: Regenerated to track ../common/aclocal.m4 changes.
1733 Fri Mar 27 15:01:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
1735 * interp.c (mips_option_handler): Iterate over MAX_NR_PROCESSORS.
1737 Wed Mar 25 16:44:27 1998 Ian Carmichael <iancarm@cygnus.com>
1739 * configure: Regenerated to track ../common/aclocal.m4 changes.
1740 * config.in: Regenerated to track ../common/aclocal.m4 changes.
1742 Wed Mar 25 12:35:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
1744 * configure: Regenerated to track ../common/aclocal.m4 changes.
1746 Wed Mar 25 10:05:46 1998 Andrew Cagney <cagney@b1.cygnus.com>
1748 * interp.c (Max, Min): Comment out functions. Not yet used.
1750 Wed Mar 18 12:38:12 1998 Andrew Cagney <cagney@b1.cygnus.com>
1752 * configure: Regenerated to track ../common/aclocal.m4 changes.
1754 Tue Mar 17 19:05:20 1998 Frank Ch. Eigler <fche@cygnus.com>
1756 * Makefile.in (MIPS_EXTRA_LIBS, SIM_EXTRA_LIBS): Added
1757 configurable settings for stand-alone simulator.
1759 * configure.in: Added X11 search, just in case.
1761 * configure: Regenerated.
1763 Wed Mar 11 14:09:10 1998 Andrew Cagney <cagney@b1.cygnus.com>
1765 * interp.c (sim_write, sim_read, load_memory, store_memory):
1766 Replace sim_core_*_map with read_map, write_map, exec_map resp.
1768 Tue Mar 3 13:58:43 1998 Andrew Cagney <cagney@b1.cygnus.com>
1770 * sim-main.h (GETFCC): Return an unsigned value.
1772 Tue Mar 3 13:21:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
1774 * mips.igen (DIV): Fix check for -1 / MIN_INT.
1775 (DADD): Result destination is RD not RT.
1777 Fri Feb 27 13:49:49 1998 Andrew Cagney <cagney@b1.cygnus.com>
1779 * sim-main.h (HIACCESS, LOACCESS): Always define.
1781 * mdmx.igen (Maxi, Mini): Rename Max, Min.
1783 * interp.c (sim_info): Delete.
1785 Fri Feb 27 18:41:01 1998 Doug Evans <devans@canuck.cygnus.com>
1787 * interp.c (DECLARE_OPTION_HANDLER): Use it.
1788 (mips_option_handler): New argument `cpu'.
1789 (sim_open): Update call to sim_add_option_table.
1791 Wed Feb 25 18:56:22 1998 Andrew Cagney <cagney@b1.cygnus.com>
1793 * mips.igen (CxC1): Add tracing.
1795 Fri Feb 20 17:43:21 1998 Andrew Cagney <cagney@b1.cygnus.com>
1797 * sim-main.h (Max, Min): Declare.
1799 * interp.c (Max, Min): New functions.
1801 * mips.igen (BC1): Add tracing.
1803 Thu Feb 19 14:50:00 1998 John Metzler <jmetzler@cygnus.com>
1805 * interp.c Added memory map for stack in vr4100
1807 Thu Feb 19 10:21:21 1998 Gavin Koch <gavin@cygnus.com>
1809 * interp.c (load_memory): Add missing "break"'s.
1811 Tue Feb 17 12:45:35 1998 Andrew Cagney <cagney@b1.cygnus.com>
1813 * interp.c (sim_store_register, sim_fetch_register): Pass in
1814 length parameter. Return -1.
1816 Tue Feb 10 11:57:40 1998 Ian Carmichael <iancarm@cygnus.com>
1818 * interp.c: Added hardware init hook, fixed warnings.
1820 Sat Feb 7 17:16:20 1998 Andrew Cagney <cagney@b1.cygnus.com>
1822 * Makefile.in (itable.h itable.c): Depend on SIM_@sim_gen@_ALL.
1824 Tue Feb 3 11:36:02 1998 Andrew Cagney <cagney@b1.cygnus.com>
1826 * interp.c (ifetch16): New function.
1828 * sim-main.h (IMEM32): Rename IMEM.
1829 (IMEM16_IMMED): Define.
1831 (DELAY_SLOT): Update.
1833 * m16run.c (sim_engine_run): New file.
1835 * m16.igen: All instructions except LB.
1836 (LB): Call do_load_byte.
1837 * mips.igen (do_load_byte): New function.
1838 (LB): Call do_load_byte.
1840 * mips.igen: Move spec for insn bit size and high bit from here.
1841 * Makefile.in (tmp-igen, tmp-m16): To here.
1843 * m16.dc: New file, decode mips16 instructions.
1845 * Makefile.in (SIM_NO_ALL): Define.
1846 (tmp-m16): Generate both 16 bit and 32 bit simulator engines.
1848 Tue Feb 3 11:28:00 1998 Andrew Cagney <cagney@b1.cygnus.com>
1850 * configure.in (mips_fpu_bitsize): For tx39, restrict floating
1851 point unit to 32 bit registers.
1852 * configure: Re-generate.
1854 Sun Feb 1 15:47:14 1998 Andrew Cagney <cagney@b1.cygnus.com>
1856 * configure.in (sim_use_gen): Make IGEN the default simulator
1857 generator for generic 32 and 64 bit mips targets.
1858 * configure: Re-generate.
1860 Sun Feb 1 16:52:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
1862 * sim-main.h (SizeFGR): Determine from floating-point and not gpr
1865 * interp.c (sim_fetch_register, sim_store_register): Read/write
1866 FGR from correct location.
1867 (sim_open): Set size of FGR's according to
1868 WITH_TARGET_FLOATING_POINT_BITSIZE.
1870 * sim-main.h (FGR): Store floating point registers in a separate
1873 Sun Feb 1 16:47:51 1998 Andrew Cagney <cagney@b1.cygnus.com>
1875 * configure: Regenerated to track ../common/aclocal.m4 changes.
1877 Tue Feb 3 00:10:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
1879 * interp.c (ColdReset): Call PENDING_INVALIDATE.
1881 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Call PENDING_TICK.
1883 * interp.c (pending_tick): New function. Deliver pending writes.
1885 * sim-main.h (PENDING_FILL, PENDING_TICK, PENDING_SCHED,
1886 PENDING_BIT, PENDING_INVALIDATE): Re-write pipeline code so that
1887 it can handle mixed sized quantites and single bits.
1889 Mon Feb 2 17:43:15 1998 Andrew Cagney <cagney@b1.cygnus.com>
1891 * interp.c (oengine.h): Do not include when building with IGEN.
1892 (sim_open): Replace GPRLEN by WITH_TARGET_WORD_BITSIZE.
1893 (sim_info): Ditto for PROCESSOR_64BIT.
1894 (sim_monitor): Replace ut_reg with unsigned_word.
1895 (*): Ditto for t_reg.
1896 (LOADDRMASK): Define.
1897 (sim_open): Remove defunct check that host FP is IEEE compliant,
1898 using software to emulate floating point.
1899 (value_fpr, ...): Always compile, was conditional on HASFPU.
1901 Sun Feb 1 11:15:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
1903 * sim-main.h (sim_state): Make the cpu array MAX_NR_PROCESSORS in
1906 * interp.c (SD, CPU): Define.
1907 (mips_option_handler): Set flags in each CPU.
1908 (interrupt_event): Assume CPU 0 is the one being iterrupted.
1909 (sim_close): Do not clear STATE, deleted anyway.
1910 (sim_write, sim_read): Assume CPU zero's vm should be used for
1912 (sim_create_inferior): Set the PC for all processors.
1913 (sim_monitor, store_word, load_word, mips16_entry): Add cpu
1915 (mips16_entry): Pass correct nr of args to store_word, load_word.
1916 (ColdReset): Cold reset all cpu's.
1917 (signal_exception): Pass cpu to sim_monitor & mips16_entry.
1918 (sim_monitor, load_memory, store_memory, signal_exception): Use
1919 `CPU' instead of STATE_CPU.
1922 * sim-main.h: Replace uses of STATE_CPU with CPU. Replace sd with
1925 * sim-main.h (signal_exception): Add sim_cpu arg.
1926 (SignalException*): Pass both SD and CPU to signal_exception.
1927 * interp.c (signal_exception): Update.
1929 * sim-main.h (value_fpr, store_fpr, dotrace, ifetch32), interp.c:
1931 (sync_operation, prefetch, cache_op, store_memory, load_memory,
1932 address_translation): Ditto
1933 (decode_coproc, cop_lw, cop_ld, cop_sw, cop_sd): Ditto.
1935 Sat Jan 31 18:15:41 1998 Andrew Cagney <cagney@b1.cygnus.com>
1937 * configure: Regenerated to track ../common/aclocal.m4 changes.
1939 Sat Jan 31 14:49:24 1998 Andrew Cagney <cagney@b1.cygnus.com>
1941 * interp.c (sim_engine_run): Add `nr_cpus' argument.
1943 * mips.igen (model): Map processor names onto BFD name.
1945 * sim-main.h (CPU_CIA): Delete.
1946 (SET_CIA, GET_CIA): Define
1948 Wed Jan 21 16:16:27 1998 Andrew Cagney <cagney@b1.cygnus.com>
1950 * sim-main.h (GPR_SET): Define, used by igen when zeroing a
1953 * configure.in (default_endian): Configure a big-endian simulator
1955 * configure: Re-generate.
1957 Mon Jan 19 22:26:29 1998 Doug Evans <devans@seba>
1959 * configure: Regenerated to track ../common/aclocal.m4 changes.
1961 Mon Jan 5 20:38:54 1998 Mark Alexander <marka@cygnus.com>
1963 * interp.c (sim_monitor): Handle Densan monitor outbyte
1964 and inbyte functions.
1966 1997-12-29 Felix Lee <flee@cygnus.com>
1968 * interp.c (sim_engine_run): msvc cpp barfs on #if (a==b!=c).
1970 Wed Dec 17 14:48:20 1997 Jeffrey A Law (law@cygnus.com)
1972 * Makefile.in (tmp-igen): Arrange for $zero to always be
1973 reset to zero after every instruction.
1975 Mon Dec 15 23:17:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
1977 * configure: Regenerated to track ../common/aclocal.m4 changes.
1980 Wed Dec 10 17:10:45 1997 Jeffrey A Law (law@cygnus.com)
1982 * mips.igen (MSUB): Fix to work like MADD.
1983 * gencode.c (MSUB): Similarly.
1985 Thu Dec 4 09:21:05 1997 Doug Evans <devans@canuck.cygnus.com>
1987 * configure: Regenerated to track ../common/aclocal.m4 changes.
1989 Wed Nov 26 11:00:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
1991 * mips.igen (LWC1): Correct assembler - lwc1 not swc1.
1993 Sun Nov 23 01:45:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
1995 * sim-main.h (sim-fpu.h): Include.
1997 * interp.c (convert, SquareRoot, Recip, Divide, Multiply, Sub,
1998 Add, Negate, AbsoluteValue, Equal, Less, Infinity, NaN): Rewrite
1999 using host independant sim_fpu module.
2001 Thu Nov 20 19:56:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
2003 * interp.c (signal_exception): Report internal errors with SIGABRT
2006 * sim-main.h (C0_CONFIG): New register.
2007 (signal.h): No longer include.
2009 * interp.c (decode_coproc): Allow access C0_CONFIG to register.
2011 Tue Nov 18 15:33:48 1997 Doug Evans <devans@canuck.cygnus.com>
2013 * Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS).
2015 Fri Nov 14 11:56:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2017 * mips.igen: Tag vr5000 instructions.
2018 (ANDI): Was missing mipsIV model, fix assembler syntax.
2019 (do_c_cond_fmt): New function.
2020 (C.cond.fmt): Handle mips I-III which do not support CC field
2022 (bc1): Handle mips IV which do not have a delaed FCC separatly.
2023 (SDR): Mask paddr when BigEndianMem, not the converse as specified
2025 (DMULT, DMULTU): Force use of hosts 64bit multiplication. Handle
2026 vr5000 which saves LO in a GPR separatly.
2028 * configure.in (enable-sim-igen): For vr5000, select vr5000
2029 specific instructions.
2030 * configure: Re-generate.
2032 Wed Nov 12 14:42:52 1997 Andrew Cagney <cagney@b1.cygnus.com>
2034 * Makefile.in (SIM_OBJS): Add sim-fpu module.
2036 * interp.c (store_fpr), sim-main.h: Add separate fmt_uninterpreted_32 and
2037 fmt_uninterpreted_64 bit cases to switch. Convert to
2040 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Define,
2042 * mips.igen (SWR): Mask paddr when BigEndianMem, not the converse
2043 as specified in IV3.2 spec.
2044 (MTC1, DMTC1): Call StoreFPR to store the GPR in the FPR.
2046 Tue Nov 11 12:38:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
2048 * mips.igen: Delay slot branches add OFFSET to NIA not CIA.
2049 (MFC0, MTC0, SWC1, LWC1, SDC1, LDC1): Implement.
2050 (MTC1, MFC1, DMTC1, DMFC1, CFC1, CTC1): Implement separate non
2051 PENDING_FILL versions of instructions. Simplify.
2053 (MULT, MULTU): Implement separate RD==0 and RD!=0 versions of
2055 (BEQZ, ..., SLT, SLTI, TLT, TLE, TLI, ...): Explicitly cast GPR to
2057 (MTHI, MFHI): Disable code checking HI-LO.
2059 * sim-main.h (dotrace,tracefh), interp.c: Make dotrace & tracefh
2061 (NULLIFY_NEXT_INSTRUCTION): Call dotrace.
2063 Thu Nov 6 16:36:35 1997 Andrew Cagney <cagney@b1.cygnus.com>
2065 * gencode.c (build_mips16_operands): Replace IPC with cia.
2067 * interp.c (sim_monitor, signal_exception, cache_op, store_fpr,
2068 value_fpr, cop_ld, cop_lw, cop_sw, cop_sd, decode_coproc): Replace
2070 (UndefinedResult): Replace function with macro/function
2072 (sim_engine_run): Don't save PC in IPC.
2074 * sim-main.h (IPC): Delete.
2077 * interp.c (signal_exception, store_word, load_word,
2078 address_translation, load_memory, store_memory, cache_op,
2079 prefetch, sync_operation, ifetch, value_fpr, store_fpr, convert,
2080 cop_lw, cop_ld, cop_sw, cop_sd, decode_coproc, sim_monitor): Add
2081 current instruction address - cia - argument.
2082 (sim_read, sim_write): Call address_translation directly.
2083 (sim_engine_run): Rename variable vaddr to cia.
2084 (signal_exception): Pass cia to sim_monitor
2086 * sim-main.h (SignalException, LoadWord, StoreWord, CacheOp,
2087 Prefetch, SyncOperation, ValueFPR, StoreFPR, Convert, COP_LW,
2088 COP_LD, COP_SW, COP_SD, DecodeCoproc): Update.
2090 * sim-main.h (SignalExceptionSimulatorFault): Delete definition.
2091 * interp.c (sim_open): Replace SignalExceptionSimulatorFault with
2094 * interp.c (signal_exception): Pass restart address to
2097 * Makefile.in (semantics.o, engine.o, support.o, itable.o,
2098 idecode.o): Add dependency.
2100 * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESUME_HOOK):
2102 (DELAY_SLOT): Update NIA not PC with branch address.
2103 (NULLIFY_NEXT_INSTRUCTION): Set NIA to instruction after next.
2105 * mips.igen: Use CIA not PC in branch calculations.
2106 (illegal): Call SignalException.
2107 (BEQ, ADDIU): Fix assembler.
2109 Wed Nov 5 12:19:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
2111 * m16.igen (JALX): Was missing.
2113 * configure.in (enable-sim-igen): New configuration option.
2114 * configure: Re-generate.
2116 * sim-main.h (MAX_INSNS, INSN_NAME): Define.
2118 * interp.c (load_memory, store_memory): Delete parameter RAW.
2119 (sim_read, sim_write): Use sim_core_{read,write}_buffer directly
2120 bypassing {load,store}_memory.
2122 * sim-main.h (ByteSwapMem): Delete definition.
2124 * Makefile.in (SIM_OBJS): Add sim-memopt module.
2126 * interp.c (sim_do_command, sim_commands): Delete mips specific
2127 commands. Handled by module sim-options.
2129 * sim-main.h (SIM_HAVE_FLATMEM): Undefine, use sim-core.o module.
2130 (WITH_MODULO_MEMORY): Define.
2132 * interp.c (sim_info): Delete code printing memory size.
2134 * interp.c (mips_size): Nee sim_size, delete function.
2136 (monitor, monitor_base, monitor_size): Delete global variables.
2137 (sim_open, sim_close): Delete code creating monitor and other
2138 memory regions. Use sim-memopts module, via sim_do_commandf, to
2139 manage memory regions.
2140 (load_memory, store_memory): Use sim-core for memory model.
2142 * interp.c (address_translation): Delete all memory map code
2143 except line forcing 32 bit addresses.
2145 Wed Nov 5 11:21:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
2147 * sim-main.h (WITH_TRACE): Delete definition. Enables common
2150 * interp.c (logfh, logfile): Delete globals.
2151 (sim_open, sim_close): Delete code opening & closing log file.
2152 (mips_option_handler): Delete -l and -n options.
2153 (OPTION mips_options): Ditto.
2155 * interp.c (OPTION mips_options): Rename option trace to dinero.
2156 (mips_option_handler): Update.
2158 Wed Nov 5 09:35:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
2160 * interp.c (fetch_str): New function.
2161 (sim_monitor): Rewrite using sim_read & sim_write.
2162 (sim_open): Check magic number.
2163 (sim_open): Write monitor vectors into memory using sim_write.
2164 (MONITOR_BASE, MONITOR_SIZE, MEM_SIZE): Define.
2165 (sim_read, sim_write): Simplify - transfer data one byte at a
2167 (load_memory, store_memory): Clarify meaning of parameter RAW.
2169 * sim-main.h (isHOST): Defete definition.
2170 (isTARGET): Mark as depreciated.
2171 (address_translation): Delete parameter HOST.
2173 * interp.c (address_translation): Delete parameter HOST.
2175 Wed Oct 29 11:13:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
2179 * Makefile.in (IGEN_INCLUDE): Files included by mips.igen.
2180 (tmp-igen, tmp-m16): Depend on IGEN_INCLUDE.
2182 Tue Oct 28 11:06:47 1997 Andrew Cagney <cagney@b1.cygnus.com>
2184 * mips.igen: Add model filter field to records.
2186 Mon Oct 27 17:53:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
2188 * Makefile.in (SIM_NO_CFLAGS): Define. Define WITH_IGEN=0.
2190 interp.c (sim_engine_run): Do not compile function sim_engine_run
2191 when WITH_IGEN == 1.
2193 * configure.in (sim_igen_flags, sim_m16_flags): Set according to
2194 target architecture.
2196 Makefile.in (tmp-igen, tmp-m16): Drop -F and -M options to
2197 igen. Replace with configuration variables sim_igen_flags /
2200 * m16.igen: New file. Copy mips16 insns here.
2201 * mips.igen: From here.
2203 Mon Oct 27 13:53:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
2205 * Makefile.in (SIM_NO_OBJ): Define, move SIM_M16_OBJ, SIM_IGEN_OBJ
2207 (tmp-igen, tmp-m16): Pass -I srcdir to igen.
2209 Sat Oct 25 16:51:40 1997 Gavin Koch <gavin@cygnus.com>
2211 * gencode.c (build_instruction): Follow sim_write's lead in using
2212 BigEndianMem instead of !ByteSwapMem.
2214 Fri Oct 24 17:41:49 1997 Andrew Cagney <cagney@b1.cygnus.com>
2216 * configure.in (sim_gen): Dependent on target, select type of
2217 generator. Always select old style generator.
2219 configure: Re-generate.
2221 Makefile.in (tmp-igen, tmp-m16, clean-m16, clean-igen): New
2223 (SIM_M16_CFLAGS, SIM_M16_ALL, SIM_M16_OBJ, BUILT_SRC_FROM_M16,
2224 SIM_IGEN_CFLAGS, SIM_IGEN_ALL, SIM_IGEN_OBJ, BUILT_SRC_FROM_IGEN,
2225 IGEN_TRACE, IGEN_INSN, IGEN_DC): Define
2226 (SIM_EXTRA_CFLAGS, SIM_EXTRA_ALL, SIM_OBJS): Add member
2227 SIM_@sim_gen@_*, set by autoconf.
2229 Wed Oct 22 12:52:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
2231 * sim-main.h (NULLIFY_NEXT_INSTRUCTION, DELAY_SLOT): Define.
2233 * interp.c (ColdReset): Remove #ifdef HASFPU, check
2234 CURRENT_FLOATING_POINT instead.
2236 * interp.c (ifetch32): New function. Fetch 32 bit instruction.
2237 (address_translation): Raise exception InstructionFetch when
2238 translation fails and isINSTRUCTION.
2240 * interp.c (sim_open, sim_write, sim_monitor, store_word,
2241 sim_engine_run): Change type of of vaddr and paddr to
2243 (address_translation, prefetch, load_memory, store_memory,
2244 cache_op): Change type of vAddr and pAddr to address_word.
2246 * gencode.c (build_instruction): Change type of vaddr and paddr to
2249 Mon Oct 20 15:29:04 1997 Andrew Cagney <cagney@b1.cygnus.com>
2251 * sim-main.h (ALU64_END, ALU32_END): Use ALU*_OVERFLOW_RESULT
2252 macro to obtain result of ALU op.
2254 Tue Oct 21 17:39:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
2256 * interp.c (sim_info): Call profile_print.
2258 Mon Oct 20 13:31:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2260 * Makefile.in (SIM_OBJS): Add sim-profile.o module.
2262 * sim-main.h (WITH_PROFILE): Do not define, defined in
2263 common/sim-config.h. Use sim-profile module.
2264 (simPROFILE): Delete defintion.
2266 * interp.c (PROFILE): Delete definition.
2267 (mips_option_handler): Delete 'p', 'y' and 'x' profile options.
2268 (sim_close): Delete code writing profile histogram.
2269 (mips_set_profile, mips_set_profile_size, writeout16, writeout32):
2271 (sim_engine_run): Delete code profiling the PC.
2273 Mon Oct 20 13:31:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2275 * sim-main.h (SIGNEXTEND): Force type of result to unsigned_word.
2277 * interp.c (sim_monitor): Make register pointers of type
2280 * sim-main.h: Make registers of type unsigned_word not
2283 Thu Oct 16 10:31:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
2285 * interp.c (sync_operation): Rename from SyncOperation, make
2286 global, add SD argument.
2287 (prefetch): Rename from Prefetch, make global, add SD argument.
2288 (decode_coproc): Make global.
2290 * sim-main.h (SyncOperation, DecodeCoproc, Pefetch): Define.
2292 * gencode.c (build_instruction): Generate DecodeCoproc not
2293 decode_coproc calls.
2295 * interp.c (SETFCC, GETFCC, PREVCOC1): Move to sim-main.h
2296 (SizeFGR): Move to sim-main.h
2297 (simHALTEX, simHALTIN, simTRACE, simPROFILE, simDELAYSLOT,
2298 simSIGINT, simJALDELAYSLOT): Move to sim-main.h
2299 (FP_FLAGS, FP_ENABLE, FP_CAUSE, IR, UF, OF, DZ, IO, UO): Move to
2301 (FP_FS, FP_MASK_RM, FP_SH_RM, FP_RM_NEAREST, FP_RM_TOPINF,
2302 FP_RM_TOMINF, GETRM): Move to sim-main.h.
2303 (Uncached, CachedNoncoherent, CachedCoherent, Cached,
2304 isINSTRUCTION, ..., AccessLength_BYTE, ...): Move to sim-main.h.
2305 (UserMode, BigEndianMem, ByteSwapMem, ReverseEndian,
2306 BigEndianCPU, status_KSU_mask, ...). Moved to sim-main.h
2308 * sim-main.h (ALU32_END, ALU64_END): Define. When overflow raise
2310 (sim-alu.h): Include.
2311 (NULLIFY_NIA, NULL_CIA, CPU_CIA): Define.
2312 (sim_cia): Typedef to instruction_address.
2314 Thu Oct 16 10:31:41 1997 Andrew Cagney <cagney@b1.cygnus.com>
2316 * Makefile.in (interp.o): Rename generated file engine.c to
2321 Thu Oct 16 10:31:40 1997 Andrew Cagney <cagney@b1.cygnus.com>
2323 * gencode.c (build_instruction): Use FPR_STATE not fpr_state.
2325 Thu Oct 16 10:31:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
2327 * gencode.c (build_instruction): For "FPSQRT", output correct
2328 number of arguments to Recip.
2330 Tue Oct 14 17:38:18 1997 Andrew Cagney <cagney@b1.cygnus.com>
2332 * Makefile.in (interp.o): Depends on sim-main.h
2334 * interp.c (mips16_entry, ColdReset,dotrace): Add SD argument. Use GPR not registers.
2336 * sim-main.h (sim_cpu): Add registers, register_widths, fpr_state,
2337 ipc, dspc, pending_*, hiaccess, loaccess, state, dsstate fields.
2338 (REGISTERS, REGISTER_WIDTHS, FPR_STATE, IPC, DSPC, PENDING_*,
2339 STATE, DSSTATE): Define
2340 (GPR, FGRIDX, ..): Define.
2342 * interp.c (registers, register_widths, fpr_state, ipc, dspc,
2343 pending_*, hiaccess, loaccess, state, dsstate): Delete globals.
2344 (GPR, FGRIDX, ...): Delete macros.
2346 * interp.c: Update names to match defines from sim-main.h
2348 Tue Oct 14 15:11:45 1997 Andrew Cagney <cagney@b1.cygnus.com>
2350 * interp.c (sim_monitor): Add SD argument.
2351 (sim_warning): Delete. Replace calls with calls to
2353 (sim_error): Delete. Replace calls with sim_io_error.
2354 (open_trace, writeout32, writeout16, getnum): Add SD argument.
2355 (mips_set_profile): Rename from sim_set_profile. Add SD argument.
2356 (mips_set_profile_size): Rename from sim_set_profile_size. Add SD
2358 (mips_size): Rename from sim_size. Add SD argument.
2360 * interp.c (simulator): Delete global variable.
2361 (callback): Delete global variable.
2362 (mips_option_handler, sim_open, sim_write, sim_read,
2363 sim_store_register, sim_fetch_register, sim_info, sim_do_command,
2364 sim_size,sim_monitor): Use sim_io_* not callback->*.
2365 (sim_open): ZALLOC simulator struct.
2366 (PROFILE): Do not define.
2368 Tue Oct 14 13:35:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2370 * interp.c (sim_open), support.h: Replace CHECKSIM macro found in
2371 support.h with corresponding code.
2373 * sim-main.h (word64, uword64), support.h: Move definition to
2375 (WORD64LO, WORD64HI, SET64LO, SET64HI, WORD64, UWORD64): Ditto.
2378 * Makefile.in: Update dependencies
2379 * interp.c: Do not include.
2381 Tue Oct 14 13:35:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2383 * interp.c (address_translation, load_memory, store_memory,
2384 cache_op): Rename to from AddressTranslation et.al., make global,
2387 * sim-main.h (AddressTranslation, LoadMemory, StoreMemory,
2390 * interp.c (SignalException): Rename to signal_exception, make
2393 * interp.c (Interrupt, ...): Move definitions to sim-main.h.
2395 * sim-main.h (SignalException, SignalExceptionInterrupt,
2396 SignalExceptionInstructionFetch, SignalExceptionAddressStore,
2397 SignalExceptionAddressLoad, SignalExceptionSimulatorFault,
2398 SignalExceptionIntegerOverflow, SignalExceptionCoProcessorUnusable):
2401 * interp.c, support.h: Use.
2403 Tue Oct 14 13:19:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2405 * interp.c (ValueFPR, StoreFPR), sim-main.h: Make global, rename
2406 to value_fpr / store_fpr. Add SD argument.
2407 (NaN, Infinity, Less, Equal, AbsoluteValue, Negate, Add, Sub,
2408 Multiply, Divide, Recip, SquareRoot, Convert): Make global.
2410 * sim-main.h (ValueFPR, StoreFPR): Define.
2412 Tue Oct 14 13:06:55 1997 Andrew Cagney <cagney@b1.cygnus.com>
2414 * interp.c (sim_engine_run): Check consistency between configure
2415 WITH_TARGET_WORD_BITSIZE and WITH_FLOATING_POINT and gensim GPRLEN
2418 * configure.in (mips_bitsize): Configure WITH_TARGET_WORD_BITSIZE.
2419 (mips_fpu): Configure WITH_FLOATING_POINT.
2420 (mips_endian): Configure WITH_TARGET_ENDIAN.
2421 * configure: Update.
2423 Fri Oct 3 09:28:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
2425 * configure: Regenerated to track ../common/aclocal.m4 changes.
2427 Mon Sep 29 14:45:00 1997 Bob Manson <manson@charmed.cygnus.com>
2429 * configure: Regenerated.
2431 Fri Sep 26 12:48:18 1997 Mark Alexander <marka@cygnus.com>
2433 * interp.c: Allow Debug, DEPC, and EPC registers to be examined in GDB.
2435 Thu Sep 25 11:15:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
2437 * gencode.c (print_igen_insn_models): Assume certain architectures
2438 include all mips* instructions.
2439 (print_igen_insn_format): Use data_size==-1 as marker for MIPS16
2442 * Makefile.in (tmp.igen): Add target. Generate igen input from
2445 * gencode.c (FEATURE_IGEN): Define.
2446 (main): Add --igen option. Generate output in igen format.
2447 (process_instructions): Format output according to igen option.
2448 (print_igen_insn_format): New function.
2449 (print_igen_insn_models): New function.
2450 (process_instructions): Only issue warnings and ignore
2451 instructions when no FEATURE_IGEN.
2453 Wed Sep 24 17:38:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
2455 * interp.c (COP_SD, COP_LD): Add UNUSED to pacify GCC for some
2458 Tue Sep 23 11:04:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
2460 * configure: Regenerated to track ../common/aclocal.m4 changes.
2462 Tue Sep 23 10:19:51 1997 Andrew Cagney <cagney@b1.cygnus.com>
2464 * Makefile.in (SIM_ALIGNMENT, SIM_ENDIAN, SIM_HOSTENDIAN,
2465 SIM_RESERVED_BITS): Delete, moved to common.
2466 (SIM_EXTRA_CFLAGS): Update.
2468 Mon Sep 22 11:46:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2470 * configure.in: Configure non-strict memory alignment.
2471 * configure: Regenerated to track ../common/aclocal.m4 changes.
2473 Fri Sep 19 17:45:25 1997 Andrew Cagney <cagney@b1.cygnus.com>
2475 * configure: Regenerated to track ../common/aclocal.m4 changes.
2477 Sat Sep 20 14:07:28 1997 Gavin Koch <gavin@cygnus.com>
2479 * gencode.c (SDBBP,DERET): Added (3900) insns.
2480 (RFE): Turn on for 3900.
2481 * interp.c (DebugBreakPoint,DEPC,Debug,Debug_*): Added.
2482 (dsstate): Made global.
2483 (SUBTARGET_R3900): Added.
2484 (CANCELDELAYSLOT): New.
2485 (SignalException): Ignore SystemCall rather than ignore and
2486 terminate. Add DebugBreakPoint handling.
2487 (decode_coproc): New insns RFE, DERET; and new registers Debug
2488 and DEPC protected by SUBTARGET_R3900.
2489 (sim_engine_run): Use CANCELDELAYSLOT rather than clearing
2491 * Makefile.in,configure.in: Add mips subtarget option.
2492 * configure: Update.
2494 Fri Sep 19 09:33:27 1997 Gavin Koch <gavin@cygnus.com>
2496 * gencode.c: Add r3900 (tx39).
2499 Tue Sep 16 15:52:04 1997 Gavin Koch <gavin@cygnus.com>
2501 * gencode.c (build_instruction): Don't need to subtract 4 for
2504 Tue Sep 16 11:32:28 1997 Gavin Koch <gavin@cygnus.com>
2506 * interp.c: Correct some HASFPU problems.
2508 Mon Sep 15 17:36:15 1997 Andrew Cagney <cagney@b1.cygnus.com>
2510 * configure: Regenerated to track ../common/aclocal.m4 changes.
2512 Fri Sep 12 12:01:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
2514 * interp.c (mips_options): Fix samples option short form, should
2517 Thu Sep 11 09:35:29 1997 Andrew Cagney <cagney@b1.cygnus.com>
2519 * interp.c (sim_info): Enable info code. Was just returning.
2521 Tue Sep 9 17:30:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
2523 * interp.c (decode_coproc): Clarify warning about unsuported MTC0,
2526 Tue Sep 9 16:28:28 1997 Andrew Cagney <cagney@b1.cygnus.com>
2528 * gencode.c (build_instruction): Use SIGNED64 for 64 bit
2530 (build_instruction): Ditto for LL.
2532 Thu Sep 4 17:21:23 1997 Doug Evans <dje@seba>
2534 * configure: Regenerated to track ../common/aclocal.m4 changes.
2536 Wed Aug 27 18:13:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
2538 * configure: Regenerated to track ../common/aclocal.m4 changes.
2541 Wed Aug 27 14:12:27 1997 Andrew Cagney <cagney@b1.cygnus.com>
2543 * interp.c (sim_open): Add call to sim_analyze_program, update
2546 Tue Aug 26 10:40:07 1997 Andrew Cagney <cagney@b1.cygnus.com>
2548 * interp.c (sim_kill): Delete.
2549 (sim_create_inferior): Add ABFD argument. Set PC from same.
2550 (sim_load): Move code initializing trap handlers from here.
2551 (sim_open): To here.
2552 (sim_load): Delete, use sim-hload.c.
2554 * Makefile.in (SIM_OBJS): Add sim-hload.o module.
2556 Mon Aug 25 17:50:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
2558 * configure: Regenerated to track ../common/aclocal.m4 changes.
2561 Mon Aug 25 15:59:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2563 * interp.c (sim_open): Add ABFD argument.
2564 (sim_load): Move call to sim_config from here.
2565 (sim_open): To here. Check return status.
2567 Fri Jul 25 15:00:45 1997 Gavin Koch <gavin@cygnus.com>
2569 * gencode.c (build_instruction): Two arg MADD should
2570 not assign result to $0.
2572 Thu Jun 26 12:13:17 1997 Angela Marie Thomas (angela@cygnus.com)
2574 * sim/mips/configure: Change default_sim_endian to 0 (bi-endian)
2575 * sim/mips/configure.in: Regenerate.
2577 Wed Jul 9 10:29:21 1997 Andrew Cagney <cagney@critters.cygnus.com>
2579 * interp.c (SUB_REG_UW, SUB_REG_SW, SUB_REG_*): Use more explicit
2580 signed8, unsigned8 et.al. types.
2582 * interp.c (SUB_REG_FETCH): Handle both little and big endian
2583 hosts when selecting subreg.
2585 Wed Jul 2 11:54:10 1997 Jeffrey A Law (law@cygnus.com)
2587 * interp.c (sim_engine_run): Reset the ZERO register to zero
2588 regardless of FEATURE_WARN_ZERO.
2589 * gencode.c (FEATURE_WARNINGS): Remove FEATURE_WARN_ZERO.
2591 Wed Jun 4 10:43:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
2593 * interp.c (decode_coproc): Implement MTC0 N, CAUSE.
2594 (SignalException): For BreakPoints ignore any mode bits and just
2596 (SignalException): Always set the CAUSE register.
2598 Tue Jun 3 05:00:33 1997 Andrew Cagney <cagney@b1.cygnus.com>
2600 * interp.c (SignalException): Clear the simDELAYSLOT flag when an
2601 exception has been taken.
2603 * interp.c: Implement the ERET and mt/f sr instructions.
2605 Sat May 31 00:44:16 1997 Andrew Cagney <cagney@b1.cygnus.com>
2607 * interp.c (SignalException): Don't bother restarting an
2610 Fri May 30 23:41:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2612 * interp.c (SignalException): Really take an interrupt.
2613 (interrupt_event): Only deliver interrupts when enabled.
2615 Tue May 27 20:08:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
2617 * interp.c (sim_info): Only print info when verbose.
2618 (sim_info) Use sim_io_printf for output.
2620 Tue May 27 14:22:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
2622 * interp.c (CoProcPresent): Add UNUSED attribute - not used by all
2625 Tue May 27 14:22:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
2627 * interp.c (sim_do_command): Check for common commands if a
2628 simulator specific command fails.
2630 Thu May 22 09:32:03 1997 Gavin Koch <gavin@cygnus.com>
2632 * interp.c (sim_engine_run): ifdef out uses of simSTOP, simSTEP
2633 and simBE when DEBUG is defined.
2635 Wed May 21 09:08:10 1997 Andrew Cagney <cagney@b1.cygnus.com>
2637 * interp.c (interrupt_event): New function. Pass exception event
2638 onto exception handler.
2640 * configure.in: Check for stdlib.h.
2641 * configure: Regenerate.
2643 * gencode.c (build_instruction): Add UNUSED attribute to tempS
2644 variable declaration.
2645 (build_instruction): Initialize memval1.
2646 (build_instruction): Add UNUSED attribute to byte, bigend,
2648 (build_operands): Ditto.
2650 * interp.c: Fix GCC warnings.
2651 (sim_get_quit_code): Delete.
2653 * configure.in: Add INLINE, ENDIAN, HOSTENDIAN and WARNINGS.
2654 * Makefile.in: Ditto.
2655 * configure: Re-generate.
2657 * Makefile.in (SIM_OBJS): Add sim-watch.o module.
2659 Tue May 20 15:08:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
2661 * interp.c (mips_option_handler): New function parse argumes using
2663 (myname): Replace with STATE_MY_NAME.
2664 (sim_open): Delete check for host endianness - performed by
2666 (simHOSTBE, simBE): Delete, replaced by sim-endian flags.
2667 (sim_open): Move much of the initialization from here.
2668 (sim_load): To here. After the image has been loaded and
2670 (sim_open): Move ColdReset from here.
2671 (sim_create_inferior): To here.
2672 (sim_open): Make FP check less dependant on host endianness.
2674 * Makefile.in (SIM_RUN_OBJS): Set to nrun.o - use new version or
2676 * interp.c (sim_set_callbacks): Delete.
2678 * interp.c (membank, membank_base, membank_size): Replace with
2679 STATE_MEMORY, STATE_MEM_SIZE, STATE_MEM_BASE.
2680 (sim_open): Remove call to callback->init. gdb/run do this.
2684 * sim-main.h (SIM_HAVE_FLATMEM): Define.
2686 * interp.c (big_endian_p): Delete, replaced by
2687 current_target_byte_order.
2689 Tue May 20 13:55:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
2691 * interp.c (host_read_long, host_read_word, host_swap_word,
2692 host_swap_long): Delete. Using common sim-endian.
2693 (sim_fetch_register, sim_store_register): Use H2T.
2694 (pipeline_ticks): Delete. Handled by sim-events.
2696 (sim_engine_run): Update.
2698 Tue May 20 13:42:03 1997 Andrew Cagney <cagney@b1.cygnus.com>
2700 * interp.c (sim_stop_reason): Move code determining simEXCEPTION
2702 (SignalException): To here. Signal using sim_engine_halt.
2703 (sim_stop_reason): Delete, moved to common.
2705 Tue May 20 10:19:48 1997 Andrew Cagney <cagney@b2.cygnus.com>
2707 * interp.c (sim_open): Add callback argument.
2708 (sim_set_callbacks): Delete SIM_DESC argument.
2711 Mon May 19 18:20:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
2713 * Makefile.in (SIM_OBJS): Add common modules.
2715 * interp.c (sim_set_callbacks): Also set SD callback.
2716 (set_endianness, xfer_*, swap_*): Delete.
2717 (host_read_word, host_read_long, host_swap_word, host_swap_long):
2718 Change to functions using sim-endian macros.
2719 (control_c, sim_stop): Delete, use common version.
2720 (simulate): Convert into.
2721 (sim_engine_run): This function.
2722 (sim_resume): Delete.
2724 * interp.c (simulation): New variable - the simulator object.
2725 (sim_kind): Delete global - merged into simulation.
2726 (sim_load): Cleanup. Move PC assignment from here.
2727 (sim_create_inferior): To here.
2729 * sim-main.h: New file.
2730 * interp.c (sim-main.h): Include.
2732 Thu Apr 24 00:39:51 1997 Doug Evans <dje@canuck.cygnus.com>
2734 * configure: Regenerated to track ../common/aclocal.m4 changes.
2736 Wed Apr 23 17:32:19 1997 Doug Evans <dje@canuck.cygnus.com>
2738 * tconfig.in (SIM_HAVE_BIENDIAN): Define.
2740 Mon Apr 21 17:16:13 1997 Gavin Koch <gavin@cygnus.com>
2742 * gencode.c (build_instruction): DIV instructions: check
2743 for division by zero and integer overflow before using
2744 host's division operation.
2746 Thu Apr 17 03:18:14 1997 Doug Evans <dje@canuck.cygnus.com>
2748 * Makefile.in (SIM_OBJS): Add sim-load.o.
2749 * interp.c: #include bfd.h.
2750 (target_byte_order): Delete.
2751 (sim_kind, myname, big_endian_p): New static locals.
2752 (sim_open): Set sim_kind, myname. Move call to set_endianness to
2753 after argument parsing. Recognize -E arg, set endianness accordingly.
2754 (sim_load): Return SIM_RC. New arg abfd. Call sim_load_file to
2755 load file into simulator. Set PC from bfd.
2756 (sim_create_inferior): Return SIM_RC. Delete arg start_address.
2757 (set_endianness): Use big_endian_p instead of target_byte_order.
2759 Wed Apr 16 17:55:37 1997 Andrew Cagney <cagney@b1.cygnus.com>
2761 * interp.c (sim_size): Delete prototype - conflicts with
2762 definition in remote-sim.h. Correct definition.
2764 Mon Apr 7 15:45:02 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
2766 * configure: Regenerated to track ../common/aclocal.m4 changes.
2769 Wed Apr 2 15:06:28 1997 Doug Evans <dje@canuck.cygnus.com>
2771 * interp.c (sim_open): New arg `kind'.
2773 * configure: Regenerated to track ../common/aclocal.m4 changes.
2775 Wed Apr 2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
2777 * configure: Regenerated to track ../common/aclocal.m4 changes.
2779 Tue Mar 25 11:38:22 1997 Doug Evans <dje@canuck.cygnus.com>
2781 * interp.c (sim_open): Set optind to 0 before calling getopt.
2783 Wed Mar 19 01:14:00 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
2785 * configure: Regenerated to track ../common/aclocal.m4 changes.
2787 Mon Mar 17 10:52:59 1997 Gavin Koch <gavin@cetus.cygnus.com>
2789 * interp.c : Replace uses of pr_addr with pr_uword64
2790 where the bit length is always 64 independent of SIM_ADDR.
2791 (pr_uword64) : added.
2793 Mon Mar 17 15:10:07 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
2795 * configure: Re-generate.
2797 Fri Mar 14 10:34:11 1997 Michael Meissner <meissner@cygnus.com>
2799 * configure: Regenerate to track ../common/aclocal.m4 changes.
2801 Thu Mar 13 12:51:36 1997 Doug Evans <dje@canuck.cygnus.com>
2803 * interp.c (sim_open): New SIM_DESC result. Argument is now
2805 (other sim_*): New SIM_DESC argument.
2807 Mon Feb 24 22:47:14 1997 Dawn Perchik <dawn@cygnus.com>
2809 * interp.c: Fix printing of addresses for non-64-bit targets.
2810 (pr_addr): Add function to print address based on size.
2812 Wed Feb 19 14:42:09 1997 Mark Alexander <marka@cygnus.com>
2814 * interp.c (simopen): Add support for LSI MiniRISC PMON vectors.
2816 Thu Feb 13 14:08:30 1997 Ian Lance Taylor <ian@cygnus.com>
2818 * gencode.c (build_mips16_operands): Correct computation of base
2819 address for extended PC relative instruction.
2821 Thu Feb 6 17:16:15 1997 Ian Lance Taylor <ian@cygnus.com>
2823 * interp.c (mips16_entry): Add support for floating point cases.
2824 (SignalException): Pass floating point cases to mips16_entry.
2825 (ValueFPR): Don't restrict fmt_single and fmt_word to even
2827 (StoreFPR): Likewise. Also, don't clobber fpr + 1 for fmt_single
2829 (COP_LW): Pass fmt_word rather than fmt_uninterpreted to StoreFPR,
2830 and then set the state to fmt_uninterpreted.
2831 (COP_SW): Temporarily set the state to fmt_word while calling
2834 Tue Feb 4 16:48:25 1997 Ian Lance Taylor <ian@cygnus.com>
2836 * gencode.c (build_instruction): The high order may be set in the
2837 comparison flags at any ISA level, not just ISA 4.
2839 Tue Feb 4 13:33:30 1997 Doug Evans <dje@canuck.cygnus.com>
2841 * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
2842 COMMON_{PRE,POST}_CONFIG_FRAG instead.
2843 * configure.in: sinclude ../common/aclocal.m4.
2844 * configure: Regenerated.
2846 Fri Jan 31 11:11:45 1997 Ian Lance Taylor <ian@cygnus.com>
2848 * configure: Rebuild after change to aclocal.m4.
2850 Thu Jan 23 11:46:23 1997 Stu Grossman (grossman@critters.cygnus.com)
2852 * configure configure.in Makefile.in: Update to new configure
2853 scheme which is more compatible with WinGDB builds.
2854 * configure.in: Improve comment on how to run autoconf.
2855 * configure: Re-run autoconf to get new ../common/aclocal.m4.
2856 * Makefile.in: Use autoconf substitution to install common
2859 Wed Jan 8 12:39:03 1997 Jim Wilson <wilson@cygnus.com>
2861 * gencode.c (build_instruction): Use BigEndianCPU instead of
2864 Thu Jan 02 22:23:04 1997 Mark Alexander <marka@cygnus.com>
2866 * interp.c (sim_monitor): Make output to stdout visible in
2867 wingdb's I/O log window.
2869 Tue Dec 31 07:04:00 1996 Mark Alexander <marka@cygnus.com>
2871 * support.h: Undo previous change to SIGTRAP
2874 Mon Dec 30 17:36:06 1996 Ian Lance Taylor <ian@cygnus.com>
2876 * interp.c (store_word, load_word): New static functions.
2877 (mips16_entry): New static function.
2878 (SignalException): Look for mips16 entry and exit instructions.
2879 (simulate): Use the correct index when setting fpr_state after
2880 doing a pending move.
2882 Sun Dec 29 09:37:18 1996 Mark Alexander <marka@cygnus.com>
2884 * interp.c: Fix byte-swapping code throughout to work on
2885 both little- and big-endian hosts.
2887 Sun Dec 29 09:18:32 1996 Mark Alexander <marka@cygnus.com>
2889 * support.h: Make definitions of SIGTRAP and SIGQUIT consistent
2890 with gdb/config/i386/xm-windows.h.
2892 Fri Dec 27 22:48:51 1996 Mark Alexander <marka@cygnus.com>
2894 * gencode.c (build_instruction): Work around MSVC++ code gen bug
2895 that messes up arithmetic shifts.
2897 Fri Dec 20 11:04:05 1996 Stu Grossman (grossman@critters.cygnus.com)
2899 * support.h: Use _WIN32 instead of __WIN32__. Also add defs for
2900 SIGTRAP and SIGQUIT for _WIN32.
2902 Thu Dec 19 14:07:27 1996 Ian Lance Taylor <ian@cygnus.com>
2904 * gencode.c (build_instruction) [MUL]: Cast operands to word64, to
2905 force a 64 bit multiplication.
2906 (build_instruction) [OR]: In mips16 mode, don't do anything if the
2907 destination register is 0, since that is the default mips16 nop
2910 Mon Dec 16 14:59:38 1996 Ian Lance Taylor <ian@cygnus.com>
2912 * gencode.c (MIPS16_DECODE): SWRASP is I8, not RI.
2913 (build_endian_shift): Don't check proc64.
2914 (build_instruction): Always set memval to uword64. Cast op2 to
2915 uword64 when shifting it left in memory instructions. Always use
2916 the same code for stores--don't special case proc64.
2918 * gencode.c (build_mips16_operands): Fix base PC value for PC
2920 (build_instruction): Call JALDELAYSLOT rather than DELAYSLOT for a
2922 * interp.c (simJALDELAYSLOT): Define.
2923 (JALDELAYSLOT): Define.
2924 (INDELAYSLOT, INJALDELAYSLOT): Define.
2925 (simulate): Clear simJALDELAYSLOT when simDELAYSLOT is cleared.
2927 Tue Dec 24 22:11:20 1996 Angela Marie Thomas (angela@cygnus.com)
2929 * interp.c (sim_open): add flush_cache as a PMON routine
2930 (sim_monitor): handle flush_cache by ignoring it
2932 Wed Dec 11 13:53:51 1996 Jim Wilson <wilson@cygnus.com>
2934 * gencode.c (build_instruction): Use !ByteSwapMem instead of
2936 * interp.c (CONFIG, config_EP_{mask,shift,D,DxxDxx, config_BE): Delete.
2937 (BigEndianMem): Rename to ByteSwapMem and change sense.
2938 (BigEndianCPU, sim_write, LoadMemory, StoreMemory): Change
2939 BigEndianMem references to !ByteSwapMem.
2940 (set_endianness): New function, with prototype.
2941 (sim_open): Call set_endianness.
2942 (sim_info): Use simBE instead of BigEndianMem.
2943 (xfer_direct_word, xfer_direct_long, swap_direct_word,
2944 swap_direct_long, xfer_big_word, xfer_big_long, xfer_little_word,
2945 xfer_little_long, swap_word, swap_long): Delete unnecessary MSC_VER
2946 ifdefs, keeping the prototype declaration.
2947 (swap_word): Rewrite correctly.
2948 (ColdReset): Delete references to CONFIG. Delete endianness related
2949 code; moved to set_endianness.
2951 Tue Dec 10 11:32:04 1996 Jim Wilson <wilson@cygnus.com>
2953 * gencode.c (build_instruction, case JUMP): Truncate PC to 32 bits.
2954 * interp.c (CHECKHILO): Define away.
2955 (simSIGINT): New macro.
2956 (membank_size): Increase from 1MB to 2MB.
2957 (control_c): New function.
2958 (sim_resume): Rename parameter signal to signal_number. Add local
2959 variable prev. Call signal before and after simulate.
2960 (sim_stop_reason): Add simSIGINT support.
2961 (sim_warning, sim_error, dotrace, SignalException): Define as stdarg
2963 (sim_warning): Delete call to SignalException. Do call printf_filtered
2965 (AddressTranslation): Add #ifdef DEBUG around debugging message and
2966 a call to sim_warning.
2968 Wed Nov 27 11:53:50 1996 Ian Lance Taylor <ian@cygnus.com>
2970 * gencode.c (process_instructions): If ! proc64, skip DOUBLEWORD
2971 16 bit instructions.
2973 Tue Nov 26 11:53:12 1996 Ian Lance Taylor <ian@cygnus.com>
2975 Add support for mips16 (16 bit MIPS implementation):
2976 * gencode.c (inst_type): Add mips16 instruction encoding types.
2977 (GETDATASIZEINSN): Define.
2978 (MIPS_DECODE): Add REG flag to dsllv, dsrav, and dsrlv. Add
2979 jalx. Add LEFT flag to mfhi and mflo. Add RIGHT flag to mthi and
2981 (MIPS16_DECODE): New table, for mips16 instructions.
2982 (bitmap_val): New static function.
2983 (struct mips16_op): Define.
2984 (mips16_op_table): New table, for mips16 operands.
2985 (build_mips16_operands): New static function.
2986 (process_instructions): If PC is odd, decode a mips16
2987 instruction. Break out instruction handling into new
2988 build_instruction function.
2989 (build_instruction): New static function, broken out of
2990 process_instructions. Check modifiers rather than flags for SHIFT
2991 bit count and m[ft]{hi,lo} direction.
2992 (usage): Pass program name to fprintf.
2993 (main): Remove unused variable this_option_optind. Change
2994 ``*loptarg++'' to ``loptarg++''.
2995 (my_strtoul): Parenthesize && within ||.
2996 * interp.c (LoadMemory): Accept a halfword pAddr if vAddr is odd.
2997 (simulate): If PC is odd, fetch a 16 bit instruction, and
2998 increment PC by 2 rather than 4.
2999 * configure.in: Add case for mips16*-*-*.
3000 * configure: Rebuild.
3002 Fri Nov 22 08:49:36 1996 Mark Alexander <marka@cygnus.com>
3004 * interp.c: Allow -t to enable tracing in standalone simulator.
3005 Fix garbage output in trace file and error messages.
3007 Wed Nov 20 01:54:37 1996 Doug Evans <dje@canuck.cygnus.com>
3009 * Makefile.in: Delete stuff moved to ../common/Make-common.in.
3010 (SIM_{OBJS,EXTRA_CFLAGS,EXTRA_CLEAN}): Define.
3011 * configure.in: Simplify using macros in ../common/aclocal.m4.
3012 * configure: Regenerated.
3013 * tconfig.in: New file.
3015 Tue Nov 12 13:34:00 1996 Dawn Perchik <dawn@cygnus.com>
3017 * interp.c: Fix bugs in 64-bit port.
3018 Use ansi function declarations for msvc compiler.
3019 Initialize and test file pointer in trace code.
3020 Prevent duplicate definition of LAST_EMED_REGNUM.
3022 Tue Oct 15 11:07:06 1996 Mark Alexander <marka@cygnus.com>
3024 * interp.c (xfer_big_long): Prevent unwanted sign extension.
3026 Thu Sep 26 17:35:00 1996 James G. Smith <jsmith@cygnus.co.uk>
3028 * interp.c (SignalException): Check for explicit terminating
3030 * gencode.c: Pass instruction value through SignalException()
3031 calls for Trap, Breakpoint and Syscall.
3033 Thu Sep 26 11:35:17 1996 James G. Smith <jsmith@cygnus.co.uk>
3035 * interp.c (SquareRoot): Add HAVE_SQRT check to ensure sqrt() is
3036 only used on those hosts that provide it.
3037 * configure.in: Add sqrt() to list of functions to be checked for.
3038 * config.in: Re-generated.
3039 * configure: Re-generated.
3041 Fri Sep 20 15:47:12 1996 Ian Lance Taylor <ian@cygnus.com>
3043 * gencode.c (process_instructions): Call build_endian_shift when
3044 expanding STORE RIGHT, to fix swr.
3045 * support.h (SIGNEXTEND): If the sign bit is not set, explicitly
3046 clear the high bits.
3047 * interp.c (Convert): Fix fmt_single to fmt_long to not truncate.
3048 Fix float to int conversions to produce signed values.
3050 Thu Sep 19 15:34:17 1996 Ian Lance Taylor <ian@cygnus.com>
3052 * gencode.c (MIPS_DECODE): Set UNSIGNED for multu instruction.
3053 (process_instructions): Correct handling of nor instruction.
3054 Correct shift count for 32 bit shift instructions. Correct sign
3055 extension for arithmetic shifts to not shift the number of bits in
3056 the type. Fix 64 bit multiply high word calculation. Fix 32 bit
3057 unsigned multiply. Fix ldxc1 and friends to use coprocessor 1.
3059 * interp.c (CHECKHILO): Don't set HIACCESS, LOACCESS, or HLPC.
3060 It's OK to have a mult follow a mult. What's not OK is to have a
3061 mult follow an mfhi.
3062 (Convert): Comment out incorrect rounding code.
3064 Mon Sep 16 11:38:16 1996 James G. Smith <jsmith@cygnus.co.uk>
3066 * interp.c (sim_monitor): Improved monitor printf
3067 simulation. Tidied up simulator warnings, and added "--log" option
3068 for directing warning message output.
3069 * gencode.c: Use sim_warning() rather than WARNING macro.
3071 Thu Aug 22 15:03:12 1996 Ian Lance Taylor <ian@cygnus.com>
3073 * Makefile.in (gencode): Depend upon gencode.o, getopt.o, and
3074 getopt1.o, rather than on gencode.c. Link objects together.
3075 Don't link against -liberty.
3076 (gencode.o, getopt.o, getopt1.o): New targets.
3077 * gencode.c: Include <ctype.h> and "ansidecl.h".
3078 (AND): Undefine after including "ansidecl.h".
3079 (ULONG_MAX): Define if not defined.
3080 (OP_*): Don't define macros; now defined in opcode/mips.h.
3081 (main): Call my_strtoul rather than strtoul.
3082 (my_strtoul): New static function.
3084 Wed Jul 17 18:12:38 1996 Stu Grossman (grossman@critters.cygnus.com)
3086 * gencode.c (process_instructions): Generate word64 and uword64
3087 instead of `long long' and `unsigned long long' data types.
3088 * interp.c: #include sysdep.h to get signals, and define default
3090 * (Convert): Work around for Visual-C++ compiler bug with type
3092 * support.h: Make things compile under Visual-C++ by using
3093 __int64 instead of `long long'. Change many refs to long long
3094 into word64/uword64 typedefs.
3096 Wed Jun 26 12:24:55 1996 Jason Molenda (crash@godzilla.cygnus.co.jp)
3098 * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
3099 INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
3101 * configure.in (AC_PREREQ): autoconf 2.5 or higher.
3102 (AC_PROG_INSTALL): Added.
3103 (AC_PROG_CC): Moved to before configure.host call.
3104 * configure: Rebuilt.
3106 Wed Jun 5 08:28:13 1996 James G. Smith <jsmith@cygnus.co.uk>
3108 * configure.in: Define @SIMCONF@ depending on mips target.
3109 * configure: Rebuild.
3110 * Makefile.in (run): Add @SIMCONF@ to control simulator
3112 * gencode.c: Change LOADDRMASK to 64bit memory model only.
3113 * interp.c: Remove some debugging, provide more detailed error
3114 messages, update memory accesses to use LOADDRMASK.
3116 Mon Jun 3 11:55:03 1996 Ian Lance Taylor <ian@cygnus.com>
3118 * configure.in: Add calls to AC_CONFIG_HEADER, AC_CHECK_HEADERS,
3119 AC_CHECK_LIB, and AC_CHECK_FUNCS. Change AC_OUTPUT to set
3121 * configure: Rebuild.
3122 * config.in: New file, generated by autoheader.
3123 * interp.c: Include "config.h". Include <stdlib.h>, <string.h>,
3124 and <strings.h> if they exist. Replace #ifdef sun with #ifdef
3125 HAVE_ANINT and HAVE_AINT, as appropriate.
3126 * Makefile.in (run): Use @LIBS@ rather than -lm.
3127 (interp.o): Depend upon config.h.
3128 (Makefile): Just rebuild Makefile.
3129 (clean): Remove stamp-h.
3130 (mostlyclean): Make the same as clean, not as distclean.
3131 (config.h, stamp-h): New targets.
3133 Fri May 10 00:41:17 1996 James G. Smith <jsmith@cygnus.co.uk>
3135 * interp.c (ColdReset): Fix boolean test. Make all simulator
3138 Wed May 8 15:12:58 1996 James G. Smith <jsmith@cygnus.co.uk>
3140 * interp.c (xfer_direct_word, xfer_direct_long,
3141 swap_direct_word, swap_direct_long, xfer_big_word,
3142 xfer_big_long, xfer_little_word, xfer_little_long,
3143 swap_word,swap_long): Added.
3144 * interp.c (ColdReset): Provide function indirection to
3145 host<->simulated_target transfer routines.
3146 * interp.c (sim_store_register, sim_fetch_register): Updated to
3147 make use of indirected transfer routines.
3149 Fri Apr 19 15:48:24 1996 James G. Smith <jsmith@cygnus.co.uk>
3151 * gencode.c (process_instructions): Ensure FP ABS instruction
3153 * interp.c (AbsoluteValue): Add routine. Also provide simple PMON
3154 system call support.
3156 Wed Apr 10 09:51:38 1996 James G. Smith <jsmith@cygnus.co.uk>
3158 * interp.c (sim_do_command): Complain if callback structure not
3161 Thu Mar 28 13:50:51 1996 James G. Smith <jsmith@cygnus.co.uk>
3163 * interp.c (Convert): Provide round-to-nearest and round-to-zero
3164 support for Sun hosts.
3165 * Makefile.in (gencode): Ensure the host compiler and libraries
3166 used for cross-hosted build.
3168 Wed Mar 27 14:42:12 1996 James G. Smith <jsmith@cygnus.co.uk>
3170 * interp.c, gencode.c: Some more (TODO) tidying.
3172 Thu Mar 7 11:19:33 1996 James G. Smith <jsmith@cygnus.co.uk>
3174 * gencode.c, interp.c: Replaced explicit long long references with
3175 WORD64HI, WORD64LO, SET64HI and SET64LO macro calls.
3176 * support.h (SET64LO, SET64HI): Macros added.
3178 Wed Feb 21 12:16:21 1996 Ian Lance Taylor <ian@cygnus.com>
3180 * configure: Regenerate with autoconf 2.7.
3182 Tue Jan 30 08:48:18 1996 Fred Fish <fnf@cygnus.com>
3184 * interp.c (LoadMemory): Enclose text following #endif in /* */.
3185 * support.h: Remove superfluous "1" from #if.
3186 * support.h (CHECKSIM): Remove stray 'a' at end of line.
3188 Mon Dec 4 11:44:40 1995 Jamie Smith <jsmith@cygnus.com>
3190 * interp.c (StoreFPR): Control UndefinedResult() call on
3191 WARN_RESULT manifest.
3193 Fri Dec 1 16:37:19 1995 James G. Smith <jsmith@cygnus.co.uk>
3195 * gencode.c: Tidied instruction decoding, and added FP instruction
3198 * interp.c: Added dineroIII, and BSD profiling support. Also
3199 run-time FP handling.
3201 Sun Oct 22 00:57:18 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
3203 * Changelog, Makefile.in, README.Cygnus, configure, configure.in,
3204 gencode.c, interp.c, support.h: created.