157cee4390278cf7204ab39ff96e624c55516308
[deliverable/binutils-gdb.git] / sim / mips / Makefile.in
1 # Makefile template for Configure for the MIPS simulator.
2 # Written by Cygnus Support.
3
4 ## COMMON_PRE_CONFIG_FRAG
5
6 srcdir=@srcdir@
7 srcroot=$(srcdir)/../../
8
9 SIM_NO_OBJ =
10
11 # start-sanitize-sky
12 SIM_SKY_OBJS = \
13 sky-device.o \
14 sky-dma.o \
15 sky-engine.o \
16 sky-gpuif.o \
17 sky-hardware.o \
18 sky-libvpe.o \
19 sky-pke.o \
20 sky-vu0.o \
21 sky-vu1.o \
22 sky-gdb.o
23 # end-sanitize-sky
24
25 SIM_IGEN_OBJ = \
26 support.o \
27 itable.o \
28 semantics.o \
29 idecode.o \
30 icache.o \
31 engine.o \
32 irun.o \
33
34 SIM_M16_OBJ = \
35 m16_support.o \
36 m16_semantics.o \
37 m16_idecode.o \
38 m16_icache.o \
39 \
40 m32_support.o \
41 m32_semantics.o \
42 m32_idecode.o \
43 m32_icache.o \
44 \
45 itable.o \
46 m16run.o \
47
48 MIPS_EXTRA_OBJS = @mips_extra_objs@
49
50 SIM_OBJS = \
51 $(SIM_@sim_gen@_OBJ) \
52 $(SIM_NEW_COMMON_OBJS) \
53 $(MIPS_EXTRA_OBJS) \
54 interp.o \
55 sim-hload.o \
56 sim-engine.o \
57 sim-stop.o \
58 sim-resume.o \
59 sim-reason.o \
60
61
62 # List of flags to always pass to $(CC).
63 SIM_SUBTARGET=@SIM_SUBTARGET@
64
65 SIM_NO_CFLAGS = -DWITH_IGEN=0
66 SIM_IGEN_CFLAGS = -DWITH_IGEN=1
67 SIM_M16_CFLAGS = -DWITH_IGEN=1
68
69 # FIXME: Hack to find syscall.h? Better support for syscall.h
70 # is in progress.
71 SIM_EXTRA_CFLAGS = \
72 $(SIM_SUBTARGET) \
73 -I$(srcdir)/../../newlib/libc/sys/idt \
74 $(SIM_@sim_gen@_CFLAGS)
75
76 SIM_EXTRA_CLEAN = clean-extra
77
78 SIM_EXTRA_ALL = $(SIM_@sim_gen@_ALL)
79
80 # List of main object files for `run'.
81 SIM_RUN_OBJS = nrun.o
82
83
84
85 ## COMMON_POST_CONFIG_FRAG
86
87 SIM_NO_INTERP = oengine.c
88 interp.o: $(srcdir)/interp.c config.h sim-main.h $(SIM_@sim_gen@_INTERP)
89
90
91
92 #
93 # Old deprecated generator
94 #
95
96 SIM_NO_ALL = oengine.c
97
98 oengine.c: gencode
99 ./gencode @SIMCONF@ > tmp-oengine
100 mv tmp-oengine oengine.c
101
102 gencode: gencode.o getopt.o getopt1.o
103 $(CC_FOR_BUILD) -o $@ gencode.o getopt.o getopt1.o
104
105 gencode.o: $(srcdir)/gencode.c
106 $(CC_FOR_BUILD) -c -g -I${srcroot}/include $(srcdir)/gencode.c
107
108 getopt.o: $(srcdir)/../../libiberty/getopt.c
109 $(CC_FOR_BUILD) -c -g -I${srcroot}/include $(srcdir)/../../libiberty/getopt.c
110 getopt1.o: $(srcdir)/../../libiberty/getopt1.c
111 $(CC_FOR_BUILD) -c -g -I${srcroot}/include $(srcdir)/../../libiberty/getopt1.c
112
113
114
115 ../igen/igen:
116 cd ../igen && $(MAKE)
117
118 IGEN_TRACE= # -G omit-line-numbers # -G trace-rule-selection -G trace-rule-rejection -G trace-entries
119 IGEN_INSN=$(srcdir)/mips.igen
120 IGEN_DC=$(srcdir)/mips.dc
121 M16_DC=$(srcdir)/m16.dc
122 IGEN_INCLUDE=\
123 $(start-sanitize-r5900) \
124 $(srcdir)/r5900.igen \
125 $(end-sanitize-r5900) \
126 $(start-sanitize-vr5400) \
127 $(srcdir)/vr5400.igen \
128 $(srcdir)/mdmx.igen \
129 $(end-sanitize-vr5400) \
130 $(srcdir)/m16.igen
131
132 SIM_IGEN_ALL = tmp-igen
133
134 BUILT_SRC_FROM_IGEN = \
135 icache.h \
136 icache.c \
137 idecode.h \
138 idecode.c \
139 semantics.h \
140 semantics.c \
141 model.h \
142 model.c \
143 support.h \
144 support.c \
145 engine.h \
146 engine.c \
147 irun.c \
148
149 # NB: Since these can be built by either tmp-igen or tmp-m16
150 # they are explicitly marked as being dependant on the
151 # dependant on the selected generator.
152 BUILT_SRC_FROM_GEN = \
153 itable.h \
154 itable.c \
155
156 $(BUILT_SRC_FROM_GEN): $(SIM_@sim_gen@_ALL)
157
158
159 $(BUILT_SRC_FROM_IGEN): tmp-igen
160
161 tmp-igen: $(IGEN_INSN) $(IGEN_DC) ../igen/igen $(IGEN_INCLUDE)
162 cd ../igen && $(MAKE)
163 ../igen/igen \
164 $(IGEN_TRACE) \
165 -I $(srcdir) \
166 -Werror \
167 -Wnodiscard \
168 @sim_igen_flags@ \
169 -G gen-direct-access \
170 -G gen-zero-r0 \
171 -B 32 \
172 -H 31 \
173 -i $(IGEN_INSN) \
174 -o $(IGEN_DC) \
175 -x \
176 -n icache.h -hc tmp-icache.h \
177 -n icache.c -c tmp-icache.c \
178 -n semantics.h -hs tmp-semantics.h \
179 -n semantics.c -s tmp-semantics.c \
180 -n idecode.h -hd tmp-idecode.h \
181 -n idecode.c -d tmp-idecode.c \
182 -n model.h -hm tmp-model.h \
183 -n model.c -m tmp-model.c \
184 -n support.h -hf tmp-support.h \
185 -n support.c -f tmp-support.c \
186 -n itable.h -ht tmp-itable.h \
187 -n itable.c -t tmp-itable.c \
188 -n engine.h -he tmp-engine.h \
189 -n engine.c -e tmp-engine.c \
190 -n irun.c -r tmp-irun.c
191 $(srcdir)/../../move-if-change tmp-icache.h icache.h
192 $(srcdir)/../../move-if-change tmp-icache.c icache.c
193 $(srcdir)/../../move-if-change tmp-idecode.h idecode.h
194 $(srcdir)/../../move-if-change tmp-idecode.c idecode.c
195 $(srcdir)/../../move-if-change tmp-semantics.h semantics.h
196 $(srcdir)/../../move-if-change tmp-semantics.c semantics.c
197 $(srcdir)/../../move-if-change tmp-model.h model.h
198 $(srcdir)/../../move-if-change tmp-model.c model.c
199 $(srcdir)/../../move-if-change tmp-support.h support.h
200 $(srcdir)/../../move-if-change tmp-support.c support.c
201 $(srcdir)/../../move-if-change tmp-itable.h itable.h
202 $(srcdir)/../../move-if-change tmp-itable.c itable.c
203 $(srcdir)/../../move-if-change tmp-engine.h engine.h
204 $(srcdir)/../../move-if-change tmp-engine.c engine.c
205 $(srcdir)/../../move-if-change tmp-irun.c irun.c
206 touch tmp-igen
207
208 semantics.o: sim-main.h $(SIM_EXTRA_DEPS)
209 engine.o: sim-main.h $(SIM_EXTRA_DEPS)
210 support.o: sim-main.h $(SIM_EXTRA_DEPS)
211 idecode.o: sim-main.h $(SIM_EXTRA_DEPS)
212 itable.o: sim-main.h $(SIM_EXTRA_DEPS)
213
214
215
216 SIM_M16_ALL = tmp-m16
217
218 BUILT_SRC_FROM_M16 = \
219 m16_icache.h \
220 m16_icache.c \
221 m16_idecode.h \
222 m16_idecode.c \
223 m16_semantics.h \
224 m16_semantics.c \
225 m16_model.h \
226 m16_model.c \
227 m16_support.h \
228 m16_support.c \
229 \
230 m32_icache.h \
231 m32_icache.c \
232 m32_idecode.h \
233 m32_idecode.c \
234 m32_semantics.h \
235 m32_semantics.c \
236 m32_model.h \
237 m32_model.c \
238 m32_support.h \
239 m32_support.c \
240
241 $(BUILT_SRC_FROM_M16): tmp-m16
242
243 tmp-m16: $(IGEN_INSN) $(IGEN_DC) ../igen/igen $(IGEN_INCLUDE)
244 cd ../igen && $(MAKE)
245 ../igen/igen \
246 $(IGEN_TRACE) \
247 -I $(srcdir) \
248 -Werror \
249 -Wnodiscard \
250 @sim_m16_flags@ \
251 -G gen-direct-access \
252 -G gen-zero-r0 \
253 -B 16 \
254 -H 15 \
255 -i $(IGEN_INSN) \
256 -o $(M16_DC) \
257 -P m16_ \
258 -x \
259 -n m16_icache.h -hc tmp-icache.h \
260 -n m16_icache.c -c tmp-icache.c \
261 -n m16_semantics.h -hs tmp-semantics.h \
262 -n m16_semantics.c -s tmp-semantics.c \
263 -n m16_idecode.h -hd tmp-idecode.h \
264 -n m16_idecode.c -d tmp-idecode.c \
265 -n m16_model.h -hm tmp-model.h \
266 -n m16_model.c -m tmp-model.c \
267 -n m16_support.h -hf tmp-support.h \
268 -n m16_support.c -f tmp-support.c \
269 #
270 $(srcdir)/../../move-if-change tmp-icache.h m16_icache.h
271 $(srcdir)/../../move-if-change tmp-icache.c m16_icache.c
272 $(srcdir)/../../move-if-change tmp-idecode.h m16_idecode.h
273 $(srcdir)/../../move-if-change tmp-idecode.c m16_idecode.c
274 $(srcdir)/../../move-if-change tmp-semantics.h m16_semantics.h
275 $(srcdir)/../../move-if-change tmp-semantics.c m16_semantics.c
276 $(srcdir)/../../move-if-change tmp-model.h m16_model.h
277 $(srcdir)/../../move-if-change tmp-model.c m16_model.c
278 $(srcdir)/../../move-if-change tmp-support.h m16_support.h
279 $(srcdir)/../../move-if-change tmp-support.c m16_support.c
280 ../igen/igen \
281 $(IGEN_TRACE) \
282 -I $(srcdir) \
283 -Werror \
284 -Wnodiscard \
285 @sim_igen_flags@ \
286 -G gen-direct-access \
287 -G gen-zero-r0 \
288 -B 32 \
289 -H 31 \
290 -i $(IGEN_INSN) \
291 -o $(IGEN_DC) \
292 -P m32_ \
293 -x \
294 -n m32_icache.h -hc tmp-icache.h \
295 -n m32_icache.c -c tmp-icache.c \
296 -n m32_semantics.h -hs tmp-semantics.h \
297 -n m32_semantics.c -s tmp-semantics.c \
298 -n m32_idecode.h -hd tmp-idecode.h \
299 -n m32_idecode.c -d tmp-idecode.c \
300 -n m32_model.h -hm tmp-model.h \
301 -n m32_model.c -m tmp-model.c \
302 -n m32_support.h -hf tmp-support.h \
303 -n m32_support.c -f tmp-support.c \
304 #
305 $(srcdir)/../../move-if-change tmp-icache.h m32_icache.h
306 $(srcdir)/../../move-if-change tmp-icache.c m32_icache.c
307 $(srcdir)/../../move-if-change tmp-idecode.h m32_idecode.h
308 $(srcdir)/../../move-if-change tmp-idecode.c m32_idecode.c
309 $(srcdir)/../../move-if-change tmp-semantics.h m32_semantics.h
310 $(srcdir)/../../move-if-change tmp-semantics.c m32_semantics.c
311 $(srcdir)/../../move-if-change tmp-model.h m32_model.h
312 $(srcdir)/../../move-if-change tmp-model.c m32_model.c
313 $(srcdir)/../../move-if-change tmp-support.h m32_support.h
314 $(srcdir)/../../move-if-change tmp-support.c m32_support.c
315 ../igen/igen \
316 $(IGEN_TRACE) \
317 -I $(srcdir) \
318 -Werror \
319 -Wnodiscard \
320 -Wnowidth \
321 @sim_igen_flags@ @sim_m16_flags@ \
322 -G gen-direct-access \
323 -G gen-zero-r0 \
324 -i $(IGEN_INSN) \
325 -n itable.h -ht tmp-itable.h \
326 -n itable.c -t tmp-itable.c \
327 #
328 $(srcdir)/../../move-if-change tmp-itable.h itable.h
329 $(srcdir)/../../move-if-change tmp-itable.c itable.c
330 touch tmp-m16
331
332
333 clean-extra:
334 rm -f gencode oengine.c tmp.igen
335 rm -f $(BUILT_SRC_FROM_GEN)
336 rm -f $(BUILT_SRC_FROM_IGEN)
337 rm -f $(BUILT_SRC_FROM_M16)
338 rm -f tmp-igen
339 rm -f tmp-m16
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