1 Mon Jan 19 22:26:29 1998 Doug Evans <devans@seba>
3 * configure: Regenerated to track ../common/aclocal.m4 changes.
5 Mon Dec 15 23:17:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
7 * configure: Regenerated to track ../common/aclocal.m4 changes.
10 Thu Dec 4 09:21:05 1997 Doug Evans <devans@canuck.cygnus.com>
12 * configure: Regenerated to track ../common/aclocal.m4 changes.
14 Tue Nov 11 10:38:52 1997 Jeffrey A Law (law@cygnus.com)
16 * simops.c (call:16 call:32): Stack adjustment is determined solely
19 Wed Oct 22 14:43:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
21 * interp.c (sim_load): Pass lma_p and sim_write args to
24 Tue Oct 21 10:12:03 1997 Jeffrey A Law (law@cygnus.com)
26 * simops.c: Correctly handle register restores for "ret" and "retf"
29 Fri Oct 3 09:28:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
31 * configure: Regenerated to track ../common/aclocal.m4 changes.
33 Wed Sep 24 17:38:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
35 * configure: Regenerated to track ../common/aclocal.m4 changes.
37 Tue Sep 23 11:04:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
39 * configure: Regenerated to track ../common/aclocal.m4 changes.
41 Mon Sep 22 11:46:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
43 * configure: Regenerated to track ../common/aclocal.m4 changes.
45 Fri Sep 19 17:45:25 1997 Andrew Cagney <cagney@b1.cygnus.com>
47 * configure: Regenerated to track ../common/aclocal.m4 changes.
49 Mon Sep 15 17:36:15 1997 Andrew Cagney <cagney@b1.cygnus.com>
51 * configure: Regenerated to track ../common/aclocal.m4 changes.
53 Thu Sep 4 17:21:23 1997 Doug Evans <dje@seba>
55 * configure: Regenerated to track ../common/aclocal.m4 changes.
57 Wed Aug 27 18:13:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
59 * configure: Regenerated to track ../common/aclocal.m4 changes.
62 Tue Aug 26 10:41:07 1997 Andrew Cagney <cagney@b1.cygnus.com>
64 * interp.c (sim_kill): Delete.
65 (sim_create_inferior): Add ABFD argument.
66 (sim_load): Move setting of PC from here.
67 (sim_create_inferior): To here.
69 Mon Aug 25 17:50:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
71 * configure: Regenerated to track ../common/aclocal.m4 changes.
74 Mon Aug 25 16:14:44 1997 Andrew Cagney <cagney@b1.cygnus.com>
76 * interp.c (sim_open): Add ABFD argument.
78 Tue Jun 24 13:46:20 1997 Jeffrey A Law (law@cygnus.com)
80 * interp.c (sim_resume): Clear State.exited.
81 (sim_stop_reason): If State.exited is nonzero, then indicate that
82 the simulator exited instead of stopped.
83 * mn10300_sim.h (struct _state): Add exited field.
84 * simops.c (syscall): Set State.exited for SYS_exit.
86 Wed Jun 11 22:07:56 1997 Jeffrey A Law (law@cygnus.com)
88 * simops.c: Fix thinko in last change.
90 Tue Jun 10 12:31:32 1997 Jeffrey A Law (law@cygnus.com)
92 * simops.c: "call" stores the callee saved registers into the
93 stack! Update the stack pointer properly when done with
96 * simops.c: Fix return address computation for "call" instructions.
98 Thu May 22 01:43:11 1997 Jeffrey A Law (law@cygnus.com)
100 * interp.c (sim_open): Fix typo.
102 Wed May 21 23:27:58 1997 Jeffrey A Law (law@cygnus.com)
104 * interp.c (sim_resume): Add missing case in big switch
105 statement (for extb instruction).
107 Tue May 20 17:51:30 1997 Jeffrey A Law (law@cygnus.com)
109 * interp.c: Replace all references to load_mem and store_mem
110 with references to load_byte, load_half, load_3_byte, load_word
111 and store_byte, store_half, store_3_byte, store_word.
112 (INLINE): Delete definition.
113 (load_mem_big): Likewise.
114 (max_mem): Make it global.
115 (dispatch): Make this function inline.
116 (load_mem, store_mem): Delete functions.
117 * mn10300_sim.h (INLINE): Define.
118 (RLW): Delete unused definition.
119 (load_mem, store_mem): Delete declarations.
120 (load_mem_big): New definition.
121 (load_byte, load_half, load_3_byte, load_word): New functions.
122 (store_byte, store_half, store_3_byte, store_word): New functions.
123 * simops.c: Replace all references to load_mem and store_mem
124 with references to load_byte, load_half, load_3_byte, load_word
125 and store_byte, store_half, store_3_byte, store_word.
127 Tue May 20 10:21:51 1997 Andrew Cagney <cagney@b1.cygnus.com>
129 * interp.c (sim_open): Add callback to arguments.
130 (sim_set_callbacks): Delete SIM_DESC argument.
132 Mon May 19 13:54:22 1997 Jeffrey A Law (law@cygnus.com)
134 * interp.c (dispatch): Make this an inline function.
136 * simops.c (syscall): Use callback->write regardless of
137 what file descriptor we're writing too.
139 Sun May 18 16:46:31 1997 Jeffrey A Law (law@cygnus.com)
141 * interp.c (load_mem_big): Remove function. It's now a macro
143 (compare_simops): New function.
144 (sim_open): Sort the Simops table before inserting entries
146 * mn10300_sim.h: Remove unused #defines.
147 (load_mem_big): Define.
149 Fri May 16 16:36:17 1997 Jeffrey A Law (law@cygnus.com)
151 * interp.c (load_mem): If we get a load from an out of range
153 (store_mem): Likewise for stores.
154 (max_mem): New variable.
156 Tue May 6 13:24:36 1997 Jeffrey A Law (law@cygnus.com)
158 * mn10300_sim.h: Fix ordering of bits in the PSW.
160 * interp.c: Improve hashing routine to avoid long list
161 traversals for common instructions. Add HASH_STAT support.
162 Rewrite opcode dispatch code using a big switch instead of
163 cascaded if/else statements. Avoid useless calls to load_mem.
165 Mon May 5 18:07:48 1997 Jeffrey A Law (law@cygnus.com)
167 * mn10300_sim.h (struct _state): Add space for mdrq register.
169 * simops.c: Don't abort for trap. Add support for the extended
170 instructions, "getx", "putx", "mulq", "mulqu", "sat16", "sat24",
173 Thu Apr 24 00:39:51 1997 Doug Evans <dje@canuck.cygnus.com>
175 * configure: Regenerated to track ../common/aclocal.m4 changes.
177 Fri Apr 18 14:04:04 1997 Andrew Cagney <cagney@b1.cygnus.com>
179 * interp.c (sim_stop): Add stub function.
181 Thu Apr 17 03:26:59 1997 Doug Evans <dje@canuck.cygnus.com>
183 * Makefile.in (SIM_OBJS): Add sim-load.o.
184 * interp.c (sim_kind, myname): New static locals.
185 (sim_open): Set sim_kind, myname. Ignore -E arg.
186 (sim_load): Return SIM_RC. New arg abfd. Call sim_load_file to
187 load file into simulator. Set start address from bfd.
188 (sim_create_inferior): Return SIM_RC. Delete arg start_address.
190 Wed Apr 16 19:30:44 1997 Andrew Cagney <cagney@b1.cygnus.com>
192 * simops.c (OP_F020): SYS_execv, SYS_time, SYS_times, SYS_utime
193 only include if implemented by host.
194 (OP_F020): Typecast arg passed to time function;
196 Mon Apr 7 23:57:49 1997 Jeffrey A Law (law@cygnus.com)
198 * simops.c (syscall): Handle new mn10300 calling conventions.
200 Mon Apr 7 15:45:02 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
202 * configure: Regenerated to track ../common/aclocal.m4 changes.
205 Fri Apr 4 20:02:37 1997 Ian Lance Taylor <ian@cygnus.com>
207 * Makefile.in: Change mn10300-opc.o to m10300-opc.o, to match
208 corresponding change in opcodes directory.
210 Wed Apr 2 15:06:28 1997 Doug Evans <dje@canuck.cygnus.com>
212 * interp.c (sim_open): New arg `kind'.
214 * configure: Regenerated to track ../common/aclocal.m4 changes.
216 Wed Apr 2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
218 * configure: Regenerated to track ../common/aclocal.m4 changes.
220 Thu Mar 20 11:58:02 1997 Jeffrey A Law (law@cygnus.com)
222 * simops.c: Fix register extraction for a two "movbu" variants.
223 Somewhat simplify "sub" instructions.
224 Correctly sign extend operands for "mul". Put the correct
225 half of the result in MDR for "mul" and "mulu".
226 Implement remaining instructions.
227 Tweak opcode for "syscall".
229 Tue Mar 18 14:21:21 1997 Jeffrey A Law (law@cygnus.com)
231 * simops.c: Do syscall emulation in "syscall" instruction. Add
232 dummy "trap" instruction.
234 Wed Mar 19 01:14:00 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
236 * configure: Regenerated to track ../common/aclocal.m4 changes.
238 Mon Mar 17 15:10:07 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
240 * configure: Re-generate.
242 Fri Mar 14 10:34:11 1997 Michael Meissner <meissner@cygnus.com>
244 * configure: Regenerate to track ../common/aclocal.m4 changes.
246 Thu Mar 13 12:54:45 1997 Doug Evans <dje@canuck.cygnus.com>
248 * interp.c (sim_open): New SIM_DESC result. Argument is now
250 (other sim_*): New SIM_DESC argument.
252 Wed Mar 12 15:04:00 1997 Jeffrey A Law (law@cygnus.com)
254 * simops.c: Fix carry bit computation for "add" instructions.
256 * simops.c: Fix typos in bset insns. Fix arguments to store_mem
257 for bset imm8,(d8,an) and bclr imm8,(d8,an).
259 Wed Mar 5 15:00:10 1997 Jeffrey A Law (law@cygnus.com)
261 * simops.c: Fix register references when computing Z and N bits
264 Tue Feb 4 13:33:30 1997 Doug Evans <dje@canuck.cygnus.com>
266 * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
267 COMMON_{PRE,POST}_CONFIG_FRAG instead.
268 * configure.in: sinclude ../common/aclocal.m4.
269 * configure: Regenerated.
271 Fri Jan 24 10:47:25 1997 Jeffrey A Law (law@cygnus.com)
273 * interp.c (init_system): Allocate 2^19 bytes of space for the
276 Thu Jan 23 11:46:23 1997 Stu Grossman (grossman@critters.cygnus.com)
278 * configure configure.in Makefile.in: Update to new configure
279 scheme which is more compatible with WinGDB builds.
280 * configure.in: Improve comment on how to run autoconf.
281 * configure: Re-run autoconf to get new ../common/aclocal.m4.
282 * Makefile.in: Use autoconf substitution to install common
285 Tue Jan 21 15:03:04 1997 Jeffrey A Law (law@cygnus.com)
287 * simops.c: Undo last change to "rol" and "ror", original code
290 Thu Jan 16 11:28:14 1997 Jeffrey A Law (law@cygnus.com)
292 * simops.c: Fix "rol" and "ror".
294 Wed Jan 15 06:45:58 1997 Jeffrey A Law (law@cygnus.com)
296 * simops.c: Fix typo in last change.
298 Mon Jan 13 13:22:35 1997 Jeffrey A Law (law@cygnus.com)
300 * simops.c: Use REG macros in few places not using them yet.
302 Mon Jan 6 16:21:19 1997 Jeffrey A Law (law@cygnus.com)
304 * mn10300_sim.h (struct _state): Fix number of registers!
306 Tue Dec 31 16:20:41 1996 Jeffrey A Law (law@cygnus.com)
308 * mn10300_sim.h (struct _state): Put all registers into a single
309 array to make gdb implementation easier.
310 (REG_*): Add definitions for all registers in the state array.
311 (SEXT32, SEXT40, SEXT44, SEXT60): Remove unused macros.
312 * simops.c: Related changes.
314 Wed Dec 18 10:10:45 1996 Jeffrey A Law (law@cygnus.com)
316 * interp.c (sim_resume): Handle 0xff as a single byte insn.
318 * simops.c: Fix overflow computation for "add" and "inc"
321 Mon Dec 16 10:03:52 1996 Jeffrey A Law (law@cygnus.com)
323 * simops.c: Handle "break" instruction.
325 * simops.c: Fix restoring the PC for "ret" and "retf" instructions.
327 Wed Dec 11 09:53:10 1996 Jeffrey A Law (law@cygnus.com)
329 * gencode.c (write_opcodes): Also write out the format of the
331 * mn10300_sim.h (simops): Add "format" field.
332 * interp.c (sim_resume): Deal with endianness issues here.
334 Tue Dec 10 15:05:37 1996 Jeffrey A Law (law@cygnus.com)
336 * simops.c (REG0_4): Define.
337 Use REG0_4 for indexed loads/stores.
339 Sat Dec 7 09:50:28 1996 Jeffrey A Law (law@cygnus.com)
341 * simops.c (REG0_16): Fix typo.
343 Fri Dec 6 14:13:34 1996 Jeffrey A Law (law@cygnus.com)
345 * simops.c: Call abort for any instruction that's not currently
348 * simops.c: Define accessor macros to extract register
349 values from instructions. Use them consistently.
351 * interp.c: Delete unused global variable "OP".
352 (sim_resume): Remove unused variable "opcode".
353 * simops.c: Fix some uninitialized variable problems, add
354 parens to fix various -Wall warnings.
356 * gencode.c (write_header): Add "insn" and "extension" arguments
357 to the OP_* declarations.
358 (write_template): Similarly for function templates.
359 * interp.c (insn, extension): Remove global variables. Instead
360 pass them as arguments to the OP_* functions.
361 * mn10300_sim.h: Remove decls for "insn" and "extension".
362 * simops.c (OP_*): Accept "insn" and "extension" as arguments
363 instead of using globals.
365 Thu Dec 5 22:26:31 1996 Jeffrey A Law (law@cygnus.com)
367 * simops.c: Fix typos in "mov am,(d16,an)" and "mov am,(d32,an)"
369 * simops.c: Fix thinkos in last change to "inc dn".
371 Wed Dec 4 10:57:53 1996 Jeffrey A Law (law@cygnus.com)
373 * simops.c: "add imm,sp" does not effect the condition codes.
374 "inc dn" does effect the condition codes.
376 Tue Dec 3 17:37:45 1996 Jeffrey A Law (law@cygnus.com)
378 * simops.c: Treat both operands as signed values for
381 * simops.c: Fix simulation of division instructions.
382 Fix typos/thinkos in several "cmp" and "sub" instructions.
384 Mon Dec 2 12:31:40 1996 Jeffrey A Law (law@cygnus.com)
386 * simops.c: Fix carry bit handling in "sub" and "cmp"
389 * simops.c: Fix "mov imm8,an" and "mov imm16,dn".
391 Sun Dec 1 16:05:42 1996 Jeffrey A Law (law@cygnus.com)
393 * simops.c: Fix overflow computation for many instructions.
395 * simops.c: Fix "mov dm, an", "movbu dm, (an)", and "movhu dm, (an)".
397 * simops.c: Fix "mov am, dn".
399 * simops.c: Fix more bugs in "add imm,an" and
402 Wed Nov 27 09:20:42 1996 Jeffrey A Law (law@cygnus.com)
404 * simops.c: Fix bugs in "movm" and "add imm,an".
406 * simops.c: Don't lose the upper 24 bits of the return
407 pointer in "call" and "calls" instructions. Rough cut
408 at emulated system calls.
410 * simops.c: Implement the remaining 5, 6 and 7 byte instructions.
412 * simops.c: Implement remaining 4 byte instructions.
414 * simops.c: Implement remaining 3 byte instructions.
416 * simops.c: Implement remaining 2 byte instructions. Call
417 abort for instructions we're not implementing now.
419 Tue Nov 26 15:43:41 1996 Jeffrey A Law (law@cygnus.com)
421 * simops.c: Implement lots of random instructions.
423 * simops.c: Implement "movm" and "bCC" insns.
425 * mn10300_sim.h (_state): Add another register (MDR).
427 * simops.c: Implement "cmp", "calls", "rets", "jmp" and
428 a few additional random insns.
430 * mn10300_sim.h (PSW_*): Define for CC status tracking.
431 (REG_D0, REG_A0, REG_SP): Define.
432 * simops.c: Implement "add", "addc" and a few other random
435 * gencode.c, interp.c: Snapshot current simulator code.
437 Mon Nov 25 12:46:38 1996 Jeffrey A Law (law@cygnus.com)
439 * Makefile.in, config.in, configure, configure.in: New files.
440 * gencode.c, interp.c, mn10300_sim.h, simops.c: New files.