sim/mn10300/ChangeLog

   1 Thu Sep  4 17:21:23 1997  Doug Evans  <dje@seba>
   2
   3         * configure: Regenerated to track ../common/aclocal.m4 changes.
   4
   5 Wed Aug 27 18:13:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
   6
   7         * configure: Regenerated to track ../common/aclocal.m4 changes.
   8         * config.in: Ditto.
   9
  10 Tue Aug 26 10:41:07 1997  Andrew Cagney  <cagney@b1.cygnus.com>
  11
  12         * interp.c (sim_kill): Delete.
  13         (sim_create_inferior): Add ABFD argument.
  14         (sim_load): Move setting of PC from here.
  15         (sim_create_inferior): To here.
  16
  17 Mon Aug 25 17:50:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
  18
  19         * configure: Regenerated to track ../common/aclocal.m4 changes.
  20         * config.in: Ditto.
  21
  22 Mon Aug 25 16:14:44 1997  Andrew Cagney  <cagney@b1.cygnus.com>
  23
  24         * interp.c (sim_open): Add ABFD argument.
  25
  26 Tue Jun 24 13:46:20 1997  Jeffrey A Law  (law@cygnus.com)
  27
  28         * interp.c (sim_resume): Clear State.exited.
  29         (sim_stop_reason): If State.exited is nonzero, then indicate that
  30         the simulator exited instead of stopped.
  31         * mn10300_sim.h (struct _state): Add exited field.
  32         * simops.c (syscall): Set State.exited for SYS_exit.
  33
  34 Wed Jun 11 22:07:56 1997  Jeffrey A Law  (law@cygnus.com)
  35
  36         * simops.c: Fix thinko in last change.
  37
  38 Tue Jun 10 12:31:32 1997  Jeffrey A Law  (law@cygnus.com)
  39
  40         * simops.c: "call" stores the callee saved registers into the
  41         stack!  Update the stack pointer properly when done with
  42         register saves.
  43
  44         * simops.c: Fix return address computation for "call" instructions.
  45
  46 Thu May 22 01:43:11 1997  Jeffrey A Law  (law@cygnus.com)
  47
  48         * interp.c (sim_open): Fix typo.
  49
  50 Wed May 21 23:27:58 1997  Jeffrey A Law  (law@cygnus.com)
  51
  52         * interp.c (sim_resume): Add missing case in big switch
  53         statement (for extb instruction).
  54
  55 Tue May 20 17:51:30 1997  Jeffrey A Law  (law@cygnus.com)
  56
  57         * interp.c: Replace all references to load_mem and store_mem
  58         with references to load_byte, load_half, load_3_byte, load_word
  59         and store_byte, store_half, store_3_byte, store_word.
  60         (INLINE): Delete definition.
  61         (load_mem_big): Likewise.
  62         (max_mem): Make it global.
  63         (dispatch): Make this function inline.
  64         (load_mem, store_mem): Delete functions.
  65         * mn10300_sim.h (INLINE): Define.
  66         (RLW): Delete unused definition.
  67         (load_mem, store_mem): Delete declarations.
  68         (load_mem_big): New definition.
  69         (load_byte, load_half, load_3_byte, load_word): New functions.
  70         (store_byte, store_half, store_3_byte, store_word): New functions.
  71         * simops.c:  Replace all references to load_mem and store_mem
  72         with references to load_byte, load_half, load_3_byte, load_word
  73         and store_byte, store_half, store_3_byte, store_word.
  74
  75 Tue May 20 10:21:51 1997  Andrew Cagney  <cagney@b1.cygnus.com>
  76
  77         * interp.c (sim_open): Add callback to arguments.
  78         (sim_set_callbacks): Delete SIM_DESC argument.
  79
  80 Mon May 19 13:54:22 1997  Jeffrey A Law  (law@cygnus.com)
  81
  82         * interp.c (dispatch): Make this an inline function.
  83
  84         * simops.c (syscall): Use callback->write regardless of
  85         what file descriptor we're writing too.
  86
  87 Sun May 18 16:46:31 1997  Jeffrey A Law  (law@cygnus.com)
  88
  89         * interp.c (load_mem_big): Remove function.  It's now a macro
  90         defined elsewhere.
  91         (compare_simops): New function.
  92         (sim_open): Sort the Simops table before inserting entries
  93         into the hash table.
  94         * mn10300_sim.h: Remove unused #defines.
  95         (load_mem_big): Define.
  96
  97 Fri May 16 16:36:17 1997  Jeffrey A Law  (law@cygnus.com)
  98
  99         * interp.c (load_mem): If we get a load from an out of range
 100         address, abort.
 101         (store_mem): Likewise for stores.
 102         (max_mem): New variable.
 103
 104 Tue May  6 13:24:36 1997  Jeffrey A Law  (law@cygnus.com)
 105
 106         * mn10300_sim.h: Fix ordering of bits in the PSW.
 107
 108         * interp.c: Improve hashing routine to avoid long list
 109         traversals for common instructions.  Add HASH_STAT support.
 110         Rewrite opcode dispatch code using a big switch instead of
 111         cascaded if/else statements.  Avoid useless calls to load_mem.
 112
 113 Mon May  5 18:07:48 1997  Jeffrey A Law  (law@cygnus.com)
 114
 115         * mn10300_sim.h (struct _state): Add space for mdrq register.
 116         (REG_MDRQ): Define.
 117         * simops.c: Don't abort for trap.  Add support for the extended
 118         instructions, "getx", "putx", "mulq", "mulqu", "sat16", "sat24",
 119         and "bsch".
 120
 121 Thu Apr 24 00:39:51 1997  Doug Evans  <dje@canuck.cygnus.com>
 122
 123         * configure: Regenerated to track ../common/aclocal.m4 changes.
 124
 125 Fri Apr 18 14:04:04 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 126
 127         * interp.c (sim_stop): Add stub function.
 128
 129 Thu Apr 17 03:26:59 1997  Doug Evans  <dje@canuck.cygnus.com>
 130
 131         * Makefile.in (SIM_OBJS): Add sim-load.o.
 132         * interp.c (sim_kind, myname): New static locals.
 133         (sim_open): Set sim_kind, myname.  Ignore -E arg.
 134         (sim_load): Return SIM_RC.  New arg abfd.  Call sim_load_file to
 135         load file into simulator.  Set start address from bfd.
 136         (sim_create_inferior): Return SIM_RC.  Delete arg start_address.
 137
 138 Wed Apr 16 19:30:44 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 139
 140         * simops.c (OP_F020): SYS_execv, SYS_time, SYS_times, SYS_utime
 141         only include if implemented by host.
 142         (OP_F020): Typecast arg passed to time function;
 143
 144 Mon Apr  7 23:57:49 1997  Jeffrey A Law  (law@cygnus.com)
 145
 146         * simops.c (syscall): Handle new mn10300 calling conventions.
 147
 148 Mon Apr  7 15:45:02 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
 149
 150         * configure: Regenerated to track ../common/aclocal.m4 changes.
 151         * config.in: Ditto.
 152
 153 Fri Apr  4 20:02:37 1997  Ian Lance Taylor  <ian@cygnus.com>
 154
 155         * Makefile.in: Change mn10300-opc.o to m10300-opc.o, to match
 156         corresponding change in opcodes directory.
 157
 158 Wed Apr  2 15:06:28 1997  Doug Evans  <dje@canuck.cygnus.com>
 159
 160         * interp.c (sim_open): New arg `kind'.
 161
 162         * configure: Regenerated to track ../common/aclocal.m4 changes.
 163
 164 Wed Apr  2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
 165
 166         * configure: Regenerated to track ../common/aclocal.m4 changes.
 167
 168 Thu Mar 20 11:58:02 1997  Jeffrey A Law  (law@cygnus.com)
 169
 170         * simops.c: Fix register extraction for a two "movbu" variants.
 171         Somewhat simplify "sub" instructions.
 172         Correctly sign extend operands for "mul".  Put the correct
 173         half of the result in MDR for "mul" and "mulu".
 174         Implement remaining instructions.
 175         Tweak opcode for "syscall".
 176
 177 Tue Mar 18 14:21:21 1997  Jeffrey A Law  (law@cygnus.com)
 178
 179         * simops.c: Do syscall emulation in "syscall" instruction.  Add
 180         dummy "trap" instruction.
 181
 182 Wed Mar 19 01:14:00 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
 183
 184         * configure: Regenerated to track ../common/aclocal.m4 changes.
 185
 186 Mon Mar 17 15:10:07 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
 187
 188         * configure: Re-generate.
 189
 190 Fri Mar 14 10:34:11 1997  Michael Meissner  <meissner@cygnus.com>
 191
 192         * configure: Regenerate to track ../common/aclocal.m4 changes.
 193
 194 Thu Mar 13 12:54:45 1997  Doug Evans  <dje@canuck.cygnus.com>
 195
 196         * interp.c (sim_open): New SIM_DESC result.  Argument is now
 197         in argv form.
 198         (other sim_*): New SIM_DESC argument.
 199
 200 Wed Mar 12 15:04:00 1997  Jeffrey A Law  (law@cygnus.com)
 201
 202         * simops.c: Fix carry bit computation for "add" instructions.
 203
 204         * simops.c: Fix typos in bset insns.  Fix arguments to store_mem
 205         for bset imm8,(d8,an) and bclr imm8,(d8,an).
 206
 207 Wed Mar  5 15:00:10 1997  Jeffrey A Law  (law@cygnus.com)
 208
 209         * simops.c: Fix register references when computing Z and N bits
 210         for lsr imm8,dn.
 211
 212 Tue Feb  4 13:33:30 1997  Doug Evans  <dje@canuck.cygnus.com>
 213
 214         * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
 215         COMMON_{PRE,POST}_CONFIG_FRAG instead.
 216         * configure.in: sinclude ../common/aclocal.m4.
 217         * configure: Regenerated.
 218
 219 Fri Jan 24 10:47:25 1997  Jeffrey A Law  (law@cygnus.com)
 220
 221         * interp.c (init_system): Allocate 2^19 bytes of space for the
 222         simulator.
 223
 224 Thu Jan 23 11:46:23 1997  Stu Grossman  (grossman@critters.cygnus.com)
 225
 226         * configure configure.in Makefile.in:  Update to new configure
 227         scheme which is more compatible with WinGDB builds.
 228         * configure.in:  Improve comment on how to run autoconf.
 229         * configure:  Re-run autoconf to get new ../common/aclocal.m4.
 230         * Makefile.in:  Use autoconf substitution to install common
 231         makefile fragment.
 232
 233 Tue Jan 21 15:03:04 1997  Jeffrey A Law  (law@cygnus.com)
 234
 235         * simops.c: Undo last change to "rol" and "ror", original code
 236         was correct!
 237
 238 Thu Jan 16 11:28:14 1997  Jeffrey A Law  (law@cygnus.com)
 239
 240         * simops.c: Fix "rol" and "ror".
 241
 242 Wed Jan 15 06:45:58 1997  Jeffrey A Law  (law@cygnus.com)
 243
 244         * simops.c: Fix typo in last change.
 245
 246 Mon Jan 13 13:22:35 1997  Jeffrey A Law  (law@cygnus.com)
 247
 248         * simops.c: Use REG macros in few places not using them yet.
 249
 250 Mon Jan  6 16:21:19 1997  Jeffrey A Law  (law@cygnus.com)
 251
 252         * mn10300_sim.h (struct _state): Fix number of registers!
 253
 254 Tue Dec 31 16:20:41 1996  Jeffrey A Law  (law@cygnus.com)
 255
 256         * mn10300_sim.h (struct _state): Put all registers into a single
 257         array to make gdb implementation easier.
 258         (REG_*): Add definitions for all registers in the state array.
 259         (SEXT32, SEXT40, SEXT44, SEXT60): Remove unused macros.
 260         * simops.c: Related changes.
 261
 262 Wed Dec 18 10:10:45 1996  Jeffrey A Law  (law@cygnus.com)
 263
 264         * interp.c (sim_resume): Handle 0xff as a single byte insn.
 265
 266         * simops.c: Fix overflow computation for "add" and "inc"
 267         instructions.
 268
 269 Mon Dec 16 10:03:52 1996  Jeffrey A Law  (law@cygnus.com)
 270
 271         * simops.c: Handle "break" instruction.
 272
 273         * simops.c: Fix restoring the PC for "ret" and "retf" instructions.
 274
 275 Wed Dec 11 09:53:10 1996  Jeffrey A Law  (law@cygnus.com)
 276
 277         * gencode.c (write_opcodes): Also write out the format of the
 278         opcode.
 279         * mn10300_sim.h (simops): Add "format" field.
 280         * interp.c (sim_resume): Deal with endianness issues here.
 281
 282 Tue Dec 10 15:05:37 1996  Jeffrey A Law  (law@cygnus.com)
 283
 284         * simops.c (REG0_4): Define.
 285         Use REG0_4 for indexed loads/stores.
 286
 287 Sat Dec  7 09:50:28 1996  Jeffrey A Law  (law@cygnus.com)
 288
 289         * simops.c (REG0_16): Fix typo.
 290
 291 Fri Dec  6 14:13:34 1996  Jeffrey A Law  (law@cygnus.com)
 292
 293         * simops.c: Call abort for any instruction that's not currently
 294         simulated.
 295
 296         * simops.c: Define accessor macros to extract register
 297         values from instructions.  Use them consistently.
 298
 299         * interp.c: Delete unused global variable "OP".
 300         (sim_resume): Remove unused variable "opcode".
 301         * simops.c: Fix some uninitialized variable problems, add
 302         parens to fix various -Wall warnings.
 303
 304         * gencode.c (write_header): Add "insn" and "extension" arguments
 305         to the OP_* declarations.
 306         (write_template): Similarly for function templates.
 307         * interp.c (insn, extension): Remove global variables.  Instead
 308         pass them as arguments to the OP_* functions.
 309         * mn10300_sim.h: Remove decls for "insn" and "extension".
 310         * simops.c (OP_*): Accept "insn" and "extension" as arguments
 311         instead of using globals.
 312
 313 Thu Dec  5 22:26:31 1996  Jeffrey A Law  (law@cygnus.com)
 314
 315         * simops.c: Fix typos in "mov am,(d16,an)" and "mov am,(d32,an)"
 316
 317         * simops.c: Fix thinkos in last change to "inc dn".
 318
 319 Wed Dec  4 10:57:53 1996  Jeffrey A Law  (law@cygnus.com)
 320
 321         * simops.c: "add imm,sp" does not effect the condition codes.
 322         "inc dn" does effect the condition codes.
 323
 324 Tue Dec  3 17:37:45 1996  Jeffrey A Law  (law@cygnus.com)
 325
 326         * simops.c: Treat both operands as signed values for
 327         "div" instruction.
 328
 329         * simops.c: Fix simulation of division instructions.
 330         Fix typos/thinkos in several "cmp" and "sub" instructions.
 331
 332 Mon Dec  2 12:31:40 1996  Jeffrey A Law  (law@cygnus.com)
 333
 334         * simops.c: Fix carry bit handling in "sub" and "cmp"
 335         instructions.
 336
 337         * simops.c: Fix "mov imm8,an" and "mov imm16,dn".
 338
 339 Sun Dec  1 16:05:42 1996  Jeffrey A Law  (law@cygnus.com)
 340
 341         * simops.c: Fix overflow computation for many instructions.
 342
 343         * simops.c: Fix "mov dm, an", "movbu dm, (an)", and "movhu dm, (an)".
 344
 345         * simops.c: Fix "mov am, dn".
 346
 347         * simops.c: Fix more bugs in "add imm,an" and
 348         "add imm,dn".
 349
 350 Wed Nov 27 09:20:42 1996  Jeffrey A Law  (law@cygnus.com)
 351
 352         * simops.c: Fix bugs in "movm" and "add imm,an".
 353
 354         * simops.c: Don't lose the upper 24 bits of the return
 355         pointer in "call" and "calls" instructions.  Rough cut
 356         at emulated system calls.
 357
 358         * simops.c: Implement the remaining 5, 6 and 7 byte instructions.
 359
 360         * simops.c: Implement remaining 4 byte instructions.
 361
 362         * simops.c: Implement remaining 3 byte instructions.
 363
 364         * simops.c: Implement remaining 2 byte instructions.  Call
 365         abort for instructions we're not implementing now.
 366
 367 Tue Nov 26 15:43:41 1996  Jeffrey A Law  (law@cygnus.com)
 368
 369         * simops.c: Implement lots of random instructions.
 370
 371         * simops.c: Implement "movm" and "bCC" insns.
 372
 373         * mn10300_sim.h (_state): Add another register (MDR).
 374         (REG_MDR): Define.
 375         * simops.c: Implement "cmp", "calls", "rets", "jmp" and
 376         a few additional random insns.
 377
 378         * mn10300_sim.h (PSW_*): Define for CC status tracking.
 379         (REG_D0, REG_A0, REG_SP): Define.
 380         * simops.c: Implement "add", "addc" and a few other random
 381         instructions.
 382
 383         * gencode.c, interp.c: Snapshot current simulator code.
 384
 385 Mon Nov 25 12:46:38 1996  Jeffrey A Law  (law@cygnus.com)
 386
 387         * Makefile.in, config.in, configure, configure.in: New files.
 388         * gencode.c, interp.c, mn10300_sim.h, simops.c: New files.
 389