* simops.c: Include sim-types.h.
[deliverable/binutils-gdb.git] / sim / mn10300 / ChangeLog
1 Sun Feb 22 16:02:24 1998 Jeffrey A Law (law@cygnus.com)
2
3 * simops.c: Include sim-types.h.
4
5 Wed Feb 18 13:07:08 1998 Jeffrey A Law (law@cygnus.com)
6
7 * simops.c (multiply instructions): Cast input operands to a
8 signed64/unsigned64 type as appropriate.
9
10 Tue Feb 17 12:47:16 1998 Andrew Cagney <cagney@b1.cygnus.com>
11
12 * interp.c (sim_store_register, sim_fetch_register): Pass in
13 length parameter. Return -1.
14
15 Sun Feb 1 16:47:51 1998 Andrew Cagney <cagney@b1.cygnus.com>
16
17 * configure: Regenerated to track ../common/aclocal.m4 changes.
18
19 Sat Jan 31 18:15:41 1998 Andrew Cagney <cagney@b1.cygnus.com>
20
21 * configure: Regenerated to track ../common/aclocal.m4 changes.
22
23 Mon Jan 19 22:26:29 1998 Doug Evans <devans@seba>
24
25 * configure: Regenerated to track ../common/aclocal.m4 changes.
26
27 Mon Dec 15 23:17:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
28
29 * configure: Regenerated to track ../common/aclocal.m4 changes.
30 * config.in: Ditto.
31
32 Thu Dec 4 09:21:05 1997 Doug Evans <devans@canuck.cygnus.com>
33
34 * configure: Regenerated to track ../common/aclocal.m4 changes.
35
36 Tue Nov 11 10:38:52 1997 Jeffrey A Law (law@cygnus.com)
37
38 * simops.c (call:16 call:32): Stack adjustment is determined solely
39 by the imm8 field.
40
41 Wed Oct 22 14:43:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
42
43 * interp.c (sim_load): Pass lma_p and sim_write args to
44 sim_load_file.
45
46 Tue Oct 21 10:12:03 1997 Jeffrey A Law (law@cygnus.com)
47
48 * simops.c: Correctly handle register restores for "ret" and "retf"
49 instructions.
50
51 Fri Oct 3 09:28:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
52
53 * configure: Regenerated to track ../common/aclocal.m4 changes.
54
55 Wed Sep 24 17:38:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
56
57 * configure: Regenerated to track ../common/aclocal.m4 changes.
58
59 Tue Sep 23 11:04:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
60
61 * configure: Regenerated to track ../common/aclocal.m4 changes.
62
63 Mon Sep 22 11:46:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
64
65 * configure: Regenerated to track ../common/aclocal.m4 changes.
66
67 Fri Sep 19 17:45:25 1997 Andrew Cagney <cagney@b1.cygnus.com>
68
69 * configure: Regenerated to track ../common/aclocal.m4 changes.
70
71 Mon Sep 15 17:36:15 1997 Andrew Cagney <cagney@b1.cygnus.com>
72
73 * configure: Regenerated to track ../common/aclocal.m4 changes.
74
75 Thu Sep 4 17:21:23 1997 Doug Evans <dje@seba>
76
77 * configure: Regenerated to track ../common/aclocal.m4 changes.
78
79 Wed Aug 27 18:13:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
80
81 * configure: Regenerated to track ../common/aclocal.m4 changes.
82 * config.in: Ditto.
83
84 Tue Aug 26 10:41:07 1997 Andrew Cagney <cagney@b1.cygnus.com>
85
86 * interp.c (sim_kill): Delete.
87 (sim_create_inferior): Add ABFD argument.
88 (sim_load): Move setting of PC from here.
89 (sim_create_inferior): To here.
90
91 Mon Aug 25 17:50:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
92
93 * configure: Regenerated to track ../common/aclocal.m4 changes.
94 * config.in: Ditto.
95
96 Mon Aug 25 16:14:44 1997 Andrew Cagney <cagney@b1.cygnus.com>
97
98 * interp.c (sim_open): Add ABFD argument.
99
100 Tue Jun 24 13:46:20 1997 Jeffrey A Law (law@cygnus.com)
101
102 * interp.c (sim_resume): Clear State.exited.
103 (sim_stop_reason): If State.exited is nonzero, then indicate that
104 the simulator exited instead of stopped.
105 * mn10300_sim.h (struct _state): Add exited field.
106 * simops.c (syscall): Set State.exited for SYS_exit.
107
108 Wed Jun 11 22:07:56 1997 Jeffrey A Law (law@cygnus.com)
109
110 * simops.c: Fix thinko in last change.
111
112 Tue Jun 10 12:31:32 1997 Jeffrey A Law (law@cygnus.com)
113
114 * simops.c: "call" stores the callee saved registers into the
115 stack! Update the stack pointer properly when done with
116 register saves.
117
118 * simops.c: Fix return address computation for "call" instructions.
119
120 Thu May 22 01:43:11 1997 Jeffrey A Law (law@cygnus.com)
121
122 * interp.c (sim_open): Fix typo.
123
124 Wed May 21 23:27:58 1997 Jeffrey A Law (law@cygnus.com)
125
126 * interp.c (sim_resume): Add missing case in big switch
127 statement (for extb instruction).
128
129 Tue May 20 17:51:30 1997 Jeffrey A Law (law@cygnus.com)
130
131 * interp.c: Replace all references to load_mem and store_mem
132 with references to load_byte, load_half, load_3_byte, load_word
133 and store_byte, store_half, store_3_byte, store_word.
134 (INLINE): Delete definition.
135 (load_mem_big): Likewise.
136 (max_mem): Make it global.
137 (dispatch): Make this function inline.
138 (load_mem, store_mem): Delete functions.
139 * mn10300_sim.h (INLINE): Define.
140 (RLW): Delete unused definition.
141 (load_mem, store_mem): Delete declarations.
142 (load_mem_big): New definition.
143 (load_byte, load_half, load_3_byte, load_word): New functions.
144 (store_byte, store_half, store_3_byte, store_word): New functions.
145 * simops.c: Replace all references to load_mem and store_mem
146 with references to load_byte, load_half, load_3_byte, load_word
147 and store_byte, store_half, store_3_byte, store_word.
148
149 Tue May 20 10:21:51 1997 Andrew Cagney <cagney@b1.cygnus.com>
150
151 * interp.c (sim_open): Add callback to arguments.
152 (sim_set_callbacks): Delete SIM_DESC argument.
153
154 Mon May 19 13:54:22 1997 Jeffrey A Law (law@cygnus.com)
155
156 * interp.c (dispatch): Make this an inline function.
157
158 * simops.c (syscall): Use callback->write regardless of
159 what file descriptor we're writing too.
160
161 Sun May 18 16:46:31 1997 Jeffrey A Law (law@cygnus.com)
162
163 * interp.c (load_mem_big): Remove function. It's now a macro
164 defined elsewhere.
165 (compare_simops): New function.
166 (sim_open): Sort the Simops table before inserting entries
167 into the hash table.
168 * mn10300_sim.h: Remove unused #defines.
169 (load_mem_big): Define.
170
171 Fri May 16 16:36:17 1997 Jeffrey A Law (law@cygnus.com)
172
173 * interp.c (load_mem): If we get a load from an out of range
174 address, abort.
175 (store_mem): Likewise for stores.
176 (max_mem): New variable.
177
178 Tue May 6 13:24:36 1997 Jeffrey A Law (law@cygnus.com)
179
180 * mn10300_sim.h: Fix ordering of bits in the PSW.
181
182 * interp.c: Improve hashing routine to avoid long list
183 traversals for common instructions. Add HASH_STAT support.
184 Rewrite opcode dispatch code using a big switch instead of
185 cascaded if/else statements. Avoid useless calls to load_mem.
186
187 Mon May 5 18:07:48 1997 Jeffrey A Law (law@cygnus.com)
188
189 * mn10300_sim.h (struct _state): Add space for mdrq register.
190 (REG_MDRQ): Define.
191 * simops.c: Don't abort for trap. Add support for the extended
192 instructions, "getx", "putx", "mulq", "mulqu", "sat16", "sat24",
193 and "bsch".
194
195 Thu Apr 24 00:39:51 1997 Doug Evans <dje@canuck.cygnus.com>
196
197 * configure: Regenerated to track ../common/aclocal.m4 changes.
198
199 Fri Apr 18 14:04:04 1997 Andrew Cagney <cagney@b1.cygnus.com>
200
201 * interp.c (sim_stop): Add stub function.
202
203 Thu Apr 17 03:26:59 1997 Doug Evans <dje@canuck.cygnus.com>
204
205 * Makefile.in (SIM_OBJS): Add sim-load.o.
206 * interp.c (sim_kind, myname): New static locals.
207 (sim_open): Set sim_kind, myname. Ignore -E arg.
208 (sim_load): Return SIM_RC. New arg abfd. Call sim_load_file to
209 load file into simulator. Set start address from bfd.
210 (sim_create_inferior): Return SIM_RC. Delete arg start_address.
211
212 Wed Apr 16 19:30:44 1997 Andrew Cagney <cagney@b1.cygnus.com>
213
214 * simops.c (OP_F020): SYS_execv, SYS_time, SYS_times, SYS_utime
215 only include if implemented by host.
216 (OP_F020): Typecast arg passed to time function;
217
218 Mon Apr 7 23:57:49 1997 Jeffrey A Law (law@cygnus.com)
219
220 * simops.c (syscall): Handle new mn10300 calling conventions.
221
222 Mon Apr 7 15:45:02 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
223
224 * configure: Regenerated to track ../common/aclocal.m4 changes.
225 * config.in: Ditto.
226
227 Fri Apr 4 20:02:37 1997 Ian Lance Taylor <ian@cygnus.com>
228
229 * Makefile.in: Change mn10300-opc.o to m10300-opc.o, to match
230 corresponding change in opcodes directory.
231
232 Wed Apr 2 15:06:28 1997 Doug Evans <dje@canuck.cygnus.com>
233
234 * interp.c (sim_open): New arg `kind'.
235
236 * configure: Regenerated to track ../common/aclocal.m4 changes.
237
238 Wed Apr 2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
239
240 * configure: Regenerated to track ../common/aclocal.m4 changes.
241
242 Thu Mar 20 11:58:02 1997 Jeffrey A Law (law@cygnus.com)
243
244 * simops.c: Fix register extraction for a two "movbu" variants.
245 Somewhat simplify "sub" instructions.
246 Correctly sign extend operands for "mul". Put the correct
247 half of the result in MDR for "mul" and "mulu".
248 Implement remaining instructions.
249 Tweak opcode for "syscall".
250
251 Tue Mar 18 14:21:21 1997 Jeffrey A Law (law@cygnus.com)
252
253 * simops.c: Do syscall emulation in "syscall" instruction. Add
254 dummy "trap" instruction.
255
256 Wed Mar 19 01:14:00 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
257
258 * configure: Regenerated to track ../common/aclocal.m4 changes.
259
260 Mon Mar 17 15:10:07 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
261
262 * configure: Re-generate.
263
264 Fri Mar 14 10:34:11 1997 Michael Meissner <meissner@cygnus.com>
265
266 * configure: Regenerate to track ../common/aclocal.m4 changes.
267
268 Thu Mar 13 12:54:45 1997 Doug Evans <dje@canuck.cygnus.com>
269
270 * interp.c (sim_open): New SIM_DESC result. Argument is now
271 in argv form.
272 (other sim_*): New SIM_DESC argument.
273
274 Wed Mar 12 15:04:00 1997 Jeffrey A Law (law@cygnus.com)
275
276 * simops.c: Fix carry bit computation for "add" instructions.
277
278 * simops.c: Fix typos in bset insns. Fix arguments to store_mem
279 for bset imm8,(d8,an) and bclr imm8,(d8,an).
280
281 Wed Mar 5 15:00:10 1997 Jeffrey A Law (law@cygnus.com)
282
283 * simops.c: Fix register references when computing Z and N bits
284 for lsr imm8,dn.
285
286 Tue Feb 4 13:33:30 1997 Doug Evans <dje@canuck.cygnus.com>
287
288 * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
289 COMMON_{PRE,POST}_CONFIG_FRAG instead.
290 * configure.in: sinclude ../common/aclocal.m4.
291 * configure: Regenerated.
292
293 Fri Jan 24 10:47:25 1997 Jeffrey A Law (law@cygnus.com)
294
295 * interp.c (init_system): Allocate 2^19 bytes of space for the
296 simulator.
297
298 Thu Jan 23 11:46:23 1997 Stu Grossman (grossman@critters.cygnus.com)
299
300 * configure configure.in Makefile.in: Update to new configure
301 scheme which is more compatible with WinGDB builds.
302 * configure.in: Improve comment on how to run autoconf.
303 * configure: Re-run autoconf to get new ../common/aclocal.m4.
304 * Makefile.in: Use autoconf substitution to install common
305 makefile fragment.
306
307 Tue Jan 21 15:03:04 1997 Jeffrey A Law (law@cygnus.com)
308
309 * simops.c: Undo last change to "rol" and "ror", original code
310 was correct!
311
312 Thu Jan 16 11:28:14 1997 Jeffrey A Law (law@cygnus.com)
313
314 * simops.c: Fix "rol" and "ror".
315
316 Wed Jan 15 06:45:58 1997 Jeffrey A Law (law@cygnus.com)
317
318 * simops.c: Fix typo in last change.
319
320 Mon Jan 13 13:22:35 1997 Jeffrey A Law (law@cygnus.com)
321
322 * simops.c: Use REG macros in few places not using them yet.
323
324 Mon Jan 6 16:21:19 1997 Jeffrey A Law (law@cygnus.com)
325
326 * mn10300_sim.h (struct _state): Fix number of registers!
327
328 Tue Dec 31 16:20:41 1996 Jeffrey A Law (law@cygnus.com)
329
330 * mn10300_sim.h (struct _state): Put all registers into a single
331 array to make gdb implementation easier.
332 (REG_*): Add definitions for all registers in the state array.
333 (SEXT32, SEXT40, SEXT44, SEXT60): Remove unused macros.
334 * simops.c: Related changes.
335
336 Wed Dec 18 10:10:45 1996 Jeffrey A Law (law@cygnus.com)
337
338 * interp.c (sim_resume): Handle 0xff as a single byte insn.
339
340 * simops.c: Fix overflow computation for "add" and "inc"
341 instructions.
342
343 Mon Dec 16 10:03:52 1996 Jeffrey A Law (law@cygnus.com)
344
345 * simops.c: Handle "break" instruction.
346
347 * simops.c: Fix restoring the PC for "ret" and "retf" instructions.
348
349 Wed Dec 11 09:53:10 1996 Jeffrey A Law (law@cygnus.com)
350
351 * gencode.c (write_opcodes): Also write out the format of the
352 opcode.
353 * mn10300_sim.h (simops): Add "format" field.
354 * interp.c (sim_resume): Deal with endianness issues here.
355
356 Tue Dec 10 15:05:37 1996 Jeffrey A Law (law@cygnus.com)
357
358 * simops.c (REG0_4): Define.
359 Use REG0_4 for indexed loads/stores.
360
361 Sat Dec 7 09:50:28 1996 Jeffrey A Law (law@cygnus.com)
362
363 * simops.c (REG0_16): Fix typo.
364
365 Fri Dec 6 14:13:34 1996 Jeffrey A Law (law@cygnus.com)
366
367 * simops.c: Call abort for any instruction that's not currently
368 simulated.
369
370 * simops.c: Define accessor macros to extract register
371 values from instructions. Use them consistently.
372
373 * interp.c: Delete unused global variable "OP".
374 (sim_resume): Remove unused variable "opcode".
375 * simops.c: Fix some uninitialized variable problems, add
376 parens to fix various -Wall warnings.
377
378 * gencode.c (write_header): Add "insn" and "extension" arguments
379 to the OP_* declarations.
380 (write_template): Similarly for function templates.
381 * interp.c (insn, extension): Remove global variables. Instead
382 pass them as arguments to the OP_* functions.
383 * mn10300_sim.h: Remove decls for "insn" and "extension".
384 * simops.c (OP_*): Accept "insn" and "extension" as arguments
385 instead of using globals.
386
387 Thu Dec 5 22:26:31 1996 Jeffrey A Law (law@cygnus.com)
388
389 * simops.c: Fix typos in "mov am,(d16,an)" and "mov am,(d32,an)"
390
391 * simops.c: Fix thinkos in last change to "inc dn".
392
393 Wed Dec 4 10:57:53 1996 Jeffrey A Law (law@cygnus.com)
394
395 * simops.c: "add imm,sp" does not effect the condition codes.
396 "inc dn" does effect the condition codes.
397
398 Tue Dec 3 17:37:45 1996 Jeffrey A Law (law@cygnus.com)
399
400 * simops.c: Treat both operands as signed values for
401 "div" instruction.
402
403 * simops.c: Fix simulation of division instructions.
404 Fix typos/thinkos in several "cmp" and "sub" instructions.
405
406 Mon Dec 2 12:31:40 1996 Jeffrey A Law (law@cygnus.com)
407
408 * simops.c: Fix carry bit handling in "sub" and "cmp"
409 instructions.
410
411 * simops.c: Fix "mov imm8,an" and "mov imm16,dn".
412
413 Sun Dec 1 16:05:42 1996 Jeffrey A Law (law@cygnus.com)
414
415 * simops.c: Fix overflow computation for many instructions.
416
417 * simops.c: Fix "mov dm, an", "movbu dm, (an)", and "movhu dm, (an)".
418
419 * simops.c: Fix "mov am, dn".
420
421 * simops.c: Fix more bugs in "add imm,an" and
422 "add imm,dn".
423
424 Wed Nov 27 09:20:42 1996 Jeffrey A Law (law@cygnus.com)
425
426 * simops.c: Fix bugs in "movm" and "add imm,an".
427
428 * simops.c: Don't lose the upper 24 bits of the return
429 pointer in "call" and "calls" instructions. Rough cut
430 at emulated system calls.
431
432 * simops.c: Implement the remaining 5, 6 and 7 byte instructions.
433
434 * simops.c: Implement remaining 4 byte instructions.
435
436 * simops.c: Implement remaining 3 byte instructions.
437
438 * simops.c: Implement remaining 2 byte instructions. Call
439 abort for instructions we're not implementing now.
440
441 Tue Nov 26 15:43:41 1996 Jeffrey A Law (law@cygnus.com)
442
443 * simops.c: Implement lots of random instructions.
444
445 * simops.c: Implement "movm" and "bCC" insns.
446
447 * mn10300_sim.h (_state): Add another register (MDR).
448 (REG_MDR): Define.
449 * simops.c: Implement "cmp", "calls", "rets", "jmp" and
450 a few additional random insns.
451
452 * mn10300_sim.h (PSW_*): Define for CC status tracking.
453 (REG_D0, REG_A0, REG_SP): Define.
454 * simops.c: Implement "add", "addc" and a few other random
455 instructions.
456
457 * gencode.c, interp.c: Snapshot current simulator code.
458
459 Mon Nov 25 12:46:38 1996 Jeffrey A Law (law@cygnus.com)
460
461 * Makefile.in, config.in, configure, configure.in: New files.
462 * gencode.c, interp.c, mn10300_sim.h, simops.c: New files.
463
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