sim/mn10300/interp.c

   1 #include <signal.h>
   2 #include "sysdep.h"
   3 #include "bfd.h"
   4
   5 #include "mn10300_sim.h"
   6
   7 #ifndef INLINE
   8 #ifdef __GNUC__
   9 #define INLINE inline
  10 #else
  11 #define INLINE
  12 #endif
  13 #endif
  14
  15 host_callback *mn10300_callback;
  16 int mn10300_debug;
  17 static SIM_OPEN_KIND sim_kind;
  18 static char *myname;
  19
  20 static void dispatch PARAMS ((uint32, uint32, int));
  21 static long hash PARAMS ((long));
  22 static void init_system PARAMS ((void));
  23 #define MAX_HASH  127
  24
  25 struct hash_entry
  26 {
  27   struct hash_entry *next;
  28   long opcode;
  29   long mask;
  30   struct simops *ops;
  31 #ifdef HASH_STAT
  32   unsigned long count;
  33 #endif
  34 };
  35
  36 static int max_mem = 0;
  37 struct hash_entry hash_table[MAX_HASH+1];
  38
  39
  40 /* This probably doesn't do a very good job at bucket filling, but
  41    it's simple... */
  42 static INLINE long
  43 hash(insn)
  44      long insn;
  45 {
  46   /* These are one byte insns, we special case these since, in theory,
  47      they should be the most heavily used.  */
  48   if ((insn & 0xffffff00) == 0)
  49     {
  50       switch (insn & 0xf0)
  51         {
  52           case 0x00:
  53             return 0x70;
  54
  55           case 0x40:
  56             return 0x71;
  57
  58           case 0x10:
  59             return 0x72;
  60
  61           case 0x30:
  62             return 0x73;
  63
  64           case 0x50:
  65             return 0x74;
  66
  67           case 0x60:
  68             return 0x75;
  69
  70           case 0x70:
  71             return 0x76;
  72
  73           case 0x80:
  74             return 0x77;
  75
  76           case 0x90:
  77             return 0x78;
  78
  79           case 0xa0:
  80             return 0x79;
  81
  82           case 0xb0:
  83             return 0x7a;
  84
  85           case 0xe0:
  86             return 0x7b;
  87
  88           default:
  89             return 0x7c;
  90         }
  91     }
  92
  93   /* These are two byte insns */
  94   if ((insn & 0xffff0000) == 0)
  95     {
  96       if ((insn & 0xf000) == 0x2000
  97           || (insn & 0xf000) == 0x5000)
  98         return ((insn & 0xfc00) >> 8) & 0x7f;
  99
 100       if ((insn & 0xf000) == 0x4000)
 101         return ((insn & 0xf300) >> 8) & 0x7f;
 102
 103       if ((insn & 0xf000) == 0x8000
 104           || (insn & 0xf000) == 0x9000
 105           || (insn & 0xf000) == 0xa000
 106           || (insn & 0xf000) == 0xb000)
 107         return ((insn & 0xf000) >> 8) & 0x7f;
 108
 109       if ((insn & 0xff00) == 0xf000
 110           || (insn & 0xff00) == 0xf100
 111           || (insn & 0xff00) == 0xf200
 112           || (insn & 0xff00) == 0xf500
 113           || (insn & 0xff00) == 0xf600)
 114         return ((insn & 0xfff0) >> 4) & 0x7f;
 115
 116       if ((insn & 0xf000) == 0xc000)
 117         return ((insn & 0xff00) >> 8) & 0x7f;
 118
 119       return ((insn & 0xffc0) >> 6) & 0x7f;
 120     }
 121
 122   /* These are three byte insns.  */
 123   if ((insn & 0xff000000) == 0)
 124     {
 125       if ((insn & 0xf00000) == 0x000000)
 126         return ((insn & 0xf30000) >> 16) & 0x7f;
 127
 128       if ((insn & 0xf00000) == 0x200000
 129           || (insn & 0xf00000) == 0x300000)
 130         return ((insn & 0xfc0000) >> 16) & 0x7f;
 131
 132       if ((insn & 0xff0000) == 0xf80000)
 133         return ((insn & 0xfff000) >> 12) & 0x7f;
 134
 135       if ((insn & 0xff0000) == 0xf90000)
 136         return ((insn & 0xfffc00) >> 10) & 0x7f;
 137
 138       return ((insn & 0xff0000) >> 16) & 0x7f;
 139     }
 140
 141   /* These are four byte or larger insns.  */
 142   if ((insn & 0xf0000000) == 0xf0000000)
 143     return ((insn & 0xfff00000) >> 20) & 0x7f;
 144
 145   return ((insn & 0xff000000) >> 24) & 0x7f;
 146 }
 147
 148 static void
 149 dispatch (insn, extension, length)
 150      uint32 insn;
 151      uint32 extension;
 152      int length;
 153 {
 154   struct hash_entry *h;
 155
 156   h = &hash_table[hash(insn)];
 157
 158   while ((insn & h->mask) != h->opcode
 159           || (length != h->ops->length))
 160     {
 161       if (!h->next)
 162         {
 163           (*mn10300_callback->printf_filtered) (mn10300_callback,
 164             "ERROR looking up hash for 0x%x, PC=0x%x\n", insn, PC);
 165           exit(1);
 166         }
 167       h = h->next;
 168     }
 169
 170
 171 #ifdef HASH_STAT
 172   h->count++;
 173 #endif
 174
 175   /* Now call the right function.  */
 176   (h->ops->func)(insn, extension);
 177   PC += length;
 178 }
 179
 180 /* FIXME These would more efficient to use than load_mem/store_mem,
 181    but need to be changed to use the memory map.  */
 182
 183 uint8
 184 get_byte (x)
 185      uint8 *x;
 186 {
 187   return *x;
 188 }
 189
 190 uint16
 191 get_half (x)
 192      uint8 *x;
 193 {
 194   uint8 *a = x;
 195   return (a[1] << 8) + (a[0]);
 196 }
 197
 198 uint32
 199 get_word (x)
 200       uint8 *x;
 201 {
 202   uint8 *a = x;
 203   return (a[3]<<24) + (a[2]<<16) + (a[1]<<8) + (a[0]);
 204 }
 205
 206 void
 207 put_byte (addr, data)
 208      uint8 *addr;
 209      uint8 data;
 210 {
 211   uint8 *a = addr;
 212   a[0] = data;
 213 }
 214
 215 void
 216 put_half (addr, data)
 217      uint8 *addr;
 218      uint16 data;
 219 {
 220   uint8 *a = addr;
 221   a[0] = data & 0xff;
 222   a[1] = (data >> 8) & 0xff;
 223 }
 224
 225 void
 226 put_word (addr, data)
 227      uint8 *addr;
 228      uint32 data;
 229 {
 230   uint8 *a = addr;
 231   a[0] = data & 0xff;
 232   a[1] = (data >> 8) & 0xff;
 233   a[2] = (data >> 16) & 0xff;
 234   a[3] = (data >> 24) & 0xff;
 235 }
 236
 237
 238 uint32
 239 load_mem_big (addr, len)
 240      SIM_ADDR addr;
 241      int len;
 242 {
 243   uint8 *p = addr + State.mem;
 244
 245   if (addr > max_mem)
 246     abort ();
 247
 248   switch (len)
 249     {
 250     case 1:
 251       return p[0];
 252     case 2:
 253       return p[0] << 8 | p[1];
 254     case 3:
 255       return p[0] << 16 | p[1] << 8 | p[2];
 256     case 4:
 257       return p[0] << 24 | p[1] << 16 | p[2] << 8 | p[3];
 258     default:
 259       abort ();
 260     }
 261 }
 262
 263 uint32
 264 load_mem (addr, len)
 265      SIM_ADDR addr;
 266      int len;
 267 {
 268   uint8 *p = addr + State.mem;
 269
 270   if (addr > max_mem)
 271     abort ();
 272
 273   switch (len)
 274     {
 275     case 1:
 276       return p[0];
 277     case 2:
 278       return p[1] << 8 | p[0];
 279     case 3:
 280       return p[2] << 16 | p[1] << 8 | p[0];
 281     case 4:
 282       return p[3] << 24 | p[2] << 16 | p[1] << 8 | p[0];
 283     default:
 284       abort ();
 285     }
 286 }
 287
 288 void
 289 store_mem (addr, len, data)
 290      SIM_ADDR addr;
 291      int len;
 292      uint32 data;
 293 {
 294   uint8 *p = addr + State.mem;
 295
 296   if (addr > max_mem)
 297     abort ();
 298
 299   switch (len)
 300     {
 301     case 1:
 302       p[0] = data;
 303       return;
 304     case 2:
 305       p[0] = data;
 306       p[1] = data >> 8;
 307       return;
 308     case 4:
 309       p[0] = data;
 310       p[1] = data >> 8;
 311       p[2] = data >> 16;
 312       p[3] = data >> 24;
 313       return;
 314     default:
 315       abort ();
 316     }
 317 }
 318
 319 void
 320 sim_size (power)
 321      int power;
 322
 323 {
 324   if (State.mem)
 325     free (State.mem);
 326
 327   max_mem = 1 << power;
 328   State.mem = (uint8 *) calloc (1,  1 << power);
 329   if (!State.mem)
 330     {
 331       (*mn10300_callback->printf_filtered) (mn10300_callback, "Allocation of main memory failed.\n");
 332       exit (1);
 333     }
 334 }
 335
 336 static void
 337 init_system ()
 338 {
 339   if (!State.mem)
 340     sim_size(19);
 341 }
 342
 343 int
 344 sim_write (sd, addr, buffer, size)
 345      SIM_DESC sd;
 346      SIM_ADDR addr;
 347      unsigned char *buffer;
 348      int size;
 349 {
 350   int i;
 351
 352   init_system ();
 353
 354   for (i = 0; i < size; i++)
 355     store_mem (addr + i, 1, buffer[i]);
 356
 357   return size;
 358 }
 359
 360 SIM_DESC
 361 sim_open (kind,argv)
 362      SIM_OPEN_KIND kind;
 363      char **argv;
 364 {
 365   struct simops *s;
 366   struct hash_entry *h;
 367   char **p;
 368
 369   sim_kind = kind;
 370   myname = argv[0];
 371
 372   for (p = argv + 1; *p; ++p)
 373     {
 374       if (strcmp (*p, "-E") == 0)
 375         ++p; /* ignore endian spec */
 376       else
 377 #ifdef DEBUG
 378       if (strcmp (*p, "-t") == 0)
 379         mn10300_debug = DEBUG;
 380       else
 381 #endif
 382         (*mn10300_callback->printf_filtered) (mn10300_callback, "ERROR: unsupported option(s): %s\n",*p);
 383     }
 384
 385  /* put all the opcodes in the hash table */
 386   for (s = Simops; s->func; s++)
 387     {
 388       h = &hash_table[hash(s->opcode)];
 389
 390       /* go to the last entry in the chain */
 391       while (h->next)
 392         {
 393           /* Don't insert the same opcode more than once.  */
 394           if (h->opcode == s->opcode
 395               && h->mask == s->mask
 396               && h->ops == s)
 397             continue;
 398           else
 399             h = h->next;
 400         }
 401
 402       /* Don't insert the same opcode more than once.  */
 403       if (h->opcode == s->opcode
 404           && h->mask == s->mask
 405           && h->ops == s)
 406         continue;
 407
 408       if (h->ops)
 409         {
 410           h->next = calloc(1,sizeof(struct hash_entry));
 411           h = h->next;
 412         }
 413       h->ops = s;
 414       h->mask = s->mask;
 415       h->opcode = s->opcode;
 416 #if HASH_STAT
 417       h->count = 0;
 418 #endif
 419     }
 420
 421
 422   /* fudge our descriptor for now */
 423   return (SIM_DESC) 1;
 424 }
 425
 426
 427 void
 428 sim_close (sd, quitting)
 429      SIM_DESC sd;
 430      int quitting;
 431 {
 432   /* nothing to do */
 433 }
 434
 435 void
 436 sim_set_profile (n)
 437      int n;
 438 {
 439   (*mn10300_callback->printf_filtered) (mn10300_callback, "sim_set_profile %d\n", n);
 440 }
 441
 442 void
 443 sim_set_profile_size (n)
 444      int n;
 445 {
 446   (*mn10300_callback->printf_filtered) (mn10300_callback, "sim_set_profile_size %d\n", n);
 447 }
 448
 449 int
 450 sim_stop (sd)
 451      SIM_DESC sd;
 452 {
 453   return 0;
 454 }
 455
 456 void
 457 sim_resume (sd, step, siggnal)
 458      SIM_DESC sd;
 459      int step, siggnal;
 460 {
 461   uint32 inst;
 462   reg_t oldpc;
 463   struct hash_entry *h;
 464
 465   if (step)
 466     State.exception = SIGTRAP;
 467   else
 468     State.exception = 0;
 469
 470   do
 471     {
 472       unsigned long insn, extension;
 473
 474       /* Fetch the current instruction.  */
 475       inst = load_mem_big (PC, 2);
 476       oldpc = PC;
 477
 478       /* Using a giant case statement may seem like a waste because of the
 479         code/rodata size the table itself will consume.  However, using
 480         a giant case statement speeds up the simulator by 10-15% by avoiding
 481         cascading if/else statements or cascading case statements.  */
 482
 483       switch ((inst >> 8) & 0xff)
 484         {
 485           /* All the single byte insns except 0x80, 0x90, 0xa0, 0xb0
 486              which must be handled specially.  */
 487           case 0x00:
 488           case 0x04:
 489           case 0x08:
 490           case 0x0c:
 491           case 0x11:
 492           case 0x12:
 493           case 0x13:
 494           case 0x14:
 495           case 0x15:
 496           case 0x16:
 497           case 0x17:
 498           case 0x18:
 499           case 0x19:
 500           case 0x1a:
 501           case 0x1b:
 502           case 0x1c:
 503           case 0x1d:
 504           case 0x1e:
 505           case 0x1f:
 506           case 0x3c:
 507           case 0x3d:
 508           case 0x3e:
 509           case 0x3f:
 510           case 0x40:
 511           case 0x41:
 512           case 0x44:
 513           case 0x45:
 514           case 0x48:
 515           case 0x49:
 516           case 0x4c:
 517           case 0x4d:
 518           case 0x50:
 519           case 0x51:
 520           case 0x52:
 521           case 0x53:
 522           case 0x54:
 523           case 0x55:
 524           case 0x56:
 525           case 0x57:
 526           case 0x60:
 527           case 0x61:
 528           case 0x62:
 529           case 0x63:
 530           case 0x64:
 531           case 0x65:
 532           case 0x66:
 533           case 0x67:
 534           case 0x68:
 535           case 0x69:
 536           case 0x6a:
 537           case 0x6b:
 538           case 0x6c:
 539           case 0x6d:
 540           case 0x6e:
 541           case 0x6f:
 542           case 0x70:
 543           case 0x71:
 544           case 0x72:
 545           case 0x73:
 546           case 0x74:
 547           case 0x75:
 548           case 0x76:
 549           case 0x77:
 550           case 0x78:
 551           case 0x79:
 552           case 0x7a:
 553           case 0x7b:
 554           case 0x7c:
 555           case 0x7d:
 556           case 0x7e:
 557           case 0x7f:
 558           case 0xcb:
 559           case 0xd0:
 560           case 0xd1:
 561           case 0xd2:
 562           case 0xd3:
 563           case 0xd4:
 564           case 0xd5:
 565           case 0xd6:
 566           case 0xd7:
 567           case 0xd8:
 568           case 0xd9:
 569           case 0xda:
 570           case 0xdb:
 571           case 0xe0:
 572           case 0xe1:
 573           case 0xe2:
 574           case 0xe3:
 575           case 0xe4:
 576           case 0xe5:
 577           case 0xe6:
 578           case 0xe7:
 579           case 0xe8:
 580           case 0xe9:
 581           case 0xea:
 582           case 0xeb:
 583           case 0xec:
 584           case 0xed:
 585           case 0xee:
 586           case 0xef:
 587           case 0xff:
 588             insn = (inst >> 8) & 0xff;
 589             extension = 0;
 590             dispatch (insn, extension, 1);
 591             break;
 592
 593           /* Special cases where dm == dn is used to encode a different
 594              instruction.  */
 595           case 0x80:
 596           case 0x85:
 597           case 0x8a:
 598           case 0x8f:
 599           case 0x90:
 600           case 0x95:
 601           case 0x9a:
 602           case 0x9f:
 603           case 0xa0:
 604           case 0xa5:
 605           case 0xaa:
 606           case 0xaf:
 607           case 0xb0:
 608           case 0xb5:
 609           case 0xba:
 610           case 0xbf:
 611             insn = inst;
 612             extension = 0;
 613             dispatch (insn, extension, 2);
 614             break;
 615
 616           case 0x81:
 617           case 0x82:
 618           case 0x83:
 619           case 0x84:
 620           case 0x86:
 621           case 0x87:
 622           case 0x88:
 623           case 0x89:
 624           case 0x8b:
 625           case 0x8c:
 626           case 0x8d:
 627           case 0x8e:
 628           case 0x91:
 629           case 0x92:
 630           case 0x93:
 631           case 0x94:
 632           case 0x96:
 633           case 0x97:
 634           case 0x98:
 635           case 0x99:
 636           case 0x9b:
 637           case 0x9c:
 638           case 0x9d:
 639           case 0x9e:
 640           case 0xa1:
 641           case 0xa2:
 642           case 0xa3:
 643           case 0xa4:
 644           case 0xa6:
 645           case 0xa7:
 646           case 0xa8:
 647           case 0xa9:
 648           case 0xab:
 649           case 0xac:
 650           case 0xad:
 651           case 0xae:
 652           case 0xb1:
 653           case 0xb2:
 654           case 0xb3:
 655           case 0xb4:
 656           case 0xb6:
 657           case 0xb7:
 658           case 0xb8:
 659           case 0xb9:
 660           case 0xbb:
 661           case 0xbc:
 662           case 0xbd:
 663           case 0xbe:
 664             insn = (inst >> 8) & 0xff;
 665             extension = 0;
 666           dispatch (insn, extension, 1);
 667           break;
 668
 669           /* The two byte instructions.  */
 670           case 0x20:
 671           case 0x21:
 672           case 0x22:
 673           case 0x23:
 674           case 0x28:
 675           case 0x29:
 676           case 0x2a:
 677           case 0x2b:
 678           case 0x42:
 679           case 0x43:
 680           case 0x46:
 681           case 0x47:
 682           case 0x4a:
 683           case 0x4b:
 684           case 0x4e:
 685           case 0x4f:
 686           case 0x58:
 687           case 0x59:
 688           case 0x5a:
 689           case 0x5b:
 690           case 0x5c:
 691           case 0x5d:
 692           case 0x5e:
 693           case 0x5f:
 694           case 0xc0:
 695           case 0xc1:
 696           case 0xc2:
 697           case 0xc3:
 698           case 0xc4:
 699           case 0xc5:
 700           case 0xc6:
 701           case 0xc7:
 702           case 0xc8:
 703           case 0xc9:
 704           case 0xca:
 705           case 0xce:
 706           case 0xcf:
 707           case 0xf0:
 708           case 0xf1:
 709           case 0xf2:
 710           case 0xf3:
 711           case 0xf4:
 712           case 0xf5:
 713           case 0xf6:
 714             insn = inst;
 715             extension = 0;
 716             dispatch (insn, extension, 2);
 717             break;
 718
 719           /* The three byte insns with a 16bit operand in little endian
 720              format.  */
 721           case 0x01:
 722           case 0x02:
 723           case 0x03:
 724           case 0x05:
 725           case 0x06:
 726           case 0x07:
 727           case 0x09:
 728           case 0x0a:
 729           case 0x0b:
 730           case 0x0d:
 731           case 0x0e:
 732           case 0x0f:
 733           case 0x24:
 734           case 0x25:
 735           case 0x26:
 736           case 0x27:
 737           case 0x2c:
 738           case 0x2d:
 739           case 0x2e:
 740           case 0x2f:
 741           case 0x30:
 742           case 0x31:
 743           case 0x32:
 744           case 0x33:
 745           case 0x34:
 746           case 0x35:
 747           case 0x36:
 748           case 0x37:
 749           case 0x38:
 750           case 0x39:
 751           case 0x3a:
 752           case 0x3b:
 753           case 0xcc:
 754             insn = load_mem (PC, 1);
 755             insn <<= 16;
 756             insn |= load_mem (PC + 1, 2);
 757             extension = 0;
 758             dispatch (insn, extension, 3);
 759             break;
 760
 761           /* The three byte insns without 16bit operand.  */
 762           case 0xde:
 763           case 0xdf:
 764           case 0xf8:
 765           case 0xf9:
 766             insn = load_mem_big (PC, 3);
 767             extension = 0;
 768             dispatch (insn, extension, 3);
 769             break;
 770
 771           /* Four byte insns.  */
 772           case 0xfa:
 773           case 0xfb:
 774             if ((inst & 0xfffc) == 0xfaf0
 775                 || (inst & 0xfffc) == 0xfaf4
 776                 || (inst & 0xfffc) == 0xfaf8)
 777               insn = load_mem_big (PC, 4);
 778             else
 779               {
 780                 insn = inst;
 781                 insn <<= 16;
 782                 insn |= load_mem (PC + 2, 2);
 783                 extension = 0;
 784               }
 785             dispatch (insn, extension, 4);
 786             break;
 787
 788           /* Five byte insns.  */
 789           case 0xcd:
 790             insn = load_mem (PC, 1);
 791             insn <<= 24;
 792             insn |= (load_mem (PC + 1, 2) << 8);
 793             insn |= load_mem (PC + 3, 1);
 794             extension = load_mem (PC + 4, 1);
 795             dispatch (insn, extension, 5);
 796             break;
 797
 798           case 0xdc:
 799             insn = load_mem (PC, 1);
 800             insn <<= 24;
 801             extension = load_mem (PC + 1, 4);
 802             insn |= (extension & 0xffffff00) >> 8;
 803             extension &= 0xff;
 804             dispatch (insn, extension, 5);
 805             break;
 806
 807           /* Six byte insns.  */
 808           case 0xfc:
 809           case 0xfd:
 810             insn = (inst << 16);
 811             extension = load_mem (PC + 2, 4);
 812             insn |= ((extension & 0xffff0000) >> 16);
 813             extension &= 0xffff;
 814             dispatch (insn, extension, 6);
 815             break;
 816
 817           case 0xdd:
 818             insn = load_mem (PC, 1) << 24;
 819             extension = load_mem (PC + 1, 4);
 820             insn |= ((extension >> 8) & 0xffffff);
 821             extension = (extension & 0xff) << 16;
 822             extension |= load_mem (PC + 5, 1) << 8;
 823             extension |= load_mem (PC + 6, 1);
 824             dispatch (insn, extension, 7);
 825             break;
 826
 827           case 0xfe:
 828             insn = inst << 16;
 829             extension = load_mem (PC + 2, 4);
 830             insn |= ((extension >> 16) & 0xffff);
 831             extension <<= 8;
 832             extension &= 0xffff00;
 833             extension |= load_mem (PC + 6, 1);
 834             dispatch (insn, extension, 7);
 835             break;
 836
 837           default:
 838             abort ();
 839         }
 840     }
 841   while (!State.exception);
 842
 843 #ifdef HASH_STAT
 844   {
 845     int i;
 846     for (i = 0; i < MAX_HASH; i++)
 847       {
 848          struct hash_entry *h;
 849          h = &hash_table[i];
 850
 851          printf("hash 0x%x:\n", i);
 852
 853          while (h)
 854            {
 855              printf("h->opcode = 0x%x, count = 0x%x\n", h->opcode, h->count);
 856              h = h->next;
 857            }
 858
 859          printf("\n\n");
 860       }
 861     fflush (stdout);
 862   }
 863 #endif
 864
 865 }
 866
 867 int
 868 sim_trace (sd)
 869      SIM_DESC sd;
 870 {
 871 #ifdef DEBUG
 872   mn10300_debug = DEBUG;
 873 #endif
 874   sim_resume (sd, 0, 0);
 875   return 1;
 876 }
 877
 878 void
 879 sim_info (sd, verbose)
 880      SIM_DESC sd;
 881      int verbose;
 882 {
 883   (*mn10300_callback->printf_filtered) (mn10300_callback, "sim_info\n");
 884 }
 885
 886 SIM_RC
 887 sim_create_inferior (sd, argv, env)
 888      SIM_DESC sd;
 889      char **argv;
 890      char **env;
 891 {
 892   return SIM_RC_OK;
 893 }
 894
 895 void
 896 sim_kill (sd)
 897      SIM_DESC sd;
 898 {
 899   /* nothing to do */
 900 }
 901
 902 void
 903 sim_set_callbacks (sd, p)
 904      SIM_DESC sd;
 905      host_callback *p;
 906 {
 907   mn10300_callback = p;
 908 }
 909
 910 /* All the code for exiting, signals, etc needs to be revamped.
 911
 912    This is enough to get c-torture limping though.  */
 913
 914 void
 915 sim_stop_reason (sd, reason, sigrc)
 916      SIM_DESC sd;
 917      enum sim_stop *reason;
 918      int *sigrc;
 919 {
 920   *reason = sim_stopped;
 921   if (State.exception == SIGQUIT)
 922     *sigrc = 0;
 923   else
 924     *sigrc = State.exception;
 925 }
 926
 927 void
 928 sim_fetch_register (sd, rn, memory)
 929      SIM_DESC sd;
 930      int rn;
 931      unsigned char *memory;
 932 {
 933   put_word (memory, State.regs[rn]);
 934 }
 935
 936 void
 937 sim_store_register (sd, rn, memory)
 938      SIM_DESC sd;
 939      int rn;
 940      unsigned char *memory;
 941 {
 942   State.regs[rn] = get_word (memory);
 943 }
 944
 945 int
 946 sim_read (sd, addr, buffer, size)
 947      SIM_DESC sd;
 948      SIM_ADDR addr;
 949      unsigned char *buffer;
 950      int size;
 951 {
 952   int i;
 953   for (i = 0; i < size; i++)
 954     buffer[i] = load_mem (addr + i, 1);
 955
 956   return size;
 957 }
 958
 959 void
 960 sim_do_command (sd, cmd)
 961      SIM_DESC sd;
 962      char *cmd;
 963 {
 964   (*mn10300_callback->printf_filtered) (mn10300_callback, "\"%s\" is not a valid mn10300 simulator command.\n", cmd);
 965 }
 966
 967 SIM_RC
 968 sim_load (sd, prog, abfd, from_tty)
 969      SIM_DESC sd;
 970      char *prog;
 971      bfd *abfd;
 972      int from_tty;
 973 {
 974   extern bfd *sim_load_file (); /* ??? Don't know where this should live.  */
 975   bfd *prog_bfd;
 976
 977   prog_bfd = sim_load_file (sd, myname, mn10300_callback, prog, abfd,
 978                             sim_kind == SIM_OPEN_DEBUG);
 979   if (prog_bfd == NULL)
 980     return SIM_RC_FAIL;
 981   PC = bfd_get_start_address (prog_bfd);
 982   if (abfd == NULL)
 983     bfd_close (prog_bfd);
 984   return SIM_RC_OK;
 985 }