1 /* Simulator/Opcode generator for the Renesas
2 (formerly Hitachi) / SuperH Inc. Super-H architecture.
4 Written by Steve Chamberlain of Cygnus Support.
7 This file is part of SH sim.
10 THIS SOFTWARE IS NOT COPYRIGHTED
12 Cygnus offers the following for use in the public domain. Cygnus
13 makes no warranty with regard to the software or it's performance
14 and the user accepts the software "AS IS" with all faults.
16 CYGNUS DISCLAIMS ANY WARRANTIES, EXPRESS OR IMPLIED, WITH REGARD TO
17 THIS SOFTWARE INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
18 MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.
22 /* This program generates the opcode table for the assembler and
25 -t prints a pretty table for the assembler manual
26 -s generates the simulator code jump table
27 -d generates a define table
28 -x generates the simulator code switch statement
29 default used to generate the opcode tables
39 #define MAX_NR_STUFF 42
47 const char * const stuff
[MAX_NR_STUFF
];
55 { "n", "", "add #<imm>,<REG_N>", "0111nnnni8*1....",
58 " UNDEF(n); /* see #ifdef PARANOID */",
62 { "n", "mn", "add <REG_M>,<REG_N>", "0011nnnnmmmm1100",
66 { "n", "mn", "addc <REG_M>,<REG_N>", "0011nnnnmmmm1110",
68 "SET_SR_T (ult < R[n]);",
70 "SET_SR_T (T || (R[n] < ult));",
73 { "n", "mn", "addv <REG_M>,<REG_N>", "0011nnnnmmmm1111",
75 "SET_SR_T ((~(R[n] ^ R[m]) & (ult ^ R[n])) >> 31);",
79 { "0", "0", "and #<imm>,R0", "11001001i8*1....",
82 { "n", "nm", "and <REG_M>,<REG_N>", "0010nnnnmmmm1001",
85 { "", "0", "and.b #<imm>,@(R0,GBR)", "11001101i8*1....",
87 "WBAT (GBR + R0, RBAT (GBR + R0) & i);",
90 { "", "", "bf <bdisp8>", "10001011i8p1....",
91 "RAISE_EXCEPTION_IF_IN_DELAY_SLOT ();",
93 " SET_NIP (PC + 4 + (SEXT (i) * 2));",
98 { "", "", "bf.s <bdisp8>", "10001111i8p1....",
99 "RAISE_EXCEPTION_IF_IN_DELAY_SLOT ();",
101 " SET_NIP (PC + 4 + (SEXT (i) * 2));",
103 " Delay_Slot (PC + 2);",
107 { "", "n", "bit32 #imm3,@(disp12,<REG_N>)", "0011nnnni8*11001",
108 "/* 32-bit logical bit-manipulation instructions. */",
109 "int word2 = RIAT (nip);",
110 "RAISE_EXCEPTION_IF_IN_DELAY_SLOT ();",
111 "i >>= 4; /* BOGUS: Using only three bits of 'i'. */",
112 "/* MSB of 'i' must be zero. */",
114 " RAISE_EXCEPTION (SIGILL);",
116 "do_blog_insn (1 << i, (word2 & 0xfff) + R[n], ",
117 " (word2 >> 12) & 0xf, memory, maskb);",
118 "SET_NIP (nip + 2); /* Consume 2 more bytes. */",
120 { "", "", "bra <bdisp12>", "1010i12.........",
121 "RAISE_EXCEPTION_IF_IN_DELAY_SLOT ();",
122 "SET_NIP (PC + 4 + (SEXT12 (i) * 2));",
124 "Delay_Slot (PC + 2);",
127 { "", "n", "braf <REG_N>", "0000nnnn00100011",
128 "RAISE_EXCEPTION_IF_IN_DELAY_SLOT ();",
129 "SET_NIP (PC + 4 + R[n]);",
131 "Delay_Slot (PC + 2);",
134 { "", "", "bsr <bdisp12>", "1011i12.........",
135 "RAISE_EXCEPTION_IF_IN_DELAY_SLOT ();",
136 "PR = PH2T (PC + 4);",
137 "SET_NIP (PC + 4 + (SEXT12 (i) * 2));",
139 "Delay_Slot (PC + 2);",
142 { "", "n", "bsrf <REG_N>", "0000nnnn00000011",
143 "RAISE_EXCEPTION_IF_IN_DELAY_SLOT ();",
144 "PR = PH2T (PC) + 4;",
145 "SET_NIP (PC + 4 + R[n]);",
147 "Delay_Slot (PC + 2);",
150 { "", "", "bt <bdisp8>", "10001001i8p1....",
151 "RAISE_EXCEPTION_IF_IN_DELAY_SLOT ();",
153 " SET_NIP (PC + 4 + (SEXT (i) * 2));",
158 { "", "m", "bld/st #<imm>, <REG_M>", "10000111mmmmi4*1",
159 "/* MSB of 'i' is true for load, false for store. */",
162 " R[m] |= (1 << i);",
164 " R[m] &= ~(1 << i);",
166 " SET_SR_T ((R[m] & (1 << (i - 8))) != 0);",
168 { "m", "m", "bset/clr #<imm>, <REG_M>", "10000110mmmmi4*1",
169 "/* MSB of 'i' is true for set, false for clear. */",
171 " R[m] &= ~(1 << i);",
173 " R[m] |= (1 << (i - 8));",
175 { "n", "n", "clips.b <REG_N>", "0100nnnn10010001",
176 "if (R[n] < -128 || R[n] > 127) {",
181 " else if (R[n] < -128)",
185 { "n", "n", "clips.w <REG_N>", "0100nnnn10010101",
186 "if (R[n] < -32768 || R[n] > 32767) {",
189 " if (R[n] > 32767)",
191 " else if (R[n] < -32768)",
195 { "n", "n", "clipu.b <REG_N>", "0100nnnn10000001",
196 "if (R[n] < -256 || R[n] > 255) {",
202 { "n", "n", "clipu.w <REG_N>", "0100nnnn10000101",
203 "if (R[n] < -65536 || R[n] > 65535) {",
209 { "n", "0n", "divs R0,<REG_N>", "0100nnnn10010100",
210 "RAISE_EXCEPTION_IF_IN_DELAY_SLOT ();",
212 " R[n] = 0x7fffffff;",
213 "else if (R0 == -1 && R[n] == 0x80000000)",
214 " R[n] = 0x7fffffff;",
218 { "n", "0n", "divu R0,<REG_N>", "0100nnnn10000100",
219 "RAISE_EXCEPTION_IF_IN_DELAY_SLOT ();",
221 " R[n] = 0xffffffff;",
222 "/* FIXME: The result may be implementation-defined if it is outside */",
223 "/* the range of signed int (i.e. if R[n] was negative and R0 == 1). */",
224 "else R[n] = R[n] / (unsigned int) R0;",
227 { "n", "0n", "mulr R0,<REG_N>", "0100nnnn10000000",
228 "R[n] = (R[n] * R0) & 0xffffffff;",
231 { "0", "n", "ldbank @<REG_N>,R0", "0100nnnn11100101",
232 "int regn = (R[n] >> 2) & 0x1f;",
233 "int bankn = (R[n] >> 7) & 0x1ff;",
235 " regn = 19; /* FIXME what should happen? */",
236 "R0 = saved_state.asregs.regstack[bankn].regs[regn];",
239 { "", "0n", "stbank R0,@<REG_N>", "0100nnnn11100001",
240 "int regn = (R[n] >> 2) & 0x1f;",
241 "int bankn = (R[n] >> 7) & 0x1ff;",
243 " regn = 19; /* FIXME what should happen? */",
244 "saved_state.asregs.regstack[bankn].regs[regn] = R0;",
246 { "", "", "resbank", "0000000001011011",
248 "RAISE_EXCEPTION_IF_IN_DELAY_SLOT ();",
249 /* FIXME: cdef all */
250 "if (BO) { /* Bank Overflow */",
251 /* FIXME: how do we know when to reset BO? */
252 " for (i = 0; i <= 14; i++) {",
253 " R[i] = RLAT (R[15]);",
257 " PR = RLAT (R[15]);",
260 " GBR = RLAT (R[15]);",
263 " MACH = RLAT (R[15]);",
266 " MACL = RLAT (R[15]);",
270 "else if (BANKN == 0) /* Bank Underflow */",
271 " RAISE_EXCEPTION (SIGILL);", /* FIXME: what exception? */
273 " SET_BANKN (BANKN - 1);",
274 " for (i = 0; i <= 14; i++)",
275 " R[i] = saved_state.asregs.regstack[BANKN].regs[i];",
276 " MACH = saved_state.asregs.regstack[BANKN].regs[15];",
277 " PR = saved_state.asregs.regstack[BANKN].regs[17];",
278 " GBR = saved_state.asregs.regstack[BANKN].regs[18];",
279 " MACL = saved_state.asregs.regstack[BANKN].regs[19];",
282 { "f", "f-", "movml.l <REG_N>,@-R15", "0100nnnn11110001",
283 "/* Push Rn...R0 (if n==15, push pr and R14...R0). */",
288 " WLAT (R[15], PR);",
290 " WLAT (R[15], R[n]);",
291 "} while (n-- > 0);",
293 { "f", "f+", "movml.l @R15+,<REG_N>", "0100nnnn11110101",
294 "/* Pop R0...Rn (if n==15, pop R0...R14 and pr). */",
299 " PR = RLAT (R[15]);",
301 " R[i] = RLAT (R[15]);",
303 "} while (i++ < n);",
305 { "f", "f-", "movmu.l <REG_N>,@-R15", "0100nnnn11110000",
306 "/* Push pr, R14...Rn (if n==15, push pr). */", /* FIXME */
312 " WLAT (R[15], PR);",
314 " WLAT (R[15], R[i]);",
315 "} while (i-- > n);",
317 { "f", "f+", "movmu.l @R15+,<REG_N>", "0100nnnn11110100",
318 "/* Pop Rn...R14, pr (if n==15, pop pr). */", /* FIXME */
322 " PR = RLAT (R[15]);",
324 " R[n] = RLAT (R[15]);",
326 "} while (n++ < 15);",
328 { "", "", "nott", "0000000001101000",
329 "SET_SR_T (T == 0);",
332 { "", "", "bt.s <bdisp8>", "10001101i8p1....",
333 "RAISE_EXCEPTION_IF_IN_DELAY_SLOT ();",
335 " SET_NIP (PC + 4 + (SEXT (i) * 2));",
337 " Delay_Slot (PC + 2);",
341 { "", "", "clrmac", "0000000000101000",
346 { "", "", "clrs", "0000000001001000",
350 { "", "", "clrt", "0000000000001000",
355 { "", "", "clrdmxy", "0000000010001000",
356 "saved_state.asregs.cregs.named.sr &= ~(SR_MASK_DMX | SR_MASK_DMY);"
359 { "", "0", "cmp/eq #<imm>,R0", "10001000i8*1....",
360 "SET_SR_T (R0 == SEXT (i));",
362 { "", "mn", "cmp/eq <REG_M>,<REG_N>", "0011nnnnmmmm0000",
363 "SET_SR_T (R[n] == R[m]);",
365 { "", "mn", "cmp/ge <REG_M>,<REG_N>", "0011nnnnmmmm0011",
366 "SET_SR_T (R[n] >= R[m]);",
368 { "", "mn", "cmp/gt <REG_M>,<REG_N>", "0011nnnnmmmm0111",
369 "SET_SR_T (R[n] > R[m]);",
371 { "", "mn", "cmp/hi <REG_M>,<REG_N>", "0011nnnnmmmm0110",
372 "SET_SR_T (UR[n] > UR[m]);",
374 { "", "mn", "cmp/hs <REG_M>,<REG_N>", "0011nnnnmmmm0010",
375 "SET_SR_T (UR[n] >= UR[m]);",
377 { "", "n", "cmp/pl <REG_N>", "0100nnnn00010101",
378 "SET_SR_T (R[n] > 0);",
380 { "", "n", "cmp/pz <REG_N>", "0100nnnn00010001",
381 "SET_SR_T (R[n] >= 0);",
383 { "", "mn", "cmp/str <REG_M>,<REG_N>", "0010nnnnmmmm1100",
384 "ult = R[n] ^ R[m];",
385 "SET_SR_T (((ult & 0xff000000) == 0)",
386 " | ((ult & 0xff0000) == 0)",
387 " | ((ult & 0xff00) == 0)",
388 " | ((ult & 0xff) == 0));",
391 { "", "mn", "div0s <REG_M>,<REG_N>", "0010nnnnmmmm0111",
392 "SET_SR_Q ((R[n] & sbit) != 0);",
393 "SET_SR_M ((R[m] & sbit) != 0);",
394 "SET_SR_T (M != Q);",
397 { "", "", "div0u", "0000000000011001",
403 { "n", "nm", "div1 <REG_M>,<REG_N>", "0011nnnnmmmm0100",
404 "div1 (&R0, m, n/*, T*/);",
407 { "", "nm", "dmuls.l <REG_M>,<REG_N>", "0011nnnnmmmm1101",
408 "dmul (1/*signed*/, R[n], R[m]);",
411 { "", "nm", "dmulu.l <REG_M>,<REG_N>", "0011nnnnmmmm0101",
412 "dmul (0/*unsigned*/, R[n], R[m]);",
415 { "n", "n", "dt <REG_N>", "0100nnnn00010000",
417 "SET_SR_T (R[n] == 0);",
420 { "n", "m", "exts.b <REG_M>,<REG_N>", "0110nnnnmmmm1110",
421 "R[n] = SEXT (R[m]);",
423 { "n", "m", "exts.w <REG_M>,<REG_N>", "0110nnnnmmmm1111",
424 "R[n] = SEXTW (R[m]);",
427 { "n", "m", "extu.b <REG_M>,<REG_N>", "0110nnnnmmmm1100",
428 "R[n] = (R[m] & 0xff);",
430 { "n", "m", "extu.w <REG_M>,<REG_N>", "0110nnnnmmmm1101",
431 "R[n] = (R[m] & 0xffff);",
435 { "", "", "fabs <FREG_N>", "1111nnnn01011101",
442 " u.i &= 0x7fffffff;",
447 { "", "", "fadd <FREG_M>,<FREG_N>", "1111nnnnmmmm0000",
452 { "", "", "fcmp/eq <FREG_M>,<FREG_N>", "1111nnnnmmmm0100",
453 "FP_CMP (n, ==, m);",
456 { "", "", "fcmp/gt <FREG_M>,<FREG_N>", "1111nnnnmmmm0101",
461 { "", "", "fcnvds <DR_N>,FPUL", "1111nnnn10111101",
462 "if (! FPSCR_PR || n & 1)",
463 " RAISE_EXCEPTION (SIGILL);",
477 { "", "", "fcnvsd FPUL,<DR_N>", "1111nnnn10101101",
478 "if (! FPSCR_PR || n & 1)",
479 " RAISE_EXCEPTION (SIGILL);",
493 { "", "", "fdiv <FREG_M>,<FREG_N>", "1111nnnnmmmm0011",
495 "/* FIXME: check for DP and (n & 1) == 0? */",
499 { "", "", "fipr <FV_M>,<FV_N>", "1111vvVV11101101",
501 " RAISE_EXCEPTION (SIGILL);",
505 " if (saved_state.asregs.bfd_mach == bfd_mach_sh2a)",
506 " RAISE_EXCEPTION (SIGILL);",
507 " /* FIXME: check for nans and infinities. */",
508 " fsum += FR (v1+0) * FR (v2+0);",
509 " fsum += FR (v1+1) * FR (v2+1);",
510 " fsum += FR (v1+2) * FR (v2+2);",
511 " fsum += FR (v1+3) * FR (v2+3);",
512 " SET_FR (v1+3, fsum);",
517 { "", "", "fldi0 <FREG_N>", "1111nnnn10001101",
518 "SET_FR (n, (float) 0.0);",
519 "/* FIXME: check for DP and (n & 1) == 0? */",
523 { "", "", "fldi1 <FREG_N>", "1111nnnn10011101",
524 "SET_FR (n, (float) 1.0);",
525 "/* FIXME: check for DP and (n & 1) == 0? */",
529 { "", "", "flds <FREG_N>,FPUL", "1111nnnn00011101",
540 { "", "", "float FPUL,<FREG_N>", "1111nnnn00101101",
543 " SET_DR (n, (double) FPUL);",
546 " SET_FR (n, (float) FPUL);",
551 { "", "", "fmac <FREG_0>,<FREG_M>,<FREG_N>", "1111nnnnmmmm1110",
552 "SET_FR (n, FR (m) * FR (0) + FR (n));",
553 "/* FIXME: check for DP and (n & 1) == 0? */",
557 { "", "", "fmov <FREG_M>,<FREG_N>", "1111nnnnmmmm1100",
560 " int ni = XD_TO_XF (n);",
561 " int mi = XD_TO_XF (m);",
562 " SET_XF (ni + 0, XF (mi + 0));",
563 " SET_XF (ni + 1, XF (mi + 1));",
567 " SET_FR (n, FR (m));",
571 { "", "n", "fmov.s <FREG_M>,@<REG_N>", "1111nnnnmmmm1010",
580 " WLAT (R[n], FI (m));",
584 { "", "m", "fmov.s @<REG_M>,<FREG_N>", "1111nnnnmmmm1000",
593 " SET_FI (n, RLAT (R[m]));",
597 { "", "n", "fmov.s @(disp12,<REG_N>), <FREG_M>", "0011nnnnmmmm0001",
598 "/* and fmov.s <FREG_N>, @(disp12,<FREG_M>)",
599 " and mov.bwl <REG_N>, @(disp12,<REG_M>)",
600 " and mov.bwl @(disp12,<REG_N>),<REG_M>",
601 " and movu.bw @(disp12,<REG_N>),<REG_M>. */",
602 "int word2 = RIAT (nip);",
603 "RAISE_EXCEPTION_IF_IN_DELAY_SLOT ();",
604 "SET_NIP (nip + 2); /* Consume 2 more bytes. */",
606 "do_long_move_insn (word2 & 0xf000, word2 & 0x0fff, m, n, &thislock);",
609 { "m", "m", "fmov.s @<REG_M>+,<FREG_N>", "1111nnnnmmmm1001",
619 " SET_FI (n, RLAT (R[m]));",
624 { "n", "n", "fmov.s <FREG_M>,@-<REG_N>", "1111nnnnmmmm1011",
635 " WLAT (R[n], FI (m));",
639 { "", "0m", "fmov.s @(R0,<REG_M>),<FREG_N>", "1111nnnnmmmm0110",
643 " RDAT (R[0]+R[m], n);",
648 " SET_FI (n, RLAT (R[0] + R[m]));",
652 { "", "0n", "fmov.s <FREG_M>,@(R0,<REG_N>)", "1111nnnnmmmm0111",
656 " WDAT (R[0]+R[n], m);",
661 " WLAT ((R[0]+R[n]), FI (m));",
666 See fmov instructions above for move to/from extended fp registers. */
669 { "", "", "fmul <FREG_M>,<FREG_N>", "1111nnnnmmmm0010",
674 { "", "", "fneg <FREG_N>", "1111nnnn01001101",
681 " u.i ^= 0x80000000;",
686 { "", "", "fpchg", "1111011111111101",
687 "SET_FPSCR (GET_FPSCR () ^ FPSCR_MASK_PR);",
691 { "", "", "frchg", "1111101111111101",
693 " RAISE_EXCEPTION (SIGILL);",
694 "else if (saved_state.asregs.bfd_mach == bfd_mach_sh2a)",
695 " RAISE_EXCEPTION (SIGILL);",
697 " SET_FPSCR (GET_FPSCR () ^ FPSCR_MASK_FR);",
701 { "", "", "fsca", "1111eeee11111101",
703 " RAISE_EXCEPTION (SIGILL);",
704 "else if (saved_state.asregs.bfd_mach == bfd_mach_sh2a)",
705 " RAISE_EXCEPTION (SIGILL);",
708 " SET_FR (n, fsca_s (FPUL, &sin));",
709 " SET_FR (n+1, fsca_s (FPUL, &cos));",
714 { "", "", "fschg", "1111001111111101",
715 "SET_FPSCR (GET_FPSCR () ^ FPSCR_MASK_SZ);",
719 { "", "", "fsqrt <FREG_N>", "1111nnnn01101101",
720 "FP_UNARY (n, sqrt);",
724 { "", "", "fsrra <FREG_N>", "1111nnnn01111101",
726 " RAISE_EXCEPTION (SIGILL);",
727 "else if (saved_state.asregs.bfd_mach == bfd_mach_sh2a)",
728 " RAISE_EXCEPTION (SIGILL);",
730 " SET_FR (n, fsrra_s (FR (n)));",
734 { "", "", "fsub <FREG_M>,<FREG_N>", "1111nnnnmmmm0001",
739 { "", "", "ftrc <FREG_N>, FPUL", "1111nnnn00111101",
742 " if (DR (n) != DR (n)) /* NaN */",
743 " FPUL = 0x80000000;",
745 " FPUL = (int) DR (n);",
748 "if (FR (n) != FR (n)) /* NaN */",
749 " FPUL = 0x80000000;",
751 " FPUL = (int) FR (n);",
755 { "", "", "ftrv <FV_N>", "1111vv0111111101",
757 " RAISE_EXCEPTION (SIGILL);",
760 " if (saved_state.asregs.bfd_mach == bfd_mach_sh2a)",
761 " RAISE_EXCEPTION (SIGILL);",
762 " /* FIXME not implemented. */",
763 " printf (\"ftrv xmtrx, FV%d\\n\", v1);",
768 { "", "", "fsts FPUL,<FREG_N>", "1111nnnn00001101",
778 { "", "n", "jmp @<REG_N>", "0100nnnn00101011",
779 "RAISE_EXCEPTION_IF_IN_DELAY_SLOT ();",
780 "SET_NIP (PT2H (R[n]));",
782 "Delay_Slot (PC + 2);",
785 { "", "n", "jsr @<REG_N>", "0100nnnn00001011",
786 "RAISE_EXCEPTION_IF_IN_DELAY_SLOT ();",
787 "PR = PH2T (PC + 4);",
789 " gotcall (PR, R[n]);",
790 "SET_NIP (PT2H (R[n]));",
792 "Delay_Slot (PC + 2);",
794 { "", "n", "jsr/n @<REG_N>", "0100nnnn01001011",
795 "RAISE_EXCEPTION_IF_IN_DELAY_SLOT ();",
796 "PR = PH2T (PC + 2);",
798 " gotcall (PR, R[n]);",
799 "SET_NIP (PT2H (R[n]));",
801 { "", "", "jsr/n @@(<disp>,TBR)", "10000011i8p4....",
802 "RAISE_EXCEPTION_IF_IN_DELAY_SLOT ();",
803 "PR = PH2T (PC + 2);",
805 " gotcall (PR, i + TBR);",
806 "SET_NIP (PT2H (i + TBR));",
809 { "", "n", "ldc <REG_N>,<CREG_M>", "0100nnnnmmmm1110",
811 "/* FIXME: user mode */",
813 { "", "n", "ldc <REG_N>,SR", "0100nnnn00001110",
815 "/* FIXME: user mode */",
817 { "", "n", "ldc <REG_N>,MOD", "0100nnnn01011110",
820 { "", "n", "ldc <REG_N>,DBR", "0100nnnn11111010",
822 " DBR = R[n]; /* priv mode */",
824 " RAISE_EXCEPTION (SIGILL); /* user mode */",
826 { "", "n", "ldc <REG_N>,SGR", "0100nnnn00111010",
828 " SGR = R[n]; /* priv mode */",
830 " RAISE_EXCEPTION (SIGILL); /* user mode */",
832 { "", "n", "ldc <REG_N>,TBR", "0100nnnn01001010",
833 "if (SR_MD)", /* FIXME? */
834 " TBR = R[n]; /* priv mode */",
836 " RAISE_EXCEPTION (SIGILL); /* user mode */",
838 { "n", "n", "ldc.l @<REG_N>+,<CREG_M>", "0100nnnnmmmm0111",
840 "CREG (m) = RLAT (R[n]);",
842 "/* FIXME: user mode */",
844 { "n", "n", "ldc.l @<REG_N>+,SR", "0100nnnn00000111",
846 "SET_SR (RLAT (R[n]));",
848 "/* FIXME: user mode */",
850 { "n", "n", "ldc.l @<REG_N>+,MOD", "0100nnnn01010111",
852 "SET_MOD (RLAT (R[n]));",
855 { "n", "n", "ldc.l @<REG_N>+,DBR", "0100nnnn11110110",
859 " DBR = RLAT (R[n]);",
863 " RAISE_EXCEPTION (SIGILL); /* user mode */",
865 { "n", "n", "ldc.l @<REG_N>+,SGR", "0100nnnn00110110",
869 " SGR = RLAT (R[n]);",
873 " RAISE_EXCEPTION (SIGILL); /* user mode */",
877 { "", "", "ldre @(<disp>,PC)", "10001110i8p1....",
878 "RE = SEXT (i) * 2 + 4 + PH2T (PC);",
880 { "", "", "ldrs @(<disp>,PC)", "10001100i8p1....",
881 "RS = SEXT (i) * 2 + 4 + PH2T (PC);",
885 { "", "n", "ldrc <REG_N>", "0100nnnn00110100",
887 "loop = get_loop_bounds_ext (RS, RE, memory, mem_end, maskw, endianw);",
888 "CHECK_INSN_PTR (insn_ptr);",
891 { "", "", "ldrc #<imm>", "10001010i8*1....",
893 "loop = get_loop_bounds_ext (RS, RE, memory, mem_end, maskw, endianw);",
894 "CHECK_INSN_PTR (insn_ptr);",
898 { "", "n", "lds <REG_N>,<SREG_M>", "0100nnnnssss1010",
901 { "n", "n", "lds.l @<REG_N>+,<SREG_M>", "0100nnnnssss0110",
903 "SREG (m) = RLAT (R[n]);",
906 /* sh2e / sh-dsp (lds <REG_N>,DSR) */
907 { "", "n", "lds <REG_N>,FPSCR", "0100nnnn01101010",
910 /* sh2e / sh-dsp (lds.l @<REG_N>+,DSR) */
911 { "n", "n", "lds.l @<REG_N>+,FPSCR", "0100nnnn01100110",
913 "SET_FPSCR (RLAT (R[n]));",
917 { "", "", "ldtlb", "0000000000111000",
918 "/* We don't implement cache or tlb, so this is a noop. */",
921 { "nm", "nm", "mac.l @<REG_M>+,@<REG_N>+", "0000nnnnmmmm1111",
922 "macl (&R0, memory, n, m);",
925 { "nm", "nm", "mac.w @<REG_M>+,@<REG_N>+", "0100nnnnmmmm1111",
926 "macw (&R0, memory, n, m, endianw);",
929 { "n", "", "mov #<imm>,<REG_N>", "1110nnnni8*1....",
932 { "n", "", "movi20 #<imm20>,<REG_N>", "0000nnnni8*10000",
933 "RAISE_EXCEPTION_IF_IN_DELAY_SLOT ();",
934 "R[n] = ((i << 24) >> 12) | RIAT (nip);",
935 "SET_NIP (nip + 2); /* Consume 2 more bytes. */",
937 { "n", "", "movi20s #<imm20>,<REG_N>", "0000nnnni8*10001",
938 "RAISE_EXCEPTION_IF_IN_DELAY_SLOT ();",
939 "R[n] = ((((i & 0xf0) << 24) >> 12) | RIAT (nip)) << 8;",
940 "SET_NIP (nip + 2); /* Consume 2 more bytes. */",
942 { "n", "m", "mov <REG_M>,<REG_N>", "0110nnnnmmmm0011",
946 { "0", "", "mov.b @(<disp>,GBR),R0", "11000100i8*1....",
948 "R0 = RSBAT (i + GBR);",
951 { "0", "m", "mov.b @(<disp>,<REG_M>),R0", "10000100mmmmi4*1",
953 "R0 = RSBAT (i + R[m]);",
956 { "n", "0m", "mov.b @(R0,<REG_M>),<REG_N>", "0000nnnnmmmm1100",
958 "R[n] = RSBAT (R0 + R[m]);",
961 { "nm", "m", "mov.b @<REG_M>+,<REG_N>", "0110nnnnmmmm0100",
963 "R[n] = RSBAT (R[m]);",
967 { "0n", "n", "mov.b @-<REG_N>,R0", "0100nnnn11001011",
970 "R0 = RSBAT (R[n]);",
973 { "", "mn", "mov.b <REG_M>,@<REG_N>", "0010nnnnmmmm0000",
975 "WBAT (R[n], R[m]);",
977 { "", "0", "mov.b R0,@(<disp>,GBR)", "11000000i8*1....",
979 "WBAT (i + GBR, R0);",
981 { "", "m0", "mov.b R0,@(<disp>,<REG_M>)", "10000000mmmmi4*1",
983 "WBAT (i + R[m], R0);",
985 { "", "mn0", "mov.b <REG_M>,@(R0,<REG_N>)", "0000nnnnmmmm0100",
987 "WBAT (R[n] + R0, R[m]);",
989 { "n", "nm", "mov.b <REG_M>,@-<REG_N>", "0010nnnnmmmm0100",
990 /* Allow for the case where m == n. */
996 { "n", "n0", "mov.b R0,@<REG_N>+", "0100nnnn10001011",
1001 { "n", "m", "mov.b @<REG_M>,<REG_N>", "0110nnnnmmmm0000",
1003 "R[n] = RSBAT (R[m]);",
1007 { "0", "", "mov.l @(<disp>,GBR),R0", "11000110i8*4....",
1009 "R0 = RLAT (i + GBR);",
1012 { "n", "", "mov.l @(<disp>,PC),<REG_N>", "1101nnnni8p4....",
1013 "RAISE_EXCEPTION_IF_IN_DELAY_SLOT ();",
1015 "R[n] = RLAT ((PH2T (PC) & ~3) + 4 + i);",
1018 { "n", "m", "mov.l @(<disp>,<REG_M>),<REG_N>", "0101nnnnmmmmi4*4",
1020 "R[n] = RLAT (i + R[m]);",
1023 { "n", "m0", "mov.l @(R0,<REG_M>),<REG_N>", "0000nnnnmmmm1110",
1025 "R[n] = RLAT (R0 + R[m]);",
1028 { "nm", "m", "mov.l @<REG_M>+,<REG_N>", "0110nnnnmmmm0110",
1030 "R[n] = RLAT (R[m]);",
1034 { "0n", "n", "mov.l @-<REG_N>,R0", "0100nnnn11101011",
1037 "R0 = RLAT (R[n]);",
1040 { "n", "m", "mov.l @<REG_M>,<REG_N>", "0110nnnnmmmm0010",
1042 "R[n] = RLAT (R[m]);",
1045 { "", "0", "mov.l R0,@(<disp>,GBR)", "11000010i8*4....",
1047 "WLAT (i + GBR, R0);",
1049 { "", "nm", "mov.l <REG_M>,@(<disp>,<REG_N>)", "0001nnnnmmmmi4*4",
1051 "WLAT (i + R[n], R[m]);",
1053 { "", "nm0", "mov.l <REG_M>,@(R0,<REG_N>)", "0000nnnnmmmm0110",
1055 "WLAT (R0 + R[n], R[m]);",
1057 { "n", "nm", "mov.l <REG_M>,@-<REG_N>", "0010nnnnmmmm0110",
1058 /* Allow for the case where m == n. */
1064 { "n", "n0", "mov.l R0,@<REG_N>+", "0100nnnn10101011",
1069 { "", "nm", "mov.l <REG_M>,@<REG_N>", "0010nnnnmmmm0010",
1071 "WLAT (R[n], R[m]);",
1074 { "0", "", "mov.w @(<disp>,GBR),R0", "11000101i8*2....",
1076 "R0 = RSWAT (i + GBR);",
1079 { "n", "", "mov.w @(<disp>,PC),<REG_N>", "1001nnnni8p2....",
1080 "RAISE_EXCEPTION_IF_IN_DELAY_SLOT ();",
1082 "R[n] = RSWAT (PH2T (PC + 4 + i));",
1085 { "0", "m", "mov.w @(<disp>,<REG_M>),R0", "10000101mmmmi4*2",
1087 "R0 = RSWAT (i + R[m]);",
1090 { "n", "m0", "mov.w @(R0,<REG_M>),<REG_N>", "0000nnnnmmmm1101",
1092 "R[n] = RSWAT (R0 + R[m]);",
1095 { "nm", "n", "mov.w @<REG_M>+,<REG_N>", "0110nnnnmmmm0101",
1097 "R[n] = RSWAT (R[m]);",
1101 { "0n", "n", "mov.w @-<REG_N>,R0", "0100nnnn11011011",
1104 "R0 = RSWAT (R[n]);",
1107 { "n", "m", "mov.w @<REG_M>,<REG_N>", "0110nnnnmmmm0001",
1109 "R[n] = RSWAT (R[m]);",
1112 { "", "0", "mov.w R0,@(<disp>,GBR)", "11000001i8*2....",
1114 "WWAT (i + GBR, R0);",
1116 { "", "0m", "mov.w R0,@(<disp>,<REG_M>)", "10000001mmmmi4*2",
1118 "WWAT (i + R[m], R0);",
1120 { "", "m0n", "mov.w <REG_M>,@(R0,<REG_N>)", "0000nnnnmmmm0101",
1122 "WWAT (R0 + R[n], R[m]);",
1124 { "n", "mn", "mov.w <REG_M>,@-<REG_N>", "0010nnnnmmmm0101",
1125 /* Allow for the case where m == n. */
1131 { "n", "0n", "mov.w R0,@<REG_N>+", "0100nnnn10011011",
1136 { "", "nm", "mov.w <REG_M>,@<REG_N>", "0010nnnnmmmm0001",
1138 "WWAT (R[n], R[m]);",
1141 { "0", "", "mova @(<disp>,PC),R0", "11000111i8p4....",
1142 "RAISE_EXCEPTION_IF_IN_DELAY_SLOT ();",
1143 "R0 = ((i + 4 + PH2T (PC)) & ~0x3);",
1146 { "", "n0", "movca.l R0, @<REG_N>", "0000nnnn11000011",
1147 "/* We don't simulate cache, so this insn is identical to mov. */",
1149 "WLAT (R[n], R[0]);",
1152 { "", "n0", "movco.l R0, @<REG_N>", "0000nnnn01110011",
1155 "/* if (T) R0 -> (Rn) */",
1157 " WLAT (R[n], R[0]);",
1162 { "0", "n", "movli.l @<REG_N>, R0", "0000nnnn01100011",
1166 "R[0] = RLAT (R[n]);",
1167 "/* if (interrupt/exception) 0 -> LDST */",
1168 "/* (we don't simulate asynchronous interrupts/exceptions) */",
1171 { "n", "", "movt <REG_N>", "0000nnnn00101001",
1174 { "", "", "movrt <REG_N>", "0000nnnn00111001",
1177 { "0", "n", "movua.l @<REG_N>,R0", "0100nnnn10101001",
1179 "int e = target_little_endian ? 3 : 0;",
1181 "R[0] = (RBAT (regn + (0^e)) << 24) + (RBAT (regn + (1^e)) << 16) + ",
1182 " (RBAT (regn + (2^e)) << 8) + RBAT (regn + (3^e));",
1185 { "0n", "n", "movua.l @<REG_N>+,R0", "0100nnnn11101001",
1187 "int e = target_little_endian ? 3 : 0;",
1189 "R[0] = (RBAT (regn + (0^e)) << 24) + (RBAT (regn + (1^e)) << 16) + ",
1190 " (RBAT (regn + (2^e)) << 8) + RBAT (regn + (3^e));",
1194 { "", "mn", "mul.l <REG_M>,<REG_N>", "0000nnnnmmmm0111",
1195 "MACL = ((int) R[n]) * ((int) R[m]);",
1197 #if 0 /* FIXME: The above cast to int is not really portable.
1198 It should be replaced by a SEXT32 macro. */
1199 { "", "nm", "mul.l <REG_M>,<REG_N>", "0000nnnnmmmm0111",
1200 "MACL = R[n] * R[m];",
1204 /* muls.w - see muls */
1205 { "", "mn", "muls <REG_M>,<REG_N>", "0010nnnnmmmm1111",
1206 "MACL = ((int) (short) R[n]) * ((int) (short) R[m]);",
1209 /* mulu.w - see mulu */
1210 { "", "mn", "mulu <REG_M>,<REG_N>", "0010nnnnmmmm1110",
1211 "MACL = (((unsigned int) (unsigned short) R[n])",
1212 " * ((unsigned int) (unsigned short) R[m]));",
1215 { "n", "m", "neg <REG_M>,<REG_N>", "0110nnnnmmmm1011",
1219 { "n", "m", "negc <REG_M>,<REG_N>", "0110nnnnmmmm1010",
1221 "SET_SR_T (ult > 0);",
1222 "R[n] = ult - R[m];",
1223 "SET_SR_T (T || (R[n] > ult));",
1226 { "", "", "nop", "0000000000001001",
1230 { "n", "m", "not <REG_M>,<REG_N>", "0110nnnnmmmm0111",
1235 { "", "n", "icbi @<REG_N>", "0000nnnn11100011",
1236 "/* Except for the effect on the cache - which is not simulated -",
1237 " this is like a nop. */",
1240 { "", "n", "ocbi @<REG_N>", "0000nnnn10010011",
1241 "RSBAT (R[n]); /* Take exceptions like byte load, otherwise noop. */",
1242 "/* FIXME: Cache not implemented */",
1245 { "", "n", "ocbp @<REG_N>", "0000nnnn10100011",
1246 "RSBAT (R[n]); /* Take exceptions like byte load, otherwise noop. */",
1247 "/* FIXME: Cache not implemented */",
1250 { "", "n", "ocbwb @<REG_N>", "0000nnnn10110011",
1251 "RSBAT (R[n]); /* Take exceptions like byte load, otherwise noop. */",
1252 "/* FIXME: Cache not implemented */",
1255 { "0", "", "or #<imm>,R0", "11001011i8*1....",
1258 { "n", "m", "or <REG_M>,<REG_N>", "0010nnnnmmmm1011",
1261 { "", "0", "or.b #<imm>,@(R0,GBR)", "11001111i8*1....",
1263 "WBAT (R0 + GBR, (RBAT (R0 + GBR) | i));",
1266 { "", "n", "pref @<REG_N>", "0000nnnn10000011",
1267 "/* Except for the effect on the cache - which is not simulated -",
1268 " this is like a nop. */",
1272 { "", "n", "prefi @<REG_N>", "0000nnnn11010011",
1273 "/* Except for the effect on the cache - which is not simulated -",
1274 " this is like a nop. */",
1278 { "", "", "synco", "0000000010101011",
1279 "/* Except for the effect on the pipeline - which is not simulated -",
1280 " this is like a nop. */",
1283 { "n", "n", "rotcl <REG_N>", "0100nnnn00100100",
1285 "R[n] = (R[n] << 1) | T;",
1289 { "n", "n", "rotcr <REG_N>", "0100nnnn00100101",
1291 "R[n] = (UR[n] >> 1) | (T << 31);",
1295 { "n", "n", "rotl <REG_N>", "0100nnnn00000100",
1296 "SET_SR_T (R[n] < 0);",
1301 { "n", "n", "rotr <REG_N>", "0100nnnn00000101",
1302 "SET_SR_T (R[n] & 1);",
1303 "R[n] = UR[n] >> 1;",
1304 "R[n] |= (T << 31);",
1307 { "", "", "rte", "0000000000101011",
1311 "SET_NIP (PT2H (RLAT (R[15]) + 2));",
1313 "SET_SR (RLAT (R[15]) & 0x3f3);",
1315 "Delay_Slot (PC + 2);",
1317 "RAISE_EXCEPTION_IF_IN_DELAY_SLOT ();",
1319 "SET_NIP (PT2H (SPC));",
1321 "Delay_Slot (PC + 2);",
1325 { "", "", "rts", "0000000000001011",
1326 "RAISE_EXCEPTION_IF_IN_DELAY_SLOT ();",
1327 "SET_NIP (PT2H (PR));",
1329 "Delay_Slot (PC + 2);",
1331 { "", "", "rts/n", "0000000001101011",
1332 "RAISE_EXCEPTION_IF_IN_DELAY_SLOT ();",
1333 "SET_NIP (PT2H (PR));",
1335 { "0", "n", "rtv/n <REG_N>", "0000nnnn01111011",
1336 "RAISE_EXCEPTION_IF_IN_DELAY_SLOT ();",
1339 "SET_NIP (PT2H (PR));",
1343 { "", "", "setdmx", "0000000010011000",
1344 "saved_state.asregs.cregs.named.sr |= SR_MASK_DMX;"
1345 "saved_state.asregs.cregs.named.sr &= ~SR_MASK_DMY;"
1349 { "", "", "setdmy", "0000000011001000",
1350 "saved_state.asregs.cregs.named.sr |= SR_MASK_DMY;"
1351 "saved_state.asregs.cregs.named.sr &= ~SR_MASK_DMX;"
1355 { "", "n", "setrc <REG_N>", "0100nnnn00010100",
1358 { "", "", "setrc #<imm>", "10000010i8*1....",
1359 /* It would be more realistic to let loop_start point to some static
1360 memory that contains an illegal opcode and then give a bus error when
1361 the loop is eventually encountered, but it seems not only simpler,
1362 but also more debugging-friendly to just catch the failure here. */
1363 "if (BUSERROR (RS | RE, maskw))",
1364 " RAISE_EXCEPTION (SIGILL);",
1367 " loop = get_loop_bounds (RS, RE, memory, mem_end, maskw, endianw);",
1368 " CHECK_INSN_PTR (insn_ptr);",
1372 { "", "", "sets", "0000000001011000",
1376 { "", "", "sett", "0000000000011000",
1380 { "n", "mn", "shad <REG_M>,<REG_N>", "0100nnnnmmmm1100",
1381 "R[n] = (R[m] < 0) ? (R[m]&0x1f ? R[n] >> ((-R[m])&0x1f) : R[n] >> 31) : (R[n] << (R[m] & 0x1f));",
1384 { "n", "n", "shal <REG_N>", "0100nnnn00100000",
1385 "SET_SR_T (R[n] < 0);",
1389 { "n", "n", "shar <REG_N>", "0100nnnn00100001",
1390 "SET_SR_T (R[n] & 1);",
1391 "R[n] = R[n] >> 1;",
1394 { "n", "mn", "shld <REG_M>,<REG_N>", "0100nnnnmmmm1101",
1395 "R[n] = (R[m] < 0) ? (R[m]&0x1f ? UR[n] >> ((-R[m])&0x1f) : 0): (R[n] << (R[m] & 0x1f));",
1398 { "n", "n", "shll <REG_N>", "0100nnnn00000000",
1399 "SET_SR_T (R[n] < 0);",
1403 { "n", "n", "shll2 <REG_N>", "0100nnnn00001000",
1406 { "n", "n", "shll8 <REG_N>", "0100nnnn00011000",
1409 { "n", "n", "shll16 <REG_N>", "0100nnnn00101000",
1413 { "n", "n", "shlr <REG_N>", "0100nnnn00000001",
1414 "SET_SR_T (R[n] & 1);",
1415 "R[n] = UR[n] >> 1;",
1418 { "n", "n", "shlr2 <REG_N>", "0100nnnn00001001",
1419 "R[n] = UR[n] >> 2;",
1421 { "n", "n", "shlr8 <REG_N>", "0100nnnn00011001",
1422 "R[n] = UR[n] >> 8;",
1424 { "n", "n", "shlr16 <REG_N>", "0100nnnn00101001",
1425 "R[n] = UR[n] >> 16;",
1428 { "", "", "sleep", "0000000000011011",
1429 "nip += trap (0xc3, &R0, PC, memory, maskl, maskw, endianw);",
1432 { "n", "", "stc <CREG_M>,<REG_N>", "0000nnnnmmmm0010",
1436 { "n", "", "stc SGR,<REG_N>", "0000nnnn00111010",
1438 " R[n] = SGR; /* priv mode */",
1440 " RAISE_EXCEPTION (SIGILL); /* user mode */",
1442 { "n", "", "stc DBR,<REG_N>", "0000nnnn11111010",
1444 " R[n] = DBR; /* priv mode */",
1446 " RAISE_EXCEPTION (SIGILL); /* user mode */",
1448 { "n", "", "stc TBR,<REG_N>", "0000nnnn01001010",
1449 "if (SR_MD)", /* FIXME? */
1450 " R[n] = TBR; /* priv mode */",
1452 " RAISE_EXCEPTION (SIGILL); /* user mode */",
1454 { "n", "n", "stc.l <CREG_M>,@-<REG_N>", "0100nnnnmmmm0011",
1457 "WLAT (R[n], CREG (m));",
1459 { "n", "n", "stc.l SGR,@-<REG_N>", "0100nnnn00110010",
1461 "{ /* priv mode */",
1464 " WLAT (R[n], SGR);",
1467 " RAISE_EXCEPTION (SIGILL); /* user mode */",
1469 { "n", "n", "stc.l DBR,@-<REG_N>", "0100nnnn11110010",
1471 "{ /* priv mode */",
1474 " WLAT (R[n], DBR);",
1477 " RAISE_EXCEPTION (SIGILL); /* user mode */",
1480 { "n", "", "sts <SREG_M>,<REG_N>", "0000nnnnssss1010",
1483 { "n", "n", "sts.l <SREG_M>,@-<REG_N>", "0100nnnnssss0010",
1486 "WLAT (R[n], SREG (m));",
1489 { "n", "nm", "sub <REG_M>,<REG_N>", "0011nnnnmmmm1000",
1493 { "n", "nm", "subc <REG_M>,<REG_N>", "0011nnnnmmmm1010",
1495 "SET_SR_T (ult > R[n]);",
1496 "R[n] = ult - R[m];",
1497 "SET_SR_T (T || (R[n] > ult));",
1500 { "n", "nm", "subv <REG_M>,<REG_N>", "0011nnnnmmmm1011",
1501 "ult = R[n] - R[m];",
1502 "SET_SR_T (((R[n] ^ R[m]) & (ult ^ R[n])) >> 31);",
1506 { "n", "nm", "swap.b <REG_M>,<REG_N>", "0110nnnnmmmm1000",
1507 "R[n] = ((R[m] & 0xffff0000)",
1508 " | ((R[m] << 8) & 0xff00)",
1509 " | ((R[m] >> 8) & 0x00ff));",
1511 { "n", "nm", "swap.w <REG_M>,<REG_N>", "0110nnnnmmmm1001",
1512 "R[n] = (((R[m] << 16) & 0xffff0000)",
1513 " | ((R[m] >> 16) & 0x00ffff));",
1516 { "", "n", "tas.b @<REG_N>", "0100nnnn00011011",
1518 "ult = RBAT (R[n]);",
1519 "SET_SR_T (ult == 0);",
1520 "WBAT (R[n],ult|0x80);",
1523 { "0", "", "trapa #<imm>", "11000011i8*1....",
1524 "long imm = 0xff & i;",
1525 "RAISE_EXCEPTION_IF_IN_DELAY_SLOT ();",
1526 "if (i < 20 || i == 33 || i == 34 || i == 0xc3)",
1527 " nip += trap (i, &R0, PC, memory, maskl, maskw, endianw);",
1532 " WLAT (R[15], GET_SR ());",
1534 " WLAT (R[15], PH2T (PC + 2));",
1536 "else if (!SR_BL) {",
1537 " SSR = GET_SR ();",
1538 " SPC = PH2T (PC + 2);",
1539 " SET_SR (GET_SR () | SR_MASK_MD | SR_MASK_BL | SR_MASK_RB);",
1540 " /* FIXME: EXPEVT = 0x00000160; */",
1542 " SET_NIP (PT2H (RLAT (VBR + (imm<<2))));",
1546 { "", "mn", "tst <REG_M>,<REG_N>", "0010nnnnmmmm1000",
1547 "SET_SR_T ((R[n] & R[m]) == 0);",
1549 { "", "0", "tst #<imm>,R0", "11001000i8*1....",
1550 "SET_SR_T ((R0 & i) == 0);",
1552 { "", "0", "tst.b #<imm>,@(R0,GBR)", "11001100i8*1....",
1554 "SET_SR_T ((RBAT (GBR+R0) & i) == 0);",
1557 { "", "0", "xor #<imm>,R0", "11001010i8*1....",
1560 { "n", "mn", "xor <REG_M>,<REG_N>", "0010nnnnmmmm1010",
1563 { "", "0", "xor.b #<imm>,@(R0,GBR)", "11001110i8*1....",
1565 "ult = RBAT (GBR+R0);",
1567 "WBAT (GBR + R0, ult);",
1570 { "n", "nm", "xtrct <REG_M>,<REG_N>", "0010nnnnmmmm1101",
1571 "R[n] = (((R[n] >> 16) & 0xffff)",
1572 " | ((R[m] << 16) & 0xffff0000));",
1576 { "divs.l <REG_M>,<REG_N>", "0100nnnnmmmm1110",
1577 "divl (0, R[n], R[m]);",
1579 { "divu.l <REG_M>,<REG_N>", "0100nnnnmmmm1101",
1580 "divl (0, R[n], R[m]);",
1588 /* If this is disabled, the simulator speeds up by about 12% on a
1589 450 MHz PIII - 9% with ACE_FAST.
1590 Maybe we should have separate simulator loops? */
1592 { "n", "n", "movs.w @-<REG_N>,<DSP_REG_M>", "111101NNMMMM0000",
1595 "DSP_R (m) = RSWAT (R[n]) << 16;",
1596 "DSP_GRD (m) = SIGN32 (DSP_R (m));",
1598 { "", "n", "movs.w @<REG_N>,<DSP_REG_M>", "111101NNMMMM0100",
1600 "DSP_R (m) = RSWAT (R[n]) << 16;",
1601 "DSP_GRD (m) = SIGN32 (DSP_R (m));",
1603 { "n", "n", "movs.w @<REG_N>+,<DSP_REG_M>", "111101NNMMMM1000",
1605 "DSP_R (m) = RSWAT (R[n]) << 16;",
1606 "DSP_GRD (m) = SIGN32 (DSP_R (m));",
1609 { "n", "n8","movs.w @<REG_N>+REG_8,<DSP_REG_M>", "111101NNMMMM1100",
1611 "DSP_R (m) = RSWAT (R[n]) << 16;",
1612 "DSP_GRD (m) = SIGN32 (DSP_R (m));",
1615 { "n", "n", "movs.w @-<REG_N>,<DSP_GRD_M>", "111101NNGGGG0000",
1618 "DSP_R (m) = RSWAT (R[n]);",
1620 { "", "n", "movs.w @<REG_N>,<DSP_GRD_M>", "111101NNGGGG0100",
1622 "DSP_R (m) = RSWAT (R[n]);",
1624 { "n", "n", "movs.w @<REG_N>+,<DSP_GRD_M>", "111101NNGGGG1000",
1626 "DSP_R (m) = RSWAT (R[n]);",
1629 { "n", "n8","movs.w @<REG_N>+REG_8,<DSP_GRD_M>", "111101NNGGGG1100",
1631 "DSP_R (m) = RSWAT (R[n]);",
1634 { "n", "n", "movs.w <DSP_REG_M>,@-<REG_N>", "111101NNMMMM0001",
1637 "WWAT (R[n], DSP_R (m) >> 16);",
1639 { "", "n", "movs.w <DSP_REG_M>,@<REG_N>", "111101NNMMMM0101",
1641 "WWAT (R[n], DSP_R (m) >> 16);",
1643 { "n", "n", "movs.w <DSP_REG_M>,@<REG_N>+", "111101NNMMMM1001",
1645 "WWAT (R[n], DSP_R (m) >> 16);",
1648 { "n", "n8","movs.w <DSP_REG_M>,@<REG_N>+REG_8", "111101NNMMMM1101",
1650 "WWAT (R[n], DSP_R (m) >> 16);",
1653 { "n", "n", "movs.w <DSP_GRD_M>,@-<REG_N>", "111101NNGGGG0001",
1656 "WWAT (R[n], SEXT (DSP_R (m)));",
1658 { "", "n", "movs.w <DSP_GRD_M>,@<REG_N>", "111101NNGGGG0101",
1660 "WWAT (R[n], SEXT (DSP_R (m)));",
1662 { "n", "n", "movs.w <DSP_GRD_M>,@<REG_N>+", "111101NNGGGG1001",
1664 "WWAT (R[n], SEXT (DSP_R (m)));",
1667 { "n", "n8","movs.w <DSP_GRD_M>,@<REG_N>+REG_8", "111101NNGGGG1101",
1669 "WWAT (R[n], SEXT (DSP_R (m)));",
1672 { "n", "n", "movs.l @-<REG_N>,<DSP_REG_M>", "111101NNMMMM0010",
1675 "DSP_R (m) = RLAT (R[n]);",
1676 "DSP_GRD (m) = SIGN32 (DSP_R (m));",
1678 { "", "n", "movs.l @<REG_N>,<DSP_REG_M>", "111101NNMMMM0110",
1680 "DSP_R (m) = RLAT (R[n]);",
1681 "DSP_GRD (m) = SIGN32 (DSP_R (m));",
1683 { "n", "n", "movs.l @<REG_N>+,<DSP_REG_M>", "111101NNMMMM1010",
1685 "DSP_R (m) = RLAT (R[n]);",
1686 "DSP_GRD (m) = SIGN32 (DSP_R (m));",
1689 { "n", "n8","movs.l @<REG_N>+REG_8,<DSP_REG_M>", "111101NNMMMM1110",
1691 "DSP_R (m) = RLAT (R[n]);",
1692 "DSP_GRD (m) = SIGN32 (DSP_R (m));",
1695 { "n", "n", "movs.l <DSP_REG_M>,@-<REG_N>", "111101NNMMMM0011",
1698 "WLAT (R[n], DSP_R (m));",
1700 { "", "n", "movs.l <DSP_REG_M>,@<REG_N>", "111101NNMMMM0111",
1702 "WLAT (R[n], DSP_R (m));",
1704 { "n", "n", "movs.l <DSP_REG_M>,@<REG_N>+", "111101NNMMMM1011",
1706 "WLAT (R[n], DSP_R (m));",
1709 { "n", "n8","movs.l <DSP_REG_M>,@<REG_N>+REG_8", "111101NNMMMM1111",
1711 "WLAT (R[n], DSP_R (m));",
1714 { "n", "n", "movs.l <DSP_GRD_M>,@-<REG_N>", "111101NNGGGG0011",
1717 "WLAT (R[n], SEXT (DSP_R (m)));",
1719 { "", "n", "movs.l <DSP_GRD_M>,@<REG_N>", "111101NNGGGG0111",
1721 "WLAT (R[n], SEXT (DSP_R (m)));",
1723 { "n", "n", "movs.l <DSP_GRD_M>,@<REG_N>+", "111101NNGGGG1011",
1725 "WLAT (R[n], SEXT (DSP_R (m)));",
1728 { "n", "n8","movs.l <DSP_GRD_M>,@<REG_N>+REG_8", "111101NNGGGG1111",
1730 "WLAT (R[n], SEXT (DSP_R (m)));",
1733 { "", "n", "movx.w @<REG_xy>,<DSP_XY>", "111100xyXY0001??",
1734 "DSP_R (m) = RSWAT (R[n]) << 16;",
1737 " iword &= 0xfd53; goto top;",
1740 { "", "n", "movx.l @<REG_xy>,<DSP_XY>", "111100xyXY010100",
1741 "DSP_R (m) = RLAT (R[n]);",
1743 { "n", "n", "movx.w @<REG_xy>+,<DSP_XY>", "111100xyXY0010??",
1744 "DSP_R (m) = RSWAT (R[n]) << 16;",
1745 "R[n] += ((R[n] & 0xffff) == MOD_ME) ? MOD_DELTA : 2;",
1748 " iword &= 0xfd53; goto top;",
1751 { "n", "n", "movx.l @<REG_xy>+,<DSP_XY>", "111100xyXY011000",
1752 "DSP_R (m) = RLAT (R[n]);",
1753 "R[n] += ((R[n] & 0xffff) == MOD_ME) ? MOD_DELTA : 4;",
1755 { "n", "n8","movx.w @<REG_xy>+REG_8,<DSP_XY>", "111100xyXY0011??",
1756 "DSP_R (m) = RSWAT (R[n]) << 16;",
1757 "R[n] += ((R[n] & 0xffff) == MOD_ME) ? MOD_DELTA : R[8];",
1760 " iword &= 0xfd53; goto top;",
1763 { "n", "n8","movx.l @<REG_xy>+REG_8,<DSP_XY>", "111100xyXY011100",
1764 "DSP_R (m) = RLAT (R[n]);",
1765 "R[n] += ((R[n] & 0xffff) == MOD_ME) ? MOD_DELTA : R[8];",
1767 { "", "n", "movx.w <DSP_Ax>,@<REG_xy>", "111100xyax1001??",
1768 "WWAT (R[n], DSP_R (m) >> 16);",
1771 " iword &= 0xfd53; goto top;",
1774 { "", "n", "movx.l <DSP_Ax>,@<REG_xy>", "111100xyax110100",
1775 "WLAT (R[n], DSP_R (m));",
1777 { "n", "n", "movx.w <DSP_Ax>,@<REG_xy>+", "111100xyax1010??",
1778 "WWAT (R[n], DSP_R (m) >> 16);",
1779 "R[n] += ((R[n] & 0xffff) == MOD_ME) ? MOD_DELTA : 2;",
1782 " iword &= 0xfd53; goto top;",
1785 { "n", "n", "movx.l <DSP_Ax>,@<REG_xy>+", "111100xyax111000",
1786 "WLAT (R[n], DSP_R (m));",
1787 "R[n] += ((R[n] & 0xffff) == MOD_ME) ? MOD_DELTA : 4;",
1789 { "n", "n8","movx.w <DSP_Ax>,@<REG_xy>+REG_8","111100xyax1011??",
1790 "WWAT (R[n], DSP_R (m) >> 16);",
1791 "R[n] += ((R[n] & 0xffff) == MOD_ME) ? MOD_DELTA : R[8];",
1794 " iword &= 0xfd53; goto top;",
1797 { "n", "n8","movx.l <DSP_Ax>,@<REG_xy>+REG_8","111100xyax111100",
1798 "WLAT (R[n], DSP_R (m));",
1799 "R[n] += ((R[n] & 0xffff) == MOD_ME) ? MOD_DELTA : R[8];",
1801 { "", "n", "movy.w @<REG_yx>,<DSP_YX>", "111100yxYX000001",
1802 "DSP_R (m) = RSWAT (R[n]) << 16;",
1804 { "n", "n", "movy.w @<REG_yx>+,<DSP_YX>", "111100yxYX000010",
1805 "DSP_R (m) = RSWAT (R[n]) << 16;",
1806 "R[n] += ((R[n] | ~0xffff) == MOD_ME) ? MOD_DELTA : 2;",
1808 { "n", "n9","movy.w @<REG_yx>+REG_9,<DSP_YX>", "111100yxYX000011",
1809 "DSP_R (m) = RSWAT (R[n]) << 16;",
1810 "R[n] += ((R[n] | ~0xffff) == MOD_ME) ? MOD_DELTA : R[9];",
1812 { "", "n", "movy.w <DSP_Ay>,@<REG_yx>", "111100yxAY010001",
1813 "WWAT (R[n], DSP_R (m) >> 16);",
1815 { "n", "n", "movy.w <DSP_Ay>,@<REG_yx>+", "111100yxAY010010",
1816 "WWAT (R[n], DSP_R (m) >> 16);",
1817 "R[n] += ((R[n] | ~0xffff) == MOD_ME) ? MOD_DELTA : 2;",
1819 { "n", "n9", "movy.w <DSP_Ay>,@<REG_yx>+REG_9", "111100yxAY010011",
1820 "WWAT (R[n], DSP_R (m) >> 16);",
1821 "R[n] += ((R[n] | ~0xffff) == MOD_ME) ? MOD_DELTA : R[9];",
1823 { "", "n", "movy.l @<REG_yx>,<DSP_YX>", "111100yxYX100001",
1824 "DSP_R (m) = RLAT (R[n]);",
1826 { "n", "n", "movy.l @<REG_yx>+,<DSP_YX>", "111100yxYX100010",
1827 "DSP_R (m) = RLAT (R[n]);",
1828 "R[n] += ((R[n] | ~0xffff) == MOD_ME) ? MOD_DELTA : 4;",
1830 { "n", "n9","movy.l @<REG_yx>+REG_9,<DSP_YX>", "111100yxYX100011",
1831 "DSP_R (m) = RLAT (R[n]);",
1832 "R[n] += ((R[n] | ~0xffff) == MOD_ME) ? MOD_DELTA : R[9];",
1834 { "", "n", "movy.l <DSP_Ay>,@<REG_yx>", "111100yxAY110001",
1835 "WLAT (R[n], DSP_R (m));",
1837 { "n", "n", "movy.l <DSP_Ay>,@<REG_yx>+", "111100yxAY110010",
1838 "WLAT (R[n], DSP_R (m));",
1839 "R[n] += ((R[n] | ~0xffff) == MOD_ME) ? MOD_DELTA : 4;",
1841 { "n", "n9", "movy.l <DSP_Ay>,@<REG_yx>+REG_9", "111100yxAY110011",
1842 "WLAT (R[n], DSP_R (m));",
1843 "R[n] += ((R[n] | ~0xffff) == MOD_ME) ? MOD_DELTA : R[9];",
1845 { "", "", "nopx nopy", "1111000000000000",
1848 { "", "", "ppi", "1111100000000000",
1849 "RAISE_EXCEPTION_IF_IN_DELAY_SLOT ();",
1850 "ppi_insn (RIAT (nip));",
1851 "SET_NIP (nip + 2);",
1852 "iword &= 0xf7ff; goto top;",
1859 { "","", "pshl #<imm>,dz", "00000iiim16.zzzz",
1860 "int Sz = DSP_R (z) & 0xffff0000;",
1864 "else if (i >= 128 - 16)",
1865 " res = (unsigned) Sz >> 128 - i; /* no sign extension */",
1868 " RAISE_EXCEPTION (SIGILL);",
1871 "res &= 0xffff0000;",
1875 { "","", "psha #<imm>,dz", "00010iiim32.zzzz",
1876 "int Sz = DSP_R (z);",
1877 "int Sz_grd = GET_DSP_GRD (z);",
1889 " res_grd = Sz_grd << i | (unsigned) Sz >> 32 - i;",
1891 " res_grd = SEXT (res_grd);",
1892 " carry = res_grd & 1;",
1894 "else if (i >= 96)",
1899 " res_grd = SIGN32 (Sz_grd);",
1904 " res = Sz >> i | Sz_grd << 32 - i;",
1905 " res_grd = Sz_grd >> i;",
1907 " carry = Sz >> (i - 1) & 1;",
1911 " RAISE_EXCEPTION (SIGILL);",
1914 "COMPUTE_OVERFLOW;",
1915 "greater_equal = 0;",
1917 { "","", "pmuls Se,Sf,Dg", "0100eeffxxyygguu",
1918 "res = (DSP_R (e) >> 16) * (DSP_R (f) >> 16) * 2;",
1919 "if (res == 0x80000000)",
1920 " res = 0x7fffffff;",
1922 "DSP_GRD (g) = SIGN32 (res);",
1925 { "","", "psub Sx,Sy,Du pmuls Se,Sf,Dg", "0110eeffxxyygguu",
1926 "int Sx = DSP_R (x);",
1927 "int Sx_grd = GET_DSP_GRD (x);",
1928 "int Sy = DSP_R (y);",
1929 "int Sy_grd = SIGN32 (Sy);",
1931 "res = (DSP_R (e) >> 16) * (DSP_R (f) >> 16) * 2;",
1932 "if (res == 0x80000000)",
1933 " res = 0x7fffffff;",
1935 "DSP_GRD (g) = SIGN32 (res);",
1939 "carry = (unsigned) res > (unsigned) Sx;",
1940 "res_grd = Sx_grd - Sy_grd - carry;",
1941 "COMPUTE_OVERFLOW;",
1944 { "","", "padd Sx,Sy,Du pmuls Se,Sf,Dg", "0111eeffxxyygguu",
1945 "int Sx = DSP_R (x);",
1946 "int Sx_grd = GET_DSP_GRD (x);",
1947 "int Sy = DSP_R (y);",
1948 "int Sy_grd = SIGN32 (Sy);",
1950 "res = (DSP_R (e) >> 16) * (DSP_R (f) >> 16) * 2;",
1951 "if (res == 0x80000000)",
1952 " res = 0x7fffffff;",
1954 "DSP_GRD (g) = SIGN32 (res);",
1958 "carry = (unsigned) res < (unsigned) Sx;",
1959 "res_grd = Sx_grd + Sy_grd + carry;",
1960 "COMPUTE_OVERFLOW;",
1962 { "","", "psubc Sx,Sy,Dz", "10100000xxyyzzzz",
1963 "int Sx = DSP_R (x);",
1964 "int Sx_grd = GET_DSP_GRD (x);",
1965 "int Sy = DSP_R (y);",
1966 "int Sy_grd = SIGN32 (Sy);",
1968 "res = Sx - Sy - (DSR & 1);",
1969 "carry = (unsigned) res > (unsigned) Sx || (res == Sx && Sy);",
1970 "res_grd = Sx_grd + Sy_grd + carry;",
1971 "COMPUTE_OVERFLOW;",
1974 "if (res || res_grd)\n",
1975 " DSR |= greater_equal | res_grd >> 2 & DSR_MASK_N | overflow;\n",
1977 " DSR |= DSR_MASK_Z | overflow;\n",
1981 { "","", "paddc Sx,Sy,Dz", "10110000xxyyzzzz",
1982 "int Sx = DSP_R (x);",
1983 "int Sx_grd = GET_DSP_GRD (x);",
1984 "int Sy = DSP_R (y);",
1985 "int Sy_grd = SIGN32 (Sy);",
1987 "res = Sx + Sy + (DSR & 1);",
1988 "carry = (unsigned) res < (unsigned) Sx || (res == Sx && Sy);",
1989 "res_grd = Sx_grd + Sy_grd + carry;",
1990 "COMPUTE_OVERFLOW;",
1993 "if (res || res_grd)\n",
1994 " DSR |= greater_equal | res_grd >> 2 & DSR_MASK_N | overflow;\n",
1996 " DSR |= DSR_MASK_Z | overflow;\n",
2000 { "","", "pcmp Sx,Sy", "10000100xxyyzzzz",
2001 "int Sx = DSP_R (x);",
2002 "int Sx_grd = GET_DSP_GRD (x);",
2003 "int Sy = DSP_R (y);",
2004 "int Sy_grd = SIGN32 (Sy);",
2006 "z = 17; /* Ignore result. */",
2008 "carry = (unsigned) res > (unsigned) Sx;",
2009 "res_grd = Sx_grd - Sy_grd - carry;",
2010 "COMPUTE_OVERFLOW;",
2013 { "","", "pwsb Sx,Sy,Dz", "10100100xxyyzzzz",
2015 { "","", "pwad Sx,Sy,Dz", "10110100xxyyzzzz",
2017 { "","", "(if cc) pabs Sx,Dz", "100010ccxx01zzzz",
2018 "/* FIXME: duplicate code pabs. */",
2020 "res_grd = GET_DSP_GRD (x);",
2026 " carry = (res != 0); /* The manual has a bug here. */",
2027 " res_grd = -res_grd - carry;",
2029 "COMPUTE_OVERFLOW;",
2030 "/* ??? The re-computing of overflow after",
2031 " saturation processing is specific to pabs. */",
2032 "overflow = res_grd != SIGN32 (res) ? DSR_MASK_V : 0;",
2035 { "","", "pabs Sx,Dz", "10001000xx..zzzz",
2037 "res_grd = GET_DSP_GRD (x);",
2043 " carry = (res != 0); /* The manual has a bug here. */",
2044 " res_grd = -res_grd - carry;",
2046 "COMPUTE_OVERFLOW;",
2047 "/* ??? The re-computing of overflow after",
2048 " saturation processing is specific to pabs. */",
2049 "overflow = res_grd != SIGN32 (res) ? DSR_MASK_V : 0;",
2053 { "","", "(if cc) prnd Sx,Dz", "100110ccxx01zzzz",
2054 "/* FIXME: duplicate code prnd. */",
2055 "int Sx = DSP_R (x);",
2056 "int Sx_grd = GET_DSP_GRD (x);",
2058 "res = (Sx + 0x8000) & 0xffff0000;",
2059 "carry = (unsigned) res < (unsigned) Sx;",
2060 "res_grd = Sx_grd + carry;",
2061 "COMPUTE_OVERFLOW;",
2064 { "","", "prnd Sx,Dz", "10011000xx..zzzz",
2065 "int Sx = DSP_R (x);",
2066 "int Sx_grd = GET_DSP_GRD (x);",
2068 "res = (Sx + 0x8000) & 0xffff0000;",
2069 "carry = (unsigned) res < (unsigned) Sx;",
2070 "res_grd = Sx_grd + carry;",
2071 "COMPUTE_OVERFLOW;",
2075 { "","", "(if cc) pabs Sy,Dz", "101010cc01yyzzzz",
2076 "/* FIXME: duplicate code pabs. */",
2080 "greater_equal = DSR_MASK_G;",
2090 " res = 0x7fffffff;",
2093 " overflow = DSR_MASK_V;",
2094 " greater_equal = 0;",
2099 { "","", "pabs Sy,Dz", "10101000..yyzzzz",
2103 "greater_equal = DSR_MASK_G;",
2113 " res = 0x7fffffff;",
2116 " overflow = DSR_MASK_V;",
2117 " greater_equal = 0;",
2122 { "","", "(if cc) prnd Sy,Dz", "101110cc01yyzzzz",
2123 "/* FIXME: duplicate code prnd. */",
2124 "int Sy = DSP_R (y);",
2125 "int Sy_grd = SIGN32 (Sy);",
2127 "res = (Sy + 0x8000) & 0xffff0000;",
2128 "carry = (unsigned) res < (unsigned) Sy;",
2129 "res_grd = Sy_grd + carry;",
2130 "COMPUTE_OVERFLOW;",
2133 { "","", "prnd Sy,Dz", "10111000..yyzzzz",
2134 "int Sy = DSP_R (y);",
2135 "int Sy_grd = SIGN32 (Sy);",
2137 "res = (Sy + 0x8000) & 0xffff0000;",
2138 "carry = (unsigned) res < (unsigned) Sy;",
2139 "res_grd = Sy_grd + carry;",
2140 "COMPUTE_OVERFLOW;",
2143 { "","", "(if cc) pshl Sx,Sy,Dz", "100000ccxxyyzzzz",
2144 "int Sx = DSP_R (x) & 0xffff0000;",
2145 "int Sy = DSP_R (y) >> 16 & 0x7f;",
2149 "else if (Sy >= 128 - 16)",
2150 " res = (unsigned) Sx >> 128 - Sy; /* no sign extension */",
2153 " RAISE_EXCEPTION (SIGILL);",
2156 "goto cond_logical;",
2158 { "","", "(if cc) psha Sx,Sy,Dz", "100100ccxxyyzzzz",
2159 "int Sx = DSP_R (x);",
2160 "int Sx_grd = GET_DSP_GRD (x);",
2161 "int Sy = DSP_R (y) >> 16 & 0x7f;",
2173 " res_grd = Sx_grd << Sy | (unsigned) Sx >> 32 - Sy;",
2175 " res_grd = SEXT (res_grd);",
2176 " carry = res_grd & 1;",
2178 "else if (Sy >= 96)",
2183 " res_grd = SIGN32 (Sx_grd);",
2188 " res = Sx >> Sy | Sx_grd << 32 - Sy;",
2189 " res_grd = Sx_grd >> Sy;",
2191 " carry = Sx >> (Sy - 1) & 1;",
2195 " RAISE_EXCEPTION (SIGILL);",
2198 "COMPUTE_OVERFLOW;",
2199 "greater_equal = 0;",
2201 { "","", "(if cc) psub Sx,Sy,Dz", "101000ccxxyyzzzz",
2202 "int Sx = DSP_R (x);",
2203 "int Sx_grd = GET_DSP_GRD (x);",
2204 "int Sy = DSP_R (y);",
2205 "int Sy_grd = SIGN32 (Sy);",
2208 "carry = (unsigned) res > (unsigned) Sx;",
2209 "res_grd = Sx_grd - Sy_grd - carry;",
2210 "COMPUTE_OVERFLOW;",
2213 { "","", "(if cc) psub Sy,Sx,Dz", "100001ccxxyyzzzz",
2214 "int Sx = DSP_R (x);",
2215 "int Sx_grd = GET_DSP_GRD (x);",
2216 "int Sy = DSP_R (y);",
2217 "int Sy_grd = SIGN32 (Sy);",
2220 "carry = (unsigned) res > (unsigned) Sy;",
2221 "res_grd = Sy_grd - Sx_grd - carry;",
2222 "COMPUTE_OVERFLOW;",
2225 { "","", "(if cc) padd Sx,Sy,Dz", "101100ccxxyyzzzz",
2226 "int Sx = DSP_R (x);",
2227 "int Sx_grd = GET_DSP_GRD (x);",
2228 "int Sy = DSP_R (y);",
2229 "int Sy_grd = SIGN32 (Sy);",
2232 "carry = (unsigned) res < (unsigned) Sx;",
2233 "res_grd = Sx_grd + Sy_grd + carry;",
2234 "COMPUTE_OVERFLOW;",
2237 { "","", "(if cc) pand Sx,Sy,Dz", "100101ccxxyyzzzz",
2238 "res = DSP_R (x) & DSP_R (y);",
2240 "res &= 0xffff0000;",
2242 "if (iword & 0x200)\n",
2243 " goto assign_z;\n",
2247 "greater_equal = 0;",
2250 " DSR |= res >> 26 & DSR_MASK_N;\n",
2252 " DSR |= DSR_MASK_Z;\n",
2253 "goto assign_dc;\n",
2255 { "","", "(if cc) pxor Sx,Sy,Dz", "101001ccxxyyzzzz",
2256 "res = DSP_R (x) ^ DSP_R (y);",
2257 "goto cond_logical;",
2259 { "","", "(if cc) por Sx,Sy,Dz", "101101ccxxyyzzzz",
2260 "res = DSP_R (x) | DSP_R (y);",
2261 "goto cond_logical;",
2263 { "","", "(if cc) pdec Sx,Dz", "100010ccxx..zzzz",
2264 "int Sx = DSP_R (x);",
2265 "int Sx_grd = GET_DSP_GRD (x);",
2267 "res = Sx - 0x10000;",
2268 "carry = res > Sx;",
2269 "res_grd = Sx_grd - carry;",
2270 "COMPUTE_OVERFLOW;",
2272 "res &= 0xffff0000;",
2274 { "","", "(if cc) pinc Sx,Dz", "100110ccxx..zzzz",
2275 "int Sx = DSP_R (x);",
2276 "int Sx_grd = GET_DSP_GRD (x);",
2278 "res = Sx + 0x10000;",
2279 "carry = res < Sx;",
2280 "res_grd = Sx_grd + carry;",
2281 "COMPUTE_OVERFLOW;",
2283 "res &= 0xffff0000;",
2285 { "","", "(if cc) pdec Sy,Dz", "101010cc..yyzzzz",
2286 "int Sy = DSP_R (y);",
2287 "int Sy_grd = SIGN32 (Sy);",
2289 "res = Sy - 0x10000;",
2290 "carry = res > Sy;",
2291 "res_grd = Sy_grd - carry;",
2292 "COMPUTE_OVERFLOW;",
2294 "res &= 0xffff0000;",
2296 { "","", "(if cc) pinc Sy,Dz", "101110cc..yyzzzz",
2297 "int Sy = DSP_R (y);",
2298 "int Sy_grd = SIGN32 (Sy);",
2300 "res = Sy + 0x10000;",
2301 "carry = res < Sy;",
2302 "res_grd = Sy_grd + carry;",
2303 "COMPUTE_OVERFLOW;",
2305 "res &= 0xffff0000;",
2307 { "","", "(if cc) pclr Dz", "100011cc....zzzz",
2312 "greater_equal = 1;",
2314 { "","", "pclr Du pmuls Se,Sf,Dg", "0100eeff0001gguu",
2315 "/* Do multiply. */",
2316 "res = (DSP_R (e) >> 16) * (DSP_R (f) >> 16) * 2;",
2317 "if (res == 0x80000000)",
2318 " res = 0x7fffffff;",
2320 "DSP_GRD (g) = SIGN32 (res);",
2321 "/* FIXME: update DSR based on results of multiply! */",
2329 { "","", "(if cc) pdmsb Sx,Dz", "100111ccxx..zzzz",
2330 "unsigned Sx = DSP_R (x);",
2331 "int Sx_grd = GET_DSP_GRD (x);",
2336 " Sx_grd = ~Sx_grd;",
2350 " if (Sx & ~0 << i)",
2358 "res_grd = SIGN32 (res);",
2363 { "","", "(if cc) pdmsb Sy,Dz", "101111cc..yyzzzz",
2364 "unsigned Sy = DSP_R (y);",
2373 " if (Sy & ~0 << i)",
2381 "res_grd = SIGN32 (res);",
2386 { "","", "(if cc) pneg Sx,Dz", "110010ccxx..zzzz",
2387 "int Sx = DSP_R (x);",
2388 "int Sx_grd = GET_DSP_GRD (x);",
2391 "carry = res != 0;",
2392 "res_grd = 0 - Sx_grd - carry;",
2393 "COMPUTE_OVERFLOW;",
2396 { "","", "(if cc) pcopy Sx,Dz", "110110ccxx..zzzz",
2398 "res_grd = GET_DSP_GRD (x);",
2400 "COMPUTE_OVERFLOW;",
2403 { "","", "(if cc) pneg Sy,Dz", "111010cc..yyzzzz",
2404 "int Sy = DSP_R (y);",
2405 "int Sy_grd = SIGN32 (Sy);",
2408 "carry = res != 0;",
2409 "res_grd = 0 - Sy_grd - carry;",
2410 "COMPUTE_OVERFLOW;",
2413 { "","", "(if cc) pcopy Sy,Dz", "111110cc..yyzzzz",
2415 "res_grd = SIGN32 (res);",
2417 "COMPUTE_OVERFLOW;",
2420 { "","", "(if cc) psts MACH,Dz", "110011cc....zzzz",
2422 "res_grd = SIGN32 (res);",
2425 { "","", "(if cc) psts MACL,Dz", "110111cc....zzzz",
2427 "res_grd = SIGN32 (res);",
2430 { "","", "(if cc) plds Dz,MACH", "111011cc....zzzz",
2431 "if (0xa05f >> z & 1)",
2432 " RAISE_EXCEPTION (SIGILL);",
2434 " MACH = DSP_R (z);",
2437 { "","", "(if cc) plds Dz,MACL", "111111cc....zzzz",
2438 "if (0xa05f >> z & 1)",
2439 " RAISE_EXCEPTION (SIGILL);",
2441 " MACL = DSP_R (z) = res;",
2445 { "","", "(if cc) pswap Sx,Dz", "100111ccxx01zzzz",
2446 "int Sx = DSP_R (x);",
2448 "res = ((Sx & 0xffff) * 65536) + ((Sx >> 16) & 0xffff);",
2449 "res_grd = GET_DSP_GRD (x);",
2452 "greater_equal = res & 0x80000000 ? 0 : DSR_MASK_G;",
2455 { "","", "(if cc) pswap Sy,Dz", "101111cc01yyzzzz",
2456 "int Sy = DSP_R (y);",
2458 "res = ((Sy & 0xffff) * 65536) + ((Sy >> 16) & 0xffff);",
2459 "res_grd = SIGN32 (Sy);",
2462 "greater_equal = res & 0x80000000 ? 0 : DSR_MASK_G;",
2468 /* Tables of things to put into enums for sh-opc.h */
2470 const char * const nibble_type_list
[] =
2505 const char * const arg_type_list
[] =
2539 qfunc (const void *va
, const void *vb
)
2547 memcpy (bufa
, a
->code
, 4);
2548 memcpy (bufa
+ 4, a
->code
+ 12, 4);
2551 memcpy (bufb
, b
->code
, 4);
2552 memcpy (bufb
+ 4, b
->code
+ 12, 4);
2554 diff
= strcmp (bufa
, bufb
);
2555 /* Stabilize the sort, so that later entries can override more general
2556 preceding entries. */
2557 return diff
? diff
: a
- b
;
2571 qsort (tab
, len
, sizeof (*p
), qfunc
);
2579 for (p
= tab
; p
->name
; p
++)
2581 printf ("%s %-30s\n", p
->code
, p
->name
);
2585 static unsigned short table
[1 << 16];
2587 static int warn_conflicts
= 0;
2590 conflict_warn (int val
, int i
)
2595 fprintf (stderr
, "Warning: opcode table conflict: 0x%04x (idx %d && %d)\n",
2596 val
, i
, table
[val
]);
2598 for (ix
= sizeof (tab
) / sizeof (tab
[0]); ix
>= 0; ix
--)
2599 if (tab
[ix
].index
== i
|| tab
[ix
].index
== j
)
2601 key
= ((tab
[ix
].code
[0] - '0') << 3) +
2602 ((tab
[ix
].code
[1] - '0') << 2) +
2603 ((tab
[ix
].code
[2] - '0') << 1) +
2604 ((tab
[ix
].code
[3] - '0'));
2606 if (val
>> 12 == key
)
2607 fprintf (stderr
, " %s -- %s\n", tab
[ix
].code
, tab
[ix
].name
);
2610 for (ix
= sizeof (movsxy_tab
) / sizeof (movsxy_tab
[0]); ix
>= 0; ix
--)
2611 if (movsxy_tab
[ix
].index
== i
|| movsxy_tab
[ix
].index
== j
)
2613 key
= ((movsxy_tab
[ix
].code
[0] - '0') << 3) +
2614 ((movsxy_tab
[ix
].code
[1] - '0') << 2) +
2615 ((movsxy_tab
[ix
].code
[2] - '0') << 1) +
2616 ((movsxy_tab
[ix
].code
[3] - '0'));
2618 if (val
>> 12 == key
)
2619 fprintf (stderr
, " %s -- %s\n",
2620 movsxy_tab
[ix
].code
, movsxy_tab
[ix
].name
);
2623 for (ix
= sizeof (ppi_tab
) / sizeof (ppi_tab
[0]); ix
>= 0; ix
--)
2624 if (ppi_tab
[ix
].index
== i
|| ppi_tab
[ix
].index
== j
)
2626 key
= ((ppi_tab
[ix
].code
[0] - '0') << 3) +
2627 ((ppi_tab
[ix
].code
[1] - '0') << 2) +
2628 ((ppi_tab
[ix
].code
[2] - '0') << 1) +
2629 ((ppi_tab
[ix
].code
[3] - '0'));
2631 if (val
>> 12 == key
)
2632 fprintf (stderr
, " %s -- %s\n",
2633 ppi_tab
[ix
].code
, ppi_tab
[ix
].name
);
2637 /* Take an opcode, expand all varying fields in it out and fill all the
2638 right entries in 'table' with the opcode index. */
2641 expand_opcode (int val
, int i
, const char *s
)
2645 if (warn_conflicts
&& table
[val
] != 0)
2646 conflict_warn (val
, i
);
2656 fprintf (stderr
, "expand_opcode: illegal char '%c'\n", s
[0]);
2660 /* Consume an arbitrary number of ones and zeros. */
2662 j
= (j
<< 1) + (s
[m
++] - '0');
2663 } while (s
[m
] == '0' || s
[m
] == '1');
2664 expand_opcode ((val
<< m
) | j
, i
, s
+ m
);
2666 case 'N': /* NN -- four-way fork */
2667 for (j
= 0; j
< 4; j
++)
2668 expand_opcode ((val
<< 2) | j
, i
, s
+ 2);
2670 case 'x': /* xx or xy -- two-way or four-way fork */
2671 for (j
= 0; j
< 4; j
+= (s
[1] == 'x' ? 2 : 1))
2672 expand_opcode ((val
<< 2) | j
, i
, s
+ 2);
2674 case 'y': /* yy or yx -- two-way or four-way fork */
2675 for (j
= 0; j
< (s
[1] == 'x' ? 4 : 2); j
++)
2676 expand_opcode ((val
<< 2) | j
, i
, s
+ 2);
2678 case '?': /* Seven-way "wildcard" fork for movxy */
2679 expand_opcode ((val
<< 2), i
, s
+ 2);
2680 for (j
= 1; j
< 4; j
++)
2682 expand_opcode ((val
<< 2) | j
, i
, s
+ 2);
2683 expand_opcode ((val
<< 2) | (j
+ 16), i
, s
+ 2);
2686 case 'i': /* eg. "i8*1" */
2687 case '.': /* "...." is a wildcard */
2690 /* nnnn, mmmm, i#*#, .... -- 16-way fork. */
2691 for (j
= 0; j
< 16; j
++)
2692 expand_opcode ((val
<< 4) | j
, i
, s
+ 4);
2695 /* eeee -- even numbered register:
2697 for (j
= 0; j
< 15; j
+= 2)
2698 expand_opcode ((val
<< 4) | j
, i
, s
+ 4);
2701 /* A0, A1, X0, X1, Y0, Y1, M0, M1, A0G, A1G:
2702 MMMM -- 10-way fork */
2703 expand_opcode ((val
<< 4) | 5, i
, s
+ 4);
2704 for (j
= 7; j
< 16; j
++)
2705 expand_opcode ((val
<< 4) | j
, i
, s
+ 4);
2709 GGGG -- two-way fork */
2710 for (j
= 13; j
<= 15; j
+=2)
2711 expand_opcode ((val
<< 4) | j
, i
, s
+ 4);
2714 /* ssss -- 10-way fork */
2715 /* System registers mach, macl, pr: */
2716 for (j
= 0; j
< 3; j
++)
2717 expand_opcode ((val
<< 4) | j
, i
, s
+ 4);
2718 /* System registers fpul, fpscr/dsr, a0, x0, x1, y0, y1: */
2719 for (j
= 5; j
< 12; j
++)
2720 expand_opcode ((val
<< 4) | j
, i
, s
+ 4);
2723 /* XX/XY -- 2/4 way fork. */
2724 for (j
= 0; j
< 4; j
+= (s
[1] == 'X' ? 2 : 1))
2725 expand_opcode ((val
<< 2) | j
, i
, s
+ 2);
2728 /* aa/ax -- 2/4 way fork. */
2729 for (j
= 0; j
< 4; j
+= (s
[1] == 'a' ? 2 : 1))
2730 expand_opcode ((val
<< 2) | j
, i
, s
+ 2);
2733 /* YY/YX -- 2/4 way fork. */
2734 for (j
= 0; j
< (s
[1] == 'Y' ? 2 : 4); j
+= 1)
2735 expand_opcode ((val
<< 2) | j
, i
, s
+ 2);
2738 /* AA/AY: 2/4 way fork. */
2739 for (j
= 0; j
< (s
[1] == 'A' ? 2 : 4); j
+= 1)
2740 expand_opcode ((val
<< 2) | j
, i
, s
+ 2);
2743 /* vv(VV) -- 4(16) way fork. */
2744 /* Vector register fv0/4/8/12. */
2747 /* 2 vector registers. */
2748 for (j
= 0; j
< 15; j
++)
2749 expand_opcode ((val
<< 4) | j
, i
, s
+ 4);
2753 /* 1 vector register. */
2754 for (j
= 0; j
< 4; j
+= 1)
2755 expand_opcode ((val
<< 2) | j
, i
, s
+ 2);
2762 /* Print the jump table used to index an opcode into a switch
2766 dumptable (const char *name
, int size
, int start
)
2773 printf ("unsigned short %s[%d]={\n", name
, size
);
2774 while (i
< start
+ size
)
2778 printf ("/* 0x%x */\n", i
);
2785 printf ("%2d", table
[i
+ j
+ k
]);
2803 static int index
= 1;
2806 for (; p
->name
; p
++)
2809 expand_opcode (0, p
->index
, p
->code
);
2813 /* Table already contains all the switch case tags for 16-bit opcode double
2814 data transfer (ddt) insns, and the switch case tag for processing parallel
2815 processing insns (ppi) for code 0xf800 (ppi nopx nopy). Copy the
2816 latter tag to represent all combinations of ppi with ddt. */
2818 expand_ppi_movxy (void)
2822 for (i
= 0xf000; i
< 0xf400; i
++)
2824 table
[i
+ 0x800] = table
[0xf800];
2828 gensim_caselist (op
*p
)
2830 for (; p
->name
; p
++)
2836 const char *s
= p
->code
;
2838 printf (" /* %s %s */\n", p
->name
, p
->code
);
2839 printf (" case %d: \n", p
->index
);
2847 fprintf (stderr
, "gencode/gensim_caselist: illegal char '%c'\n",
2852 /* Wildcard expansion, nothing to do here. */
2856 printf (" int v1 = ((iword >> 10) & 3) * 4;\n");
2860 printf (" int v2 = ((iword >> 8) & 3) * 4;\n");
2872 printf (" int n = (iword >> 8) & 0xf;\n");
2877 printf (" int n = (((iword >> 8) - 2) & 0x3) + 2;\n");
2881 if (s
[1] == 'y') /* xy */
2883 printf (" int n = (iword & 3) ? \n");
2884 printf (" ((iword >> 9) & 1) + 4 : \n");
2885 printf (" REG_xy ((iword >> 8) & 3);\n");
2888 printf (" int n = ((iword >> 9) & 1) + 4;\n");
2893 if (s
[1] == 'x') /* yx */
2895 printf (" int n = (iword & 0xc) ? \n");
2896 printf (" ((iword >> 8) & 1) + 6 : \n");
2897 printf (" REG_yx ((iword >> 8) & 3);\n");
2900 printf (" int n = ((iword >> 8) & 1) + 6;\n");
2909 printf (" int m = (iword >> 4) & 0xf;\n");
2913 if (s
[1] == 'Y') /* XY */
2915 printf (" int m = (iword & 3) ? \n");
2916 printf (" ((iword >> 7) & 1) + 8 : \n");
2917 printf (" DSP_xy ((iword >> 6) & 3);\n");
2920 printf (" int m = ((iword >> 7) & 1) + 8;\n");
2924 if (s
[1] == 'x') /* ax */
2926 printf (" int m = (iword & 3) ? \n");
2927 printf (" 7 - ((iword >> 6) & 2) : \n");
2928 printf (" DSP_ax ((iword >> 6) & 3);\n");
2931 printf (" int m = 7 - ((iword >> 6) & 2);\n");
2935 if (s
[1] == 'X') /* YX */
2937 printf (" int m = (iword & 0xc) ? \n");
2938 printf (" ((iword >> 6) & 1) + 10 : \n");
2939 printf (" DSP_yx ((iword >> 6) & 3);\n");
2942 printf (" int m = ((iword >> 6) & 1) + 10;\n");
2946 if (s
[1] == 'Y') /* AY */
2948 printf (" int m = (iword & 0xc) ? \n");
2949 printf (" 7 - ((iword >> 5) & 2) : \n");
2950 printf (" DSP_ay ((iword >> 6) & 3);\n");
2953 printf (" int m = 7 - ((iword >> 5) & 2);\n");
2958 printf (" int i = (iword & 0x");
2964 "gensim_caselist: Unknown char '%c' in %s\n",
2985 "gensim_caselist: Unknown char '%c' in %s\n",
2989 case '.': /* eg. "i12." */
3006 printf (" i = (i ^ (1 << %d)) - (1 << %d);\n",
3007 sextbit
- 1, sextbit
- 1);
3011 printf (" TB (m,n);\n");
3013 printf (" TL (m);\n");
3015 printf (" TL (n);\n");
3020 for (r
= p
->refs
; *r
; r
++)
3022 if (*r
== 'f') printf (" CREF (15);\n");
3026 printf (" int i = n;\n");
3028 printf (" CREF (i);\n");
3029 printf (" } while (i-- > 0);\n");
3035 printf (" int i = n;\n");
3037 printf (" CREF (i);\n");
3038 printf (" } while (i++ < 14);\n");
3041 if (*r
== '0') printf (" CREF (0);\n");
3042 if (*r
== '8') printf (" CREF (8);\n");
3043 if (*r
== '9') printf (" CREF (9);\n");
3044 if (*r
== 'n') printf (" CREF (n);\n");
3045 if (*r
== 'm') printf (" CREF (m);\n");
3050 for (j
= 0; j
< MAX_NR_STUFF
; j
++)
3054 printf (" %s\n", p
->stuff
[j
]);
3062 for (r
= p
->defs
; *r
; r
++)
3064 if (*r
== 'f') printf (" CDEF (15);\n");
3068 printf (" int i = n;\n");
3070 printf (" CDEF (i);\n");
3071 printf (" } while (i-- > 0);\n");
3077 printf (" int i = n;\n");
3079 printf (" CDEF (i);\n");
3080 printf (" } while (i++ < 14);\n");
3083 if (*r
== '0') printf (" CDEF (0);\n");
3084 if (*r
== 'n') printf (" CDEF (n);\n");
3085 if (*r
== 'm') printf (" CDEF (m);\n");
3089 printf (" break;\n");
3098 printf ("/* REG_xy = [r4, r5, r0, r1]. */\n");
3099 printf ("#define REG_xy(R) ((R)==0 ? 4 : (R)==2 ? 5 : (R)==1 ? 0 : 1)\n");
3100 printf ("/* REG_yx = [r6, r7, r2, r3]. */\n");
3101 printf ("#define REG_yx(R) ((R)==0 ? 6 : (R)==1 ? 7 : (R)==2 ? 2 : 3)\n");
3102 printf ("/* DSP_ax = [a0, a1, x0, x1]. */\n");
3103 printf ("#define DSP_ax(R) ((R)==0 ? 7 : (R)==2 ? 5 : (R)==1 ? 8 : 9)\n");
3104 printf ("/* DSP_ay = [a0, a1, y0, y1]. */\n");
3105 printf ("#define DSP_ay(R) ((R)==0 ? 7 : (R)==1 ? 5 : (R)==2 ? 10 : 11)\n");
3106 printf ("/* DSP_xy = [x0, x1, y0, y1]. */\n");
3107 printf ("#define DSP_xy(R) ((R)==0 ? 8 : (R)==2 ? 9 : (R)==1 ? 10 : 11)\n");
3108 printf ("/* DSP_yx = [y0, y1, x0, x1]. */\n");
3109 printf ("#define DSP_yx(R) ((R)==0 ? 10 : (R)==1 ? 11 : (R)==2 ? 8 : 9)\n");
3110 printf (" switch (jump_table[iword]) {\n");
3112 gensim_caselist (tab
);
3113 gensim_caselist (movsxy_tab
);
3115 printf (" default:\n");
3117 printf (" RAISE_EXCEPTION (SIGILL);\n");
3128 for (p
= tab
; p
->name
; p
++)
3130 const char *s
= p
->name
;
3131 printf ("#define OPC_");
3134 printf ("%c", tolower (*s
));
3143 printf (" %d\n",p
->index
);
3147 static int ppi_index
;
3149 /* Take a ppi code, expand all varying fields in it and fill all the
3150 right entries in 'table' with the opcode index.
3151 NOTE: tail recursion optimization removed for simplicity. */
3154 expand_ppi_code (int val
, int i
, const char *s
)
3161 fprintf (stderr
, "gencode/expand_ppi_code: Illegal char '%c'\n", s
[0]);
3166 if (warn_conflicts
&& table
[val
] != 0)
3167 conflict_warn (val
, i
);
3169 /* The last four bits are disregarded for the switch table. */
3173 /* Four-bit expansion. */
3174 for (j
= 0; j
< 16; j
++)
3175 expand_ppi_code ((val
<< 4) + j
, i
, s
+ 4);
3179 expand_ppi_code ((val
<< 1), i
, s
+ 1);
3182 expand_ppi_code ((val
<< 1) + 1, i
, s
+ 1);
3187 expand_ppi_code ((val
<< 1), i
, s
+ 1);
3188 expand_ppi_code ((val
<< 1) + 1, i
, s
+ 1);
3191 expand_ppi_code ((val
<< 2) + 1, ppi_index
++, s
+ 2);
3192 expand_ppi_code ((val
<< 2) + 2, i
, s
+ 2);
3193 expand_ppi_code ((val
<< 2) + 3, i
, s
+ 2);
3199 ppi_filltable (void)
3204 for (p
= ppi_tab
; p
->name
; p
++)
3206 p
->index
= ppi_index
++;
3207 expand_ppi_code (0, p
->index
, p
->code
);
3216 printf ("#define DSR_MASK_G 0x80\n");
3217 printf ("#define DSR_MASK_Z 0x40\n");
3218 printf ("#define DSR_MASK_N 0x20\n");
3219 printf ("#define DSR_MASK_V 0x10\n");
3221 printf ("#define COMPUTE_OVERFLOW do {\\\n");
3222 printf (" overflow = res_grd != SIGN32 (res) ? DSR_MASK_V : 0; \\\n");
3223 printf (" if (overflow && S) \\\n");
3225 printf (" if (res_grd & 0x80) \\\n");
3227 printf (" res = 0x80000000; \\\n");
3228 printf (" res_grd |= 0xff; \\\n");
3230 printf (" else \\\n");
3232 printf (" res = 0x7fffffff; \\\n");
3233 printf (" res_grd &= ~0xff; \\\n");
3235 printf (" overflow = 0; \\\n");
3237 printf ("} while (0)\n");
3239 printf ("#define ADD_SUB_GE \\\n");
3240 printf (" (greater_equal = ~(overflow << 3 & res_grd) & DSR_MASK_G)\n");
3242 printf ("static void\n");
3243 printf ("ppi_insn (iword)\n");
3244 printf (" int iword;\n");
3246 printf (" /* 'ee' = [x0, x1, y0, a1] */\n");
3247 printf (" static char e_tab[] = { 8, 9, 10, 5};\n");
3248 printf (" /* 'ff' = [y0, y1, x0, a1] */\n");
3249 printf (" static char f_tab[] = {10, 11, 8, 5};\n");
3250 printf (" /* 'xx' = [x0, x1, a0, a1] */\n");
3251 printf (" static char x_tab[] = { 8, 9, 7, 5};\n");
3252 printf (" /* 'yy' = [y0, y1, m0, m1] */\n");
3253 printf (" static char y_tab[] = {10, 11, 12, 14};\n");
3254 printf (" /* 'gg' = [m0, m1, a0, a1] */\n");
3255 printf (" static char g_tab[] = {12, 14, 7, 5};\n");
3256 printf (" /* 'uu' = [x0, y0, a0, a1] */\n");
3257 printf (" static char u_tab[] = { 8, 10, 7, 5};\n");
3259 printf (" int z;\n");
3260 printf (" int res, res_grd;\n");
3261 printf (" int carry, overflow, greater_equal;\n");
3263 printf (" switch (ppi_table[iword >> 4]) {\n");
3265 for (; p
->name
; p
++)
3270 const char *s
= p
->code
;
3272 printf (" /* %s %s */\n", p
->name
, p
->code
);
3273 printf (" case %d: \n", p
->index
);
3276 for (shift
= 16; *s
; )
3281 printf (" int i = (iword >> 4) & 0x7f;\n");
3291 printf (" int %c = %c_tab[(iword >> %d) & 3];\n",
3297 printf (" if ((((iword >> 8) ^ DSR) & 1) == 0)\n");
3298 printf ("\treturn;\n");
3300 printf (" case %d: \n", p
->index
+ 1);
3312 printf (" z = iword & 0xf;\n");
3320 else if (havedecl
== 2)
3322 for (j
= 0; j
< MAX_NR_STUFF
; j
++)
3327 (havedecl
== 2 ? " " : ""),
3335 printf (" if (iword & 0x200)\n");
3336 printf (" goto assign_z;\n");
3338 printf (" break;\n");
3342 printf (" default:\n");
3344 printf (" RAISE_EXCEPTION (SIGILL);\n");
3345 printf (" return;\n");
3348 printf (" DSR &= ~0xf1;\n");
3349 printf (" if (res || res_grd)\n");
3350 printf (" DSR |= greater_equal | res_grd >> 2 & DSR_MASK_N | overflow;\n");
3352 printf (" DSR |= DSR_MASK_Z | overflow;\n");
3353 printf (" assign_dc:\n");
3354 printf (" switch (DSR >> 1 & 7)\n");
3356 printf (" case 0: /* Carry Mode */\n");
3357 printf (" DSR |= carry;\n");
3358 printf (" case 1: /* Negative Value Mode */\n");
3359 printf (" DSR |= res_grd >> 7 & 1;\n");
3360 printf (" case 2: /* Zero Value Mode */\n");
3361 printf (" DSR |= DSR >> 6 & 1;\n");
3362 printf (" case 3: /* Overflow mode */\n");
3363 printf (" DSR |= overflow >> 4;\n");
3364 printf (" case 4: /* Signed Greater Than Mode */\n");
3365 printf (" DSR |= DSR >> 7 & 1;\n");
3366 printf (" case 5: /* Signed Greater Than Or Equal Mode */\n");
3367 printf (" DSR |= greater_equal >> 7;\n");
3369 printf (" assign_z:\n");
3370 printf (" if (0xa05f >> z & 1)\n");
3372 printf (" RAISE_EXCEPTION (SIGILL);\n");
3373 printf (" return;\n");
3375 printf (" DSP_R (z) = res;\n");
3376 printf (" DSP_GRD (z) = res_grd;\n");
3381 main (int ac
, char *av
[])
3383 /* Verify the table before anything else. */
3386 for (p
= tab
; p
->name
; p
++)
3388 /* Check that the code field contains 16 bits. */
3389 if (strlen (p
->code
) != 16)
3391 fprintf (stderr
, "Code `%s' length wrong (%zu) for `%s'\n",
3392 p
->code
, strlen (p
->code
), p
->name
);
3398 /* Now generate the requested data. */
3401 if (ac
> 2 && strcmp (av
[2], "-w") == 0)
3405 if (strcmp (av
[1], "-t") == 0)
3409 else if (strcmp (av
[1], "-d") == 0)
3413 else if (strcmp (av
[1], "-s") == 0)
3416 dumptable ("sh_jump_table", 1 << 16, 0);
3418 memset (table
, 0, sizeof table
);
3419 filltable (movsxy_tab
);
3420 expand_ppi_movxy ();
3421 dumptable ("sh_dsp_table", 1 << 12, 0xf000);
3423 memset (table
, 0, sizeof table
);
3425 dumptable ("ppi_table", 1 << 12, 0);
3427 else if (strcmp (av
[1], "-x") == 0)
3430 filltable (movsxy_tab
);
3433 else if (strcmp (av
[1], "-p") == 0)
3440 fprintf (stderr
, "Opcode table generation no longer supported.\n");
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