sim/sparc/sem32.c

   1 /* Simulator instruction semantics for sparc32.
   2
   3 THIS FILE IS MACHINE GENERATED WITH CGEN.
   4
   5 Copyright (C) 1999 Cygnus Solutions, Inc.
   6
   7 This file is part of the Cygnus Simulators.
   8
   9
  10 */
  11
  12 #define WANT_CPU sparc32
  13 #define WANT_CPU_SPARC32
  14
  15 #include "sim-main.h"
  16 #include "cgen-mem.h"
  17 #include "cgen-ops.h"
  18
  19 #undef GET_ATTR
  20 #define GET_ATTR(cpu, num, attr) CGEN_ATTR_VALUE (NULL, abuf->idesc->attrs, CGEN_INSN_##attr)
  21
  22 /* x-invalid: --invalid-- */
  23
  24 SEM_STATUS
  25 SEM_FN_NAME (sparc32,x_invalid) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
  26 {
  27   SEM_STATUS status = 0;
  28   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
  29   int UNUSED written = 0;
  30   IADDR UNUSED pc = GET_H_PC ();
  31   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
  32   EXTRACT_IFMT_EMPTY_VARS /* */
  33   EXTRACT_IFMT_EMPTY_CODE
  34
  35   {
  36 #if WITH_SCACHE
  37     /* Update the recorded pc in the cpu state struct.  */
  38     SET_H_PC (pc);
  39 #endif
  40     sim_engine_invalid_insn (current_cpu, pc);
  41     sim_io_error (CPU_STATE (current_cpu), "invalid insn not handled\n");
  42     /* NOTREACHED */
  43   }
  44
  45   SEM_NBRANCH_FINI (vpc, 0|(1<<(CGEN_INSN_VIRTUAL-CGEN_ATTR_BOOL_OFFSET)));
  46   return status;
  47 }
  48
  49 /* x-after: --after-- */
  50
  51 SEM_STATUS
  52 SEM_FN_NAME (sparc32,x_after) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
  53 {
  54   SEM_STATUS status = 0;
  55   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
  56   int UNUSED written = 0;
  57   IADDR UNUSED pc = GET_H_PC ();
  58   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
  59   EXTRACT_IFMT_EMPTY_VARS /* */
  60   EXTRACT_IFMT_EMPTY_CODE
  61
  62   {
  63 #if WITH_SCACHE_PBB_SPARC32
  64     sparc32_pbb_after (current_cpu, sem_arg);
  65 #endif
  66   }
  67
  68   SEM_NBRANCH_FINI (vpc, 0|(1<<(CGEN_INSN_PBB-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_VIRTUAL-CGEN_ATTR_BOOL_OFFSET)));
  69   return status;
  70 }
  71
  72 /* x-before: --before-- */
  73
  74 SEM_STATUS
  75 SEM_FN_NAME (sparc32,x_before) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
  76 {
  77   SEM_STATUS status = 0;
  78   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
  79   int UNUSED written = 0;
  80   IADDR UNUSED pc = GET_H_PC ();
  81   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
  82   EXTRACT_IFMT_EMPTY_VARS /* */
  83   EXTRACT_IFMT_EMPTY_CODE
  84
  85   {
  86 #if WITH_SCACHE_PBB_SPARC32
  87     sparc32_pbb_before (current_cpu, sem_arg);
  88 #endif
  89   }
  90
  91   SEM_NBRANCH_FINI (vpc, 0|(1<<(CGEN_INSN_PBB-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_VIRTUAL-CGEN_ATTR_BOOL_OFFSET)));
  92   return status;
  93 }
  94
  95 /* x-cti-chain: --cti-chain-- */
  96
  97 SEM_STATUS
  98 SEM_FN_NAME (sparc32,x_cti_chain) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
  99 {
 100   SEM_STATUS status = 0;
 101   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 102   int UNUSED written = 0;
 103   IADDR UNUSED pc = GET_H_PC ();
 104   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
 105   EXTRACT_IFMT_EMPTY_VARS /* */
 106   EXTRACT_IFMT_EMPTY_CODE
 107
 108   {
 109 #if WITH_SCACHE_PBB_SPARC32
 110 #ifdef DEFINE_SWITCH
 111     vpc = sparc32_pbb_cti_chain (current_cpu, sem_arg,
 112                                pbb_br_npc_ptr, pbb_br_npc);
 113     BREAK (sem);
 114 #else
 115     /* FIXME: Allow provision of explicit ifmt spec in insn spec.  */
 116     vpc = sparc32_pbb_cti_chain (current_cpu, sem_arg,
 117                                CPU_PBB_BR_NPC_PTR (current_cpu),
 118                                CPU_PBB_BR_NPC (current_cpu));
 119 #endif
 120 #endif
 121   }
 122
 123   SEM_NBRANCH_FINI (vpc, 0|(1<<(CGEN_INSN_PBB-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_VIRTUAL-CGEN_ATTR_BOOL_OFFSET)));
 124   return status;
 125 }
 126
 127 /* x-chain: --chain-- */
 128
 129 SEM_STATUS
 130 SEM_FN_NAME (sparc32,x_chain) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
 131 {
 132   SEM_STATUS status = 0;
 133   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 134   int UNUSED written = 0;
 135   IADDR UNUSED pc = GET_H_PC ();
 136   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
 137   EXTRACT_IFMT_EMPTY_VARS /* */
 138   EXTRACT_IFMT_EMPTY_CODE
 139
 140   {
 141 #if WITH_SCACHE_PBB_SPARC32
 142     vpc = sparc32_pbb_chain (current_cpu, sem_arg);
 143 #ifdef DEFINE_SWITCH
 144     BREAK (sem);
 145 #endif
 146 #endif
 147   }
 148
 149   SEM_NBRANCH_FINI (vpc, 0|(1<<(CGEN_INSN_PBB-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_VIRTUAL-CGEN_ATTR_BOOL_OFFSET)));
 150   return status;
 151 }
 152
 153 /* x-begin: --begin-- */
 154
 155 SEM_STATUS
 156 SEM_FN_NAME (sparc32,x_begin) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
 157 {
 158   SEM_STATUS status = 0;
 159   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 160   int UNUSED written = 0;
 161   IADDR UNUSED pc = GET_H_PC ();
 162   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
 163   EXTRACT_IFMT_EMPTY_VARS /* */
 164   EXTRACT_IFMT_EMPTY_CODE
 165
 166   {
 167 #if WITH_SCACHE_PBB_SPARC32
 168 #ifdef DEFINE_SWITCH
 169     /* In the switch case FAST_P is a constant, allowing several optimizations
 170        in any called inline functions.  */
 171     vpc = sparc32_pbb_begin (current_cpu, FAST_P);
 172 #else
 173     vpc = sparc32_pbb_begin (current_cpu, STATE_RUN_FAST_P (CPU_STATE (current_cpu)));
 174 #endif
 175 #endif
 176   }
 177
 178   SEM_NBRANCH_FINI (vpc, 0|(1<<(CGEN_INSN_PBB-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_VIRTUAL-CGEN_ATTR_BOOL_OFFSET)));
 179   return status;
 180 }
 181
 182 /* rd-asr: rd $rdasr,$rd */
 183
 184 SEM_STATUS
 185 SEM_FN_NAME (sparc32,rd_asr) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
 186 {
 187   SEM_STATUS status = 0;
 188   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 189   int UNUSED written = 0;
 190   IADDR UNUSED pc = GET_H_PC ();
 191   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 192   EXTRACT_IFMT_RD_ASR_VARS /* f-simm13 f-i f-rs1 f-op3 f-rd f-op */
 193   EXTRACT_IFMT_RD_ASR_CODE
 194
 195   {
 196     SI opval = CPU (h_asr[f_rs1]);
 197     SET_H_GR (f_rd, opval);
 198     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
 199   }
 200
 201   SEM_NBRANCH_FINI (vpc, 0);
 202   return status;
 203 }
 204
 205 /* wr-asr: wr $rs1,$rs2,$wrasr */
 206
 207 SEM_STATUS
 208 SEM_FN_NAME (sparc32,wr_asr) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
 209 {
 210   SEM_STATUS status = 0;
 211   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 212   int UNUSED written = 0;
 213   IADDR UNUSED pc = GET_H_PC ();
 214   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 215   EXTRACT_IFMT_WR_ASR_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-rd f-op */
 216   EXTRACT_IFMT_WR_ASR_CODE
 217
 218   {
 219     SI opval = XORSI (GET_H_GR (f_rs1), GET_H_GR (f_rs2));
 220     CPU (h_asr[f_rd]) = opval;
 221     TRACE_RESULT (current_cpu, abuf, "wrasr", 'x', opval);
 222   }
 223
 224   SEM_NBRANCH_FINI (vpc, 0);
 225   return status;
 226 }
 227
 228 /* wr-asr-imm: wr $rs1,$simm13,$wrasr */
 229
 230 SEM_STATUS
 231 SEM_FN_NAME (sparc32,wr_asr_imm) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
 232 {
 233   SEM_STATUS status = 0;
 234   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 235   int UNUSED written = 0;
 236   IADDR UNUSED pc = GET_H_PC ();
 237   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 238   EXTRACT_IFMT_WR_ASR_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-rd f-op */
 239   EXTRACT_IFMT_WR_ASR_IMM_CODE
 240
 241   {
 242     SI opval = XORSI (GET_H_GR (f_rs1), f_simm13);
 243     CPU (h_asr[f_rd]) = opval;
 244     TRACE_RESULT (current_cpu, abuf, "wrasr", 'x', opval);
 245   }
 246
 247   SEM_NBRANCH_FINI (vpc, 0);
 248   return status;
 249 }
 250
 251 /* rd-psr: rd %psr,$rd */
 252
 253 SEM_STATUS
 254 SEM_FN_NAME (sparc32,rd_psr) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
 255 {
 256   SEM_STATUS status = 0;
 257   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 258   int UNUSED written = 0;
 259   IADDR UNUSED pc = GET_H_PC ();
 260   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 261   EXTRACT_IFMT_RD_PSR_VARS /* f-simm13 f-i f-rs1 f-op3 f-rd f-op */
 262   EXTRACT_IFMT_RD_PSR_CODE
 263
 264   {
 265     SI opval = GET_H_PSR ();
 266     SET_H_GR (f_rd, opval);
 267     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
 268   }
 269
 270   SEM_NBRANCH_FINI (vpc, 0);
 271   return status;
 272 }
 273
 274 /* wr-psr: wr $rs1,$rs2,%psr */
 275
 276 SEM_STATUS
 277 SEM_FN_NAME (sparc32,wr_psr) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
 278 {
 279   SEM_STATUS status = 0;
 280   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 281   int UNUSED written = 0;
 282   IADDR UNUSED pc = GET_H_PC ();
 283   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 284   EXTRACT_IFMT_WR_PSR_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-rd f-op */
 285   EXTRACT_IFMT_WR_PSR_CODE
 286
 287   {
 288     SI opval = XORSI (GET_H_GR (f_rs1), GET_H_GR (f_rs2));
 289     SET_H_PSR (opval);
 290     TRACE_RESULT (current_cpu, abuf, "psr-0", 'x', opval);
 291   }
 292
 293   SEM_NBRANCH_FINI (vpc, 0);
 294   return status;
 295 }
 296
 297 /* wr-psr-imm: wr $rs1,$simm13,%psr */
 298
 299 SEM_STATUS
 300 SEM_FN_NAME (sparc32,wr_psr_imm) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
 301 {
 302   SEM_STATUS status = 0;
 303   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 304   int UNUSED written = 0;
 305   IADDR UNUSED pc = GET_H_PC ();
 306   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 307   EXTRACT_IFMT_WR_PSR_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-rd f-op */
 308   EXTRACT_IFMT_WR_PSR_IMM_CODE
 309
 310   {
 311     SI opval = XORSI (GET_H_GR (f_rs1), f_simm13);
 312     SET_H_PSR (opval);
 313     TRACE_RESULT (current_cpu, abuf, "psr-0", 'x', opval);
 314   }
 315
 316   SEM_NBRANCH_FINI (vpc, 0);
 317   return status;
 318 }
 319
 320 /* rd-wim: rd %wim,$rd */
 321
 322 SEM_STATUS
 323 SEM_FN_NAME (sparc32,rd_wim) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
 324 {
 325   SEM_STATUS status = 0;
 326   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 327   int UNUSED written = 0;
 328   IADDR UNUSED pc = GET_H_PC ();
 329   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 330   EXTRACT_IFMT_RD_PSR_VARS /* f-simm13 f-i f-rs1 f-op3 f-rd f-op */
 331   EXTRACT_IFMT_RD_PSR_CODE
 332
 333   {
 334     SI opval = GET_H_WIM ();
 335     SET_H_GR (f_rd, opval);
 336     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
 337   }
 338
 339   SEM_NBRANCH_FINI (vpc, 0);
 340   return status;
 341 }
 342
 343 /* wr-wim: wr $rs1,$rs2,%wim */
 344
 345 SEM_STATUS
 346 SEM_FN_NAME (sparc32,wr_wim) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
 347 {
 348   SEM_STATUS status = 0;
 349   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 350   int UNUSED written = 0;
 351   IADDR UNUSED pc = GET_H_PC ();
 352   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 353   EXTRACT_IFMT_WR_PSR_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-rd f-op */
 354   EXTRACT_IFMT_WR_PSR_CODE
 355
 356   {
 357     SI opval = XORSI (GET_H_GR (f_rs1), GET_H_GR (f_rs2));
 358     SET_H_WIM (opval);
 359     TRACE_RESULT (current_cpu, abuf, "wim-0", 'x', opval);
 360   }
 361
 362   SEM_NBRANCH_FINI (vpc, 0);
 363   return status;
 364 }
 365
 366 /* wr-wim-imm: wr $rs1,$simm13,%wim */
 367
 368 SEM_STATUS
 369 SEM_FN_NAME (sparc32,wr_wim_imm) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
 370 {
 371   SEM_STATUS status = 0;
 372   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 373   int UNUSED written = 0;
 374   IADDR UNUSED pc = GET_H_PC ();
 375   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 376   EXTRACT_IFMT_WR_PSR_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-rd f-op */
 377   EXTRACT_IFMT_WR_PSR_IMM_CODE
 378
 379   {
 380     SI opval = XORSI (GET_H_GR (f_rs1), f_simm13);
 381     SET_H_WIM (opval);
 382     TRACE_RESULT (current_cpu, abuf, "wim-0", 'x', opval);
 383   }
 384
 385   SEM_NBRANCH_FINI (vpc, 0);
 386   return status;
 387 }
 388
 389 /* rd-tbr: rd %tbr,$rd */
 390
 391 SEM_STATUS
 392 SEM_FN_NAME (sparc32,rd_tbr) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
 393 {
 394   SEM_STATUS status = 0;
 395   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 396   int UNUSED written = 0;
 397   IADDR UNUSED pc = GET_H_PC ();
 398   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 399   EXTRACT_IFMT_RD_PSR_VARS /* f-simm13 f-i f-rs1 f-op3 f-rd f-op */
 400   EXTRACT_IFMT_RD_PSR_CODE
 401
 402   {
 403     SI opval = GET_H_TBR ();
 404     SET_H_GR (f_rd, opval);
 405     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
 406   }
 407
 408   SEM_NBRANCH_FINI (vpc, 0);
 409   return status;
 410 }
 411
 412 /* wr-tbr: wr $rs1,$rs2,%tbr */
 413
 414 SEM_STATUS
 415 SEM_FN_NAME (sparc32,wr_tbr) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
 416 {
 417   SEM_STATUS status = 0;
 418   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 419   int UNUSED written = 0;
 420   IADDR UNUSED pc = GET_H_PC ();
 421   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 422   EXTRACT_IFMT_WR_PSR_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-rd f-op */
 423   EXTRACT_IFMT_WR_PSR_CODE
 424
 425   {
 426     SI opval = XORSI (GET_H_GR (f_rs1), GET_H_GR (f_rs2));
 427     SET_H_TBR (opval);
 428     TRACE_RESULT (current_cpu, abuf, "tbr-0", 'x', opval);
 429   }
 430
 431   SEM_NBRANCH_FINI (vpc, 0);
 432   return status;
 433 }
 434
 435 /* wr-tbr-imm: wr $rs1,$simm13,%tbr */
 436
 437 SEM_STATUS
 438 SEM_FN_NAME (sparc32,wr_tbr_imm) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
 439 {
 440   SEM_STATUS status = 0;
 441   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 442   int UNUSED written = 0;
 443   IADDR UNUSED pc = GET_H_PC ();
 444   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 445   EXTRACT_IFMT_WR_PSR_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-rd f-op */
 446   EXTRACT_IFMT_WR_PSR_IMM_CODE
 447
 448   {
 449     SI opval = XORSI (GET_H_GR (f_rs1), f_simm13);
 450     SET_H_TBR (opval);
 451     TRACE_RESULT (current_cpu, abuf, "tbr-0", 'x', opval);
 452   }
 453
 454   SEM_NBRANCH_FINI (vpc, 0);
 455   return status;
 456 }
 457
 458 /* ldstub-reg+reg: ldstub [$rs1+$rs2],$rd */
 459
 460 SEM_STATUS
 461 SEM_FN_NAME (sparc32,ldstub_reg_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
 462 {
 463   SEM_STATUS status = 0;
 464   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 465   int UNUSED written = 0;
 466   IADDR UNUSED pc = GET_H_PC ();
 467   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 468   EXTRACT_IFMT_LDSTUB_REG_REG_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-rd f-op */
 469   EXTRACT_IFMT_LDSTUB_REG_REG_CODE
 470
 471 sparc32_do_ldstub (current_cpu, pc, f_rd, GET_H_GR (f_rs1), GET_H_GR (f_rs2), -1);
 472
 473   SEM_NBRANCH_FINI (vpc, 0);
 474   return status;
 475 }
 476
 477 /* ldstub-reg+imm: ldstub [$rs1+$simm13],$rd */
 478
 479 SEM_STATUS
 480 SEM_FN_NAME (sparc32,ldstub_reg_imm) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
 481 {
 482   SEM_STATUS status = 0;
 483   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 484   int UNUSED written = 0;
 485   IADDR UNUSED pc = GET_H_PC ();
 486   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 487   EXTRACT_IFMT_LDSTUB_REG_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-rd f-op */
 488   EXTRACT_IFMT_LDSTUB_REG_IMM_CODE
 489
 490 sparc32_do_ldstub (current_cpu, pc, f_rd, GET_H_GR (f_rs1), f_simm13, -1);
 491
 492   SEM_NBRANCH_FINI (vpc, 0);
 493   return status;
 494 }
 495
 496 /* ldstub-reg+reg/asi: ldstub [$rs1+$rs2]$asi,$rd */
 497
 498 SEM_STATUS
 499 SEM_FN_NAME (sparc32,ldstub_reg_reg_asi) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
 500 {
 501   SEM_STATUS status = 0;
 502   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 503   int UNUSED written = 0;
 504   IADDR UNUSED pc = GET_H_PC ();
 505   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 506   EXTRACT_IFMT_LDSTUB_REG_REG_ASI_VARS /* f-rs2 f-asi f-i f-rs1 f-op3 f-rd f-op */
 507   EXTRACT_IFMT_LDSTUB_REG_REG_ASI_CODE
 508
 509 sparc32_do_ldstub (current_cpu, pc, f_rd, GET_H_GR (f_rs1), GET_H_GR (f_rs2), f_asi);
 510
 511   SEM_NBRANCH_FINI (vpc, 0);
 512   return status;
 513 }
 514
 515 /* swap-reg+reg: swap [$rs1+$rs2],$rd */
 516
 517 SEM_STATUS
 518 SEM_FN_NAME (sparc32,swap_reg_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
 519 {
 520   SEM_STATUS status = 0;
 521   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 522   int UNUSED written = 0;
 523   IADDR UNUSED pc = GET_H_PC ();
 524   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 525   EXTRACT_IFMT_LDSTUB_REG_REG_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-rd f-op */
 526   EXTRACT_IFMT_LDSTUB_REG_REG_CODE
 527
 528 sparc32_do_swap (current_cpu, pc, f_rd, GET_H_GR (f_rs1), GET_H_GR (f_rs2), -1);
 529
 530   SEM_NBRANCH_FINI (vpc, 0);
 531   return status;
 532 }
 533
 534 /* swap-reg+imm: swap [$rs1+$simm13],$rd */
 535
 536 SEM_STATUS
 537 SEM_FN_NAME (sparc32,swap_reg_imm) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
 538 {
 539   SEM_STATUS status = 0;
 540   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 541   int UNUSED written = 0;
 542   IADDR UNUSED pc = GET_H_PC ();
 543   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 544   EXTRACT_IFMT_LDSTUB_REG_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-rd f-op */
 545   EXTRACT_IFMT_LDSTUB_REG_IMM_CODE
 546
 547 sparc32_do_swap (current_cpu, pc, f_rd, GET_H_GR (f_rs1), f_simm13, -1);
 548
 549   SEM_NBRANCH_FINI (vpc, 0);
 550   return status;
 551 }
 552
 553 /* swap-reg+reg/asi: swap [$rs1+$rs2]$asi,$rd */
 554
 555 SEM_STATUS
 556 SEM_FN_NAME (sparc32,swap_reg_reg_asi) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
 557 {
 558   SEM_STATUS status = 0;
 559   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 560   int UNUSED written = 0;
 561   IADDR UNUSED pc = GET_H_PC ();
 562   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 563   EXTRACT_IFMT_LDSTUB_REG_REG_ASI_VARS /* f-rs2 f-asi f-i f-rs1 f-op3 f-rd f-op */
 564   EXTRACT_IFMT_LDSTUB_REG_REG_ASI_CODE
 565
 566 sparc32_do_swap (current_cpu, pc, f_rd, GET_H_GR (f_rs1), GET_H_GR (f_rs2), f_asi);
 567
 568   SEM_NBRANCH_FINI (vpc, 0);
 569   return status;
 570 }
 571
 572 /* ldsb-reg+reg: ldsb [$rs1+$rs2],$rd */
 573
 574 SEM_STATUS
 575 SEM_FN_NAME (sparc32,ldsb_reg_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
 576 {
 577   SEM_STATUS status = 0;
 578   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 579   int UNUSED written = 0;
 580   IADDR UNUSED pc = GET_H_PC ();
 581   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 582   EXTRACT_IFMT_LDSTUB_REG_REG_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-rd f-op */
 583   EXTRACT_IFMT_LDSTUB_REG_REG_CODE
 584
 585   {
 586     QI opval = GETMEMQI (current_cpu, pc, ADDSI (GET_H_GR (f_rs1), GET_H_GR (f_rs2)));
 587     SET_H_GR (f_rd, opval);
 588     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
 589   }
 590
 591   SEM_NBRANCH_FINI (vpc, 0);
 592   return status;
 593 }
 594
 595 /* ldsb-reg+imm: ldsb [$rs1+$simm13],$rd */
 596
 597 SEM_STATUS
 598 SEM_FN_NAME (sparc32,ldsb_reg_imm) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
 599 {
 600   SEM_STATUS status = 0;
 601   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 602   int UNUSED written = 0;
 603   IADDR UNUSED pc = GET_H_PC ();
 604   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 605   EXTRACT_IFMT_LDSTUB_REG_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-rd f-op */
 606   EXTRACT_IFMT_LDSTUB_REG_IMM_CODE
 607
 608   {
 609     QI opval = GETMEMQI (current_cpu, pc, ADDSI (GET_H_GR (f_rs1), f_simm13));
 610     SET_H_GR (f_rd, opval);
 611     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
 612   }
 613
 614   SEM_NBRANCH_FINI (vpc, 0);
 615   return status;
 616 }
 617
 618 /* ldsb-reg+reg/asi: ldsb [$rs1+$rs2]$asi,$rd */
 619
 620 SEM_STATUS
 621 SEM_FN_NAME (sparc32,ldsb_reg_reg_asi) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
 622 {
 623   SEM_STATUS status = 0;
 624   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 625   int UNUSED written = 0;
 626   IADDR UNUSED pc = GET_H_PC ();
 627   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 628   EXTRACT_IFMT_LDSTUB_REG_REG_ASI_VARS /* f-rs2 f-asi f-i f-rs1 f-op3 f-rd f-op */
 629   EXTRACT_IFMT_LDSTUB_REG_REG_ASI_CODE
 630
 631   {
 632     QI opval = GETMEMQI (current_cpu, pc, ADDSI (GET_H_GR (f_rs1), GET_H_GR (f_rs2)));
 633     SET_H_GR (f_rd, opval);
 634     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
 635   }
 636
 637   SEM_NBRANCH_FINI (vpc, 0);
 638   return status;
 639 }
 640
 641 /* ldub-reg+reg: ldub [$rs1+$rs2],$rd */
 642
 643 SEM_STATUS
 644 SEM_FN_NAME (sparc32,ldub_reg_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
 645 {
 646   SEM_STATUS status = 0;
 647   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 648   int UNUSED written = 0;
 649   IADDR UNUSED pc = GET_H_PC ();
 650   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 651   EXTRACT_IFMT_LDSTUB_REG_REG_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-rd f-op */
 652   EXTRACT_IFMT_LDSTUB_REG_REG_CODE
 653
 654   {
 655     QI opval = GETMEMQI (current_cpu, pc, ADDSI (GET_H_GR (f_rs1), GET_H_GR (f_rs2)));
 656     SET_H_GR (f_rd, opval);
 657     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
 658   }
 659
 660   SEM_NBRANCH_FINI (vpc, 0);
 661   return status;
 662 }
 663
 664 /* ldub-reg+imm: ldub [$rs1+$simm13],$rd */
 665
 666 SEM_STATUS
 667 SEM_FN_NAME (sparc32,ldub_reg_imm) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
 668 {
 669   SEM_STATUS status = 0;
 670   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 671   int UNUSED written = 0;
 672   IADDR UNUSED pc = GET_H_PC ();
 673   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 674   EXTRACT_IFMT_LDSTUB_REG_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-rd f-op */
 675   EXTRACT_IFMT_LDSTUB_REG_IMM_CODE
 676
 677   {
 678     QI opval = GETMEMQI (current_cpu, pc, ADDSI (GET_H_GR (f_rs1), f_simm13));
 679     SET_H_GR (f_rd, opval);
 680     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
 681   }
 682
 683   SEM_NBRANCH_FINI (vpc, 0);
 684   return status;
 685 }
 686
 687 /* ldub-reg+reg/asi: ldub [$rs1+$rs2]$asi,$rd */
 688
 689 SEM_STATUS
 690 SEM_FN_NAME (sparc32,ldub_reg_reg_asi) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
 691 {
 692   SEM_STATUS status = 0;
 693   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 694   int UNUSED written = 0;
 695   IADDR UNUSED pc = GET_H_PC ();
 696   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 697   EXTRACT_IFMT_LDSTUB_REG_REG_ASI_VARS /* f-rs2 f-asi f-i f-rs1 f-op3 f-rd f-op */
 698   EXTRACT_IFMT_LDSTUB_REG_REG_ASI_CODE
 699
 700   {
 701     QI opval = GETMEMQI (current_cpu, pc, ADDSI (GET_H_GR (f_rs1), GET_H_GR (f_rs2)));
 702     SET_H_GR (f_rd, opval);
 703     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
 704   }
 705
 706   SEM_NBRANCH_FINI (vpc, 0);
 707   return status;
 708 }
 709
 710 /* ldsh-reg+reg: ldsh [$rs1+$rs2],$rd */
 711
 712 SEM_STATUS
 713 SEM_FN_NAME (sparc32,ldsh_reg_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
 714 {
 715   SEM_STATUS status = 0;
 716   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 717   int UNUSED written = 0;
 718   IADDR UNUSED pc = GET_H_PC ();
 719   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 720   EXTRACT_IFMT_LDSTUB_REG_REG_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-rd f-op */
 721   EXTRACT_IFMT_LDSTUB_REG_REG_CODE
 722
 723   {
 724     HI opval = GETMEMHI (current_cpu, pc, ADDSI (GET_H_GR (f_rs1), GET_H_GR (f_rs2)));
 725     SET_H_GR (f_rd, opval);
 726     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
 727   }
 728
 729   SEM_NBRANCH_FINI (vpc, 0);
 730   return status;
 731 }
 732
 733 /* ldsh-reg+imm: ldsh [$rs1+$simm13],$rd */
 734
 735 SEM_STATUS
 736 SEM_FN_NAME (sparc32,ldsh_reg_imm) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
 737 {
 738   SEM_STATUS status = 0;
 739   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 740   int UNUSED written = 0;
 741   IADDR UNUSED pc = GET_H_PC ();
 742   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 743   EXTRACT_IFMT_LDSTUB_REG_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-rd f-op */
 744   EXTRACT_IFMT_LDSTUB_REG_IMM_CODE
 745
 746   {
 747     HI opval = GETMEMHI (current_cpu, pc, ADDSI (GET_H_GR (f_rs1), f_simm13));
 748     SET_H_GR (f_rd, opval);
 749     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
 750   }
 751
 752   SEM_NBRANCH_FINI (vpc, 0);
 753   return status;
 754 }
 755
 756 /* ldsh-reg+reg/asi: ldsh [$rs1+$rs2]$asi,$rd */
 757
 758 SEM_STATUS
 759 SEM_FN_NAME (sparc32,ldsh_reg_reg_asi) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
 760 {
 761   SEM_STATUS status = 0;
 762   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 763   int UNUSED written = 0;
 764   IADDR UNUSED pc = GET_H_PC ();
 765   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 766   EXTRACT_IFMT_LDSTUB_REG_REG_ASI_VARS /* f-rs2 f-asi f-i f-rs1 f-op3 f-rd f-op */
 767   EXTRACT_IFMT_LDSTUB_REG_REG_ASI_CODE
 768
 769   {
 770     HI opval = GETMEMHI (current_cpu, pc, ADDSI (GET_H_GR (f_rs1), GET_H_GR (f_rs2)));
 771     SET_H_GR (f_rd, opval);
 772     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
 773   }
 774
 775   SEM_NBRANCH_FINI (vpc, 0);
 776   return status;
 777 }
 778
 779 /* lduh-reg+reg: lduh [$rs1+$rs2],$rd */
 780
 781 SEM_STATUS
 782 SEM_FN_NAME (sparc32,lduh_reg_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
 783 {
 784   SEM_STATUS status = 0;
 785   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 786   int UNUSED written = 0;
 787   IADDR UNUSED pc = GET_H_PC ();
 788   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 789   EXTRACT_IFMT_LDSTUB_REG_REG_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-rd f-op */
 790   EXTRACT_IFMT_LDSTUB_REG_REG_CODE
 791
 792   {
 793     HI opval = GETMEMHI (current_cpu, pc, ADDSI (GET_H_GR (f_rs1), GET_H_GR (f_rs2)));
 794     SET_H_GR (f_rd, opval);
 795     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
 796   }
 797
 798   SEM_NBRANCH_FINI (vpc, 0);
 799   return status;
 800 }
 801
 802 /* lduh-reg+imm: lduh [$rs1+$simm13],$rd */
 803
 804 SEM_STATUS
 805 SEM_FN_NAME (sparc32,lduh_reg_imm) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
 806 {
 807   SEM_STATUS status = 0;
 808   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 809   int UNUSED written = 0;
 810   IADDR UNUSED pc = GET_H_PC ();
 811   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 812   EXTRACT_IFMT_LDSTUB_REG_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-rd f-op */
 813   EXTRACT_IFMT_LDSTUB_REG_IMM_CODE
 814
 815   {
 816     HI opval = GETMEMHI (current_cpu, pc, ADDSI (GET_H_GR (f_rs1), f_simm13));
 817     SET_H_GR (f_rd, opval);
 818     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
 819   }
 820
 821   SEM_NBRANCH_FINI (vpc, 0);
 822   return status;
 823 }
 824
 825 /* lduh-reg+reg/asi: lduh [$rs1+$rs2]$asi,$rd */
 826
 827 SEM_STATUS
 828 SEM_FN_NAME (sparc32,lduh_reg_reg_asi) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
 829 {
 830   SEM_STATUS status = 0;
 831   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 832   int UNUSED written = 0;
 833   IADDR UNUSED pc = GET_H_PC ();
 834   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 835   EXTRACT_IFMT_LDSTUB_REG_REG_ASI_VARS /* f-rs2 f-asi f-i f-rs1 f-op3 f-rd f-op */
 836   EXTRACT_IFMT_LDSTUB_REG_REG_ASI_CODE
 837
 838   {
 839     HI opval = GETMEMHI (current_cpu, pc, ADDSI (GET_H_GR (f_rs1), GET_H_GR (f_rs2)));
 840     SET_H_GR (f_rd, opval);
 841     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
 842   }
 843
 844   SEM_NBRANCH_FINI (vpc, 0);
 845   return status;
 846 }
 847
 848 /* ldsw-reg+reg: ldsw [$rs1+$rs2],$rd */
 849
 850 SEM_STATUS
 851 SEM_FN_NAME (sparc32,ldsw_reg_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
 852 {
 853   SEM_STATUS status = 0;
 854   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 855   int UNUSED written = 0;
 856   IADDR UNUSED pc = GET_H_PC ();
 857   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 858   EXTRACT_IFMT_LDSTUB_REG_REG_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-rd f-op */
 859   EXTRACT_IFMT_LDSTUB_REG_REG_CODE
 860
 861   {
 862     SI opval = GETMEMSI (current_cpu, pc, ADDSI (GET_H_GR (f_rs1), GET_H_GR (f_rs2)));
 863     SET_H_GR (f_rd, opval);
 864     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
 865   }
 866
 867   SEM_NBRANCH_FINI (vpc, 0);
 868   return status;
 869 }
 870
 871 /* ldsw-reg+imm: ldsw [$rs1+$simm13],$rd */
 872
 873 SEM_STATUS
 874 SEM_FN_NAME (sparc32,ldsw_reg_imm) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
 875 {
 876   SEM_STATUS status = 0;
 877   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 878   int UNUSED written = 0;
 879   IADDR UNUSED pc = GET_H_PC ();
 880   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 881   EXTRACT_IFMT_LDSTUB_REG_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-rd f-op */
 882   EXTRACT_IFMT_LDSTUB_REG_IMM_CODE
 883
 884   {
 885     SI opval = GETMEMSI (current_cpu, pc, ADDSI (GET_H_GR (f_rs1), f_simm13));
 886     SET_H_GR (f_rd, opval);
 887     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
 888   }
 889
 890   SEM_NBRANCH_FINI (vpc, 0);
 891   return status;
 892 }
 893
 894 /* ldsw-reg+reg/asi: ldsw [$rs1+$rs2]$asi,$rd */
 895
 896 SEM_STATUS
 897 SEM_FN_NAME (sparc32,ldsw_reg_reg_asi) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
 898 {
 899   SEM_STATUS status = 0;
 900   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 901   int UNUSED written = 0;
 902   IADDR UNUSED pc = GET_H_PC ();
 903   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 904   EXTRACT_IFMT_LDSTUB_REG_REG_ASI_VARS /* f-rs2 f-asi f-i f-rs1 f-op3 f-rd f-op */
 905   EXTRACT_IFMT_LDSTUB_REG_REG_ASI_CODE
 906
 907   {
 908     SI opval = GETMEMSI (current_cpu, pc, ADDSI (GET_H_GR (f_rs1), GET_H_GR (f_rs2)));
 909     SET_H_GR (f_rd, opval);
 910     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
 911   }
 912
 913   SEM_NBRANCH_FINI (vpc, 0);
 914   return status;
 915 }
 916
 917 /* lduw-reg+reg: lduw [$rs1+$rs2],$rd */
 918
 919 SEM_STATUS
 920 SEM_FN_NAME (sparc32,lduw_reg_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
 921 {
 922   SEM_STATUS status = 0;
 923   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 924   int UNUSED written = 0;
 925   IADDR UNUSED pc = GET_H_PC ();
 926   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 927   EXTRACT_IFMT_LDSTUB_REG_REG_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-rd f-op */
 928   EXTRACT_IFMT_LDSTUB_REG_REG_CODE
 929
 930   {
 931     SI opval = GETMEMSI (current_cpu, pc, ADDSI (GET_H_GR (f_rs1), GET_H_GR (f_rs2)));
 932     SET_H_GR (f_rd, opval);
 933     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
 934   }
 935
 936   SEM_NBRANCH_FINI (vpc, 0);
 937   return status;
 938 }
 939
 940 /* lduw-reg+imm: lduw [$rs1+$simm13],$rd */
 941
 942 SEM_STATUS
 943 SEM_FN_NAME (sparc32,lduw_reg_imm) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
 944 {
 945   SEM_STATUS status = 0;
 946   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 947   int UNUSED written = 0;
 948   IADDR UNUSED pc = GET_H_PC ();
 949   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 950   EXTRACT_IFMT_LDSTUB_REG_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-rd f-op */
 951   EXTRACT_IFMT_LDSTUB_REG_IMM_CODE
 952
 953   {
 954     SI opval = GETMEMSI (current_cpu, pc, ADDSI (GET_H_GR (f_rs1), f_simm13));
 955     SET_H_GR (f_rd, opval);
 956     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
 957   }
 958
 959   SEM_NBRANCH_FINI (vpc, 0);
 960   return status;
 961 }
 962
 963 /* lduw-reg+reg/asi: lduw [$rs1+$rs2]$asi,$rd */
 964
 965 SEM_STATUS
 966 SEM_FN_NAME (sparc32,lduw_reg_reg_asi) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
 967 {
 968   SEM_STATUS status = 0;
 969   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 970   int UNUSED written = 0;
 971   IADDR UNUSED pc = GET_H_PC ();
 972   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 973   EXTRACT_IFMT_LDSTUB_REG_REG_ASI_VARS /* f-rs2 f-asi f-i f-rs1 f-op3 f-rd f-op */
 974   EXTRACT_IFMT_LDSTUB_REG_REG_ASI_CODE
 975
 976   {
 977     SI opval = GETMEMSI (current_cpu, pc, ADDSI (GET_H_GR (f_rs1), GET_H_GR (f_rs2)));
 978     SET_H_GR (f_rd, opval);
 979     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
 980   }
 981
 982   SEM_NBRANCH_FINI (vpc, 0);
 983   return status;
 984 }
 985
 986 /* ldd-reg+reg: ldd [$rs1+$rs2],$rdd */
 987
 988 SEM_STATUS
 989 SEM_FN_NAME (sparc32,ldd_reg_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
 990 {
 991   SEM_STATUS status = 0;
 992   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 993   int UNUSED written = 0;
 994   IADDR UNUSED pc = GET_H_PC ();
 995   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 996   EXTRACT_IFMT_LDD_REG_REG_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-rd f-op */
 997   EXTRACT_IFMT_LDD_REG_REG_CODE
 998
 999 do {
1000   {
1001     SI opval = GETMEMSI (current_cpu, pc, ADDSI (GET_H_GR (f_rs1), GET_H_GR (f_rs2)));
1002     SET_H_GR (f_rd, opval);
1003     TRACE_RESULT (current_cpu, abuf, "rdd", 'x', opval);
1004   }
1005   {
1006     SI opval = GETMEMSI (current_cpu, pc, ADDSI (GET_H_GR (f_rs1), ADDSI (GET_H_GR (f_rs2), 4)));
1007     SET_H_GR (((f_rd) + (1)), opval);
1008     TRACE_RESULT (current_cpu, abuf, "gr-add:-VM-regno-rdd-const:-WI-1", 'x', opval);
1009   }
1010 } while (0);
1011
1012   SEM_NBRANCH_FINI (vpc, 0);
1013   return status;
1014 }
1015
1016 /* ldd-reg+imm: ldd [$rs1+$simm13],$rdd */
1017
1018 SEM_STATUS
1019 SEM_FN_NAME (sparc32,ldd_reg_imm) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
1020 {
1021   SEM_STATUS status = 0;
1022   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1023   int UNUSED written = 0;
1024   IADDR UNUSED pc = GET_H_PC ();
1025   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1026   EXTRACT_IFMT_LDD_REG_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-rd f-op */
1027   EXTRACT_IFMT_LDD_REG_IMM_CODE
1028
1029 do {
1030   {
1031     SI opval = GETMEMSI (current_cpu, pc, ADDSI (GET_H_GR (f_rs1), f_simm13));
1032     SET_H_GR (f_rd, opval);
1033     TRACE_RESULT (current_cpu, abuf, "rdd", 'x', opval);
1034   }
1035   {
1036     SI opval = GETMEMSI (current_cpu, pc, ADDSI (GET_H_GR (f_rs1), ADDHI (f_simm13, 4)));
1037     SET_H_GR (((f_rd) + (1)), opval);
1038     TRACE_RESULT (current_cpu, abuf, "gr-add:-VM-regno-rdd-const:-WI-1", 'x', opval);
1039   }
1040 } while (0);
1041
1042   SEM_NBRANCH_FINI (vpc, 0);
1043   return status;
1044 }
1045
1046 /* ldd-reg+reg/asi: ldd [$rs1+$rs2]$asi,$rdd */
1047
1048 SEM_STATUS
1049 SEM_FN_NAME (sparc32,ldd_reg_reg_asi) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
1050 {
1051   SEM_STATUS status = 0;
1052   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1053   int UNUSED written = 0;
1054   IADDR UNUSED pc = GET_H_PC ();
1055   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1056   EXTRACT_IFMT_LDD_REG_REG_ASI_VARS /* f-rs2 f-asi f-i f-rs1 f-op3 f-rd f-op */
1057   EXTRACT_IFMT_LDD_REG_REG_ASI_CODE
1058
1059 do {
1060   {
1061     SI opval = GETMEMSI (current_cpu, pc, ADDSI (GET_H_GR (f_rs1), GET_H_GR (f_rs2)));
1062     SET_H_GR (f_rd, opval);
1063     TRACE_RESULT (current_cpu, abuf, "rdd", 'x', opval);
1064   }
1065   {
1066     SI opval = GETMEMSI (current_cpu, pc, ADDSI (GET_H_GR (f_rs1), ADDSI (GET_H_GR (f_rs2), 4)));
1067     SET_H_GR (((f_rd) + (1)), opval);
1068     TRACE_RESULT (current_cpu, abuf, "gr-add:-VM-regno-rdd-const:-WI-1", 'x', opval);
1069   }
1070 } while (0);
1071
1072   SEM_NBRANCH_FINI (vpc, 0);
1073   return status;
1074 }
1075
1076 /* stb-reg+reg: stb $rd,[$rs1+$rs2] */
1077
1078 SEM_STATUS
1079 SEM_FN_NAME (sparc32,stb_reg_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
1080 {
1081   SEM_STATUS status = 0;
1082   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1083   int UNUSED written = 0;
1084   IADDR UNUSED pc = GET_H_PC ();
1085   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1086   EXTRACT_IFMT_LDSTUB_REG_REG_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-rd f-op */
1087   EXTRACT_IFMT_LDSTUB_REG_REG_CODE
1088
1089   {
1090     QI opval = GET_H_GR (f_rd);
1091     SETMEMQI (current_cpu, pc, ADDSI (GET_H_GR (f_rs1), GET_H_GR (f_rs2)), opval);
1092     TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
1093   }
1094
1095   SEM_NBRANCH_FINI (vpc, 0);
1096   return status;
1097 }
1098
1099 /* stb-reg+imm: stb $rd,[$rs1+$simm13] */
1100
1101 SEM_STATUS
1102 SEM_FN_NAME (sparc32,stb_reg_imm) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
1103 {
1104   SEM_STATUS status = 0;
1105   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1106   int UNUSED written = 0;
1107   IADDR UNUSED pc = GET_H_PC ();
1108   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1109   EXTRACT_IFMT_LDSTUB_REG_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-rd f-op */
1110   EXTRACT_IFMT_LDSTUB_REG_IMM_CODE
1111
1112   {
1113     QI opval = GET_H_GR (f_rd);
1114     SETMEMQI (current_cpu, pc, ADDSI (GET_H_GR (f_rs1), f_simm13), opval);
1115     TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
1116   }
1117
1118   SEM_NBRANCH_FINI (vpc, 0);
1119   return status;
1120 }
1121
1122 /* stb-reg+reg/asi: stb $rd,[$rs1+$rs2]$asi */
1123
1124 SEM_STATUS
1125 SEM_FN_NAME (sparc32,stb_reg_reg_asi) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
1126 {
1127   SEM_STATUS status = 0;
1128   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1129   int UNUSED written = 0;
1130   IADDR UNUSED pc = GET_H_PC ();
1131   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1132   EXTRACT_IFMT_LDSTUB_REG_REG_ASI_VARS /* f-rs2 f-asi f-i f-rs1 f-op3 f-rd f-op */
1133   EXTRACT_IFMT_LDSTUB_REG_REG_ASI_CODE
1134
1135   {
1136     QI opval = GET_H_GR (f_rd);
1137     SETMEMQI (current_cpu, pc, ADDSI (GET_H_GR (f_rs1), GET_H_GR (f_rs2)), opval);
1138     TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
1139   }
1140
1141   SEM_NBRANCH_FINI (vpc, 0);
1142   return status;
1143 }
1144
1145 /* sth-reg+reg: sth $rd,[$rs1+$rs2] */
1146
1147 SEM_STATUS
1148 SEM_FN_NAME (sparc32,sth_reg_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
1149 {
1150   SEM_STATUS status = 0;
1151   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1152   int UNUSED written = 0;
1153   IADDR UNUSED pc = GET_H_PC ();
1154   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1155   EXTRACT_IFMT_LDSTUB_REG_REG_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-rd f-op */
1156   EXTRACT_IFMT_LDSTUB_REG_REG_CODE
1157
1158   {
1159     HI opval = GET_H_GR (f_rd);
1160     SETMEMHI (current_cpu, pc, ADDSI (GET_H_GR (f_rs1), GET_H_GR (f_rs2)), opval);
1161     TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
1162   }
1163
1164   SEM_NBRANCH_FINI (vpc, 0);
1165   return status;
1166 }
1167
1168 /* sth-reg+imm: sth $rd,[$rs1+$simm13] */
1169
1170 SEM_STATUS
1171 SEM_FN_NAME (sparc32,sth_reg_imm) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
1172 {
1173   SEM_STATUS status = 0;
1174   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1175   int UNUSED written = 0;
1176   IADDR UNUSED pc = GET_H_PC ();
1177   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1178   EXTRACT_IFMT_LDSTUB_REG_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-rd f-op */
1179   EXTRACT_IFMT_LDSTUB_REG_IMM_CODE
1180
1181   {
1182     HI opval = GET_H_GR (f_rd);
1183     SETMEMHI (current_cpu, pc, ADDSI (GET_H_GR (f_rs1), f_simm13), opval);
1184     TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
1185   }
1186
1187   SEM_NBRANCH_FINI (vpc, 0);
1188   return status;
1189 }
1190
1191 /* sth-reg+reg/asi: sth $rd,[$rs1+$rs2]$asi */
1192
1193 SEM_STATUS
1194 SEM_FN_NAME (sparc32,sth_reg_reg_asi) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
1195 {
1196   SEM_STATUS status = 0;
1197   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1198   int UNUSED written = 0;
1199   IADDR UNUSED pc = GET_H_PC ();
1200   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1201   EXTRACT_IFMT_LDSTUB_REG_REG_ASI_VARS /* f-rs2 f-asi f-i f-rs1 f-op3 f-rd f-op */
1202   EXTRACT_IFMT_LDSTUB_REG_REG_ASI_CODE
1203
1204   {
1205     HI opval = GET_H_GR (f_rd);
1206     SETMEMHI (current_cpu, pc, ADDSI (GET_H_GR (f_rs1), GET_H_GR (f_rs2)), opval);
1207     TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
1208   }
1209
1210   SEM_NBRANCH_FINI (vpc, 0);
1211   return status;
1212 }
1213
1214 /* st-reg+reg: st $rd,[$rs1+$rs2] */
1215
1216 SEM_STATUS
1217 SEM_FN_NAME (sparc32,st_reg_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
1218 {
1219   SEM_STATUS status = 0;
1220   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1221   int UNUSED written = 0;
1222   IADDR UNUSED pc = GET_H_PC ();
1223   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1224   EXTRACT_IFMT_LDSTUB_REG_REG_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-rd f-op */
1225   EXTRACT_IFMT_LDSTUB_REG_REG_CODE
1226
1227   {
1228     SI opval = GET_H_GR (f_rd);
1229     SETMEMSI (current_cpu, pc, ADDSI (GET_H_GR (f_rs1), GET_H_GR (f_rs2)), opval);
1230     TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
1231   }
1232
1233   SEM_NBRANCH_FINI (vpc, 0);
1234   return status;
1235 }
1236
1237 /* st-reg+imm: st $rd,[$rs1+$simm13] */
1238
1239 SEM_STATUS
1240 SEM_FN_NAME (sparc32,st_reg_imm) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
1241 {
1242   SEM_STATUS status = 0;
1243   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1244   int UNUSED written = 0;
1245   IADDR UNUSED pc = GET_H_PC ();
1246   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1247   EXTRACT_IFMT_LDSTUB_REG_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-rd f-op */
1248   EXTRACT_IFMT_LDSTUB_REG_IMM_CODE
1249
1250   {
1251     SI opval = GET_H_GR (f_rd);
1252     SETMEMSI (current_cpu, pc, ADDSI (GET_H_GR (f_rs1), f_simm13), opval);
1253     TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
1254   }
1255
1256   SEM_NBRANCH_FINI (vpc, 0);
1257   return status;
1258 }
1259
1260 /* st-reg+reg/asi: st $rd,[$rs1+$rs2]$asi */
1261
1262 SEM_STATUS
1263 SEM_FN_NAME (sparc32,st_reg_reg_asi) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
1264 {
1265   SEM_STATUS status = 0;
1266   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1267   int UNUSED written = 0;
1268   IADDR UNUSED pc = GET_H_PC ();
1269   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1270   EXTRACT_IFMT_LDSTUB_REG_REG_ASI_VARS /* f-rs2 f-asi f-i f-rs1 f-op3 f-rd f-op */
1271   EXTRACT_IFMT_LDSTUB_REG_REG_ASI_CODE
1272
1273   {
1274     SI opval = GET_H_GR (f_rd);
1275     SETMEMSI (current_cpu, pc, ADDSI (GET_H_GR (f_rs1), GET_H_GR (f_rs2)), opval);
1276     TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
1277   }
1278
1279   SEM_NBRANCH_FINI (vpc, 0);
1280   return status;
1281 }
1282
1283 /* std-reg+reg: std $rdd,[$rs1+$rs2] */
1284
1285 SEM_STATUS
1286 SEM_FN_NAME (sparc32,std_reg_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
1287 {
1288   SEM_STATUS status = 0;
1289   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1290   int UNUSED written = 0;
1291   IADDR UNUSED pc = GET_H_PC ();
1292   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1293   EXTRACT_IFMT_LDD_REG_REG_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-rd f-op */
1294   EXTRACT_IFMT_LDD_REG_REG_CODE
1295
1296 do {
1297   {
1298     SI opval = GET_H_GR (f_rd);
1299     SETMEMSI (current_cpu, pc, ADDSI (GET_H_GR (f_rs1), GET_H_GR (f_rs2)), opval);
1300     TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
1301   }
1302   {
1303     SI opval = GET_H_GR (((f_rd) + (1)));
1304     SETMEMSI (current_cpu, pc, ADDSI (GET_H_GR (f_rs1), ADDSI (GET_H_GR (f_rs2), 4)), opval);
1305     TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
1306   }
1307 } while (0);
1308
1309   SEM_NBRANCH_FINI (vpc, 0);
1310   return status;
1311 }
1312
1313 /* std-reg+imm: std $rdd,[$rs1+$simm13] */
1314
1315 SEM_STATUS
1316 SEM_FN_NAME (sparc32,std_reg_imm) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
1317 {
1318   SEM_STATUS status = 0;
1319   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1320   int UNUSED written = 0;
1321   IADDR UNUSED pc = GET_H_PC ();
1322   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1323   EXTRACT_IFMT_LDD_REG_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-rd f-op */
1324   EXTRACT_IFMT_LDD_REG_IMM_CODE
1325
1326 do {
1327   {
1328     SI opval = GET_H_GR (f_rd);
1329     SETMEMSI (current_cpu, pc, ADDSI (GET_H_GR (f_rs1), f_simm13), opval);
1330     TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
1331   }
1332   {
1333     SI opval = GET_H_GR (((f_rd) + (1)));
1334     SETMEMSI (current_cpu, pc, ADDSI (GET_H_GR (f_rs1), ADDHI (f_simm13, 4)), opval);
1335     TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
1336   }
1337 } while (0);
1338
1339   SEM_NBRANCH_FINI (vpc, 0);
1340   return status;
1341 }
1342
1343 /* std-reg+reg/asi: std $rdd,[$rs1+$rs2]$asi */
1344
1345 SEM_STATUS
1346 SEM_FN_NAME (sparc32,std_reg_reg_asi) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
1347 {
1348   SEM_STATUS status = 0;
1349   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1350   int UNUSED written = 0;
1351   IADDR UNUSED pc = GET_H_PC ();
1352   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1353   EXTRACT_IFMT_LDD_REG_REG_ASI_VARS /* f-rs2 f-asi f-i f-rs1 f-op3 f-rd f-op */
1354   EXTRACT_IFMT_LDD_REG_REG_ASI_CODE
1355
1356 do {
1357   {
1358     SI opval = GET_H_GR (f_rd);
1359     SETMEMSI (current_cpu, pc, ADDSI (GET_H_GR (f_rs1), GET_H_GR (f_rs2)), opval);
1360     TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
1361   }
1362   {
1363     SI opval = GET_H_GR (((f_rd) + (1)));
1364     SETMEMSI (current_cpu, pc, ADDSI (GET_H_GR (f_rs1), ADDSI (GET_H_GR (f_rs2), 4)), opval);
1365     TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
1366   }
1367 } while (0);
1368
1369   SEM_NBRANCH_FINI (vpc, 0);
1370   return status;
1371 }
1372
1373 /* fp-ld-reg+reg: ld [$rs1+$rs2],$frd */
1374
1375 SEM_STATUS
1376 SEM_FN_NAME (sparc32,fp_ld_reg_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
1377 {
1378   SEM_STATUS status = 0;
1379   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1380   int UNUSED written = 0;
1381   IADDR UNUSED pc = GET_H_PC ();
1382   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1383   EXTRACT_IFMT_FP_LD_REG_REG_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-rd f-op */
1384   EXTRACT_IFMT_FP_LD_REG_REG_CODE
1385
1386 do {
1387 sparc32_hw_trap (current_cpu, pc, TRAP32_FP_DIS);
1388   {
1389     SF opval = GETMEMSF (current_cpu, pc, ADDSI (GET_H_GR (f_rs1), GET_H_GR (f_rs2)));
1390     CPU (h_fr[f_rd]) = opval;
1391     TRACE_RESULT (current_cpu, abuf, "frd", 'f', opval);
1392   }
1393 } while (0);
1394
1395   SEM_NBRANCH_FINI (vpc, 0);
1396   return status;
1397 }
1398
1399 /* fp-ld-reg+imm: ld [$rs1+$simm13],$frd */
1400
1401 SEM_STATUS
1402 SEM_FN_NAME (sparc32,fp_ld_reg_imm) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
1403 {
1404   SEM_STATUS status = 0;
1405   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1406   int UNUSED written = 0;
1407   IADDR UNUSED pc = GET_H_PC ();
1408   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1409   EXTRACT_IFMT_FP_LD_REG_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-rd f-op */
1410   EXTRACT_IFMT_FP_LD_REG_IMM_CODE
1411
1412 do {
1413 sparc32_hw_trap (current_cpu, pc, TRAP32_FP_DIS);
1414   {
1415     SF opval = GETMEMSF (current_cpu, pc, ADDSI (GET_H_GR (f_rs1), f_simm13));
1416     CPU (h_fr[f_rd]) = opval;
1417     TRACE_RESULT (current_cpu, abuf, "frd", 'f', opval);
1418   }
1419 } while (0);
1420
1421   SEM_NBRANCH_FINI (vpc, 0);
1422   return status;
1423 }
1424
1425 /* fp-ld-reg+reg/asi: ld [$rs1+$rs2]$asi,$frd */
1426
1427 SEM_STATUS
1428 SEM_FN_NAME (sparc32,fp_ld_reg_reg_asi) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
1429 {
1430   SEM_STATUS status = 0;
1431   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1432   int UNUSED written = 0;
1433   IADDR UNUSED pc = GET_H_PC ();
1434   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1435   EXTRACT_IFMT_FP_LD_REG_REG_ASI_VARS /* f-rs2 f-asi f-i f-rs1 f-op3 f-rd f-op */
1436   EXTRACT_IFMT_FP_LD_REG_REG_ASI_CODE
1437
1438 do {
1439 sparc32_hw_trap (current_cpu, pc, TRAP32_FP_DIS);
1440   {
1441     SF opval = GETMEMSF (current_cpu, pc, ADDSI (GET_H_GR (f_rs1), GET_H_GR (f_rs2)));
1442     CPU (h_fr[f_rd]) = opval;
1443     TRACE_RESULT (current_cpu, abuf, "frd", 'f', opval);
1444   }
1445 } while (0);
1446
1447   SEM_NBRANCH_FINI (vpc, 0);
1448   return status;
1449 }
1450
1451 /* sethi: sethi $hi22,$rd */
1452
1453 SEM_STATUS
1454 SEM_FN_NAME (sparc32,sethi) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
1455 {
1456   SEM_STATUS status = 0;
1457   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1458   int UNUSED written = 0;
1459   IADDR UNUSED pc = GET_H_PC ();
1460   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1461   EXTRACT_IFMT_SETHI_VARS /* f-hi22 f-op2 f-rd f-op */
1462   EXTRACT_IFMT_SETHI_CODE
1463
1464   {
1465     SI opval = SLLSI (f_hi22, 10);
1466     SET_H_GR (f_rd, opval);
1467     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
1468   }
1469
1470   SEM_NBRANCH_FINI (vpc, 0);
1471   return status;
1472 }
1473
1474 /* add: add $rs1,$rs2,$rd */
1475
1476 SEM_STATUS
1477 SEM_FN_NAME (sparc32,add) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
1478 {
1479   SEM_STATUS status = 0;
1480   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1481   int UNUSED written = 0;
1482   IADDR UNUSED pc = GET_H_PC ();
1483   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1484   EXTRACT_IFMT_LDSTUB_REG_REG_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-rd f-op */
1485   EXTRACT_IFMT_LDSTUB_REG_REG_CODE
1486
1487   {
1488     SI opval = ADDSI (GET_H_GR (f_rs1), GET_H_GR (f_rs2));
1489     SET_H_GR (f_rd, opval);
1490     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
1491   }
1492
1493   SEM_NBRANCH_FINI (vpc, 0);
1494   return status;
1495 }
1496
1497 /* add-imm: add $rs1,$simm13,$rd */
1498
1499 SEM_STATUS
1500 SEM_FN_NAME (sparc32,add_imm) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
1501 {
1502   SEM_STATUS status = 0;
1503   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1504   int UNUSED written = 0;
1505   IADDR UNUSED pc = GET_H_PC ();
1506   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1507   EXTRACT_IFMT_LDSTUB_REG_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-rd f-op */
1508   EXTRACT_IFMT_LDSTUB_REG_IMM_CODE
1509
1510   {
1511     SI opval = ADDSI (GET_H_GR (f_rs1), f_simm13);
1512     SET_H_GR (f_rd, opval);
1513     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
1514   }
1515
1516   SEM_NBRANCH_FINI (vpc, 0);
1517   return status;
1518 }
1519
1520 /* sub: sub $rs1,$rs2,$rd */
1521
1522 SEM_STATUS
1523 SEM_FN_NAME (sparc32,sub) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
1524 {
1525   SEM_STATUS status = 0;
1526   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1527   int UNUSED written = 0;
1528   IADDR UNUSED pc = GET_H_PC ();
1529   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1530   EXTRACT_IFMT_LDSTUB_REG_REG_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-rd f-op */
1531   EXTRACT_IFMT_LDSTUB_REG_REG_CODE
1532
1533   {
1534     SI opval = SUBSI (GET_H_GR (f_rs1), GET_H_GR (f_rs2));
1535     SET_H_GR (f_rd, opval);
1536     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
1537   }
1538
1539   SEM_NBRANCH_FINI (vpc, 0);
1540   return status;
1541 }
1542
1543 /* sub-imm: sub $rs1,$simm13,$rd */
1544
1545 SEM_STATUS
1546 SEM_FN_NAME (sparc32,sub_imm) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
1547 {
1548   SEM_STATUS status = 0;
1549   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1550   int UNUSED written = 0;
1551   IADDR UNUSED pc = GET_H_PC ();
1552   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1553   EXTRACT_IFMT_LDSTUB_REG_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-rd f-op */
1554   EXTRACT_IFMT_LDSTUB_REG_IMM_CODE
1555
1556   {
1557     SI opval = SUBSI (GET_H_GR (f_rs1), f_simm13);
1558     SET_H_GR (f_rd, opval);
1559     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
1560   }
1561
1562   SEM_NBRANCH_FINI (vpc, 0);
1563   return status;
1564 }
1565
1566 /* addcc: addcc $rs1,$rs2,$rd */
1567
1568 SEM_STATUS
1569 SEM_FN_NAME (sparc32,addcc) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
1570 {
1571   SEM_STATUS status = 0;
1572   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1573   int UNUSED written = 0;
1574   IADDR UNUSED pc = GET_H_PC ();
1575   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1576   EXTRACT_IFMT_LDSTUB_REG_REG_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-rd f-op */
1577   EXTRACT_IFMT_LDSTUB_REG_REG_CODE
1578
1579 do {
1580 do {
1581   SI tmp_x;
1582   tmp_x = ADDCSI (GET_H_GR (f_rs1), GET_H_GR (f_rs2), 0);
1583   {
1584     BI opval = ADDCFSI (GET_H_GR (f_rs1), GET_H_GR (f_rs2), 0);
1585     CPU (h_icc_c) = opval;
1586     TRACE_RESULT (current_cpu, abuf, "icc-c", 'x', opval);
1587   }
1588   {
1589     BI opval = ADDOFSI (GET_H_GR (f_rs1), GET_H_GR (f_rs2), 0);
1590     CPU (h_icc_v) = opval;
1591     TRACE_RESULT (current_cpu, abuf, "icc-v", 'x', opval);
1592   }
1593   {
1594     BI opval = LTSI (tmp_x, 0);
1595     CPU (h_icc_n) = opval;
1596     TRACE_RESULT (current_cpu, abuf, "icc-n", 'x', opval);
1597   }
1598   {
1599     BI opval = EQSI (tmp_x, 0);
1600     CPU (h_icc_z) = opval;
1601     TRACE_RESULT (current_cpu, abuf, "icc-z", 'x', opval);
1602   }
1603 } while (0);
1604   {
1605     SI opval = ADDSI (GET_H_GR (f_rs1), GET_H_GR (f_rs2));
1606     SET_H_GR (f_rd, opval);
1607     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
1608   }
1609 } while (0);
1610
1611   SEM_NBRANCH_FINI (vpc, 0);
1612   return status;
1613 }
1614
1615 /* addcc-imm: addcc $rs1,$simm13,$rd */
1616
1617 SEM_STATUS
1618 SEM_FN_NAME (sparc32,addcc_imm) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
1619 {
1620   SEM_STATUS status = 0;
1621   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1622   int UNUSED written = 0;
1623   IADDR UNUSED pc = GET_H_PC ();
1624   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1625   EXTRACT_IFMT_LDSTUB_REG_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-rd f-op */
1626   EXTRACT_IFMT_LDSTUB_REG_IMM_CODE
1627
1628 do {
1629 do {
1630   SI tmp_x;
1631   tmp_x = ADDCSI (GET_H_GR (f_rs1), f_simm13, 0);
1632   {
1633     BI opval = ADDCFSI (GET_H_GR (f_rs1), f_simm13, 0);
1634     CPU (h_icc_c) = opval;
1635     TRACE_RESULT (current_cpu, abuf, "icc-c", 'x', opval);
1636   }
1637   {
1638     BI opval = ADDOFSI (GET_H_GR (f_rs1), f_simm13, 0);
1639     CPU (h_icc_v) = opval;
1640     TRACE_RESULT (current_cpu, abuf, "icc-v", 'x', opval);
1641   }
1642   {
1643     BI opval = LTSI (tmp_x, 0);
1644     CPU (h_icc_n) = opval;
1645     TRACE_RESULT (current_cpu, abuf, "icc-n", 'x', opval);
1646   }
1647   {
1648     BI opval = EQSI (tmp_x, 0);
1649     CPU (h_icc_z) = opval;
1650     TRACE_RESULT (current_cpu, abuf, "icc-z", 'x', opval);
1651   }
1652 } while (0);
1653   {
1654     SI opval = ADDSI (GET_H_GR (f_rs1), f_simm13);
1655     SET_H_GR (f_rd, opval);
1656     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
1657   }
1658 } while (0);
1659
1660   SEM_NBRANCH_FINI (vpc, 0);
1661   return status;
1662 }
1663
1664 /* subcc: subcc $rs1,$rs2,$rd */
1665
1666 SEM_STATUS
1667 SEM_FN_NAME (sparc32,subcc) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
1668 {
1669   SEM_STATUS status = 0;
1670   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1671   int UNUSED written = 0;
1672   IADDR UNUSED pc = GET_H_PC ();
1673   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1674   EXTRACT_IFMT_LDSTUB_REG_REG_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-rd f-op */
1675   EXTRACT_IFMT_LDSTUB_REG_REG_CODE
1676
1677 do {
1678 do {
1679   SI tmp_x;
1680   tmp_x = SUBCSI (GET_H_GR (f_rs1), GET_H_GR (f_rs2), 0);
1681   {
1682     BI opval = SUBCFSI (GET_H_GR (f_rs1), GET_H_GR (f_rs2), 0);
1683     CPU (h_icc_c) = opval;
1684     TRACE_RESULT (current_cpu, abuf, "icc-c", 'x', opval);
1685   }
1686   {
1687     BI opval = SUBOFSI (GET_H_GR (f_rs1), GET_H_GR (f_rs2), 0);
1688     CPU (h_icc_v) = opval;
1689     TRACE_RESULT (current_cpu, abuf, "icc-v", 'x', opval);
1690   }
1691   {
1692     BI opval = LTSI (tmp_x, 0);
1693     CPU (h_icc_n) = opval;
1694     TRACE_RESULT (current_cpu, abuf, "icc-n", 'x', opval);
1695   }
1696   {
1697     BI opval = EQSI (tmp_x, 0);
1698     CPU (h_icc_z) = opval;
1699     TRACE_RESULT (current_cpu, abuf, "icc-z", 'x', opval);
1700   }
1701 } while (0);
1702   {
1703     SI opval = SUBSI (GET_H_GR (f_rs1), GET_H_GR (f_rs2));
1704     SET_H_GR (f_rd, opval);
1705     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
1706   }
1707 } while (0);
1708
1709   SEM_NBRANCH_FINI (vpc, 0);
1710   return status;
1711 }
1712
1713 /* subcc-imm: subcc $rs1,$simm13,$rd */
1714
1715 SEM_STATUS
1716 SEM_FN_NAME (sparc32,subcc_imm) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
1717 {
1718   SEM_STATUS status = 0;
1719   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1720   int UNUSED written = 0;
1721   IADDR UNUSED pc = GET_H_PC ();
1722   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1723   EXTRACT_IFMT_LDSTUB_REG_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-rd f-op */
1724   EXTRACT_IFMT_LDSTUB_REG_IMM_CODE
1725
1726 do {
1727 do {
1728   SI tmp_x;
1729   tmp_x = SUBCSI (GET_H_GR (f_rs1), f_simm13, 0);
1730   {
1731     BI opval = SUBCFSI (GET_H_GR (f_rs1), f_simm13, 0);
1732     CPU (h_icc_c) = opval;
1733     TRACE_RESULT (current_cpu, abuf, "icc-c", 'x', opval);
1734   }
1735   {
1736     BI opval = SUBOFSI (GET_H_GR (f_rs1), f_simm13, 0);
1737     CPU (h_icc_v) = opval;
1738     TRACE_RESULT (current_cpu, abuf, "icc-v", 'x', opval);
1739   }
1740   {
1741     BI opval = LTSI (tmp_x, 0);
1742     CPU (h_icc_n) = opval;
1743     TRACE_RESULT (current_cpu, abuf, "icc-n", 'x', opval);
1744   }
1745   {
1746     BI opval = EQSI (tmp_x, 0);
1747     CPU (h_icc_z) = opval;
1748     TRACE_RESULT (current_cpu, abuf, "icc-z", 'x', opval);
1749   }
1750 } while (0);
1751   {
1752     SI opval = SUBSI (GET_H_GR (f_rs1), f_simm13);
1753     SET_H_GR (f_rd, opval);
1754     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
1755   }
1756 } while (0);
1757
1758   SEM_NBRANCH_FINI (vpc, 0);
1759   return status;
1760 }
1761
1762 /* addx: addx $rs1,$rs2,$rd */
1763
1764 SEM_STATUS
1765 SEM_FN_NAME (sparc32,addx) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
1766 {
1767   SEM_STATUS status = 0;
1768   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1769   int UNUSED written = 0;
1770   IADDR UNUSED pc = GET_H_PC ();
1771   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1772   EXTRACT_IFMT_LDSTUB_REG_REG_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-rd f-op */
1773   EXTRACT_IFMT_LDSTUB_REG_REG_CODE
1774
1775   {
1776     SI opval = ADDCSI (GET_H_GR (f_rs1), GET_H_GR (f_rs2), CPU (h_icc_c));
1777     SET_H_GR (f_rd, opval);
1778     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
1779   }
1780
1781   SEM_NBRANCH_FINI (vpc, 0);
1782   return status;
1783 }
1784
1785 /* addx-imm: addx $rs1,$simm13,$rd */
1786
1787 SEM_STATUS
1788 SEM_FN_NAME (sparc32,addx_imm) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
1789 {
1790   SEM_STATUS status = 0;
1791   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1792   int UNUSED written = 0;
1793   IADDR UNUSED pc = GET_H_PC ();
1794   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1795   EXTRACT_IFMT_LDSTUB_REG_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-rd f-op */
1796   EXTRACT_IFMT_LDSTUB_REG_IMM_CODE
1797
1798   {
1799     SI opval = ADDCSI (GET_H_GR (f_rs1), f_simm13, CPU (h_icc_c));
1800     SET_H_GR (f_rd, opval);
1801     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
1802   }
1803
1804   SEM_NBRANCH_FINI (vpc, 0);
1805   return status;
1806 }
1807
1808 /* subx: subx $rs1,$rs2,$rd */
1809
1810 SEM_STATUS
1811 SEM_FN_NAME (sparc32,subx) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
1812 {
1813   SEM_STATUS status = 0;
1814   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1815   int UNUSED written = 0;
1816   IADDR UNUSED pc = GET_H_PC ();
1817   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1818   EXTRACT_IFMT_LDSTUB_REG_REG_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-rd f-op */
1819   EXTRACT_IFMT_LDSTUB_REG_REG_CODE
1820
1821   {
1822     SI opval = SUBCSI (GET_H_GR (f_rs1), GET_H_GR (f_rs2), CPU (h_icc_c));
1823     SET_H_GR (f_rd, opval);
1824     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
1825   }
1826
1827   SEM_NBRANCH_FINI (vpc, 0);
1828   return status;
1829 }
1830
1831 /* subx-imm: subx $rs1,$simm13,$rd */
1832
1833 SEM_STATUS
1834 SEM_FN_NAME (sparc32,subx_imm) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
1835 {
1836   SEM_STATUS status = 0;
1837   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1838   int UNUSED written = 0;
1839   IADDR UNUSED pc = GET_H_PC ();
1840   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1841   EXTRACT_IFMT_LDSTUB_REG_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-rd f-op */
1842   EXTRACT_IFMT_LDSTUB_REG_IMM_CODE
1843
1844   {
1845     SI opval = SUBCSI (GET_H_GR (f_rs1), f_simm13, CPU (h_icc_c));
1846     SET_H_GR (f_rd, opval);
1847     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
1848   }
1849
1850   SEM_NBRANCH_FINI (vpc, 0);
1851   return status;
1852 }
1853
1854 /* addxcc: addxcc $rs1,$rs2,$rd */
1855
1856 SEM_STATUS
1857 SEM_FN_NAME (sparc32,addxcc) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
1858 {
1859   SEM_STATUS status = 0;
1860   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1861   int UNUSED written = 0;
1862   IADDR UNUSED pc = GET_H_PC ();
1863   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1864   EXTRACT_IFMT_LDSTUB_REG_REG_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-rd f-op */
1865   EXTRACT_IFMT_LDSTUB_REG_REG_CODE
1866
1867 do {
1868 do {
1869   SI tmp_x;
1870   tmp_x = ADDCSI (GET_H_GR (f_rs1), GET_H_GR (f_rs2), CPU (h_icc_c));
1871   {
1872     BI opval = ADDCFSI (GET_H_GR (f_rs1), GET_H_GR (f_rs2), CPU (h_icc_c));
1873     CPU (h_icc_c) = opval;
1874     TRACE_RESULT (current_cpu, abuf, "icc-c", 'x', opval);
1875   }
1876   {
1877     BI opval = ADDOFSI (GET_H_GR (f_rs1), GET_H_GR (f_rs2), CPU (h_icc_c));
1878     CPU (h_icc_v) = opval;
1879     TRACE_RESULT (current_cpu, abuf, "icc-v", 'x', opval);
1880   }
1881   {
1882     BI opval = LTSI (tmp_x, 0);
1883     CPU (h_icc_n) = opval;
1884     TRACE_RESULT (current_cpu, abuf, "icc-n", 'x', opval);
1885   }
1886   {
1887     BI opval = EQSI (tmp_x, 0);
1888     CPU (h_icc_z) = opval;
1889     TRACE_RESULT (current_cpu, abuf, "icc-z", 'x', opval);
1890   }
1891 } while (0);
1892   {
1893     SI opval = ADDCSI (GET_H_GR (f_rs1), GET_H_GR (f_rs2), CPU (h_icc_c));
1894     SET_H_GR (f_rd, opval);
1895     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
1896   }
1897 } while (0);
1898
1899   SEM_NBRANCH_FINI (vpc, 0);
1900   return status;
1901 }
1902
1903 /* addxcc-imm: addxcc $rs1,$simm13,$rd */
1904
1905 SEM_STATUS
1906 SEM_FN_NAME (sparc32,addxcc_imm) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
1907 {
1908   SEM_STATUS status = 0;
1909   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1910   int UNUSED written = 0;
1911   IADDR UNUSED pc = GET_H_PC ();
1912   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1913   EXTRACT_IFMT_LDSTUB_REG_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-rd f-op */
1914   EXTRACT_IFMT_LDSTUB_REG_IMM_CODE
1915
1916 do {
1917 do {
1918   SI tmp_x;
1919   tmp_x = ADDCSI (GET_H_GR (f_rs1), f_simm13, CPU (h_icc_c));
1920   {
1921     BI opval = ADDCFSI (GET_H_GR (f_rs1), f_simm13, CPU (h_icc_c));
1922     CPU (h_icc_c) = opval;
1923     TRACE_RESULT (current_cpu, abuf, "icc-c", 'x', opval);
1924   }
1925   {
1926     BI opval = ADDOFSI (GET_H_GR (f_rs1), f_simm13, CPU (h_icc_c));
1927     CPU (h_icc_v) = opval;
1928     TRACE_RESULT (current_cpu, abuf, "icc-v", 'x', opval);
1929   }
1930   {
1931     BI opval = LTSI (tmp_x, 0);
1932     CPU (h_icc_n) = opval;
1933     TRACE_RESULT (current_cpu, abuf, "icc-n", 'x', opval);
1934   }
1935   {
1936     BI opval = EQSI (tmp_x, 0);
1937     CPU (h_icc_z) = opval;
1938     TRACE_RESULT (current_cpu, abuf, "icc-z", 'x', opval);
1939   }
1940 } while (0);
1941   {
1942     SI opval = ADDCSI (GET_H_GR (f_rs1), f_simm13, CPU (h_icc_c));
1943     SET_H_GR (f_rd, opval);
1944     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
1945   }
1946 } while (0);
1947
1948   SEM_NBRANCH_FINI (vpc, 0);
1949   return status;
1950 }
1951
1952 /* subxcc: subxcc $rs1,$rs2,$rd */
1953
1954 SEM_STATUS
1955 SEM_FN_NAME (sparc32,subxcc) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
1956 {
1957   SEM_STATUS status = 0;
1958   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1959   int UNUSED written = 0;
1960   IADDR UNUSED pc = GET_H_PC ();
1961   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1962   EXTRACT_IFMT_LDSTUB_REG_REG_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-rd f-op */
1963   EXTRACT_IFMT_LDSTUB_REG_REG_CODE
1964
1965 do {
1966 do {
1967   SI tmp_x;
1968   tmp_x = SUBCSI (GET_H_GR (f_rs1), GET_H_GR (f_rs2), CPU (h_icc_c));
1969   {
1970     BI opval = SUBCFSI (GET_H_GR (f_rs1), GET_H_GR (f_rs2), CPU (h_icc_c));
1971     CPU (h_icc_c) = opval;
1972     TRACE_RESULT (current_cpu, abuf, "icc-c", 'x', opval);
1973   }
1974   {
1975     BI opval = SUBOFSI (GET_H_GR (f_rs1), GET_H_GR (f_rs2), CPU (h_icc_c));
1976     CPU (h_icc_v) = opval;
1977     TRACE_RESULT (current_cpu, abuf, "icc-v", 'x', opval);
1978   }
1979   {
1980     BI opval = LTSI (tmp_x, 0);
1981     CPU (h_icc_n) = opval;
1982     TRACE_RESULT (current_cpu, abuf, "icc-n", 'x', opval);
1983   }
1984   {
1985     BI opval = EQSI (tmp_x, 0);
1986     CPU (h_icc_z) = opval;
1987     TRACE_RESULT (current_cpu, abuf, "icc-z", 'x', opval);
1988   }
1989 } while (0);
1990   {
1991     SI opval = SUBCSI (GET_H_GR (f_rs1), GET_H_GR (f_rs2), CPU (h_icc_c));
1992     SET_H_GR (f_rd, opval);
1993     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
1994   }
1995 } while (0);
1996
1997   SEM_NBRANCH_FINI (vpc, 0);
1998   return status;
1999 }
2000
2001 /* subxcc-imm: subxcc $rs1,$simm13,$rd */
2002
2003 SEM_STATUS
2004 SEM_FN_NAME (sparc32,subxcc_imm) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
2005 {
2006   SEM_STATUS status = 0;
2007   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2008   int UNUSED written = 0;
2009   IADDR UNUSED pc = GET_H_PC ();
2010   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2011   EXTRACT_IFMT_LDSTUB_REG_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-rd f-op */
2012   EXTRACT_IFMT_LDSTUB_REG_IMM_CODE
2013
2014 do {
2015 do {
2016   SI tmp_x;
2017   tmp_x = SUBCSI (GET_H_GR (f_rs1), f_simm13, CPU (h_icc_c));
2018   {
2019     BI opval = SUBCFSI (GET_H_GR (f_rs1), f_simm13, CPU (h_icc_c));
2020     CPU (h_icc_c) = opval;
2021     TRACE_RESULT (current_cpu, abuf, "icc-c", 'x', opval);
2022   }
2023   {
2024     BI opval = SUBOFSI (GET_H_GR (f_rs1), f_simm13, CPU (h_icc_c));
2025     CPU (h_icc_v) = opval;
2026     TRACE_RESULT (current_cpu, abuf, "icc-v", 'x', opval);
2027   }
2028   {
2029     BI opval = LTSI (tmp_x, 0);
2030     CPU (h_icc_n) = opval;
2031     TRACE_RESULT (current_cpu, abuf, "icc-n", 'x', opval);
2032   }
2033   {
2034     BI opval = EQSI (tmp_x, 0);
2035     CPU (h_icc_z) = opval;
2036     TRACE_RESULT (current_cpu, abuf, "icc-z", 'x', opval);
2037   }
2038 } while (0);
2039   {
2040     SI opval = SUBCSI (GET_H_GR (f_rs1), f_simm13, CPU (h_icc_c));
2041     SET_H_GR (f_rd, opval);
2042     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
2043   }
2044 } while (0);
2045
2046   SEM_NBRANCH_FINI (vpc, 0);
2047   return status;
2048 }
2049
2050 /* and: and $rs1,$rs2,$rd */
2051
2052 SEM_STATUS
2053 SEM_FN_NAME (sparc32,and) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
2054 {
2055   SEM_STATUS status = 0;
2056   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2057   int UNUSED written = 0;
2058   IADDR UNUSED pc = GET_H_PC ();
2059   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2060   EXTRACT_IFMT_LDSTUB_REG_REG_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-rd f-op */
2061   EXTRACT_IFMT_LDSTUB_REG_REG_CODE
2062
2063   {
2064     SI opval = ANDSI (GET_H_GR (f_rs1), GET_H_GR (f_rs2));
2065     SET_H_GR (f_rd, opval);
2066     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
2067   }
2068
2069   SEM_NBRANCH_FINI (vpc, 0);
2070   return status;
2071 }
2072
2073 /* and-imm: and $rs1,$simm13,$rd */
2074
2075 SEM_STATUS
2076 SEM_FN_NAME (sparc32,and_imm) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
2077 {
2078   SEM_STATUS status = 0;
2079   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2080   int UNUSED written = 0;
2081   IADDR UNUSED pc = GET_H_PC ();
2082   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2083   EXTRACT_IFMT_LDSTUB_REG_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-rd f-op */
2084   EXTRACT_IFMT_LDSTUB_REG_IMM_CODE
2085
2086   {
2087     SI opval = ANDSI (GET_H_GR (f_rs1), f_simm13);
2088     SET_H_GR (f_rd, opval);
2089     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
2090   }
2091
2092   SEM_NBRANCH_FINI (vpc, 0);
2093   return status;
2094 }
2095
2096 /* andcc: andcc $rs1,$rs2,$rd */
2097
2098 SEM_STATUS
2099 SEM_FN_NAME (sparc32,andcc) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
2100 {
2101   SEM_STATUS status = 0;
2102   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2103   int UNUSED written = 0;
2104   IADDR UNUSED pc = GET_H_PC ();
2105   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2106   EXTRACT_IFMT_LDSTUB_REG_REG_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-rd f-op */
2107   EXTRACT_IFMT_LDSTUB_REG_REG_CODE
2108
2109 do {
2110 do {
2111   {
2112     BI opval = EQSI (ANDSI (GET_H_GR (f_rs1), GET_H_GR (f_rs2)), 0);
2113     CPU (h_icc_z) = opval;
2114     TRACE_RESULT (current_cpu, abuf, "icc-z", 'x', opval);
2115   }
2116   {
2117     BI opval = LTSI (ANDSI (GET_H_GR (f_rs1), GET_H_GR (f_rs2)), 0);
2118     CPU (h_icc_n) = opval;
2119     TRACE_RESULT (current_cpu, abuf, "icc-n", 'x', opval);
2120   }
2121   {
2122     BI opval = 0;
2123     CPU (h_icc_c) = opval;
2124     TRACE_RESULT (current_cpu, abuf, "icc-c", 'x', opval);
2125   }
2126   {
2127     BI opval = 0;
2128     CPU (h_icc_v) = opval;
2129     TRACE_RESULT (current_cpu, abuf, "icc-v", 'x', opval);
2130   }
2131 } while (0);
2132   {
2133     SI opval = ANDSI (GET_H_GR (f_rs1), GET_H_GR (f_rs2));
2134     SET_H_GR (f_rd, opval);
2135     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
2136   }
2137 } while (0);
2138
2139   SEM_NBRANCH_FINI (vpc, 0);
2140   return status;
2141 }
2142
2143 /* andcc-imm: andcc $rs1,$simm13,$rd */
2144
2145 SEM_STATUS
2146 SEM_FN_NAME (sparc32,andcc_imm) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
2147 {
2148   SEM_STATUS status = 0;
2149   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2150   int UNUSED written = 0;
2151   IADDR UNUSED pc = GET_H_PC ();
2152   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2153   EXTRACT_IFMT_LDSTUB_REG_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-rd f-op */
2154   EXTRACT_IFMT_LDSTUB_REG_IMM_CODE
2155
2156 do {
2157 do {
2158   {
2159     BI opval = EQSI (ANDSI (GET_H_GR (f_rs1), f_simm13), 0);
2160     CPU (h_icc_z) = opval;
2161     TRACE_RESULT (current_cpu, abuf, "icc-z", 'x', opval);
2162   }
2163   {
2164     BI opval = LTSI (ANDSI (GET_H_GR (f_rs1), f_simm13), 0);
2165     CPU (h_icc_n) = opval;
2166     TRACE_RESULT (current_cpu, abuf, "icc-n", 'x', opval);
2167   }
2168   {
2169     BI opval = 0;
2170     CPU (h_icc_c) = opval;
2171     TRACE_RESULT (current_cpu, abuf, "icc-c", 'x', opval);
2172   }
2173   {
2174     BI opval = 0;
2175     CPU (h_icc_v) = opval;
2176     TRACE_RESULT (current_cpu, abuf, "icc-v", 'x', opval);
2177   }
2178 } while (0);
2179   {
2180     SI opval = ANDSI (GET_H_GR (f_rs1), f_simm13);
2181     SET_H_GR (f_rd, opval);
2182     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
2183   }
2184 } while (0);
2185
2186   SEM_NBRANCH_FINI (vpc, 0);
2187   return status;
2188 }
2189
2190 /* or: or $rs1,$rs2,$rd */
2191
2192 SEM_STATUS
2193 SEM_FN_NAME (sparc32,or) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
2194 {
2195   SEM_STATUS status = 0;
2196   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2197   int UNUSED written = 0;
2198   IADDR UNUSED pc = GET_H_PC ();
2199   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2200   EXTRACT_IFMT_LDSTUB_REG_REG_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-rd f-op */
2201   EXTRACT_IFMT_LDSTUB_REG_REG_CODE
2202
2203   {
2204     SI opval = ORSI (GET_H_GR (f_rs1), GET_H_GR (f_rs2));
2205     SET_H_GR (f_rd, opval);
2206     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
2207   }
2208
2209   SEM_NBRANCH_FINI (vpc, 0);
2210   return status;
2211 }
2212
2213 /* or-imm: or $rs1,$simm13,$rd */
2214
2215 SEM_STATUS
2216 SEM_FN_NAME (sparc32,or_imm) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
2217 {
2218   SEM_STATUS status = 0;
2219   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2220   int UNUSED written = 0;
2221   IADDR UNUSED pc = GET_H_PC ();
2222   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2223   EXTRACT_IFMT_LDSTUB_REG_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-rd f-op */
2224   EXTRACT_IFMT_LDSTUB_REG_IMM_CODE
2225
2226   {
2227     SI opval = ORSI (GET_H_GR (f_rs1), f_simm13);
2228     SET_H_GR (f_rd, opval);
2229     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
2230   }
2231
2232   SEM_NBRANCH_FINI (vpc, 0);
2233   return status;
2234 }
2235
2236 /* orcc: orcc $rs1,$rs2,$rd */
2237
2238 SEM_STATUS
2239 SEM_FN_NAME (sparc32,orcc) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
2240 {
2241   SEM_STATUS status = 0;
2242   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2243   int UNUSED written = 0;
2244   IADDR UNUSED pc = GET_H_PC ();
2245   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2246   EXTRACT_IFMT_LDSTUB_REG_REG_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-rd f-op */
2247   EXTRACT_IFMT_LDSTUB_REG_REG_CODE
2248
2249 do {
2250 do {
2251   {
2252     BI opval = EQSI (ORSI (GET_H_GR (f_rs1), GET_H_GR (f_rs2)), 0);
2253     CPU (h_icc_z) = opval;
2254     TRACE_RESULT (current_cpu, abuf, "icc-z", 'x', opval);
2255   }
2256   {
2257     BI opval = LTSI (ORSI (GET_H_GR (f_rs1), GET_H_GR (f_rs2)), 0);
2258     CPU (h_icc_n) = opval;
2259     TRACE_RESULT (current_cpu, abuf, "icc-n", 'x', opval);
2260   }
2261   {
2262     BI opval = 0;
2263     CPU (h_icc_c) = opval;
2264     TRACE_RESULT (current_cpu, abuf, "icc-c", 'x', opval);
2265   }
2266   {
2267     BI opval = 0;
2268     CPU (h_icc_v) = opval;
2269     TRACE_RESULT (current_cpu, abuf, "icc-v", 'x', opval);
2270   }
2271 } while (0);
2272   {
2273     SI opval = ORSI (GET_H_GR (f_rs1), GET_H_GR (f_rs2));
2274     SET_H_GR (f_rd, opval);
2275     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
2276   }
2277 } while (0);
2278
2279   SEM_NBRANCH_FINI (vpc, 0);
2280   return status;
2281 }
2282
2283 /* orcc-imm: orcc $rs1,$simm13,$rd */
2284
2285 SEM_STATUS
2286 SEM_FN_NAME (sparc32,orcc_imm) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
2287 {
2288   SEM_STATUS status = 0;
2289   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2290   int UNUSED written = 0;
2291   IADDR UNUSED pc = GET_H_PC ();
2292   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2293   EXTRACT_IFMT_LDSTUB_REG_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-rd f-op */
2294   EXTRACT_IFMT_LDSTUB_REG_IMM_CODE
2295
2296 do {
2297 do {
2298   {
2299     BI opval = EQSI (ORSI (GET_H_GR (f_rs1), f_simm13), 0);
2300     CPU (h_icc_z) = opval;
2301     TRACE_RESULT (current_cpu, abuf, "icc-z", 'x', opval);
2302   }
2303   {
2304     BI opval = LTSI (ORSI (GET_H_GR (f_rs1), f_simm13), 0);
2305     CPU (h_icc_n) = opval;
2306     TRACE_RESULT (current_cpu, abuf, "icc-n", 'x', opval);
2307   }
2308   {
2309     BI opval = 0;
2310     CPU (h_icc_c) = opval;
2311     TRACE_RESULT (current_cpu, abuf, "icc-c", 'x', opval);
2312   }
2313   {
2314     BI opval = 0;
2315     CPU (h_icc_v) = opval;
2316     TRACE_RESULT (current_cpu, abuf, "icc-v", 'x', opval);
2317   }
2318 } while (0);
2319   {
2320     SI opval = ORSI (GET_H_GR (f_rs1), f_simm13);
2321     SET_H_GR (f_rd, opval);
2322     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
2323   }
2324 } while (0);
2325
2326   SEM_NBRANCH_FINI (vpc, 0);
2327   return status;
2328 }
2329
2330 /* xor: xor $rs1,$rs2,$rd */
2331
2332 SEM_STATUS
2333 SEM_FN_NAME (sparc32,xor) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
2334 {
2335   SEM_STATUS status = 0;
2336   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2337   int UNUSED written = 0;
2338   IADDR UNUSED pc = GET_H_PC ();
2339   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2340   EXTRACT_IFMT_LDSTUB_REG_REG_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-rd f-op */
2341   EXTRACT_IFMT_LDSTUB_REG_REG_CODE
2342
2343   {
2344     SI opval = XORSI (GET_H_GR (f_rs1), GET_H_GR (f_rs2));
2345     SET_H_GR (f_rd, opval);
2346     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
2347   }
2348
2349   SEM_NBRANCH_FINI (vpc, 0);
2350   return status;
2351 }
2352
2353 /* xor-imm: xor $rs1,$simm13,$rd */
2354
2355 SEM_STATUS
2356 SEM_FN_NAME (sparc32,xor_imm) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
2357 {
2358   SEM_STATUS status = 0;
2359   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2360   int UNUSED written = 0;
2361   IADDR UNUSED pc = GET_H_PC ();
2362   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2363   EXTRACT_IFMT_LDSTUB_REG_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-rd f-op */
2364   EXTRACT_IFMT_LDSTUB_REG_IMM_CODE
2365
2366   {
2367     SI opval = XORSI (GET_H_GR (f_rs1), f_simm13);
2368     SET_H_GR (f_rd, opval);
2369     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
2370   }
2371
2372   SEM_NBRANCH_FINI (vpc, 0);
2373   return status;
2374 }
2375
2376 /* xorcc: xorcc $rs1,$rs2,$rd */
2377
2378 SEM_STATUS
2379 SEM_FN_NAME (sparc32,xorcc) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
2380 {
2381   SEM_STATUS status = 0;
2382   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2383   int UNUSED written = 0;
2384   IADDR UNUSED pc = GET_H_PC ();
2385   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2386   EXTRACT_IFMT_LDSTUB_REG_REG_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-rd f-op */
2387   EXTRACT_IFMT_LDSTUB_REG_REG_CODE
2388
2389 do {
2390 do {
2391   {
2392     BI opval = EQSI (XORSI (GET_H_GR (f_rs1), GET_H_GR (f_rs2)), 0);
2393     CPU (h_icc_z) = opval;
2394     TRACE_RESULT (current_cpu, abuf, "icc-z", 'x', opval);
2395   }
2396   {
2397     BI opval = LTSI (XORSI (GET_H_GR (f_rs1), GET_H_GR (f_rs2)), 0);
2398     CPU (h_icc_n) = opval;
2399     TRACE_RESULT (current_cpu, abuf, "icc-n", 'x', opval);
2400   }
2401   {
2402     BI opval = 0;
2403     CPU (h_icc_c) = opval;
2404     TRACE_RESULT (current_cpu, abuf, "icc-c", 'x', opval);
2405   }
2406   {
2407     BI opval = 0;
2408     CPU (h_icc_v) = opval;
2409     TRACE_RESULT (current_cpu, abuf, "icc-v", 'x', opval);
2410   }
2411 } while (0);
2412   {
2413     SI opval = XORSI (GET_H_GR (f_rs1), GET_H_GR (f_rs2));
2414     SET_H_GR (f_rd, opval);
2415     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
2416   }
2417 } while (0);
2418
2419   SEM_NBRANCH_FINI (vpc, 0);
2420   return status;
2421 }
2422
2423 /* xorcc-imm: xorcc $rs1,$simm13,$rd */
2424
2425 SEM_STATUS
2426 SEM_FN_NAME (sparc32,xorcc_imm) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
2427 {
2428   SEM_STATUS status = 0;
2429   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2430   int UNUSED written = 0;
2431   IADDR UNUSED pc = GET_H_PC ();
2432   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2433   EXTRACT_IFMT_LDSTUB_REG_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-rd f-op */
2434   EXTRACT_IFMT_LDSTUB_REG_IMM_CODE
2435
2436 do {
2437 do {
2438   {
2439     BI opval = EQSI (XORSI (GET_H_GR (f_rs1), f_simm13), 0);
2440     CPU (h_icc_z) = opval;
2441     TRACE_RESULT (current_cpu, abuf, "icc-z", 'x', opval);
2442   }
2443   {
2444     BI opval = LTSI (XORSI (GET_H_GR (f_rs1), f_simm13), 0);
2445     CPU (h_icc_n) = opval;
2446     TRACE_RESULT (current_cpu, abuf, "icc-n", 'x', opval);
2447   }
2448   {
2449     BI opval = 0;
2450     CPU (h_icc_c) = opval;
2451     TRACE_RESULT (current_cpu, abuf, "icc-c", 'x', opval);
2452   }
2453   {
2454     BI opval = 0;
2455     CPU (h_icc_v) = opval;
2456     TRACE_RESULT (current_cpu, abuf, "icc-v", 'x', opval);
2457   }
2458 } while (0);
2459   {
2460     SI opval = XORSI (GET_H_GR (f_rs1), f_simm13);
2461     SET_H_GR (f_rd, opval);
2462     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
2463   }
2464 } while (0);
2465
2466   SEM_NBRANCH_FINI (vpc, 0);
2467   return status;
2468 }
2469
2470 /* andn: andn $rs1,$rs2,$rd */
2471
2472 SEM_STATUS
2473 SEM_FN_NAME (sparc32,andn) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
2474 {
2475   SEM_STATUS status = 0;
2476   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2477   int UNUSED written = 0;
2478   IADDR UNUSED pc = GET_H_PC ();
2479   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2480   EXTRACT_IFMT_LDSTUB_REG_REG_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-rd f-op */
2481   EXTRACT_IFMT_LDSTUB_REG_REG_CODE
2482
2483   {
2484     SI opval = ANDSI (GET_H_GR (f_rs1), INVSI (GET_H_GR (f_rs2)));
2485     SET_H_GR (f_rd, opval);
2486     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
2487   }
2488
2489   SEM_NBRANCH_FINI (vpc, 0);
2490   return status;
2491 }
2492
2493 /* andn-imm: andn $rs1,$simm13,$rd */
2494
2495 SEM_STATUS
2496 SEM_FN_NAME (sparc32,andn_imm) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
2497 {
2498   SEM_STATUS status = 0;
2499   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2500   int UNUSED written = 0;
2501   IADDR UNUSED pc = GET_H_PC ();
2502   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2503   EXTRACT_IFMT_LDSTUB_REG_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-rd f-op */
2504   EXTRACT_IFMT_LDSTUB_REG_IMM_CODE
2505
2506   {
2507     SI opval = ANDSI (GET_H_GR (f_rs1), INVHI (f_simm13));
2508     SET_H_GR (f_rd, opval);
2509     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
2510   }
2511
2512   SEM_NBRANCH_FINI (vpc, 0);
2513   return status;
2514 }
2515
2516 /* andncc: andncc $rs1,$rs2,$rd */
2517
2518 SEM_STATUS
2519 SEM_FN_NAME (sparc32,andncc) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
2520 {
2521   SEM_STATUS status = 0;
2522   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2523   int UNUSED written = 0;
2524   IADDR UNUSED pc = GET_H_PC ();
2525   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2526   EXTRACT_IFMT_LDSTUB_REG_REG_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-rd f-op */
2527   EXTRACT_IFMT_LDSTUB_REG_REG_CODE
2528
2529 do {
2530 do {
2531   {
2532     BI opval = EQSI (ANDSI (GET_H_GR (f_rs1), INVSI (GET_H_GR (f_rs2))), 0);
2533     CPU (h_icc_z) = opval;
2534     TRACE_RESULT (current_cpu, abuf, "icc-z", 'x', opval);
2535   }
2536   {
2537     BI opval = LTSI (ANDSI (GET_H_GR (f_rs1), INVSI (GET_H_GR (f_rs2))), 0);
2538     CPU (h_icc_n) = opval;
2539     TRACE_RESULT (current_cpu, abuf, "icc-n", 'x', opval);
2540   }
2541   {
2542     BI opval = 0;
2543     CPU (h_icc_c) = opval;
2544     TRACE_RESULT (current_cpu, abuf, "icc-c", 'x', opval);
2545   }
2546   {
2547     BI opval = 0;
2548     CPU (h_icc_v) = opval;
2549     TRACE_RESULT (current_cpu, abuf, "icc-v", 'x', opval);
2550   }
2551 } while (0);
2552   {
2553     SI opval = ANDSI (GET_H_GR (f_rs1), INVSI (GET_H_GR (f_rs2)));
2554     SET_H_GR (f_rd, opval);
2555     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
2556   }
2557 } while (0);
2558
2559   SEM_NBRANCH_FINI (vpc, 0);
2560   return status;
2561 }
2562
2563 /* andncc-imm: andncc $rs1,$simm13,$rd */
2564
2565 SEM_STATUS
2566 SEM_FN_NAME (sparc32,andncc_imm) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
2567 {
2568   SEM_STATUS status = 0;
2569   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2570   int UNUSED written = 0;
2571   IADDR UNUSED pc = GET_H_PC ();
2572   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2573   EXTRACT_IFMT_LDSTUB_REG_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-rd f-op */
2574   EXTRACT_IFMT_LDSTUB_REG_IMM_CODE
2575
2576 do {
2577 do {
2578   {
2579     BI opval = EQSI (ANDSI (GET_H_GR (f_rs1), INVHI (f_simm13)), 0);
2580     CPU (h_icc_z) = opval;
2581     TRACE_RESULT (current_cpu, abuf, "icc-z", 'x', opval);
2582   }
2583   {
2584     BI opval = LTSI (ANDSI (GET_H_GR (f_rs1), INVHI (f_simm13)), 0);
2585     CPU (h_icc_n) = opval;
2586     TRACE_RESULT (current_cpu, abuf, "icc-n", 'x', opval);
2587   }
2588   {
2589     BI opval = 0;
2590     CPU (h_icc_c) = opval;
2591     TRACE_RESULT (current_cpu, abuf, "icc-c", 'x', opval);
2592   }
2593   {
2594     BI opval = 0;
2595     CPU (h_icc_v) = opval;
2596     TRACE_RESULT (current_cpu, abuf, "icc-v", 'x', opval);
2597   }
2598 } while (0);
2599   {
2600     SI opval = ANDSI (GET_H_GR (f_rs1), INVHI (f_simm13));
2601     SET_H_GR (f_rd, opval);
2602     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
2603   }
2604 } while (0);
2605
2606   SEM_NBRANCH_FINI (vpc, 0);
2607   return status;
2608 }
2609
2610 /* orn: orn $rs1,$rs2,$rd */
2611
2612 SEM_STATUS
2613 SEM_FN_NAME (sparc32,orn) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
2614 {
2615   SEM_STATUS status = 0;
2616   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2617   int UNUSED written = 0;
2618   IADDR UNUSED pc = GET_H_PC ();
2619   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2620   EXTRACT_IFMT_LDSTUB_REG_REG_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-rd f-op */
2621   EXTRACT_IFMT_LDSTUB_REG_REG_CODE
2622
2623   {
2624     SI opval = ORSI (GET_H_GR (f_rs1), INVSI (GET_H_GR (f_rs2)));
2625     SET_H_GR (f_rd, opval);
2626     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
2627   }
2628
2629   SEM_NBRANCH_FINI (vpc, 0);
2630   return status;
2631 }
2632
2633 /* orn-imm: orn $rs1,$simm13,$rd */
2634
2635 SEM_STATUS
2636 SEM_FN_NAME (sparc32,orn_imm) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
2637 {
2638   SEM_STATUS status = 0;
2639   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2640   int UNUSED written = 0;
2641   IADDR UNUSED pc = GET_H_PC ();
2642   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2643   EXTRACT_IFMT_LDSTUB_REG_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-rd f-op */
2644   EXTRACT_IFMT_LDSTUB_REG_IMM_CODE
2645
2646   {
2647     SI opval = ORSI (GET_H_GR (f_rs1), INVHI (f_simm13));
2648     SET_H_GR (f_rd, opval);
2649     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
2650   }
2651
2652   SEM_NBRANCH_FINI (vpc, 0);
2653   return status;
2654 }
2655
2656 /* orncc: orncc $rs1,$rs2,$rd */
2657
2658 SEM_STATUS
2659 SEM_FN_NAME (sparc32,orncc) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
2660 {
2661   SEM_STATUS status = 0;
2662   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2663   int UNUSED written = 0;
2664   IADDR UNUSED pc = GET_H_PC ();
2665   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2666   EXTRACT_IFMT_LDSTUB_REG_REG_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-rd f-op */
2667   EXTRACT_IFMT_LDSTUB_REG_REG_CODE
2668
2669 do {
2670 do {
2671   {
2672     BI opval = EQSI (ORSI (GET_H_GR (f_rs1), INVSI (GET_H_GR (f_rs2))), 0);
2673     CPU (h_icc_z) = opval;
2674     TRACE_RESULT (current_cpu, abuf, "icc-z", 'x', opval);
2675   }
2676   {
2677     BI opval = LTSI (ORSI (GET_H_GR (f_rs1), INVSI (GET_H_GR (f_rs2))), 0);
2678     CPU (h_icc_n) = opval;
2679     TRACE_RESULT (current_cpu, abuf, "icc-n", 'x', opval);
2680   }
2681   {
2682     BI opval = 0;
2683     CPU (h_icc_c) = opval;
2684     TRACE_RESULT (current_cpu, abuf, "icc-c", 'x', opval);
2685   }
2686   {
2687     BI opval = 0;
2688     CPU (h_icc_v) = opval;
2689     TRACE_RESULT (current_cpu, abuf, "icc-v", 'x', opval);
2690   }
2691 } while (0);
2692   {
2693     SI opval = ORSI (GET_H_GR (f_rs1), INVSI (GET_H_GR (f_rs2)));
2694     SET_H_GR (f_rd, opval);
2695     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
2696   }
2697 } while (0);
2698
2699   SEM_NBRANCH_FINI (vpc, 0);
2700   return status;
2701 }
2702
2703 /* orncc-imm: orncc $rs1,$simm13,$rd */
2704
2705 SEM_STATUS
2706 SEM_FN_NAME (sparc32,orncc_imm) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
2707 {
2708   SEM_STATUS status = 0;
2709   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2710   int UNUSED written = 0;
2711   IADDR UNUSED pc = GET_H_PC ();
2712   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2713   EXTRACT_IFMT_LDSTUB_REG_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-rd f-op */
2714   EXTRACT_IFMT_LDSTUB_REG_IMM_CODE
2715
2716 do {
2717 do {
2718   {
2719     BI opval = EQSI (ORSI (GET_H_GR (f_rs1), INVHI (f_simm13)), 0);
2720     CPU (h_icc_z) = opval;
2721     TRACE_RESULT (current_cpu, abuf, "icc-z", 'x', opval);
2722   }
2723   {
2724     BI opval = LTSI (ORSI (GET_H_GR (f_rs1), INVHI (f_simm13)), 0);
2725     CPU (h_icc_n) = opval;
2726     TRACE_RESULT (current_cpu, abuf, "icc-n", 'x', opval);
2727   }
2728   {
2729     BI opval = 0;
2730     CPU (h_icc_c) = opval;
2731     TRACE_RESULT (current_cpu, abuf, "icc-c", 'x', opval);
2732   }
2733   {
2734     BI opval = 0;
2735     CPU (h_icc_v) = opval;
2736     TRACE_RESULT (current_cpu, abuf, "icc-v", 'x', opval);
2737   }
2738 } while (0);
2739   {
2740     SI opval = ORSI (GET_H_GR (f_rs1), INVHI (f_simm13));
2741     SET_H_GR (f_rd, opval);
2742     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
2743   }
2744 } while (0);
2745
2746   SEM_NBRANCH_FINI (vpc, 0);
2747   return status;
2748 }
2749
2750 /* xnor: xnor $rs1,$rs2,$rd */
2751
2752 SEM_STATUS
2753 SEM_FN_NAME (sparc32,xnor) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
2754 {
2755   SEM_STATUS status = 0;
2756   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2757   int UNUSED written = 0;
2758   IADDR UNUSED pc = GET_H_PC ();
2759   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2760   EXTRACT_IFMT_LDSTUB_REG_REG_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-rd f-op */
2761   EXTRACT_IFMT_LDSTUB_REG_REG_CODE
2762
2763   {
2764     SI opval = XORSI (GET_H_GR (f_rs1), INVSI (GET_H_GR (f_rs2)));
2765     SET_H_GR (f_rd, opval);
2766     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
2767   }
2768
2769   SEM_NBRANCH_FINI (vpc, 0);
2770   return status;
2771 }
2772
2773 /* xnor-imm: xnor $rs1,$simm13,$rd */
2774
2775 SEM_STATUS
2776 SEM_FN_NAME (sparc32,xnor_imm) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
2777 {
2778   SEM_STATUS status = 0;
2779   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2780   int UNUSED written = 0;
2781   IADDR UNUSED pc = GET_H_PC ();
2782   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2783   EXTRACT_IFMT_LDSTUB_REG_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-rd f-op */
2784   EXTRACT_IFMT_LDSTUB_REG_IMM_CODE
2785
2786   {
2787     SI opval = XORSI (GET_H_GR (f_rs1), INVHI (f_simm13));
2788     SET_H_GR (f_rd, opval);
2789     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
2790   }
2791
2792   SEM_NBRANCH_FINI (vpc, 0);
2793   return status;
2794 }
2795
2796 /* xnorcc: xnorcc $rs1,$rs2,$rd */
2797
2798 SEM_STATUS
2799 SEM_FN_NAME (sparc32,xnorcc) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
2800 {
2801   SEM_STATUS status = 0;
2802   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2803   int UNUSED written = 0;
2804   IADDR UNUSED pc = GET_H_PC ();
2805   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2806   EXTRACT_IFMT_LDSTUB_REG_REG_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-rd f-op */
2807   EXTRACT_IFMT_LDSTUB_REG_REG_CODE
2808
2809 do {
2810 do {
2811   {
2812     BI opval = EQSI (XORSI (GET_H_GR (f_rs1), INVSI (GET_H_GR (f_rs2))), 0);
2813     CPU (h_icc_z) = opval;
2814     TRACE_RESULT (current_cpu, abuf, "icc-z", 'x', opval);
2815   }
2816   {
2817     BI opval = LTSI (XORSI (GET_H_GR (f_rs1), INVSI (GET_H_GR (f_rs2))), 0);
2818     CPU (h_icc_n) = opval;
2819     TRACE_RESULT (current_cpu, abuf, "icc-n", 'x', opval);
2820   }
2821   {
2822     BI opval = 0;
2823     CPU (h_icc_c) = opval;
2824     TRACE_RESULT (current_cpu, abuf, "icc-c", 'x', opval);
2825   }
2826   {
2827     BI opval = 0;
2828     CPU (h_icc_v) = opval;
2829     TRACE_RESULT (current_cpu, abuf, "icc-v", 'x', opval);
2830   }
2831 } while (0);
2832   {
2833     SI opval = XORSI (GET_H_GR (f_rs1), INVSI (GET_H_GR (f_rs2)));
2834     SET_H_GR (f_rd, opval);
2835     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
2836   }
2837 } while (0);
2838
2839   SEM_NBRANCH_FINI (vpc, 0);
2840   return status;
2841 }
2842
2843 /* xnorcc-imm: xnorcc $rs1,$simm13,$rd */
2844
2845 SEM_STATUS
2846 SEM_FN_NAME (sparc32,xnorcc_imm) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
2847 {
2848   SEM_STATUS status = 0;
2849   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2850   int UNUSED written = 0;
2851   IADDR UNUSED pc = GET_H_PC ();
2852   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2853   EXTRACT_IFMT_LDSTUB_REG_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-rd f-op */
2854   EXTRACT_IFMT_LDSTUB_REG_IMM_CODE
2855
2856 do {
2857 do {
2858   {
2859     BI opval = EQSI (XORSI (GET_H_GR (f_rs1), INVHI (f_simm13)), 0);
2860     CPU (h_icc_z) = opval;
2861     TRACE_RESULT (current_cpu, abuf, "icc-z", 'x', opval);
2862   }
2863   {
2864     BI opval = LTSI (XORSI (GET_H_GR (f_rs1), INVHI (f_simm13)), 0);
2865     CPU (h_icc_n) = opval;
2866     TRACE_RESULT (current_cpu, abuf, "icc-n", 'x', opval);
2867   }
2868   {
2869     BI opval = 0;
2870     CPU (h_icc_c) = opval;
2871     TRACE_RESULT (current_cpu, abuf, "icc-c", 'x', opval);
2872   }
2873   {
2874     BI opval = 0;
2875     CPU (h_icc_v) = opval;
2876     TRACE_RESULT (current_cpu, abuf, "icc-v", 'x', opval);
2877   }
2878 } while (0);
2879   {
2880     SI opval = XORSI (GET_H_GR (f_rs1), INVHI (f_simm13));
2881     SET_H_GR (f_rd, opval);
2882     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
2883   }
2884 } while (0);
2885
2886   SEM_NBRANCH_FINI (vpc, 0);
2887   return status;
2888 }
2889
2890 /* sll: sll $rs1,$rs2,$rd */
2891
2892 SEM_STATUS
2893 SEM_FN_NAME (sparc32,sll) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
2894 {
2895   SEM_STATUS status = 0;
2896   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2897   int UNUSED written = 0;
2898   IADDR UNUSED pc = GET_H_PC ();
2899   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2900   EXTRACT_IFMT_LDSTUB_REG_REG_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-rd f-op */
2901   EXTRACT_IFMT_LDSTUB_REG_REG_CODE
2902
2903   {
2904     SI opval = SLLSI (GET_H_GR (f_rs1), ANDSI (GET_H_GR (f_rs2), 31));
2905     SET_H_GR (f_rd, opval);
2906     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
2907   }
2908
2909   SEM_NBRANCH_FINI (vpc, 0);
2910   return status;
2911 }
2912
2913 /* sll-imm: sll $rs1,$simm13,$rd */
2914
2915 SEM_STATUS
2916 SEM_FN_NAME (sparc32,sll_imm) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
2917 {
2918   SEM_STATUS status = 0;
2919   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2920   int UNUSED written = 0;
2921   IADDR UNUSED pc = GET_H_PC ();
2922   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2923   EXTRACT_IFMT_LDSTUB_REG_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-rd f-op */
2924   EXTRACT_IFMT_LDSTUB_REG_IMM_CODE
2925
2926   {
2927     SI opval = SLLSI (GET_H_GR (f_rs1), ANDHI (f_simm13, 31));
2928     SET_H_GR (f_rd, opval);
2929     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
2930   }
2931
2932   SEM_NBRANCH_FINI (vpc, 0);
2933   return status;
2934 }
2935
2936 /* srl: srl $rs1,$rs2,$rd */
2937
2938 SEM_STATUS
2939 SEM_FN_NAME (sparc32,srl) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
2940 {
2941   SEM_STATUS status = 0;
2942   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2943   int UNUSED written = 0;
2944   IADDR UNUSED pc = GET_H_PC ();
2945   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2946   EXTRACT_IFMT_LDSTUB_REG_REG_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-rd f-op */
2947   EXTRACT_IFMT_LDSTUB_REG_REG_CODE
2948
2949   {
2950     SI opval = SRLSI (GET_H_GR (f_rs1), ANDSI (GET_H_GR (f_rs2), 31));
2951     SET_H_GR (f_rd, opval);
2952     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
2953   }
2954
2955   SEM_NBRANCH_FINI (vpc, 0);
2956   return status;
2957 }
2958
2959 /* srl-imm: srl $rs1,$simm13,$rd */
2960
2961 SEM_STATUS
2962 SEM_FN_NAME (sparc32,srl_imm) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
2963 {
2964   SEM_STATUS status = 0;
2965   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2966   int UNUSED written = 0;
2967   IADDR UNUSED pc = GET_H_PC ();
2968   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2969   EXTRACT_IFMT_LDSTUB_REG_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-rd f-op */
2970   EXTRACT_IFMT_LDSTUB_REG_IMM_CODE
2971
2972   {
2973     SI opval = SRLSI (GET_H_GR (f_rs1), ANDHI (f_simm13, 31));
2974     SET_H_GR (f_rd, opval);
2975     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
2976   }
2977
2978   SEM_NBRANCH_FINI (vpc, 0);
2979   return status;
2980 }
2981
2982 /* sra: sra $rs1,$rs2,$rd */
2983
2984 SEM_STATUS
2985 SEM_FN_NAME (sparc32,sra) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
2986 {
2987   SEM_STATUS status = 0;
2988   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2989   int UNUSED written = 0;
2990   IADDR UNUSED pc = GET_H_PC ();
2991   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2992   EXTRACT_IFMT_LDSTUB_REG_REG_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-rd f-op */
2993   EXTRACT_IFMT_LDSTUB_REG_REG_CODE
2994
2995   {
2996     SI opval = SRASI (GET_H_GR (f_rs1), ANDSI (GET_H_GR (f_rs2), 31));
2997     SET_H_GR (f_rd, opval);
2998     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
2999   }
3000
3001   SEM_NBRANCH_FINI (vpc, 0);
3002   return status;
3003 }
3004
3005 /* sra-imm: sra $rs1,$simm13,$rd */
3006
3007 SEM_STATUS
3008 SEM_FN_NAME (sparc32,sra_imm) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
3009 {
3010   SEM_STATUS status = 0;
3011   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3012   int UNUSED written = 0;
3013   IADDR UNUSED pc = GET_H_PC ();
3014   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
3015   EXTRACT_IFMT_LDSTUB_REG_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-rd f-op */
3016   EXTRACT_IFMT_LDSTUB_REG_IMM_CODE
3017
3018   {
3019     SI opval = SRASI (GET_H_GR (f_rs1), ANDHI (f_simm13, 31));
3020     SET_H_GR (f_rd, opval);
3021     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
3022   }
3023
3024   SEM_NBRANCH_FINI (vpc, 0);
3025   return status;
3026 }
3027
3028 /* smul: smul $rs1,$rs2,$rd */
3029
3030 SEM_STATUS
3031 SEM_FN_NAME (sparc32,smul) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
3032 {
3033   SEM_STATUS status = 0;
3034   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3035   int UNUSED written = 0;
3036   IADDR UNUSED pc = GET_H_PC ();
3037   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
3038   EXTRACT_IFMT_LDSTUB_REG_REG_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-rd f-op */
3039   EXTRACT_IFMT_LDSTUB_REG_REG_CODE
3040
3041 do {
3042   DI tmp_res;
3043   tmp_res = MULDI (EXTSIDI (GET_H_GR (f_rs1)), EXTSIDI (GET_H_GR (f_rs2)));
3044   {
3045     SI opval = TRUNCDISI (SRLDI (tmp_res, 32));
3046     SET_H_Y (opval);
3047     TRACE_RESULT (current_cpu, abuf, "y-0", 'x', opval);
3048   }
3049   {
3050     SI opval = TRUNCDISI (tmp_res);
3051     SET_H_GR (f_rd, opval);
3052     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
3053   }
3054 } while (0);
3055
3056   SEM_NBRANCH_FINI (vpc, 0);
3057   return status;
3058 }
3059
3060 /* smul-imm: smul $rs1,$simm13,$rd */
3061
3062 SEM_STATUS
3063 SEM_FN_NAME (sparc32,smul_imm) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
3064 {
3065   SEM_STATUS status = 0;
3066   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3067   int UNUSED written = 0;
3068   IADDR UNUSED pc = GET_H_PC ();
3069   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
3070   EXTRACT_IFMT_LDSTUB_REG_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-rd f-op */
3071   EXTRACT_IFMT_LDSTUB_REG_IMM_CODE
3072
3073 do {
3074   DI tmp_res;
3075   tmp_res = MULDI (EXTSIDI (GET_H_GR (f_rs1)), EXTHIDI (f_simm13));
3076   {
3077     SI opval = TRUNCDISI (SRLDI (tmp_res, 32));
3078     SET_H_Y (opval);
3079     TRACE_RESULT (current_cpu, abuf, "y-0", 'x', opval);
3080   }
3081   {
3082     SI opval = TRUNCDISI (tmp_res);
3083     SET_H_GR (f_rd, opval);
3084     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
3085   }
3086 } while (0);
3087
3088   SEM_NBRANCH_FINI (vpc, 0);
3089   return status;
3090 }
3091
3092 /* smul-cc: smulcc $rs1,$rs2,$rd */
3093
3094 SEM_STATUS
3095 SEM_FN_NAME (sparc32,smul_cc) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
3096 {
3097   SEM_STATUS status = 0;
3098   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3099   int UNUSED written = 0;
3100   IADDR UNUSED pc = GET_H_PC ();
3101   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
3102   EXTRACT_IFMT_LDSTUB_REG_REG_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-rd f-op */
3103   EXTRACT_IFMT_LDSTUB_REG_REG_CODE
3104
3105 do {
3106   DI tmp_res;
3107   tmp_res = MULDI (EXTSIDI (GET_H_GR (f_rs1)), EXTSIDI (GET_H_GR (f_rs2)));
3108   {
3109     SI opval = TRUNCDISI (SRLDI (tmp_res, 32));
3110     SET_H_Y (opval);
3111     TRACE_RESULT (current_cpu, abuf, "y-0", 'x', opval);
3112   }
3113   {
3114     SI opval = TRUNCDISI (tmp_res);
3115     SET_H_GR (f_rd, opval);
3116     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
3117   }
3118 do {
3119   {
3120     BI opval = EQSI (TRUNCDISI (tmp_res), 0);
3121     CPU (h_icc_z) = opval;
3122     TRACE_RESULT (current_cpu, abuf, "icc-z", 'x', opval);
3123   }
3124   {
3125     BI opval = LTSI (TRUNCDISI (tmp_res), 0);
3126     CPU (h_icc_n) = opval;
3127     TRACE_RESULT (current_cpu, abuf, "icc-n", 'x', opval);
3128   }
3129   {
3130     BI opval = 0;
3131     CPU (h_icc_c) = opval;
3132     TRACE_RESULT (current_cpu, abuf, "icc-c", 'x', opval);
3133   }
3134   {
3135     BI opval = 0;
3136     CPU (h_icc_v) = opval;
3137     TRACE_RESULT (current_cpu, abuf, "icc-v", 'x', opval);
3138   }
3139 } while (0);
3140 } while (0);
3141
3142   SEM_NBRANCH_FINI (vpc, 0);
3143   return status;
3144 }
3145
3146 /* smul-cc-imm: smulcc $rs1,$simm13,$rd */
3147
3148 SEM_STATUS
3149 SEM_FN_NAME (sparc32,smul_cc_imm) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
3150 {
3151   SEM_STATUS status = 0;
3152   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3153   int UNUSED written = 0;
3154   IADDR UNUSED pc = GET_H_PC ();
3155   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
3156   EXTRACT_IFMT_LDSTUB_REG_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-rd f-op */
3157   EXTRACT_IFMT_LDSTUB_REG_IMM_CODE
3158
3159 do {
3160   DI tmp_res;
3161   tmp_res = MULDI (EXTSIDI (GET_H_GR (f_rs1)), EXTHIDI (f_simm13));
3162   {
3163     SI opval = TRUNCDISI (SRLDI (tmp_res, 32));
3164     SET_H_Y (opval);
3165     TRACE_RESULT (current_cpu, abuf, "y-0", 'x', opval);
3166   }
3167   {
3168     SI opval = TRUNCDISI (tmp_res);
3169     SET_H_GR (f_rd, opval);
3170     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
3171   }
3172 do {
3173   {
3174     BI opval = EQSI (TRUNCDISI (tmp_res), 0);
3175     CPU (h_icc_z) = opval;
3176     TRACE_RESULT (current_cpu, abuf, "icc-z", 'x', opval);
3177   }
3178   {
3179     BI opval = LTSI (TRUNCDISI (tmp_res), 0);
3180     CPU (h_icc_n) = opval;
3181     TRACE_RESULT (current_cpu, abuf, "icc-n", 'x', opval);
3182   }
3183   {
3184     BI opval = 0;
3185     CPU (h_icc_c) = opval;
3186     TRACE_RESULT (current_cpu, abuf, "icc-c", 'x', opval);
3187   }
3188   {
3189     BI opval = 0;
3190     CPU (h_icc_v) = opval;
3191     TRACE_RESULT (current_cpu, abuf, "icc-v", 'x', opval);
3192   }
3193 } while (0);
3194 } while (0);
3195
3196   SEM_NBRANCH_FINI (vpc, 0);
3197   return status;
3198 }
3199
3200 /* umul: umul $rs1,$rs2,$rd */
3201
3202 SEM_STATUS
3203 SEM_FN_NAME (sparc32,umul) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
3204 {
3205   SEM_STATUS status = 0;
3206   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3207   int UNUSED written = 0;
3208   IADDR UNUSED pc = GET_H_PC ();
3209   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
3210   EXTRACT_IFMT_LDSTUB_REG_REG_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-rd f-op */
3211   EXTRACT_IFMT_LDSTUB_REG_REG_CODE
3212
3213 do {
3214   DI tmp_res;
3215   tmp_res = MULDI (ZEXTSIDI (GET_H_GR (f_rs1)), ZEXTSIDI (GET_H_GR (f_rs2)));
3216   {
3217     SI opval = TRUNCDISI (SRLDI (tmp_res, 32));
3218     SET_H_Y (opval);
3219     TRACE_RESULT (current_cpu, abuf, "y-0", 'x', opval);
3220   }
3221   {
3222     SI opval = TRUNCDISI (tmp_res);
3223     SET_H_GR (f_rd, opval);
3224     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
3225   }
3226 } while (0);
3227
3228   SEM_NBRANCH_FINI (vpc, 0);
3229   return status;
3230 }
3231
3232 /* umul-imm: umul $rs1,$simm13,$rd */
3233
3234 SEM_STATUS
3235 SEM_FN_NAME (sparc32,umul_imm) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
3236 {
3237   SEM_STATUS status = 0;
3238   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3239   int UNUSED written = 0;
3240   IADDR UNUSED pc = GET_H_PC ();
3241   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
3242   EXTRACT_IFMT_LDSTUB_REG_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-rd f-op */
3243   EXTRACT_IFMT_LDSTUB_REG_IMM_CODE
3244
3245 do {
3246   DI tmp_res;
3247   tmp_res = MULDI (ZEXTSIDI (GET_H_GR (f_rs1)), ZEXTHIDI (f_simm13));
3248   {
3249     SI opval = TRUNCDISI (SRLDI (tmp_res, 32));
3250     SET_H_Y (opval);
3251     TRACE_RESULT (current_cpu, abuf, "y-0", 'x', opval);
3252   }
3253   {
3254     SI opval = TRUNCDISI (tmp_res);
3255     SET_H_GR (f_rd, opval);
3256     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
3257   }
3258 } while (0);
3259
3260   SEM_NBRANCH_FINI (vpc, 0);
3261   return status;
3262 }
3263
3264 /* umul-cc: umulcc $rs1,$rs2,$rd */
3265
3266 SEM_STATUS
3267 SEM_FN_NAME (sparc32,umul_cc) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
3268 {
3269   SEM_STATUS status = 0;
3270   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3271   int UNUSED written = 0;
3272   IADDR UNUSED pc = GET_H_PC ();
3273   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
3274   EXTRACT_IFMT_LDSTUB_REG_REG_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-rd f-op */
3275   EXTRACT_IFMT_LDSTUB_REG_REG_CODE
3276
3277 do {
3278   DI tmp_res;
3279   tmp_res = MULDI (ZEXTSIDI (GET_H_GR (f_rs1)), ZEXTSIDI (GET_H_GR (f_rs2)));
3280   {
3281     SI opval = TRUNCDISI (SRLDI (tmp_res, 32));
3282     SET_H_Y (opval);
3283     TRACE_RESULT (current_cpu, abuf, "y-0", 'x', opval);
3284   }
3285   {
3286     SI opval = TRUNCDISI (tmp_res);
3287     SET_H_GR (f_rd, opval);
3288     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
3289   }
3290 do {
3291   {
3292     BI opval = EQSI (TRUNCDISI (tmp_res), 0);
3293     CPU (h_icc_z) = opval;
3294     TRACE_RESULT (current_cpu, abuf, "icc-z", 'x', opval);
3295   }
3296   {
3297     BI opval = LTSI (TRUNCDISI (tmp_res), 0);
3298     CPU (h_icc_n) = opval;
3299     TRACE_RESULT (current_cpu, abuf, "icc-n", 'x', opval);
3300   }
3301   {
3302     BI opval = 0;
3303     CPU (h_icc_c) = opval;
3304     TRACE_RESULT (current_cpu, abuf, "icc-c", 'x', opval);
3305   }
3306   {
3307     BI opval = 0;
3308     CPU (h_icc_v) = opval;
3309     TRACE_RESULT (current_cpu, abuf, "icc-v", 'x', opval);
3310   }
3311 } while (0);
3312 } while (0);
3313
3314   SEM_NBRANCH_FINI (vpc, 0);
3315   return status;
3316 }
3317
3318 /* umul-cc-imm: umulcc $rs1,$simm13,$rd */
3319
3320 SEM_STATUS
3321 SEM_FN_NAME (sparc32,umul_cc_imm) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
3322 {
3323   SEM_STATUS status = 0;
3324   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3325   int UNUSED written = 0;
3326   IADDR UNUSED pc = GET_H_PC ();
3327   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
3328   EXTRACT_IFMT_LDSTUB_REG_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-rd f-op */
3329   EXTRACT_IFMT_LDSTUB_REG_IMM_CODE
3330
3331 do {
3332   DI tmp_res;
3333   tmp_res = MULDI (ZEXTSIDI (GET_H_GR (f_rs1)), ZEXTHIDI (f_simm13));
3334   {
3335     SI opval = TRUNCDISI (SRLDI (tmp_res, 32));
3336     SET_H_Y (opval);
3337     TRACE_RESULT (current_cpu, abuf, "y-0", 'x', opval);
3338   }
3339   {
3340     SI opval = TRUNCDISI (tmp_res);
3341     SET_H_GR (f_rd, opval);
3342     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
3343   }
3344 do {
3345   {
3346     BI opval = EQSI (TRUNCDISI (tmp_res), 0);
3347     CPU (h_icc_z) = opval;
3348     TRACE_RESULT (current_cpu, abuf, "icc-z", 'x', opval);
3349   }
3350   {
3351     BI opval = LTSI (TRUNCDISI (tmp_res), 0);
3352     CPU (h_icc_n) = opval;
3353     TRACE_RESULT (current_cpu, abuf, "icc-n", 'x', opval);
3354   }
3355   {
3356     BI opval = 0;
3357     CPU (h_icc_c) = opval;
3358     TRACE_RESULT (current_cpu, abuf, "icc-c", 'x', opval);
3359   }
3360   {
3361     BI opval = 0;
3362     CPU (h_icc_v) = opval;
3363     TRACE_RESULT (current_cpu, abuf, "icc-v", 'x', opval);
3364   }
3365 } while (0);
3366 } while (0);
3367
3368   SEM_NBRANCH_FINI (vpc, 0);
3369   return status;
3370 }
3371
3372 /* sdiv: sdiv $rs1,$rs2,$rd */
3373
3374 SEM_STATUS
3375 SEM_FN_NAME (sparc32,sdiv) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
3376 {
3377   SEM_STATUS status = 0;
3378   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3379   int UNUSED written = 0;
3380   IADDR UNUSED pc = GET_H_PC ();
3381   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
3382   EXTRACT_IFMT_LDSTUB_REG_REG_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-rd f-op */
3383   EXTRACT_IFMT_LDSTUB_REG_REG_CODE
3384
3385 do {
3386   DI tmp_dividend;
3387   tmp_dividend = MAKEDI (GET_H_Y (), GET_H_GR (f_rs1));
3388   {
3389     SI opval = TRUNCDISI (DIVDI (tmp_dividend, EXTSIDI (GET_H_GR (f_rs2))));
3390     SET_H_GR (f_rd, opval);
3391     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
3392   }
3393 } while (0);
3394
3395   SEM_NBRANCH_FINI (vpc, 0);
3396   return status;
3397 }
3398
3399 /* sdiv-imm: sdiv $rs1,$simm13,$rd */
3400
3401 SEM_STATUS
3402 SEM_FN_NAME (sparc32,sdiv_imm) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
3403 {
3404   SEM_STATUS status = 0;
3405   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3406   int UNUSED written = 0;
3407   IADDR UNUSED pc = GET_H_PC ();
3408   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
3409   EXTRACT_IFMT_LDSTUB_REG_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-rd f-op */
3410   EXTRACT_IFMT_LDSTUB_REG_IMM_CODE
3411
3412 do {
3413   DI tmp_dividend;
3414   tmp_dividend = MAKEDI (GET_H_Y (), GET_H_GR (f_rs1));
3415   {
3416     SI opval = TRUNCDISI (DIVDI (tmp_dividend, EXTHIDI (f_simm13)));
3417     SET_H_GR (f_rd, opval);
3418     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
3419   }
3420 } while (0);
3421
3422   SEM_NBRANCH_FINI (vpc, 0);
3423   return status;
3424 }
3425
3426 /* sdiv-cc: sdivcc $rs1,$rs2,$rd */
3427
3428 SEM_STATUS
3429 SEM_FN_NAME (sparc32,sdiv_cc) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
3430 {
3431   SEM_STATUS status = 0;
3432   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3433   int UNUSED written = 0;
3434   IADDR UNUSED pc = GET_H_PC ();
3435   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
3436   EXTRACT_IFMT_LDSTUB_REG_REG_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-rd f-op */
3437   EXTRACT_IFMT_LDSTUB_REG_REG_CODE
3438
3439 do {
3440   DI tmp_dividend;
3441   tmp_dividend = MAKEDI (GET_H_Y (), GET_H_GR (f_rs1));
3442   {
3443     SI opval = TRUNCDISI (DIVDI (tmp_dividend, EXTSIDI (GET_H_GR (f_rs2))));
3444     SET_H_GR (f_rd, opval);
3445     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
3446   }
3447 do {
3448   {
3449     BI opval = EQSI (GET_H_GR (f_rd), 0);
3450     CPU (h_icc_z) = opval;
3451     TRACE_RESULT (current_cpu, abuf, "icc-z", 'x', opval);
3452   }
3453   {
3454     BI opval = LTSI (GET_H_GR (f_rd), 0);
3455     CPU (h_icc_n) = opval;
3456     TRACE_RESULT (current_cpu, abuf, "icc-n", 'x', opval);
3457   }
3458   {
3459     BI opval = 0;
3460     CPU (h_icc_c) = opval;
3461     TRACE_RESULT (current_cpu, abuf, "icc-c", 'x', opval);
3462   }
3463   {
3464     BI opval = 0;
3465     CPU (h_icc_v) = opval;
3466     TRACE_RESULT (current_cpu, abuf, "icc-v", 'x', opval);
3467   }
3468 } while (0);
3469 } while (0);
3470
3471   SEM_NBRANCH_FINI (vpc, 0);
3472   return status;
3473 }
3474
3475 /* sdiv-cc-imm: sdivcc $rs1,$simm13,$rd */
3476
3477 SEM_STATUS
3478 SEM_FN_NAME (sparc32,sdiv_cc_imm) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
3479 {
3480   SEM_STATUS status = 0;
3481   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3482   int UNUSED written = 0;
3483   IADDR UNUSED pc = GET_H_PC ();
3484   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
3485   EXTRACT_IFMT_LDSTUB_REG_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-rd f-op */
3486   EXTRACT_IFMT_LDSTUB_REG_IMM_CODE
3487
3488 do {
3489   DI tmp_dividend;
3490   tmp_dividend = MAKEDI (GET_H_Y (), GET_H_GR (f_rs1));
3491   {
3492     SI opval = TRUNCDISI (DIVDI (tmp_dividend, EXTHIDI (f_simm13)));
3493     SET_H_GR (f_rd, opval);
3494     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
3495   }
3496 do {
3497   {
3498     BI opval = EQSI (GET_H_GR (f_rd), 0);
3499     CPU (h_icc_z) = opval;
3500     TRACE_RESULT (current_cpu, abuf, "icc-z", 'x', opval);
3501   }
3502   {
3503     BI opval = LTSI (GET_H_GR (f_rd), 0);
3504     CPU (h_icc_n) = opval;
3505     TRACE_RESULT (current_cpu, abuf, "icc-n", 'x', opval);
3506   }
3507   {
3508     BI opval = 0;
3509     CPU (h_icc_c) = opval;
3510     TRACE_RESULT (current_cpu, abuf, "icc-c", 'x', opval);
3511   }
3512   {
3513     BI opval = 0;
3514     CPU (h_icc_v) = opval;
3515     TRACE_RESULT (current_cpu, abuf, "icc-v", 'x', opval);
3516   }
3517 } while (0);
3518 } while (0);
3519
3520   SEM_NBRANCH_FINI (vpc, 0);
3521   return status;
3522 }
3523
3524 /* udiv: udiv $rs1,$rs2,$rd */
3525
3526 SEM_STATUS
3527 SEM_FN_NAME (sparc32,udiv) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
3528 {
3529   SEM_STATUS status = 0;
3530   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3531   int UNUSED written = 0;
3532   IADDR UNUSED pc = GET_H_PC ();
3533   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
3534   EXTRACT_IFMT_LDSTUB_REG_REG_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-rd f-op */
3535   EXTRACT_IFMT_LDSTUB_REG_REG_CODE
3536
3537 do {
3538   DI tmp_dividend;
3539   tmp_dividend = MAKEDI (GET_H_Y (), GET_H_GR (f_rs1));
3540   {
3541     SI opval = TRUNCDISI (DIVDI (tmp_dividend, ZEXTSIDI (GET_H_GR (f_rs2))));
3542     SET_H_GR (f_rd, opval);
3543     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
3544   }
3545 } while (0);
3546
3547   SEM_NBRANCH_FINI (vpc, 0);
3548   return status;
3549 }
3550
3551 /* udiv-imm: udiv $rs1,$simm13,$rd */
3552
3553 SEM_STATUS
3554 SEM_FN_NAME (sparc32,udiv_imm) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
3555 {
3556   SEM_STATUS status = 0;
3557   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3558   int UNUSED written = 0;
3559   IADDR UNUSED pc = GET_H_PC ();
3560   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
3561   EXTRACT_IFMT_LDSTUB_REG_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-rd f-op */
3562   EXTRACT_IFMT_LDSTUB_REG_IMM_CODE
3563
3564 do {
3565   DI tmp_dividend;
3566   tmp_dividend = MAKEDI (GET_H_Y (), GET_H_GR (f_rs1));
3567   {
3568     SI opval = TRUNCDISI (DIVDI (tmp_dividend, ZEXTHIDI (f_simm13)));
3569     SET_H_GR (f_rd, opval);
3570     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
3571   }
3572 } while (0);
3573
3574   SEM_NBRANCH_FINI (vpc, 0);
3575   return status;
3576 }
3577
3578 /* udiv-cc: udivcc $rs1,$rs2,$rd */
3579
3580 SEM_STATUS
3581 SEM_FN_NAME (sparc32,udiv_cc) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
3582 {
3583   SEM_STATUS status = 0;
3584   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3585   int UNUSED written = 0;
3586   IADDR UNUSED pc = GET_H_PC ();
3587   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
3588   EXTRACT_IFMT_LDSTUB_REG_REG_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-rd f-op */
3589   EXTRACT_IFMT_LDSTUB_REG_REG_CODE
3590
3591 do {
3592   DI tmp_dividend;
3593   tmp_dividend = MAKEDI (GET_H_Y (), GET_H_GR (f_rs1));
3594   {
3595     SI opval = TRUNCDISI (DIVDI (tmp_dividend, ZEXTSIDI (GET_H_GR (f_rs2))));
3596     SET_H_GR (f_rd, opval);
3597     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
3598   }
3599 do {
3600   {
3601     BI opval = EQSI (GET_H_GR (f_rd), 0);
3602     CPU (h_icc_z) = opval;
3603     TRACE_RESULT (current_cpu, abuf, "icc-z", 'x', opval);
3604   }
3605   {
3606     BI opval = LTSI (GET_H_GR (f_rd), 0);
3607     CPU (h_icc_n) = opval;
3608     TRACE_RESULT (current_cpu, abuf, "icc-n", 'x', opval);
3609   }
3610   {
3611     BI opval = 0;
3612     CPU (h_icc_c) = opval;
3613     TRACE_RESULT (current_cpu, abuf, "icc-c", 'x', opval);
3614   }
3615   {
3616     BI opval = 0;
3617     CPU (h_icc_v) = opval;
3618     TRACE_RESULT (current_cpu, abuf, "icc-v", 'x', opval);
3619   }
3620 } while (0);
3621 } while (0);
3622
3623   SEM_NBRANCH_FINI (vpc, 0);
3624   return status;
3625 }
3626
3627 /* udiv-cc-imm: udivcc $rs1,$simm13,$rd */
3628
3629 SEM_STATUS
3630 SEM_FN_NAME (sparc32,udiv_cc_imm) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
3631 {
3632   SEM_STATUS status = 0;
3633   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3634   int UNUSED written = 0;
3635   IADDR UNUSED pc = GET_H_PC ();
3636   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
3637   EXTRACT_IFMT_LDSTUB_REG_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-rd f-op */
3638   EXTRACT_IFMT_LDSTUB_REG_IMM_CODE
3639
3640 do {
3641   DI tmp_dividend;
3642   tmp_dividend = MAKEDI (GET_H_Y (), GET_H_GR (f_rs1));
3643   {
3644     SI opval = TRUNCDISI (DIVDI (tmp_dividend, ZEXTHIDI (f_simm13)));
3645     SET_H_GR (f_rd, opval);
3646     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
3647   }
3648 do {
3649   {
3650     BI opval = EQSI (GET_H_GR (f_rd), 0);
3651     CPU (h_icc_z) = opval;
3652     TRACE_RESULT (current_cpu, abuf, "icc-z", 'x', opval);
3653   }
3654   {
3655     BI opval = LTSI (GET_H_GR (f_rd), 0);
3656     CPU (h_icc_n) = opval;
3657     TRACE_RESULT (current_cpu, abuf, "icc-n", 'x', opval);
3658   }
3659   {
3660     BI opval = 0;
3661     CPU (h_icc_c) = opval;
3662     TRACE_RESULT (current_cpu, abuf, "icc-c", 'x', opval);
3663   }
3664   {
3665     BI opval = 0;
3666     CPU (h_icc_v) = opval;
3667     TRACE_RESULT (current_cpu, abuf, "icc-v", 'x', opval);
3668   }
3669 } while (0);
3670 } while (0);
3671
3672   SEM_NBRANCH_FINI (vpc, 0);
3673   return status;
3674 }
3675
3676 /* mulscc: mulscc $rs1,$rs2,$rd */
3677
3678 SEM_STATUS
3679 SEM_FN_NAME (sparc32,mulscc) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
3680 {
3681   SEM_STATUS status = 0;
3682   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3683   int UNUSED written = 0;
3684   IADDR UNUSED pc = GET_H_PC ();
3685   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
3686   EXTRACT_IFMT_LDSTUB_REG_REG_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-rd f-op */
3687   EXTRACT_IFMT_LDSTUB_REG_REG_CODE
3688
3689 do {
3690   SI tmp_rd_tmp;
3691   SI tmp_add_tmp;
3692   SI tmp_tmp;
3693   tmp_tmp = SRLSI (GET_H_GR (f_rs1), 1);
3694 if (NEBI (XORBI (CPU (h_icc_n), CPU (h_icc_v)), 0)) {
3695   tmp_tmp = ORSI (tmp_tmp, 0x80000000);
3696 }
3697 if (NESI (ANDSI (GET_H_Y (), 1), 0)) {
3698   tmp_add_tmp = GET_H_GR (f_rs2);
3699 } else {
3700   tmp_add_tmp = 0;
3701 }
3702   tmp_rd_tmp = ADDSI (tmp_tmp, tmp_add_tmp);
3703 do {
3704   SI tmp_x;
3705   tmp_x = ADDCSI (tmp_tmp, tmp_add_tmp, 0);
3706   {
3707     BI opval = ADDCFSI (tmp_tmp, tmp_add_tmp, 0);
3708     CPU (h_icc_c) = opval;
3709     TRACE_RESULT (current_cpu, abuf, "icc-c", 'x', opval);
3710   }
3711   {
3712     BI opval = ADDOFSI (tmp_tmp, tmp_add_tmp, 0);
3713     CPU (h_icc_v) = opval;
3714     TRACE_RESULT (current_cpu, abuf, "icc-v", 'x', opval);
3715   }
3716   {
3717     BI opval = LTSI (tmp_x, 0);
3718     CPU (h_icc_n) = opval;
3719     TRACE_RESULT (current_cpu, abuf, "icc-n", 'x', opval);
3720   }
3721   {
3722     BI opval = EQSI (tmp_x, 0);
3723     CPU (h_icc_z) = opval;
3724     TRACE_RESULT (current_cpu, abuf, "icc-z", 'x', opval);
3725   }
3726 } while (0);
3727   {
3728     SI opval = SRLSI (GET_H_Y (), 1);
3729     SET_H_Y (opval);
3730     TRACE_RESULT (current_cpu, abuf, "y-0", 'x', opval);
3731   }
3732 if (NESI (ANDSI (GET_H_GR (f_rs1), 1), 0)) {
3733   {
3734     SI opval = ORSI (GET_H_Y (), 0x80000000);
3735     SET_H_Y (opval);
3736     TRACE_RESULT (current_cpu, abuf, "y-0", 'x', opval);
3737   }
3738 }
3739   {
3740     SI opval = tmp_rd_tmp;
3741     SET_H_GR (f_rd, opval);
3742     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
3743   }
3744 } while (0);
3745
3746   SEM_NBRANCH_FINI (vpc, 0);
3747   return status;
3748 }
3749
3750 /* save: save $rs1,$rs2,$rd */
3751
3752 SEM_STATUS
3753 SEM_FN_NAME (sparc32,save) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
3754 {
3755   SEM_STATUS status = 0;
3756   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3757   int UNUSED written = 0;
3758   IADDR UNUSED pc = GET_H_PC ();
3759   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
3760   EXTRACT_IFMT_LDSTUB_REG_REG_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-rd f-op */
3761   EXTRACT_IFMT_LDSTUB_REG_REG_CODE
3762
3763   {
3764     SI opval = sparc32_do_save (current_cpu, pc, GET_H_GR (f_rs1), GET_H_GR (f_rs2));
3765     SET_H_GR (f_rd, opval);
3766     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
3767   }
3768
3769   SEM_NBRANCH_FINI (vpc, 0);
3770   return status;
3771 }
3772
3773 /* save-imm: save $rs1,$simm13,$rd */
3774
3775 SEM_STATUS
3776 SEM_FN_NAME (sparc32,save_imm) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
3777 {
3778   SEM_STATUS status = 0;
3779   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3780   int UNUSED written = 0;
3781   IADDR UNUSED pc = GET_H_PC ();
3782   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
3783   EXTRACT_IFMT_LDSTUB_REG_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-rd f-op */
3784   EXTRACT_IFMT_LDSTUB_REG_IMM_CODE
3785
3786   {
3787     SI opval = sparc32_do_save (current_cpu, pc, GET_H_GR (f_rs1), f_simm13);
3788     SET_H_GR (f_rd, opval);
3789     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
3790   }
3791
3792   SEM_NBRANCH_FINI (vpc, 0);
3793   return status;
3794 }
3795
3796 /* restore: restore $rs1,$rs2,$rd */
3797
3798 SEM_STATUS
3799 SEM_FN_NAME (sparc32,restore) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
3800 {
3801   SEM_STATUS status = 0;
3802   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3803   int UNUSED written = 0;
3804   IADDR UNUSED pc = GET_H_PC ();
3805   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
3806   EXTRACT_IFMT_LDSTUB_REG_REG_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-rd f-op */
3807   EXTRACT_IFMT_LDSTUB_REG_REG_CODE
3808
3809   {
3810     SI opval = sparc32_do_restore (current_cpu, pc, GET_H_GR (f_rs1), GET_H_GR (f_rs2));
3811     SET_H_GR (f_rd, opval);
3812     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
3813   }
3814
3815   SEM_NBRANCH_FINI (vpc, 0);
3816   return status;
3817 }
3818
3819 /* restore-imm: restore $rs1,$simm13,$rd */
3820
3821 SEM_STATUS
3822 SEM_FN_NAME (sparc32,restore_imm) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
3823 {
3824   SEM_STATUS status = 0;
3825   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3826   int UNUSED written = 0;
3827   IADDR UNUSED pc = GET_H_PC ();
3828   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
3829   EXTRACT_IFMT_LDSTUB_REG_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-rd f-op */
3830   EXTRACT_IFMT_LDSTUB_REG_IMM_CODE
3831
3832   {
3833     SI opval = sparc32_do_restore (current_cpu, pc, GET_H_GR (f_rs1), f_simm13);
3834     SET_H_GR (f_rd, opval);
3835     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
3836   }
3837
3838   SEM_NBRANCH_FINI (vpc, 0);
3839   return status;
3840 }
3841
3842 /* rett: rett $rs1,$rs2 */
3843
3844 SEM_STATUS
3845 SEM_FN_NAME (sparc32,rett) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
3846 {
3847   SEM_STATUS status = 0;
3848   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3849   int UNUSED written = 0;
3850   IADDR UNUSED pc = GET_H_PC ();
3851   SEM_BRANCH_INIT
3852   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
3853   EXTRACT_IFMT_WR_PSR_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-rd f-op */
3854   EXTRACT_IFMT_WR_PSR_CODE
3855
3856 do {
3857   {
3858     USI opval = sparc32_do_rett (current_cpu, pc, GET_H_GR (f_rs1), GET_H_GR (f_rs2));
3859     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
3860     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
3861   }
3862 } while (0);
3863
3864   SEM_BRANCH_FINI (vpc, 0|(1<<(CGEN_INSN_UNCOND_CTI-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_DELAY_SLOT-CGEN_ATTR_BOOL_OFFSET)));
3865   return status;
3866 }
3867
3868 /* rett-imm: rett $rs1,$simm13 */
3869
3870 SEM_STATUS
3871 SEM_FN_NAME (sparc32,rett_imm) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
3872 {
3873   SEM_STATUS status = 0;
3874   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3875   int UNUSED written = 0;
3876   IADDR UNUSED pc = GET_H_PC ();
3877   SEM_BRANCH_INIT
3878   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
3879   EXTRACT_IFMT_WR_PSR_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-rd f-op */
3880   EXTRACT_IFMT_WR_PSR_IMM_CODE
3881
3882 do {
3883   {
3884     USI opval = sparc32_do_rett (current_cpu, pc, GET_H_GR (f_rs1), f_simm13);
3885     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
3886     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
3887   }
3888 } while (0);
3889
3890   SEM_BRANCH_FINI (vpc, 0|(1<<(CGEN_INSN_UNCOND_CTI-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_DELAY_SLOT-CGEN_ATTR_BOOL_OFFSET)));
3891   return status;
3892 }
3893
3894 /* unimp: unimp $imm22 */
3895
3896 SEM_STATUS
3897 SEM_FN_NAME (sparc32,unimp) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
3898 {
3899   SEM_STATUS status = 0;
3900   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3901   int UNUSED written = 0;
3902   IADDR UNUSED pc = GET_H_PC ();
3903   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
3904   EXTRACT_IFMT_UNIMP_VARS /* f-imm22 f-op2 f-rd-res f-op */
3905   EXTRACT_IFMT_UNIMP_CODE
3906
3907 sparc_do_unimp (current_cpu, pc, f_imm22);
3908
3909   SEM_NBRANCH_FINI (vpc, 0);
3910   return status;
3911 }
3912
3913 /* call: call $disp30 */
3914
3915 SEM_STATUS
3916 SEM_FN_NAME (sparc32,call) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
3917 {
3918   SEM_STATUS status = 0;
3919   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3920   int UNUSED written = 0;
3921   IADDR UNUSED pc = GET_H_PC ();
3922   SEM_BRANCH_INIT
3923   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
3924   EXTRACT_IFMT_CALL_VARS /* f-disp30 f-op */
3925       IADDR i_disp30;
3926   EXTRACT_IFMT_CALL_CODE
3927   i_disp30 = f_disp30;
3928
3929 do {
3930   {
3931     SI opval = pc;
3932     SET_H_GR (((UINT) 15), opval);
3933     TRACE_RESULT (current_cpu, abuf, "gr-15", 'x', opval);
3934   }
3935 do {
3936   {
3937     USI opval = i_disp30;
3938     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
3939     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
3940   }
3941 } while (0);
3942 } while (0);
3943
3944   SEM_BRANCH_FINI (vpc, 0|(1<<(CGEN_INSN_DELAY_SLOT-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_UNCOND_CTI-CGEN_ATTR_BOOL_OFFSET)));
3945   return status;
3946 }
3947
3948 /* jmpl: jmpl $rs1+$rs2,$rd */
3949
3950 SEM_STATUS
3951 SEM_FN_NAME (sparc32,jmpl) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
3952 {
3953   SEM_STATUS status = 0;
3954   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3955   int UNUSED written = 0;
3956   IADDR UNUSED pc = GET_H_PC ();
3957   SEM_BRANCH_INIT
3958   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
3959   EXTRACT_IFMT_LDSTUB_REG_REG_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-rd f-op */
3960   EXTRACT_IFMT_LDSTUB_REG_REG_CODE
3961
3962 do {
3963   {
3964     SI opval = pc;
3965     SET_H_GR (f_rd, opval);
3966     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
3967   }
3968 do {
3969   {
3970     USI opval = ADDSI (GET_H_GR (f_rs1), GET_H_GR (f_rs2));
3971     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
3972     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
3973   }
3974 } while (0);
3975 } while (0);
3976
3977   SEM_BRANCH_FINI (vpc, 0|(1<<(CGEN_INSN_DELAY_SLOT-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_UNCOND_CTI-CGEN_ATTR_BOOL_OFFSET)));
3978   return status;
3979 }
3980
3981 /* jmpl-imm: jmpl $rs1+$simm13,$rd */
3982
3983 SEM_STATUS
3984 SEM_FN_NAME (sparc32,jmpl_imm) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
3985 {
3986   SEM_STATUS status = 0;
3987   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3988   int UNUSED written = 0;
3989   IADDR UNUSED pc = GET_H_PC ();
3990   SEM_BRANCH_INIT
3991   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
3992   EXTRACT_IFMT_LDSTUB_REG_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-rd f-op */
3993   EXTRACT_IFMT_LDSTUB_REG_IMM_CODE
3994
3995 do {
3996   {
3997     SI opval = pc;
3998     SET_H_GR (f_rd, opval);
3999     TRACE_RESULT (current_cpu, abuf, "rd", 'x', opval);
4000   }
4001 do {
4002   {
4003     USI opval = ADDSI (GET_H_GR (f_rs1), f_simm13);
4004     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
4005     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
4006   }
4007 } while (0);
4008 } while (0);
4009
4010   SEM_BRANCH_FINI (vpc, 0|(1<<(CGEN_INSN_DELAY_SLOT-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_UNCOND_CTI-CGEN_ATTR_BOOL_OFFSET)));
4011   return status;
4012 }
4013
4014 /* ba: ba$a $disp22 */
4015
4016 SEM_STATUS
4017 SEM_FN_NAME (sparc32,ba) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
4018 {
4019   SEM_STATUS status = 0;
4020   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4021   int UNUSED written = 0;
4022   IADDR UNUSED pc = GET_H_PC ();
4023   SEM_BRANCH_INIT
4024   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
4025   EXTRACT_IFMT_BA_VARS /* f-disp22 f-op2 f-fmt2-cond f-a f-op */
4026       IADDR i_disp22;
4027   EXTRACT_IFMT_BA_CODE
4028   i_disp22 = f_disp22;
4029
4030 do {
4031 do {
4032   {
4033     USI opval = i_disp22;
4034     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
4035     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
4036   }
4037 SEM_ANNUL_INSN (current_cpu, pc, f_a);
4038 } while (0);
4039 } while (0);
4040
4041   SEM_BRANCH_FINI (vpc, 0|(1<<(CGEN_INSN_V9_DEPRECATED-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_ANNUL-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_UNCOND_CTI-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_DELAY_SLOT-CGEN_ATTR_BOOL_OFFSET)));
4042   return status;
4043 }
4044
4045 /* ta: ta $rs1,$rs2 */
4046
4047 SEM_STATUS
4048 SEM_FN_NAME (sparc32,ta) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
4049 {
4050   SEM_STATUS status = 0;
4051   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4052   int UNUSED written = 0;
4053   IADDR UNUSED pc = GET_H_PC ();
4054   SEM_BRANCH_INIT
4055   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
4056   EXTRACT_IFMT_TA_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-fmt2-cond f-a f-op */
4057   EXTRACT_IFMT_TA_CODE
4058
4059   {
4060     USI opval = sparc32_sw_trap (current_cpu, pc, GET_H_GR (f_rs1), GET_H_GR (f_rs2));
4061 ;
4062     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
4063     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
4064   }
4065
4066   SEM_BRANCH_FINI (vpc, 0|(1<<(CGEN_INSN_TRAP-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_UNCOND_CTI-CGEN_ATTR_BOOL_OFFSET)));
4067   return status;
4068 }
4069
4070 /* ta-imm: ta $rs1,$simm13 */
4071
4072 SEM_STATUS
4073 SEM_FN_NAME (sparc32,ta_imm) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
4074 {
4075   SEM_STATUS status = 0;
4076   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4077   int UNUSED written = 0;
4078   IADDR UNUSED pc = GET_H_PC ();
4079   SEM_BRANCH_INIT
4080   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
4081   EXTRACT_IFMT_TA_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-fmt2-cond f-a f-op */
4082   EXTRACT_IFMT_TA_IMM_CODE
4083
4084   {
4085     USI opval = sparc32_sw_trap (current_cpu, pc, GET_H_GR (f_rs1), f_simm13);
4086 ;
4087     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
4088     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
4089   }
4090
4091   SEM_BRANCH_FINI (vpc, 0|(1<<(CGEN_INSN_TRAP-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_UNCOND_CTI-CGEN_ATTR_BOOL_OFFSET)));
4092   return status;
4093 }
4094
4095 /* bn: bn$a $disp22 */
4096
4097 SEM_STATUS
4098 SEM_FN_NAME (sparc32,bn) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
4099 {
4100   SEM_STATUS status = 0;
4101   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4102   int UNUSED written = 0;
4103   IADDR UNUSED pc = GET_H_PC ();
4104   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
4105   EXTRACT_IFMT_BA_VARS /* f-disp22 f-op2 f-fmt2-cond f-a f-op */
4106   EXTRACT_IFMT_BA_CODE
4107
4108 do {
4109 do {
4110 do { } while (0); /*nop*/
4111 SEM_ANNUL_INSN (current_cpu, pc, f_a);
4112 } while (0);
4113 } while (0);
4114
4115   SEM_NBRANCH_FINI (vpc, 0|(1<<(CGEN_INSN_V9_DEPRECATED-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_ANNUL-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_DELAY_SLOT-CGEN_ATTR_BOOL_OFFSET)));
4116   return status;
4117 }
4118
4119 /* tn: tn $rs1,$rs2 */
4120
4121 SEM_STATUS
4122 SEM_FN_NAME (sparc32,tn) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
4123 {
4124   SEM_STATUS status = 0;
4125   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4126   int UNUSED written = 0;
4127   IADDR UNUSED pc = GET_H_PC ();
4128   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
4129   EXTRACT_IFMT_TA_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-fmt2-cond f-a f-op */
4130   EXTRACT_IFMT_TA_CODE
4131
4132 do { } while (0); /*nop*/
4133
4134   SEM_NBRANCH_FINI (vpc, 0|(1<<(CGEN_INSN_TRAP-CGEN_ATTR_BOOL_OFFSET)));
4135   return status;
4136 }
4137
4138 /* tn-imm: tn $rs1,$simm13 */
4139
4140 SEM_STATUS
4141 SEM_FN_NAME (sparc32,tn_imm) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
4142 {
4143   SEM_STATUS status = 0;
4144   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4145   int UNUSED written = 0;
4146   IADDR UNUSED pc = GET_H_PC ();
4147   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
4148   EXTRACT_IFMT_TA_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-fmt2-cond f-a f-op */
4149   EXTRACT_IFMT_TA_IMM_CODE
4150
4151 do { } while (0); /*nop*/
4152
4153   SEM_NBRANCH_FINI (vpc, 0|(1<<(CGEN_INSN_TRAP-CGEN_ATTR_BOOL_OFFSET)));
4154   return status;
4155 }
4156
4157 /* bne: bne$a $disp22 */
4158
4159 SEM_STATUS
4160 SEM_FN_NAME (sparc32,bne) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
4161 {
4162   SEM_STATUS status = 0;
4163   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4164   int UNUSED written = 0;
4165   IADDR UNUSED pc = GET_H_PC ();
4166   SEM_BRANCH_INIT
4167   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
4168   EXTRACT_IFMT_BA_VARS /* f-disp22 f-op2 f-fmt2-cond f-a f-op */
4169       IADDR i_disp22;
4170   EXTRACT_IFMT_BA_CODE
4171   i_disp22 = f_disp22;
4172
4173 do {
4174 if (NOTBI (CPU (h_icc_z))) {
4175   {
4176     USI opval = i_disp22;
4177     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
4178     written |= (1 << 3);
4179     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
4180   }
4181 } else {
4182 SEM_ANNUL_INSN (current_cpu, pc, f_a);
4183 }
4184 } while (0);
4185
4186   abuf->written = written;
4187   SEM_BRANCH_FINI (vpc, 0|(1<<(CGEN_INSN_V9_DEPRECATED-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_ANNUL-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_COND_CTI-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_DELAY_SLOT-CGEN_ATTR_BOOL_OFFSET)));
4188   return status;
4189 }
4190
4191 /* tne: tne $rs1,$rs2 */
4192
4193 SEM_STATUS
4194 SEM_FN_NAME (sparc32,tne) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
4195 {
4196   SEM_STATUS status = 0;
4197   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4198   int UNUSED written = 0;
4199   IADDR UNUSED pc = GET_H_PC ();
4200   SEM_BRANCH_INIT
4201   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
4202   EXTRACT_IFMT_TA_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-fmt2-cond f-a f-op */
4203   EXTRACT_IFMT_TA_CODE
4204
4205 if (NOTBI (CPU (h_icc_z))) {
4206   {
4207     USI opval = sparc32_sw_trap (current_cpu, pc, GET_H_GR (f_rs1), GET_H_GR (f_rs2));
4208 ;
4209     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
4210     written |= (1 << 4);
4211     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
4212   }
4213 }
4214
4215   abuf->written = written;
4216   SEM_BRANCH_FINI (vpc, 0|(1<<(CGEN_INSN_TRAP-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_COND_CTI-CGEN_ATTR_BOOL_OFFSET)));
4217   return status;
4218 }
4219
4220 /* tne-imm: tne $rs1,$simm13 */
4221
4222 SEM_STATUS
4223 SEM_FN_NAME (sparc32,tne_imm) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
4224 {
4225   SEM_STATUS status = 0;
4226   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4227   int UNUSED written = 0;
4228   IADDR UNUSED pc = GET_H_PC ();
4229   SEM_BRANCH_INIT
4230   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
4231   EXTRACT_IFMT_TA_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-fmt2-cond f-a f-op */
4232   EXTRACT_IFMT_TA_IMM_CODE
4233
4234 if (NOTBI (CPU (h_icc_z))) {
4235   {
4236     USI opval = sparc32_sw_trap (current_cpu, pc, GET_H_GR (f_rs1), f_simm13);
4237 ;
4238     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
4239     written |= (1 << 4);
4240     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
4241   }
4242 }
4243
4244   abuf->written = written;
4245   SEM_BRANCH_FINI (vpc, 0|(1<<(CGEN_INSN_TRAP-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_COND_CTI-CGEN_ATTR_BOOL_OFFSET)));
4246   return status;
4247 }
4248
4249 /* be: be$a $disp22 */
4250
4251 SEM_STATUS
4252 SEM_FN_NAME (sparc32,be) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
4253 {
4254   SEM_STATUS status = 0;
4255   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4256   int UNUSED written = 0;
4257   IADDR UNUSED pc = GET_H_PC ();
4258   SEM_BRANCH_INIT
4259   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
4260   EXTRACT_IFMT_BA_VARS /* f-disp22 f-op2 f-fmt2-cond f-a f-op */
4261       IADDR i_disp22;
4262   EXTRACT_IFMT_BA_CODE
4263   i_disp22 = f_disp22;
4264
4265 do {
4266 if (CPU (h_icc_z)) {
4267   {
4268     USI opval = i_disp22;
4269     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
4270     written |= (1 << 3);
4271     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
4272   }
4273 } else {
4274 SEM_ANNUL_INSN (current_cpu, pc, f_a);
4275 }
4276 } while (0);
4277
4278   abuf->written = written;
4279   SEM_BRANCH_FINI (vpc, 0|(1<<(CGEN_INSN_V9_DEPRECATED-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_ANNUL-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_COND_CTI-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_DELAY_SLOT-CGEN_ATTR_BOOL_OFFSET)));
4280   return status;
4281 }
4282
4283 /* te: te $rs1,$rs2 */
4284
4285 SEM_STATUS
4286 SEM_FN_NAME (sparc32,te) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
4287 {
4288   SEM_STATUS status = 0;
4289   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4290   int UNUSED written = 0;
4291   IADDR UNUSED pc = GET_H_PC ();
4292   SEM_BRANCH_INIT
4293   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
4294   EXTRACT_IFMT_TA_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-fmt2-cond f-a f-op */
4295   EXTRACT_IFMT_TA_CODE
4296
4297 if (CPU (h_icc_z)) {
4298   {
4299     USI opval = sparc32_sw_trap (current_cpu, pc, GET_H_GR (f_rs1), GET_H_GR (f_rs2));
4300 ;
4301     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
4302     written |= (1 << 4);
4303     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
4304   }
4305 }
4306
4307   abuf->written = written;
4308   SEM_BRANCH_FINI (vpc, 0|(1<<(CGEN_INSN_TRAP-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_COND_CTI-CGEN_ATTR_BOOL_OFFSET)));
4309   return status;
4310 }
4311
4312 /* te-imm: te $rs1,$simm13 */
4313
4314 SEM_STATUS
4315 SEM_FN_NAME (sparc32,te_imm) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
4316 {
4317   SEM_STATUS status = 0;
4318   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4319   int UNUSED written = 0;
4320   IADDR UNUSED pc = GET_H_PC ();
4321   SEM_BRANCH_INIT
4322   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
4323   EXTRACT_IFMT_TA_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-fmt2-cond f-a f-op */
4324   EXTRACT_IFMT_TA_IMM_CODE
4325
4326 if (CPU (h_icc_z)) {
4327   {
4328     USI opval = sparc32_sw_trap (current_cpu, pc, GET_H_GR (f_rs1), f_simm13);
4329 ;
4330     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
4331     written |= (1 << 4);
4332     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
4333   }
4334 }
4335
4336   abuf->written = written;
4337   SEM_BRANCH_FINI (vpc, 0|(1<<(CGEN_INSN_TRAP-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_COND_CTI-CGEN_ATTR_BOOL_OFFSET)));
4338   return status;
4339 }
4340
4341 /* bg: bg$a $disp22 */
4342
4343 SEM_STATUS
4344 SEM_FN_NAME (sparc32,bg) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
4345 {
4346   SEM_STATUS status = 0;
4347   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4348   int UNUSED written = 0;
4349   IADDR UNUSED pc = GET_H_PC ();
4350   SEM_BRANCH_INIT
4351   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
4352   EXTRACT_IFMT_BA_VARS /* f-disp22 f-op2 f-fmt2-cond f-a f-op */
4353       IADDR i_disp22;
4354   EXTRACT_IFMT_BA_CODE
4355   i_disp22 = f_disp22;
4356
4357 do {
4358 if (NOTBI (ORBI (CPU (h_icc_z), XORBI (CPU (h_icc_n), CPU (h_icc_v))))) {
4359   {
4360     USI opval = i_disp22;
4361     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
4362     written |= (1 << 5);
4363     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
4364   }
4365 } else {
4366 SEM_ANNUL_INSN (current_cpu, pc, f_a);
4367 }
4368 } while (0);
4369
4370   abuf->written = written;
4371   SEM_BRANCH_FINI (vpc, 0|(1<<(CGEN_INSN_V9_DEPRECATED-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_ANNUL-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_COND_CTI-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_DELAY_SLOT-CGEN_ATTR_BOOL_OFFSET)));
4372   return status;
4373 }
4374
4375 /* tg: tg $rs1,$rs2 */
4376
4377 SEM_STATUS
4378 SEM_FN_NAME (sparc32,tg) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
4379 {
4380   SEM_STATUS status = 0;
4381   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4382   int UNUSED written = 0;
4383   IADDR UNUSED pc = GET_H_PC ();
4384   SEM_BRANCH_INIT
4385   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
4386   EXTRACT_IFMT_TA_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-fmt2-cond f-a f-op */
4387   EXTRACT_IFMT_TA_CODE
4388
4389 if (NOTBI (ORBI (CPU (h_icc_z), XORBI (CPU (h_icc_n), CPU (h_icc_v))))) {
4390   {
4391     USI opval = sparc32_sw_trap (current_cpu, pc, GET_H_GR (f_rs1), GET_H_GR (f_rs2));
4392 ;
4393     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
4394     written |= (1 << 6);
4395     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
4396   }
4397 }
4398
4399   abuf->written = written;
4400   SEM_BRANCH_FINI (vpc, 0|(1<<(CGEN_INSN_TRAP-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_COND_CTI-CGEN_ATTR_BOOL_OFFSET)));
4401   return status;
4402 }
4403
4404 /* tg-imm: tg $rs1,$simm13 */
4405
4406 SEM_STATUS
4407 SEM_FN_NAME (sparc32,tg_imm) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
4408 {
4409   SEM_STATUS status = 0;
4410   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4411   int UNUSED written = 0;
4412   IADDR UNUSED pc = GET_H_PC ();
4413   SEM_BRANCH_INIT
4414   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
4415   EXTRACT_IFMT_TA_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-fmt2-cond f-a f-op */
4416   EXTRACT_IFMT_TA_IMM_CODE
4417
4418 if (NOTBI (ORBI (CPU (h_icc_z), XORBI (CPU (h_icc_n), CPU (h_icc_v))))) {
4419   {
4420     USI opval = sparc32_sw_trap (current_cpu, pc, GET_H_GR (f_rs1), f_simm13);
4421 ;
4422     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
4423     written |= (1 << 6);
4424     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
4425   }
4426 }
4427
4428   abuf->written = written;
4429   SEM_BRANCH_FINI (vpc, 0|(1<<(CGEN_INSN_TRAP-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_COND_CTI-CGEN_ATTR_BOOL_OFFSET)));
4430   return status;
4431 }
4432
4433 /* ble: ble$a $disp22 */
4434
4435 SEM_STATUS
4436 SEM_FN_NAME (sparc32,ble) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
4437 {
4438   SEM_STATUS status = 0;
4439   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4440   int UNUSED written = 0;
4441   IADDR UNUSED pc = GET_H_PC ();
4442   SEM_BRANCH_INIT
4443   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
4444   EXTRACT_IFMT_BA_VARS /* f-disp22 f-op2 f-fmt2-cond f-a f-op */
4445       IADDR i_disp22;
4446   EXTRACT_IFMT_BA_CODE
4447   i_disp22 = f_disp22;
4448
4449 do {
4450 if (ORBI (CPU (h_icc_z), XORBI (CPU (h_icc_n), CPU (h_icc_v)))) {
4451   {
4452     USI opval = i_disp22;
4453     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
4454     written |= (1 << 5);
4455     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
4456   }
4457 } else {
4458 SEM_ANNUL_INSN (current_cpu, pc, f_a);
4459 }
4460 } while (0);
4461
4462   abuf->written = written;
4463   SEM_BRANCH_FINI (vpc, 0|(1<<(CGEN_INSN_V9_DEPRECATED-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_ANNUL-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_COND_CTI-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_DELAY_SLOT-CGEN_ATTR_BOOL_OFFSET)));
4464   return status;
4465 }
4466
4467 /* tle: tle $rs1,$rs2 */
4468
4469 SEM_STATUS
4470 SEM_FN_NAME (sparc32,tle) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
4471 {
4472   SEM_STATUS status = 0;
4473   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4474   int UNUSED written = 0;
4475   IADDR UNUSED pc = GET_H_PC ();
4476   SEM_BRANCH_INIT
4477   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
4478   EXTRACT_IFMT_TA_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-fmt2-cond f-a f-op */
4479   EXTRACT_IFMT_TA_CODE
4480
4481 if (ORBI (CPU (h_icc_z), XORBI (CPU (h_icc_n), CPU (h_icc_v)))) {
4482   {
4483     USI opval = sparc32_sw_trap (current_cpu, pc, GET_H_GR (f_rs1), GET_H_GR (f_rs2));
4484 ;
4485     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
4486     written |= (1 << 6);
4487     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
4488   }
4489 }
4490
4491   abuf->written = written;
4492   SEM_BRANCH_FINI (vpc, 0|(1<<(CGEN_INSN_TRAP-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_COND_CTI-CGEN_ATTR_BOOL_OFFSET)));
4493   return status;
4494 }
4495
4496 /* tle-imm: tle $rs1,$simm13 */
4497
4498 SEM_STATUS
4499 SEM_FN_NAME (sparc32,tle_imm) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
4500 {
4501   SEM_STATUS status = 0;
4502   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4503   int UNUSED written = 0;
4504   IADDR UNUSED pc = GET_H_PC ();
4505   SEM_BRANCH_INIT
4506   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
4507   EXTRACT_IFMT_TA_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-fmt2-cond f-a f-op */
4508   EXTRACT_IFMT_TA_IMM_CODE
4509
4510 if (ORBI (CPU (h_icc_z), XORBI (CPU (h_icc_n), CPU (h_icc_v)))) {
4511   {
4512     USI opval = sparc32_sw_trap (current_cpu, pc, GET_H_GR (f_rs1), f_simm13);
4513 ;
4514     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
4515     written |= (1 << 6);
4516     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
4517   }
4518 }
4519
4520   abuf->written = written;
4521   SEM_BRANCH_FINI (vpc, 0|(1<<(CGEN_INSN_TRAP-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_COND_CTI-CGEN_ATTR_BOOL_OFFSET)));
4522   return status;
4523 }
4524
4525 /* bge: bge$a $disp22 */
4526
4527 SEM_STATUS
4528 SEM_FN_NAME (sparc32,bge) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
4529 {
4530   SEM_STATUS status = 0;
4531   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4532   int UNUSED written = 0;
4533   IADDR UNUSED pc = GET_H_PC ();
4534   SEM_BRANCH_INIT
4535   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
4536   EXTRACT_IFMT_BA_VARS /* f-disp22 f-op2 f-fmt2-cond f-a f-op */
4537       IADDR i_disp22;
4538   EXTRACT_IFMT_BA_CODE
4539   i_disp22 = f_disp22;
4540
4541 do {
4542 if (NOTBI (XORBI (CPU (h_icc_n), CPU (h_icc_v)))) {
4543   {
4544     USI opval = i_disp22;
4545     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
4546     written |= (1 << 4);
4547     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
4548   }
4549 } else {
4550 SEM_ANNUL_INSN (current_cpu, pc, f_a);
4551 }
4552 } while (0);
4553
4554   abuf->written = written;
4555   SEM_BRANCH_FINI (vpc, 0|(1<<(CGEN_INSN_V9_DEPRECATED-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_ANNUL-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_COND_CTI-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_DELAY_SLOT-CGEN_ATTR_BOOL_OFFSET)));
4556   return status;
4557 }
4558
4559 /* tge: tge $rs1,$rs2 */
4560
4561 SEM_STATUS
4562 SEM_FN_NAME (sparc32,tge) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
4563 {
4564   SEM_STATUS status = 0;
4565   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4566   int UNUSED written = 0;
4567   IADDR UNUSED pc = GET_H_PC ();
4568   SEM_BRANCH_INIT
4569   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
4570   EXTRACT_IFMT_TA_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-fmt2-cond f-a f-op */
4571   EXTRACT_IFMT_TA_CODE
4572
4573 if (NOTBI (XORBI (CPU (h_icc_n), CPU (h_icc_v)))) {
4574   {
4575     USI opval = sparc32_sw_trap (current_cpu, pc, GET_H_GR (f_rs1), GET_H_GR (f_rs2));
4576 ;
4577     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
4578     written |= (1 << 5);
4579     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
4580   }
4581 }
4582
4583   abuf->written = written;
4584   SEM_BRANCH_FINI (vpc, 0|(1<<(CGEN_INSN_TRAP-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_COND_CTI-CGEN_ATTR_BOOL_OFFSET)));
4585   return status;
4586 }
4587
4588 /* tge-imm: tge $rs1,$simm13 */
4589
4590 SEM_STATUS
4591 SEM_FN_NAME (sparc32,tge_imm) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
4592 {
4593   SEM_STATUS status = 0;
4594   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4595   int UNUSED written = 0;
4596   IADDR UNUSED pc = GET_H_PC ();
4597   SEM_BRANCH_INIT
4598   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
4599   EXTRACT_IFMT_TA_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-fmt2-cond f-a f-op */
4600   EXTRACT_IFMT_TA_IMM_CODE
4601
4602 if (NOTBI (XORBI (CPU (h_icc_n), CPU (h_icc_v)))) {
4603   {
4604     USI opval = sparc32_sw_trap (current_cpu, pc, GET_H_GR (f_rs1), f_simm13);
4605 ;
4606     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
4607     written |= (1 << 5);
4608     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
4609   }
4610 }
4611
4612   abuf->written = written;
4613   SEM_BRANCH_FINI (vpc, 0|(1<<(CGEN_INSN_TRAP-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_COND_CTI-CGEN_ATTR_BOOL_OFFSET)));
4614   return status;
4615 }
4616
4617 /* bl: bl$a $disp22 */
4618
4619 SEM_STATUS
4620 SEM_FN_NAME (sparc32,bl) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
4621 {
4622   SEM_STATUS status = 0;
4623   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4624   int UNUSED written = 0;
4625   IADDR UNUSED pc = GET_H_PC ();
4626   SEM_BRANCH_INIT
4627   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
4628   EXTRACT_IFMT_BA_VARS /* f-disp22 f-op2 f-fmt2-cond f-a f-op */
4629       IADDR i_disp22;
4630   EXTRACT_IFMT_BA_CODE
4631   i_disp22 = f_disp22;
4632
4633 do {
4634 if (XORBI (CPU (h_icc_n), CPU (h_icc_v))) {
4635   {
4636     USI opval = i_disp22;
4637     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
4638     written |= (1 << 4);
4639     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
4640   }
4641 } else {
4642 SEM_ANNUL_INSN (current_cpu, pc, f_a);
4643 }
4644 } while (0);
4645
4646   abuf->written = written;
4647   SEM_BRANCH_FINI (vpc, 0|(1<<(CGEN_INSN_V9_DEPRECATED-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_ANNUL-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_COND_CTI-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_DELAY_SLOT-CGEN_ATTR_BOOL_OFFSET)));
4648   return status;
4649 }
4650
4651 /* tl: tl $rs1,$rs2 */
4652
4653 SEM_STATUS
4654 SEM_FN_NAME (sparc32,tl) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
4655 {
4656   SEM_STATUS status = 0;
4657   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4658   int UNUSED written = 0;
4659   IADDR UNUSED pc = GET_H_PC ();
4660   SEM_BRANCH_INIT
4661   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
4662   EXTRACT_IFMT_TA_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-fmt2-cond f-a f-op */
4663   EXTRACT_IFMT_TA_CODE
4664
4665 if (XORBI (CPU (h_icc_n), CPU (h_icc_v))) {
4666   {
4667     USI opval = sparc32_sw_trap (current_cpu, pc, GET_H_GR (f_rs1), GET_H_GR (f_rs2));
4668 ;
4669     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
4670     written |= (1 << 5);
4671     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
4672   }
4673 }
4674
4675   abuf->written = written;
4676   SEM_BRANCH_FINI (vpc, 0|(1<<(CGEN_INSN_TRAP-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_COND_CTI-CGEN_ATTR_BOOL_OFFSET)));
4677   return status;
4678 }
4679
4680 /* tl-imm: tl $rs1,$simm13 */
4681
4682 SEM_STATUS
4683 SEM_FN_NAME (sparc32,tl_imm) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
4684 {
4685   SEM_STATUS status = 0;
4686   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4687   int UNUSED written = 0;
4688   IADDR UNUSED pc = GET_H_PC ();
4689   SEM_BRANCH_INIT
4690   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
4691   EXTRACT_IFMT_TA_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-fmt2-cond f-a f-op */
4692   EXTRACT_IFMT_TA_IMM_CODE
4693
4694 if (XORBI (CPU (h_icc_n), CPU (h_icc_v))) {
4695   {
4696     USI opval = sparc32_sw_trap (current_cpu, pc, GET_H_GR (f_rs1), f_simm13);
4697 ;
4698     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
4699     written |= (1 << 5);
4700     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
4701   }
4702 }
4703
4704   abuf->written = written;
4705   SEM_BRANCH_FINI (vpc, 0|(1<<(CGEN_INSN_TRAP-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_COND_CTI-CGEN_ATTR_BOOL_OFFSET)));
4706   return status;
4707 }
4708
4709 /* bgu: bgu$a $disp22 */
4710
4711 SEM_STATUS
4712 SEM_FN_NAME (sparc32,bgu) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
4713 {
4714   SEM_STATUS status = 0;
4715   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4716   int UNUSED written = 0;
4717   IADDR UNUSED pc = GET_H_PC ();
4718   SEM_BRANCH_INIT
4719   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
4720   EXTRACT_IFMT_BA_VARS /* f-disp22 f-op2 f-fmt2-cond f-a f-op */
4721       IADDR i_disp22;
4722   EXTRACT_IFMT_BA_CODE
4723   i_disp22 = f_disp22;
4724
4725 do {
4726 if (NOTBI (ORBI (CPU (h_icc_c), CPU (h_icc_z)))) {
4727   {
4728     USI opval = i_disp22;
4729     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
4730     written |= (1 << 4);
4731     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
4732   }
4733 } else {
4734 SEM_ANNUL_INSN (current_cpu, pc, f_a);
4735 }
4736 } while (0);
4737
4738   abuf->written = written;
4739   SEM_BRANCH_FINI (vpc, 0|(1<<(CGEN_INSN_V9_DEPRECATED-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_ANNUL-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_COND_CTI-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_DELAY_SLOT-CGEN_ATTR_BOOL_OFFSET)));
4740   return status;
4741 }
4742
4743 /* tgu: tgu $rs1,$rs2 */
4744
4745 SEM_STATUS
4746 SEM_FN_NAME (sparc32,tgu) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
4747 {
4748   SEM_STATUS status = 0;
4749   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4750   int UNUSED written = 0;
4751   IADDR UNUSED pc = GET_H_PC ();
4752   SEM_BRANCH_INIT
4753   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
4754   EXTRACT_IFMT_TA_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-fmt2-cond f-a f-op */
4755   EXTRACT_IFMT_TA_CODE
4756
4757 if (NOTBI (ORBI (CPU (h_icc_c), CPU (h_icc_z)))) {
4758   {
4759     USI opval = sparc32_sw_trap (current_cpu, pc, GET_H_GR (f_rs1), GET_H_GR (f_rs2));
4760 ;
4761     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
4762     written |= (1 << 5);
4763     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
4764   }
4765 }
4766
4767   abuf->written = written;
4768   SEM_BRANCH_FINI (vpc, 0|(1<<(CGEN_INSN_TRAP-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_COND_CTI-CGEN_ATTR_BOOL_OFFSET)));
4769   return status;
4770 }
4771
4772 /* tgu-imm: tgu $rs1,$simm13 */
4773
4774 SEM_STATUS
4775 SEM_FN_NAME (sparc32,tgu_imm) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
4776 {
4777   SEM_STATUS status = 0;
4778   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4779   int UNUSED written = 0;
4780   IADDR UNUSED pc = GET_H_PC ();
4781   SEM_BRANCH_INIT
4782   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
4783   EXTRACT_IFMT_TA_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-fmt2-cond f-a f-op */
4784   EXTRACT_IFMT_TA_IMM_CODE
4785
4786 if (NOTBI (ORBI (CPU (h_icc_c), CPU (h_icc_z)))) {
4787   {
4788     USI opval = sparc32_sw_trap (current_cpu, pc, GET_H_GR (f_rs1), f_simm13);
4789 ;
4790     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
4791     written |= (1 << 5);
4792     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
4793   }
4794 }
4795
4796   abuf->written = written;
4797   SEM_BRANCH_FINI (vpc, 0|(1<<(CGEN_INSN_TRAP-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_COND_CTI-CGEN_ATTR_BOOL_OFFSET)));
4798   return status;
4799 }
4800
4801 /* bleu: bleu$a $disp22 */
4802
4803 SEM_STATUS
4804 SEM_FN_NAME (sparc32,bleu) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
4805 {
4806   SEM_STATUS status = 0;
4807   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4808   int UNUSED written = 0;
4809   IADDR UNUSED pc = GET_H_PC ();
4810   SEM_BRANCH_INIT
4811   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
4812   EXTRACT_IFMT_BA_VARS /* f-disp22 f-op2 f-fmt2-cond f-a f-op */
4813       IADDR i_disp22;
4814   EXTRACT_IFMT_BA_CODE
4815   i_disp22 = f_disp22;
4816
4817 do {
4818 if (ORBI (CPU (h_icc_c), CPU (h_icc_z))) {
4819   {
4820     USI opval = i_disp22;
4821     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
4822     written |= (1 << 4);
4823     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
4824   }
4825 } else {
4826 SEM_ANNUL_INSN (current_cpu, pc, f_a);
4827 }
4828 } while (0);
4829
4830   abuf->written = written;
4831   SEM_BRANCH_FINI (vpc, 0|(1<<(CGEN_INSN_V9_DEPRECATED-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_ANNUL-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_COND_CTI-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_DELAY_SLOT-CGEN_ATTR_BOOL_OFFSET)));
4832   return status;
4833 }
4834
4835 /* tleu: tleu $rs1,$rs2 */
4836
4837 SEM_STATUS
4838 SEM_FN_NAME (sparc32,tleu) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
4839 {
4840   SEM_STATUS status = 0;
4841   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4842   int UNUSED written = 0;
4843   IADDR UNUSED pc = GET_H_PC ();
4844   SEM_BRANCH_INIT
4845   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
4846   EXTRACT_IFMT_TA_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-fmt2-cond f-a f-op */
4847   EXTRACT_IFMT_TA_CODE
4848
4849 if (ORBI (CPU (h_icc_c), CPU (h_icc_z))) {
4850   {
4851     USI opval = sparc32_sw_trap (current_cpu, pc, GET_H_GR (f_rs1), GET_H_GR (f_rs2));
4852 ;
4853     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
4854     written |= (1 << 5);
4855     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
4856   }
4857 }
4858
4859   abuf->written = written;
4860   SEM_BRANCH_FINI (vpc, 0|(1<<(CGEN_INSN_TRAP-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_COND_CTI-CGEN_ATTR_BOOL_OFFSET)));
4861   return status;
4862 }
4863
4864 /* tleu-imm: tleu $rs1,$simm13 */
4865
4866 SEM_STATUS
4867 SEM_FN_NAME (sparc32,tleu_imm) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
4868 {
4869   SEM_STATUS status = 0;
4870   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4871   int UNUSED written = 0;
4872   IADDR UNUSED pc = GET_H_PC ();
4873   SEM_BRANCH_INIT
4874   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
4875   EXTRACT_IFMT_TA_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-fmt2-cond f-a f-op */
4876   EXTRACT_IFMT_TA_IMM_CODE
4877
4878 if (ORBI (CPU (h_icc_c), CPU (h_icc_z))) {
4879   {
4880     USI opval = sparc32_sw_trap (current_cpu, pc, GET_H_GR (f_rs1), f_simm13);
4881 ;
4882     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
4883     written |= (1 << 5);
4884     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
4885   }
4886 }
4887
4888   abuf->written = written;
4889   SEM_BRANCH_FINI (vpc, 0|(1<<(CGEN_INSN_TRAP-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_COND_CTI-CGEN_ATTR_BOOL_OFFSET)));
4890   return status;
4891 }
4892
4893 /* bcc: bcc$a $disp22 */
4894
4895 SEM_STATUS
4896 SEM_FN_NAME (sparc32,bcc) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
4897 {
4898   SEM_STATUS status = 0;
4899   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4900   int UNUSED written = 0;
4901   IADDR UNUSED pc = GET_H_PC ();
4902   SEM_BRANCH_INIT
4903   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
4904   EXTRACT_IFMT_BA_VARS /* f-disp22 f-op2 f-fmt2-cond f-a f-op */
4905       IADDR i_disp22;
4906   EXTRACT_IFMT_BA_CODE
4907   i_disp22 = f_disp22;
4908
4909 do {
4910 if (NOTBI (CPU (h_icc_c))) {
4911   {
4912     USI opval = i_disp22;
4913     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
4914     written |= (1 << 3);
4915     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
4916   }
4917 } else {
4918 SEM_ANNUL_INSN (current_cpu, pc, f_a);
4919 }
4920 } while (0);
4921
4922   abuf->written = written;
4923   SEM_BRANCH_FINI (vpc, 0|(1<<(CGEN_INSN_V9_DEPRECATED-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_ANNUL-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_COND_CTI-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_DELAY_SLOT-CGEN_ATTR_BOOL_OFFSET)));
4924   return status;
4925 }
4926
4927 /* tcc: tcc $rs1,$rs2 */
4928
4929 SEM_STATUS
4930 SEM_FN_NAME (sparc32,tcc) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
4931 {
4932   SEM_STATUS status = 0;
4933   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4934   int UNUSED written = 0;
4935   IADDR UNUSED pc = GET_H_PC ();
4936   SEM_BRANCH_INIT
4937   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
4938   EXTRACT_IFMT_TA_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-fmt2-cond f-a f-op */
4939   EXTRACT_IFMT_TA_CODE
4940
4941 if (NOTBI (CPU (h_icc_c))) {
4942   {
4943     USI opval = sparc32_sw_trap (current_cpu, pc, GET_H_GR (f_rs1), GET_H_GR (f_rs2));
4944 ;
4945     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
4946     written |= (1 << 4);
4947     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
4948   }
4949 }
4950
4951   abuf->written = written;
4952   SEM_BRANCH_FINI (vpc, 0|(1<<(CGEN_INSN_TRAP-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_COND_CTI-CGEN_ATTR_BOOL_OFFSET)));
4953   return status;
4954 }
4955
4956 /* tcc-imm: tcc $rs1,$simm13 */
4957
4958 SEM_STATUS
4959 SEM_FN_NAME (sparc32,tcc_imm) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
4960 {
4961   SEM_STATUS status = 0;
4962   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4963   int UNUSED written = 0;
4964   IADDR UNUSED pc = GET_H_PC ();
4965   SEM_BRANCH_INIT
4966   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
4967   EXTRACT_IFMT_TA_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-fmt2-cond f-a f-op */
4968   EXTRACT_IFMT_TA_IMM_CODE
4969
4970 if (NOTBI (CPU (h_icc_c))) {
4971   {
4972     USI opval = sparc32_sw_trap (current_cpu, pc, GET_H_GR (f_rs1), f_simm13);
4973 ;
4974     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
4975     written |= (1 << 4);
4976     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
4977   }
4978 }
4979
4980   abuf->written = written;
4981   SEM_BRANCH_FINI (vpc, 0|(1<<(CGEN_INSN_TRAP-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_COND_CTI-CGEN_ATTR_BOOL_OFFSET)));
4982   return status;
4983 }
4984
4985 /* bcs: bcs$a $disp22 */
4986
4987 SEM_STATUS
4988 SEM_FN_NAME (sparc32,bcs) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
4989 {
4990   SEM_STATUS status = 0;
4991   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4992   int UNUSED written = 0;
4993   IADDR UNUSED pc = GET_H_PC ();
4994   SEM_BRANCH_INIT
4995   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
4996   EXTRACT_IFMT_BA_VARS /* f-disp22 f-op2 f-fmt2-cond f-a f-op */
4997       IADDR i_disp22;
4998   EXTRACT_IFMT_BA_CODE
4999   i_disp22 = f_disp22;
5000
5001 do {
5002 if (CPU (h_icc_c)) {
5003   {
5004     USI opval = i_disp22;
5005     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
5006     written |= (1 << 3);
5007     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
5008   }
5009 } else {
5010 SEM_ANNUL_INSN (current_cpu, pc, f_a);
5011 }
5012 } while (0);
5013
5014   abuf->written = written;
5015   SEM_BRANCH_FINI (vpc, 0|(1<<(CGEN_INSN_V9_DEPRECATED-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_ANNUL-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_COND_CTI-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_DELAY_SLOT-CGEN_ATTR_BOOL_OFFSET)));
5016   return status;
5017 }
5018
5019 /* tcs: tcs $rs1,$rs2 */
5020
5021 SEM_STATUS
5022 SEM_FN_NAME (sparc32,tcs) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
5023 {
5024   SEM_STATUS status = 0;
5025   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5026   int UNUSED written = 0;
5027   IADDR UNUSED pc = GET_H_PC ();
5028   SEM_BRANCH_INIT
5029   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
5030   EXTRACT_IFMT_TA_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-fmt2-cond f-a f-op */
5031   EXTRACT_IFMT_TA_CODE
5032
5033 if (CPU (h_icc_c)) {
5034   {
5035     USI opval = sparc32_sw_trap (current_cpu, pc, GET_H_GR (f_rs1), GET_H_GR (f_rs2));
5036 ;
5037     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
5038     written |= (1 << 4);
5039     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
5040   }
5041 }
5042
5043   abuf->written = written;
5044   SEM_BRANCH_FINI (vpc, 0|(1<<(CGEN_INSN_TRAP-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_COND_CTI-CGEN_ATTR_BOOL_OFFSET)));
5045   return status;
5046 }
5047
5048 /* tcs-imm: tcs $rs1,$simm13 */
5049
5050 SEM_STATUS
5051 SEM_FN_NAME (sparc32,tcs_imm) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
5052 {
5053   SEM_STATUS status = 0;
5054   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5055   int UNUSED written = 0;
5056   IADDR UNUSED pc = GET_H_PC ();
5057   SEM_BRANCH_INIT
5058   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
5059   EXTRACT_IFMT_TA_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-fmt2-cond f-a f-op */
5060   EXTRACT_IFMT_TA_IMM_CODE
5061
5062 if (CPU (h_icc_c)) {
5063   {
5064     USI opval = sparc32_sw_trap (current_cpu, pc, GET_H_GR (f_rs1), f_simm13);
5065 ;
5066     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
5067     written |= (1 << 4);
5068     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
5069   }
5070 }
5071
5072   abuf->written = written;
5073   SEM_BRANCH_FINI (vpc, 0|(1<<(CGEN_INSN_TRAP-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_COND_CTI-CGEN_ATTR_BOOL_OFFSET)));
5074   return status;
5075 }
5076
5077 /* bpos: bpos$a $disp22 */
5078
5079 SEM_STATUS
5080 SEM_FN_NAME (sparc32,bpos) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
5081 {
5082   SEM_STATUS status = 0;
5083   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5084   int UNUSED written = 0;
5085   IADDR UNUSED pc = GET_H_PC ();
5086   SEM_BRANCH_INIT
5087   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
5088   EXTRACT_IFMT_BA_VARS /* f-disp22 f-op2 f-fmt2-cond f-a f-op */
5089       IADDR i_disp22;
5090   EXTRACT_IFMT_BA_CODE
5091   i_disp22 = f_disp22;
5092
5093 do {
5094 if (NOTBI (CPU (h_icc_n))) {
5095   {
5096     USI opval = i_disp22;
5097     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
5098     written |= (1 << 3);
5099     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
5100   }
5101 } else {
5102 SEM_ANNUL_INSN (current_cpu, pc, f_a);
5103 }
5104 } while (0);
5105
5106   abuf->written = written;
5107   SEM_BRANCH_FINI (vpc, 0|(1<<(CGEN_INSN_V9_DEPRECATED-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_ANNUL-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_COND_CTI-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_DELAY_SLOT-CGEN_ATTR_BOOL_OFFSET)));
5108   return status;
5109 }
5110
5111 /* tpos: tpos $rs1,$rs2 */
5112
5113 SEM_STATUS
5114 SEM_FN_NAME (sparc32,tpos) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
5115 {
5116   SEM_STATUS status = 0;
5117   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5118   int UNUSED written = 0;
5119   IADDR UNUSED pc = GET_H_PC ();
5120   SEM_BRANCH_INIT
5121   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
5122   EXTRACT_IFMT_TA_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-fmt2-cond f-a f-op */
5123   EXTRACT_IFMT_TA_CODE
5124
5125 if (NOTBI (CPU (h_icc_n))) {
5126   {
5127     USI opval = sparc32_sw_trap (current_cpu, pc, GET_H_GR (f_rs1), GET_H_GR (f_rs2));
5128 ;
5129     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
5130     written |= (1 << 4);
5131     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
5132   }
5133 }
5134
5135   abuf->written = written;
5136   SEM_BRANCH_FINI (vpc, 0|(1<<(CGEN_INSN_TRAP-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_COND_CTI-CGEN_ATTR_BOOL_OFFSET)));
5137   return status;
5138 }
5139
5140 /* tpos-imm: tpos $rs1,$simm13 */
5141
5142 SEM_STATUS
5143 SEM_FN_NAME (sparc32,tpos_imm) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
5144 {
5145   SEM_STATUS status = 0;
5146   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5147   int UNUSED written = 0;
5148   IADDR UNUSED pc = GET_H_PC ();
5149   SEM_BRANCH_INIT
5150   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
5151   EXTRACT_IFMT_TA_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-fmt2-cond f-a f-op */
5152   EXTRACT_IFMT_TA_IMM_CODE
5153
5154 if (NOTBI (CPU (h_icc_n))) {
5155   {
5156     USI opval = sparc32_sw_trap (current_cpu, pc, GET_H_GR (f_rs1), f_simm13);
5157 ;
5158     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
5159     written |= (1 << 4);
5160     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
5161   }
5162 }
5163
5164   abuf->written = written;
5165   SEM_BRANCH_FINI (vpc, 0|(1<<(CGEN_INSN_TRAP-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_COND_CTI-CGEN_ATTR_BOOL_OFFSET)));
5166   return status;
5167 }
5168
5169 /* bneg: bneg$a $disp22 */
5170
5171 SEM_STATUS
5172 SEM_FN_NAME (sparc32,bneg) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
5173 {
5174   SEM_STATUS status = 0;
5175   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5176   int UNUSED written = 0;
5177   IADDR UNUSED pc = GET_H_PC ();
5178   SEM_BRANCH_INIT
5179   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
5180   EXTRACT_IFMT_BA_VARS /* f-disp22 f-op2 f-fmt2-cond f-a f-op */
5181       IADDR i_disp22;
5182   EXTRACT_IFMT_BA_CODE
5183   i_disp22 = f_disp22;
5184
5185 do {
5186 if (CPU (h_icc_n)) {
5187   {
5188     USI opval = i_disp22;
5189     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
5190     written |= (1 << 3);
5191     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
5192   }
5193 } else {
5194 SEM_ANNUL_INSN (current_cpu, pc, f_a);
5195 }
5196 } while (0);
5197
5198   abuf->written = written;
5199   SEM_BRANCH_FINI (vpc, 0|(1<<(CGEN_INSN_V9_DEPRECATED-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_ANNUL-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_COND_CTI-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_DELAY_SLOT-CGEN_ATTR_BOOL_OFFSET)));
5200   return status;
5201 }
5202
5203 /* tneg: tneg $rs1,$rs2 */
5204
5205 SEM_STATUS
5206 SEM_FN_NAME (sparc32,tneg) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
5207 {
5208   SEM_STATUS status = 0;
5209   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5210   int UNUSED written = 0;
5211   IADDR UNUSED pc = GET_H_PC ();
5212   SEM_BRANCH_INIT
5213   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
5214   EXTRACT_IFMT_TA_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-fmt2-cond f-a f-op */
5215   EXTRACT_IFMT_TA_CODE
5216
5217 if (CPU (h_icc_n)) {
5218   {
5219     USI opval = sparc32_sw_trap (current_cpu, pc, GET_H_GR (f_rs1), GET_H_GR (f_rs2));
5220 ;
5221     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
5222     written |= (1 << 4);
5223     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
5224   }
5225 }
5226
5227   abuf->written = written;
5228   SEM_BRANCH_FINI (vpc, 0|(1<<(CGEN_INSN_TRAP-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_COND_CTI-CGEN_ATTR_BOOL_OFFSET)));
5229   return status;
5230 }
5231
5232 /* tneg-imm: tneg $rs1,$simm13 */
5233
5234 SEM_STATUS
5235 SEM_FN_NAME (sparc32,tneg_imm) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
5236 {
5237   SEM_STATUS status = 0;
5238   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5239   int UNUSED written = 0;
5240   IADDR UNUSED pc = GET_H_PC ();
5241   SEM_BRANCH_INIT
5242   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
5243   EXTRACT_IFMT_TA_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-fmt2-cond f-a f-op */
5244   EXTRACT_IFMT_TA_IMM_CODE
5245
5246 if (CPU (h_icc_n)) {
5247   {
5248     USI opval = sparc32_sw_trap (current_cpu, pc, GET_H_GR (f_rs1), f_simm13);
5249 ;
5250     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
5251     written |= (1 << 4);
5252     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
5253   }
5254 }
5255
5256   abuf->written = written;
5257   SEM_BRANCH_FINI (vpc, 0|(1<<(CGEN_INSN_TRAP-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_COND_CTI-CGEN_ATTR_BOOL_OFFSET)));
5258   return status;
5259 }
5260
5261 /* bvc: bvc$a $disp22 */
5262
5263 SEM_STATUS
5264 SEM_FN_NAME (sparc32,bvc) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
5265 {
5266   SEM_STATUS status = 0;
5267   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5268   int UNUSED written = 0;
5269   IADDR UNUSED pc = GET_H_PC ();
5270   SEM_BRANCH_INIT
5271   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
5272   EXTRACT_IFMT_BA_VARS /* f-disp22 f-op2 f-fmt2-cond f-a f-op */
5273       IADDR i_disp22;
5274   EXTRACT_IFMT_BA_CODE
5275   i_disp22 = f_disp22;
5276
5277 do {
5278 if (NOTBI (CPU (h_icc_v))) {
5279   {
5280     USI opval = i_disp22;
5281     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
5282     written |= (1 << 3);
5283     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
5284   }
5285 } else {
5286 SEM_ANNUL_INSN (current_cpu, pc, f_a);
5287 }
5288 } while (0);
5289
5290   abuf->written = written;
5291   SEM_BRANCH_FINI (vpc, 0|(1<<(CGEN_INSN_V9_DEPRECATED-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_ANNUL-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_COND_CTI-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_DELAY_SLOT-CGEN_ATTR_BOOL_OFFSET)));
5292   return status;
5293 }
5294
5295 /* tvc: tvc $rs1,$rs2 */
5296
5297 SEM_STATUS
5298 SEM_FN_NAME (sparc32,tvc) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
5299 {
5300   SEM_STATUS status = 0;
5301   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5302   int UNUSED written = 0;
5303   IADDR UNUSED pc = GET_H_PC ();
5304   SEM_BRANCH_INIT
5305   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
5306   EXTRACT_IFMT_TA_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-fmt2-cond f-a f-op */
5307   EXTRACT_IFMT_TA_CODE
5308
5309 if (NOTBI (CPU (h_icc_v))) {
5310   {
5311     USI opval = sparc32_sw_trap (current_cpu, pc, GET_H_GR (f_rs1), GET_H_GR (f_rs2));
5312 ;
5313     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
5314     written |= (1 << 4);
5315     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
5316   }
5317 }
5318
5319   abuf->written = written;
5320   SEM_BRANCH_FINI (vpc, 0|(1<<(CGEN_INSN_TRAP-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_COND_CTI-CGEN_ATTR_BOOL_OFFSET)));
5321   return status;
5322 }
5323
5324 /* tvc-imm: tvc $rs1,$simm13 */
5325
5326 SEM_STATUS
5327 SEM_FN_NAME (sparc32,tvc_imm) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
5328 {
5329   SEM_STATUS status = 0;
5330   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5331   int UNUSED written = 0;
5332   IADDR UNUSED pc = GET_H_PC ();
5333   SEM_BRANCH_INIT
5334   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
5335   EXTRACT_IFMT_TA_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-fmt2-cond f-a f-op */
5336   EXTRACT_IFMT_TA_IMM_CODE
5337
5338 if (NOTBI (CPU (h_icc_v))) {
5339   {
5340     USI opval = sparc32_sw_trap (current_cpu, pc, GET_H_GR (f_rs1), f_simm13);
5341 ;
5342     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
5343     written |= (1 << 4);
5344     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
5345   }
5346 }
5347
5348   abuf->written = written;
5349   SEM_BRANCH_FINI (vpc, 0|(1<<(CGEN_INSN_TRAP-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_COND_CTI-CGEN_ATTR_BOOL_OFFSET)));
5350   return status;
5351 }
5352
5353 /* bvs: bvs$a $disp22 */
5354
5355 SEM_STATUS
5356 SEM_FN_NAME (sparc32,bvs) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
5357 {
5358   SEM_STATUS status = 0;
5359   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5360   int UNUSED written = 0;
5361   IADDR UNUSED pc = GET_H_PC ();
5362   SEM_BRANCH_INIT
5363   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
5364   EXTRACT_IFMT_BA_VARS /* f-disp22 f-op2 f-fmt2-cond f-a f-op */
5365       IADDR i_disp22;
5366   EXTRACT_IFMT_BA_CODE
5367   i_disp22 = f_disp22;
5368
5369 do {
5370 if (CPU (h_icc_v)) {
5371   {
5372     USI opval = i_disp22;
5373     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
5374     written |= (1 << 3);
5375     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
5376   }
5377 } else {
5378 SEM_ANNUL_INSN (current_cpu, pc, f_a);
5379 }
5380 } while (0);
5381
5382   abuf->written = written;
5383   SEM_BRANCH_FINI (vpc, 0|(1<<(CGEN_INSN_V9_DEPRECATED-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_ANNUL-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_COND_CTI-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_DELAY_SLOT-CGEN_ATTR_BOOL_OFFSET)));
5384   return status;
5385 }
5386
5387 /* tvs: tvs $rs1,$rs2 */
5388
5389 SEM_STATUS
5390 SEM_FN_NAME (sparc32,tvs) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
5391 {
5392   SEM_STATUS status = 0;
5393   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5394   int UNUSED written = 0;
5395   IADDR UNUSED pc = GET_H_PC ();
5396   SEM_BRANCH_INIT
5397   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
5398   EXTRACT_IFMT_TA_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-fmt2-cond f-a f-op */
5399   EXTRACT_IFMT_TA_CODE
5400
5401 if (CPU (h_icc_v)) {
5402   {
5403     USI opval = sparc32_sw_trap (current_cpu, pc, GET_H_GR (f_rs1), GET_H_GR (f_rs2));
5404 ;
5405     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
5406     written |= (1 << 4);
5407     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
5408   }
5409 }
5410
5411   abuf->written = written;
5412   SEM_BRANCH_FINI (vpc, 0|(1<<(CGEN_INSN_TRAP-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_COND_CTI-CGEN_ATTR_BOOL_OFFSET)));
5413   return status;
5414 }
5415
5416 /* tvs-imm: tvs $rs1,$simm13 */
5417
5418 SEM_STATUS
5419 SEM_FN_NAME (sparc32,tvs_imm) (SIM_CPU *current_cpu, SEM_ARG sem_arg, CGEN_INSN_INT insn)
5420 {
5421   SEM_STATUS status = 0;
5422   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5423   int UNUSED written = 0;
5424   IADDR UNUSED pc = GET_H_PC ();
5425   SEM_BRANCH_INIT
5426   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
5427   EXTRACT_IFMT_TA_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-fmt2-cond f-a f-op */
5428   EXTRACT_IFMT_TA_IMM_CODE
5429
5430 if (CPU (h_icc_v)) {
5431   {
5432     USI opval = sparc32_sw_trap (current_cpu, pc, GET_H_GR (f_rs1), f_simm13);
5433 ;
5434     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
5435     written |= (1 << 4);
5436     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
5437   }
5438 }
5439
5440   abuf->written = written;
5441   SEM_BRANCH_FINI (vpc, 0|(1<<(CGEN_INSN_TRAP-CGEN_ATTR_BOOL_OFFSET))|(1<<(CGEN_INSN_COND_CTI-CGEN_ATTR_BOOL_OFFSET)));
5442   return status;
5443 }
5444