sim/testsuite/sim/bfin/c_dsp32alu_rh_m.s

   1 //Original:/testcases/core/c_dsp32alu_rh_m/c_dsp32alu_rh_m.dsp
   2 // Spec Reference: dsp32alu dreg (half)
   3 # mach: bfin
   4
   5 .include "testutils.inc"
   6         start
   7
   8
   9
  10
  11 imm32 r0, 0x89678911;
  12 imm32 r1, 0x2189ab1d;
  13 imm32 r2, 0x34145515;
  14 imm32 r3, 0x46617717;
  15 imm32 r4, 0x5678191b;
  16 imm32 r5, 0x6789a11d;
  17 imm32 r6, 0x74445515;
  18 imm32 r7, 0x86667771;
  19 R0.H = R0.L - R0.L (NS);
  20 R1.H = R0.L - R1.H (NS);
  21 R2.H = R0.H - R2.L (NS);
  22 R3.H = R0.H - R3.H (NS);
  23 R4.H = R0.L - R4.L (NS);
  24 R5.H = R0.L - R5.H (NS);
  25 R6.H = R0.H - R6.L (NS);
  26 R7.H = R0.H - R7.H (NS);
  27 CHECKREG r4, 0x6FF6191B;
  28 CHECKREG r5, 0x2188A11D;
  29 CHECKREG r6, 0xAAEB5515;
  30 CHECKREG r7, 0x799A7771;
  31 CHECKREG r4, 0x6FF6191B;
  32 CHECKREG r5, 0x2188A11D;
  33 CHECKREG r6, 0xAAEB5515;
  34 CHECKREG r7, 0x799A7771;
  35
  36 imm32 r0, 0x25678911;
  37 imm32 r1, 0x2789ab1d;
  38 imm32 r2, 0x38445515;
  39 imm32 r3, 0x468a7717;
  40 imm32 r4, 0x5678e91b;
  41 imm32 r5, 0x6789af1d;
  42 imm32 r6, 0x744455f5;
  43 imm32 r7, 0x8666777f;
  44 R0.H = R1.L - R0.L (NS);
  45 R1.H = R1.L - R1.H (NS);
  46 R2.H = R1.H - R2.L (NS);
  47 R3.H = R1.H - R3.H (NS);
  48 R4.H = R1.L - R4.L (NS);
  49 R5.H = R1.L - R5.H (NS);
  50 R6.H = R1.H - R6.L (NS);
  51 R7.H = R1.H - R7.H (NS);
  52 CHECKREG r4, 0xC202E91B;
  53 CHECKREG r5, 0x4394AF1D;
  54 CHECKREG r6, 0x2D9F55F5;
  55 CHECKREG r7, 0xFD2E777F;
  56 CHECKREG r4, 0xC202E91B;
  57 CHECKREG r5, 0x4394AF1D;
  58 CHECKREG r6, 0x2D9F55F5;
  59 CHECKREG r7, 0xFD2E777F;
  60
  61 imm32 r0, 0x78678911;
  62 imm32 r1, 0x2789ab1d;
  63 imm32 r2, 0x34885515;
  64 imm32 r3, 0x466aa717;
  65 imm32 r4, 0x5678891b;
  66 imm32 r5, 0x6789aa1d;
  67 imm32 r6, 0x74445aa5;
  68 imm32 r7, 0x866677a7;
  69 R0.H = R2.L - R0.L (NS);
  70 R1.H = R2.L - R1.H (NS);
  71 R2.H = R2.H - R2.L (NS);
  72 R3.H = R2.H - R3.H (NS);
  73 R4.H = R2.L - R4.L (NS);
  74 R5.H = R2.L - R5.H (NS);
  75 R6.H = R2.H - R6.L (NS);
  76 R7.H = R2.H - R7.H (NS);
  77 CHECKREG r4, 0xCBFA891B;
  78 CHECKREG r5, 0xED8CAA1D;
  79 CHECKREG r6, 0x84CE5AA5;
  80 CHECKREG r7, 0x590D77A7;
  81 CHECKREG r4, 0xCBFA891B;
  82 CHECKREG r5, 0xED8CAA1D;
  83 CHECKREG r6, 0x84CE5AA5;
  84 CHECKREG r7, 0x590D77A7;
  85
  86 imm32 r0, 0xb5678911;
  87 imm32 r1, 0xb789ab1d;
  88 imm32 r2, 0x3b445515;
  89 imm32 r3, 0x46b67717;
  90 imm32 r4, 0x567b891b;
  91 imm32 r5, 0x6789bb1d;
  92 imm32 r6, 0x74445b15;
  93 imm32 r7, 0x866677b7;
  94 R0.H = R3.L - R0.L (NS);
  95 R1.H = R3.L - R1.H (NS);
  96 R2.H = R3.H - R2.L (NS);
  97 R3.H = R3.H - R3.H (NS);
  98 R4.H = R3.L - R4.L (NS);
  99 R5.H = R3.L - R5.H (NS);
 100 R6.H = R3.H - R6.L (NS);
 101 R7.H = R3.H - R7.H (NS);
 102 CHECKREG r4, 0xEDFC891B;
 103 CHECKREG r5, 0x0F8EBB1D;
 104 CHECKREG r6, 0xA4EB5B15;
 105 CHECKREG r7, 0x799A77B7;
 106 CHECKREG r4, 0xEDFC891B;
 107 CHECKREG r5, 0x0F8EBB1D;
 108 CHECKREG r6, 0xA4EB5B15;
 109 CHECKREG r7, 0x799A77B7;
 110
 111 imm32 r0, 0x15678911;
 112 imm32 r1, 0x2789ab1d;
 113 imm32 r2, 0x34445515;
 114 imm32 r3, 0x46667717;
 115 imm32 r4, 0x5678891b;
 116 imm32 r5, 0x6789ab1d;
 117 imm32 r6, 0x74445515;
 118 imm32 r7, 0x86667777;
 119 R0.H = R4.L - R0.L (NS);
 120 R1.H = R4.L - R1.H (NS);
 121 R2.H = R4.H - R2.L (NS);
 122 R3.H = R4.H - R3.H (NS);
 123 R4.H = R4.L - R4.L (NS);
 124 R5.H = R4.L - R5.H (NS);
 125 R6.H = R4.H - R6.L (NS);
 126 R7.H = R4.H - R7.H (NS);
 127 CHECKREG r4, 0x0000891B;
 128 CHECKREG r5, 0x2192AB1D;
 129 CHECKREG r6, 0xAAEB5515;
 130 CHECKREG r7, 0x799A7777;
 131 CHECKREG r4, 0x0000891B;
 132 CHECKREG r5, 0x2192AB1D;
 133 CHECKREG r6, 0xAAEB5515;
 134 CHECKREG r7, 0x799A7777;
 135
 136 imm32 r0, 0xcc678911;
 137 imm32 r1, 0xc789ab1d;
 138 imm32 r2, 0x3c445515;
 139 imm32 r3, 0x46c67717;
 140 imm32 r4, 0x567c891b;
 141 imm32 r5, 0x6789cb1d;
 142 imm32 r6, 0x74445c15;
 143 imm32 r7, 0x866677c7;
 144 R0.H = R5.L - R0.L (NS);
 145 R1.H = R5.L - R1.H (NS);
 146 R2.H = R5.H - R2.L (NS);
 147 R3.H = R5.H - R3.H (NS);
 148 R4.H = R5.L - R4.L (NS);
 149 R5.H = R5.L - R5.H (NS);
 150 R6.H = R5.H - R6.L (NS);
 151 R7.H = R5.H - R7.H (NS);
 152 CHECKREG r4, 0x4202891B;
 153 CHECKREG r5, 0x6394CB1D;
 154 CHECKREG r6, 0x077F5C15;
 155 CHECKREG r7, 0xDD2E77C7;
 156 CHECKREG r4, 0x4202891B;
 157 CHECKREG r5, 0x6394CB1D;
 158 CHECKREG r6, 0x077F5C15;
 159 CHECKREG r7, 0xDD2E77C7;
 160
 161 imm32 r0, 0x15678911;
 162 imm32 r1, 0x2789ab1d;
 163 imm32 r2, 0x34445515;
 164 imm32 r3, 0x46667717;
 165 imm32 r4, 0x5678891b;
 166 imm32 r5, 0x6789ab1d;
 167 imm32 r6, 0x74445515;
 168 imm32 r7, 0x86667777;
 169 R0.H = R6.L - R0.L (NS);
 170 R1.H = R6.L - R1.H (NS);
 171 R2.H = R6.H - R2.L (NS);
 172 R3.H = R6.H - R3.H (NS);
 173 R4.H = R6.L - R4.L (NS);
 174 R5.H = R6.L - R5.H (NS);
 175 R6.H = R6.H - R6.L (NS);
 176 R7.H = R6.H - R7.H (NS);
 177 CHECKREG r4, 0xCBFA891B;
 178 CHECKREG r5, 0xED8CAB1D;
 179 CHECKREG r6, 0x1F2F5515;
 180 CHECKREG r7, 0x98C97777;
 181 CHECKREG r4, 0xCBFA891B;
 182 CHECKREG r5, 0xED8CAB1D;
 183 CHECKREG r6, 0x1F2F5515;
 184 CHECKREG r7, 0x98C97777;
 185
 186 imm32 r0, 0xd5678911;
 187 imm32 r1, 0x2e89ab1d;
 188 imm32 r2, 0x34445515;
 189 imm32 r3, 0x46667e17;
 190 imm32 r4, 0x56e8891b;
 191 imm32 r5, 0x678eab1d;
 192 imm32 r6, 0x7444e515;
 193 imm32 r7, 0x86667e77;
 194 R0.H = R7.L - R0.L (NS);
 195 R1.H = R7.L - R1.H (NS);
 196 R2.H = R7.H - R2.L (NS);
 197 R3.H = R7.H - R3.H (NS);
 198 R4.H = R7.L - R4.L (NS);
 199 R5.H = R7.L - R5.H (NS);
 200 R6.H = R7.H - R6.L (NS);
 201 R7.H = R7.H - R7.H (NS);
 202 CHECKREG r4, 0xF55C891B;
 203 CHECKREG r5, 0x16E9AB1D;
 204 CHECKREG r6, 0xA151E515;
 205 CHECKREG r7, 0x00007E77;
 206 CHECKREG r4, 0xF55C891B;
 207 CHECKREG r5, 0x16E9AB1D;
 208 CHECKREG r6, 0xA151E515;
 209 CHECKREG r7, 0x00007E77;
 210
 211 imm32 r0, 0xff678911;
 212 imm32 r1, 0x2789ab1d;
 213 imm32 r2, 0x34ff5515;
 214 imm32 r3, 0x4666f717;
 215 imm32 r4, 0x567f891b;
 216 imm32 r5, 0x6789fb1d;
 217 imm32 r6, 0x74445f15;
 218 imm32 r7, 0x866677f7;
 219 R6.H = R2.L - R3.L (S);
 220 R1.H = R4.L - R5.H (S);
 221 R5.H = R7.H - R2.L (S);
 222 R3.H = R0.H - R0.H (S);
 223 R0.H = R3.L - R4.L (S);
 224 R2.H = R5.L - R7.H (S);
 225 R7.H = R6.H - R7.L (S);
 226 R4.H = R1.H - R6.H (S);
 227 CHECKREG r4, 0x8000891B;
 228 CHECKREG r5, 0x8000FB1D;
 229 CHECKREG r6, 0x5DFE5F15;
 230 CHECKREG r7, 0xE60777F7;
 231 CHECKREG r4, 0x8000891B;
 232 CHECKREG r5, 0x8000FB1D;
 233 CHECKREG r6, 0x5DFE5F15;
 234 CHECKREG r7, 0xE60777F7;
 235
 236 imm32 r0, 0x15678911;
 237 imm32 r1, 0x2789ab1d;
 238 imm32 r2, 0x34445515;
 239 imm32 r3, 0x46667717;
 240 imm32 r4, 0x5678891b;
 241 imm32 r5, 0x6789ab1d;
 242 imm32 r6, 0x74445515;
 243 imm32 r7, 0x86667777;
 244 R3.H = R4.L - R0.L (S);
 245 R1.H = R6.L - R3.H (S);
 246 R4.H = R3.H - R2.L (S);
 247 R6.H = R7.H - R1.H (S);
 248 R2.H = R5.L - R4.L (S);
 249 R7.H = R2.L - R7.H (S);
 250 R0.H = R1.H - R6.L (S);
 251 R5.H = R0.H - R5.H (S);
 252 CHECKREG r4, 0xAAF5891B;
 253 CHECKREG r5, 0x986DAB1D;
 254 CHECKREG r6, 0x80005515;
 255 CHECKREG r7, 0x7FFF7777;
 256 CHECKREG r4, 0xAAF5891B;
 257 CHECKREG r5, 0x986DAB1D;
 258 CHECKREG r6, 0x80005515;
 259 CHECKREG r7, 0x7FFF7777;
 260
 261
 262
 263 pass