sim/testsuite/sim/bfin/c_dsp32alu_rl_m.s

   1 //Original:/testcases/core/c_dsp32alu_rl_m/c_dsp32alu_rl_m.dsp
   2 // Spec Reference: dsp32alu dreg (half)
   3 # mach: bfin
   4
   5 .include "testutils.inc"
   6         start
   7
   8
   9
  10
  11 imm32 r0, 0x55678911;
  12 imm32 r1, 0x2759ab1d;
  13 imm32 r2, 0x34455515;
  14 imm32 r3, 0x46665717;
  15 imm32 r4, 0x5678891b;
  16 imm32 r5, 0x6789a51d;
  17 imm32 r6, 0x74445515;
  18 imm32 r7, 0x86667777;
  19 R0.L = R0.L - R0.L (NS);
  20 R1.L = R0.L - R1.H (NS);
  21 R2.L = R0.H - R2.L (NS);
  22 R3.L = R0.H - R3.H (NS);
  23 R4.L = R0.L - R4.L (NS);
  24 R5.L = R0.L - R5.H (NS);
  25 R6.L = R0.H - R6.L (NS);
  26 R7.L = R0.H - R7.H (NS);
  27 CHECKREG r4, 0x567876E5;
  28 CHECKREG r5, 0x67899877;
  29 CHECKREG r6, 0x74440052;
  30 CHECKREG r7, 0x8666CF01;
  31 CHECKREG r4, 0x567876E5;
  32 CHECKREG r5, 0x67899877;
  33 CHECKREG r6, 0x74440052;
  34 CHECKREG r7, 0x8666CF01;
  35
  36 imm32 r0, 0x44678911;
  37 imm32 r1, 0x2789ab1d;
  38 imm32 r2, 0x344d5515;
  39 imm32 r3, 0x4666d717;
  40 imm32 r4, 0x5678891b;
  41 imm32 r5, 0x6789cc1d;
  42 imm32 r6, 0x74445c15;
  43 imm32 r7, 0x86667c77;
  44 R0.L = R1.L - R0.L (NS);
  45 R1.L = R1.L - R1.H (NS);
  46 R2.L = R1.H - R2.L (NS);
  47 R3.L = R1.H - R3.H (NS);
  48 R4.L = R1.L - R4.L (NS);
  49 R5.L = R1.L - R5.H (NS);
  50 R6.L = R1.H - R6.L (NS);
  51 R7.L = R1.H - R7.H (NS);
  52 CHECKREG r4, 0x5678FA79;
  53 CHECKREG r5, 0x67891C0B;
  54 CHECKREG r6, 0x7444CB74;
  55 CHECKREG r7, 0x8666A123;
  56 CHECKREG r4, 0x5678FA79;
  57 CHECKREG r5, 0x67891C0B;
  58 CHECKREG r6, 0x7444CB74;
  59 CHECKREG r7, 0x8666A123;
  60
  61 imm32 r0, 0xcc678911;
  62 imm32 r1, 0x2789ab1d;
  63 imm32 r2, 0x34c45515;
  64 imm32 r3, 0x466c7717;
  65 imm32 r4, 0x5678c91b;
  66 imm32 r5, 0x6789ac1d;
  67 imm32 r6, 0x74445515;
  68 imm32 r7, 0x866677c7;
  69 R0.L = R2.L - R0.L (NS);
  70 R1.L = R2.L - R1.H (NS);
  71 R2.L = R2.H - R2.L (NS);
  72 R3.L = R2.H - R3.H (NS);
  73 R4.L = R2.L - R4.L (NS);
  74 R5.L = R2.L - R5.H (NS);
  75 R6.L = R2.H - R6.L (NS);
  76 R7.L = R2.H - R7.H (NS);
  77 CHECKREG r4, 0x56781694;
  78 CHECKREG r5, 0x67897826;
  79 CHECKREG r6, 0x7444DFAF;
  80 CHECKREG r7, 0x8666AE5E;
  81 CHECKREG r4, 0x56781694;
  82 CHECKREG r5, 0x67897826;
  83 CHECKREG r6, 0x7444DFAF;
  84 CHECKREG r7, 0x8666AE5E;
  85
  86 imm32 r0, 0x15678911;
  87 imm32 r1, 0x2789ab1d;
  88 imm32 r2, 0x34445515;
  89 imm32 r3, 0x46667717;
  90 imm32 r4, 0x5678891b;
  91 imm32 r5, 0x6789ab1d;
  92 imm32 r6, 0x74445515;
  93 imm32 r7, 0x86667777;
  94 R0.L = R3.L - R0.L (NS);
  95 R1.L = R3.L - R1.H (NS);
  96 R2.L = R3.H - R2.L (NS);
  97 R3.L = R3.H - R3.H (NS);
  98 R4.L = R3.L - R4.L (NS);
  99 R5.L = R3.L - R5.H (NS);
 100 R6.L = R3.H - R6.L (NS);
 101 R7.L = R3.H - R7.H (NS);
 102 CHECKREG r4, 0x567876E5;
 103 CHECKREG r5, 0x67899877;
 104 CHECKREG r6, 0x7444F151;
 105 CHECKREG r7, 0x8666C000;
 106 CHECKREG r4, 0x567876E5;
 107 CHECKREG r5, 0x67899877;
 108 CHECKREG r6, 0x7444F151;
 109 CHECKREG r7, 0x8666C000;
 110
 111 imm32 r0, 0xe5678911;
 112 imm32 r1, 0x2e89ab1d;
 113 imm32 r2, 0x34e45515;
 114 imm32 r3, 0x466e7717;
 115 imm32 r4, 0x5678e91b;
 116 imm32 r5, 0x6789ae1d;
 117 imm32 r6, 0x744455e5;
 118 imm32 r7, 0x8666777e;
 119 R0.L = R4.L - R0.L (NS);
 120 R1.L = R4.L - R1.H (NS);
 121 R2.L = R4.H - R2.L (NS);
 122 R3.L = R4.H - R3.H (NS);
 123 R4.L = R4.L - R4.L (NS);
 124 R5.L = R4.L - R5.H (NS);
 125 R6.L = R4.H - R6.L (NS);
 126 R7.L = R4.H - R7.H (NS);
 127 CHECKREG r4, 0x56780000;
 128 CHECKREG r5, 0x67899877;
 129 CHECKREG r6, 0x74440093;
 130 CHECKREG r7, 0x8666D012;
 131 CHECKREG r4, 0x56780000;
 132 CHECKREG r5, 0x67899877;
 133 CHECKREG r6, 0x74440093;
 134 CHECKREG r7, 0x8666D012;
 135
 136 imm32 r0, 0xdd678911;
 137 imm32 r1, 0xd789ab1d;
 138 imm32 r2, 0x3d445515;
 139 imm32 r3, 0x46d67717;
 140 imm32 r4, 0x567d891b;
 141 imm32 r5, 0x6789db1d;
 142 imm32 r6, 0x74445d15;
 143 imm32 r7, 0x866677d7;
 144 R0.L = R5.L - R0.L (NS);
 145 R1.L = R5.L - R1.H (NS);
 146 R2.L = R5.H - R2.L (NS);
 147 R3.L = R5.H - R3.H (NS);
 148 R4.L = R5.L - R4.L (NS);
 149 R5.L = R5.L - R5.H (NS);
 150 R6.L = R5.H - R6.L (NS);
 151 R7.L = R5.H - R7.H (NS);
 152 CHECKREG r4, 0x567D5202;
 153 CHECKREG r5, 0x67897394;
 154 CHECKREG r6, 0x74440A74;
 155 CHECKREG r7, 0x8666E123;
 156 CHECKREG r4, 0x567D5202;
 157 CHECKREG r5, 0x67897394;
 158 CHECKREG r6, 0x74440A74;
 159 CHECKREG r7, 0x8666E123;
 160
 161 imm32 r0, 0x85678911;
 162 imm32 r1, 0x2789ab1d;
 163 imm32 r2, 0x38445515;
 164 imm32 r3, 0x46667717;
 165 imm32 r4, 0x568a891b;
 166 imm32 r5, 0x67a9ab1d;
 167 imm32 r6, 0x744a5515;
 168 imm32 r7, 0x8666aa77;
 169 R0.L = R6.L - R0.L (NS);
 170 R1.L = R6.L - R1.H (NS);
 171 R2.L = R6.H - R2.L (NS);
 172 R3.L = R6.H - R3.H (NS);
 173 R4.L = R6.L - R4.L (NS);
 174 R5.L = R6.L - R5.H (NS);
 175 R6.L = R6.H - R6.L (NS);
 176 R7.L = R6.H - R7.H (NS);
 177 CHECKREG r4, 0x568ACBFA;
 178 CHECKREG r5, 0x67A9ED6C;
 179 CHECKREG r6, 0x744A1F35;
 180 CHECKREG r7, 0x8666EDE4;
 181 CHECKREG r4, 0x568ACBFA;
 182 CHECKREG r5, 0x67A9ED6C;
 183 CHECKREG r6, 0x744A1F35;
 184 CHECKREG r7, 0x8666EDE4;
 185
 186 imm32 r0, 0x35678911;
 187 imm32 r1, 0x2389ab1d;
 188 imm32 r2, 0x34845515;
 189 imm32 r3, 0x466a7717;
 190 imm32 r4, 0x5678a91b;
 191 imm32 r5, 0x6789ab1d;
 192 imm32 r6, 0x74445b15;
 193 imm32 r7, 0x866677b7;
 194 R0.L = R7.L - R0.L (NS);
 195 R1.L = R7.L - R1.H (NS);
 196 R2.L = R7.H - R2.L (NS);
 197 R3.L = R7.H - R3.H (NS);
 198 R4.L = R7.L - R4.L (NS);
 199 R5.L = R7.L - R5.H (NS);
 200 R6.L = R7.H - R6.L (NS);
 201 R7.L = R7.H - R7.H (NS);
 202 CHECKREG r4, 0x5678CE9C;
 203 CHECKREG r5, 0x6789102E;
 204 CHECKREG r6, 0x74442B51;
 205 CHECKREG r7, 0x86660000;
 206 CHECKREG r4, 0x5678CE9C;
 207 CHECKREG r5, 0x6789102E;
 208 CHECKREG r6, 0x74442B51;
 209 CHECKREG r7, 0x86660000;
 210
 211 imm32 r0, 0x15678911;
 212 imm32 r1, 0x2789ab1d;
 213 imm32 r2, 0x34445515;
 214 imm32 r3, 0x46667717;
 215 imm32 r4, 0x5678891b;
 216 imm32 r5, 0x6789ab1d;
 217 imm32 r6, 0x74445515;
 218 imm32 r7, 0x86667777;
 219 R6.L = R2.L - R3.L (S);
 220 R1.L = R4.L - R5.H (S);
 221 R5.L = R7.H - R2.L (S);
 222 R3.L = R0.H - R0.H (S);
 223 R0.L = R3.L - R4.L (S);
 224 R2.L = R5.L - R7.H (S);
 225 R7.L = R6.H - R7.L (S);
 226 R4.L = R1.H - R6.H (S);
 227 CHECKREG r4, 0x5678B345;
 228 CHECKREG r5, 0x67898000;
 229 CHECKREG r6, 0x7444DDFE;
 230 CHECKREG r7, 0x8666FCCD;
 231 CHECKREG r4, 0x5678B345;
 232 CHECKREG r5, 0x67898000;
 233 CHECKREG r6, 0x7444DDFE;
 234 CHECKREG r7, 0x8666FCCD;
 235
 236 imm32 r0, 0x1d678911;
 237 imm32 r1, 0x27d9ab1d;
 238 imm32 r2, 0x34445515;
 239 imm32 r3, 0x466d7717;
 240 imm32 r4, 0x5678891b;
 241 imm32 r5, 0x6789dd1d;
 242 imm32 r6, 0x74445515;
 243 imm32 r7, 0x866677d7;
 244 R3.L = R4.L - R0.L (S);
 245 R1.L = R6.L - R3.H (S);
 246 R4.L = R3.H - R2.L (S);
 247 R6.L = R7.H - R1.H (S);
 248 R2.L = R5.L - R4.L (S);
 249 R7.L = R2.L - R7.H (S);
 250 R0.L = R1.H - R6.L (S);
 251 R5.L = R0.H - R5.H (S);
 252 CHECKREG r4, 0x5678F158;
 253 CHECKREG r5, 0x6789B5DE;
 254 CHECKREG r6, 0x74448000;
 255 CHECKREG r7, 0x8666655F;
 256 CHECKREG r4, 0x5678F158;
 257 CHECKREG r5, 0x6789B5DE;
 258 CHECKREG r6, 0x74448000;
 259 CHECKREG r7, 0x8666655F;
 260
 261
 262
 263 pass