sim/testsuite/sim/bfin/c_dsp32mac_pair_a1_is.s

   1 //Original:/proj/frio/dv/testcases/core/c_dsp32mac_pair_a1_is/c_dsp32mac_pair_a1_is.dsp
   2 // Spec Reference: dsp32mac pair a1  IS
   3 # mach: bfin
   4
   5 .include "testutils.inc"
   6         start
   7
   8         A1 = A0 = 0;
   9
  10 // The result accumulated in A1      , and stored to a reg half
  11         imm32 r0, 0x93545abd;
  12         imm32 r1, 0x89bcfec7;
  13         imm32 r2, 0xa8945679;
  14         imm32 r3, 0x00890007;
  15         imm32 r4, 0xefb89569;
  16         imm32 r5, 0x1235890b;
  17         imm32 r6, 0x000c089d;
  18         imm32 r7, 0x678e0089;
  19         R7 = ( A1 += R5.L * R0.L ), A0 = R5.L * R0.L (ISS2);
  20         P1 = A1.w;
  21         R1 = ( A1 = R4.L * R3.L ), A0 = R4.H * R3.L (ISS2);
  22         P2 = A1.w;
  23         R3 = ( A1 = R7.L * R2.L ), A0 += R7.H * R2.H (ISS2);
  24         P3 = A1.w;
  25         R5 = ( A1 += R6.L * R1.L ), A0 += R6.L * R1.H (ISS2);
  26         P4 = A1.w;
  27         CHECKREG r0, 0x93545ABD;
  28         CHECKREG r1, 0xFFFA2BBE;
  29         CHECKREG r2, 0xA8945679;
  30         CHECKREG r3, 0x0F06AE9C;
  31         CHECKREG r4, 0xEFB89569;
  32         CHECKREG r5, 0x11F835A8;
  33         CHECKREG r6, 0x000C089D;
  34         CHECKREG r7, 0xABAC163E;
  35         CHECKREG p1, 0xD5D60B1F;
  36         CHECKREG p2, 0xFFFD15DF;
  37         CHECKREG p3, 0x0783574E;
  38         CHECKREG p4, 0x08FC1AD4;
  39
  40         imm32 r0, 0x98464abd;
  41         imm32 r1, 0xa1b5f4c7;
  42         imm32 r2, 0xa1146649;
  43         imm32 r3, 0x00010805;
  44         imm32 r4, 0xefbc1599;
  45         imm32 r5, 0x12350100;
  46         imm32 r6, 0x200c001d;
  47         imm32 r7, 0x628e0001;
  48         R5 = ( A1 += R1.L * R0.H ), A0 = R1.L * R0.L (ISS2);
  49         P1 = A1.w;
  50         R1 = ( A1 -= R5.L * R3.H ), A0 = R5.H * R3.L (ISS2);
  51         P2 = A1.w;
  52         R3 = ( A1 -= R4.L * R2.H ), A0 += R4.H * R2.H (ISS2);
  53         P3 = A1.w;
  54         R1 = ( A1 += R6.L * R7.H ), A0 += R6.L * R7.H (ISS2);
  55         P4 = A1.w;
  56         CHECKREG r0, 0x98464ABD;
  57         CHECKREG r1, 0x2B2A1FC8;
  58         CHECKREG r2, 0xA1146649;
  59         CHECKREG r3, 0x2B13CB9C;
  60         CHECKREG r4, 0xEFBC1599;
  61         CHECKREG r5, 0x1B10627C;
  62         CHECKREG r6, 0x200C001D;
  63         CHECKREG r7, 0x628E0001;
  64         CHECKREG p1, 0x0D88313E;
  65         CHECKREG p2, 0x0D87CEC2;
  66         CHECKREG p3, 0x1589E5CE;
  67         CHECKREG p4, 0x15950FE4;
  68
  69         imm32 r0, 0x713a459d;
  70         imm32 r1, 0xabd6aec7;
  71         imm32 r2, 0x7a145a79;
  72         imm32 r3, 0x08a100a7;
  73         imm32 r4, 0xef9a156a;
  74         imm32 r5, 0x1225a10b;
  75         imm32 r6, 0x0003401d;
  76         imm32 r7, 0x678e0a61;
  77         R5 = ( A1 += R1.H * R0.L ), A0 -= R1.L * R0.L (ISS2);
  78         P1 = A1.w;
  79         R7 = ( A1 -= R2.H * R3.L ), A0 -= R2.H * R3.L (ISS2);
  80         P2 = A1.w;
  81         R1 = ( A1 = R7.H * R5.L ), A0 += R7.H * R5.H (ISS2);
  82         P3 = A1.w;
  83         R5 = ( A1 += R6.H * R4.L ), A0 += R6.L * R4.H (ISS2);
  84         P4 = A1.w;
  85         CHECKREG r0, 0x713A459D;
  86         CHECKREG r1, 0xFE604820;
  87         CHECKREG r2, 0x7A145A79;
  88         CHECKREG r3, 0x08A100A7;
  89         CHECKREG r4, 0xEF9A156A;
  90         CHECKREG r5, 0xFE60C89C;
  91         CHECKREG r6, 0x0003401D;
  92         CHECKREG r7, 0xFCC4FA2C;
  93         CHECKREG p1, 0xFEB22022;
  94         CHECKREG p2, 0xFE627D16;
  95         CHECKREG p3, 0xFF302410;
  96         CHECKREG p4, 0xFF30644E;
  97
  98         imm32 r0, 0x773489bd;
  99         imm32 r1, 0x917cfec7;
 100         imm32 r2, 0xa9177679;
 101         imm32 r3, 0xd0910777;
 102         imm32 r4, 0xedb91579;
 103         imm32 r5, 0xd235910b;
 104         imm32 r6, 0x0d077999;
 105         imm32 r7, 0x677e0709;
 106         R1 = ( A1 += R5.H * R3.H ), A0 = R5.L * R3.L (ISS2);
 107         P1 = A1.w;
 108         R3 = ( A1 = R2.H * R1.H ), A0 = R2.H * R1.L (ISS2);
 109         P2 = A1.w;
 110         R5 = ( A1 -= R7.H * R0.H ), A0 += R7.H * R0.H (ISS2);
 111         P3 = A1.w;
 112         R7 = ( A1 += R4.H * R6.H ), A0 += R4.L * R6.H (ISS2);
 113         P4 = A1.w;
 114         CHECKREG r0, 0x773489BD;
 115         CHECKREG r1, 0x0F5908A6;
 116         CHECKREG r2, 0xA9177679;
 117         CHECKREG r3, 0xF59443FE;
 118         CHECKREG r4, 0xEDB91579;
 119         CHECKREG r5, 0x953314CE;
 120         CHECKREG r6, 0x0D077999;
 121         CHECKREG r7, 0x9356DEEC;
 122         CHECKREG p1, 0x07AC8453;
 123         CHECKREG p2, 0xFACA21FF;
 124         CHECKREG p3, 0xCA998A67;
 125         CHECKREG p4, 0xC9AB6F76;
 126
 127         imm32 r0, 0x83547abd;
 128         imm32 r1, 0x88bc8ec7;
 129         imm32 r2, 0xa8895679;
 130         imm32 r3, 0x00080007;
 131         imm32 r4, 0xe6b86569;
 132         imm32 r5, 0x1A35860b;
 133         imm32 r6, 0x000c896d;
 134         imm32 r7, 0x67Be0096;
 135         R7 = ( A1 += R1.L * R0.L ) (ISS2);
 136         P1 = A1.w;
 137         R1 = ( A1 = R2.H * R3.L ) (ISS2);
 138         P2 = A1.w;
 139         R3 = ( A1 -= R7.L * R4.H ) (ISS2);
 140         P3 = A1.w;
 141         R5 = ( A1 += R6.H * R5.H ) (ISS2);
 142         P4 = A1.w;
 143         CHECKREG r0, 0x83547ABD;
 144         CHECKREG r1, 0xFFFB377E;
 145         CHECKREG r2, 0xA8895679;
 146         CHECKREG r3, 0xFFFB377E;
 147         CHECKREG r4, 0xE6B86569;
 148         CHECKREG r5, 0xFFFDAC76;
 149         CHECKREG r6, 0x000C896D;
 150         CHECKREG r7, 0x80000000;
 151         CHECKREG p1, 0x9362AE61;
 152         CHECKREG p2, 0xFFFD9BBF;
 153         CHECKREG p3, 0xFFFD9BBF;
 154         CHECKREG p4, 0xFFFED63B;
 155
 156         imm32 r0, 0x9aa64abd;
 157         imm32 r1, 0xa1baf4c7;
 158         imm32 r2, 0xb114a649;
 159         imm32 r3, 0x0b010005;
 160         imm32 r4, 0xefbcdb69;
 161         imm32 r5, 0x123501bb;
 162         imm32 r6, 0x000c0d1b;
 163         imm32 r7, 0x678e0d01;
 164         R5 = ( A1 += R1.L * R0.H ) (M), A0 = R1.L * R0.L (ISS2);
 165         P1 = A1.w;
 166         R1 = ( A1 -= R2.L * R3.H ) (M), A0 = R2.H * R3.L (ISS2);
 167         P2 = A1.w;
 168         R3 = ( A1 = R4.L * R5.H ) (M), A0 += R4.H * R5.H (ISS2);
 169         P3 = A1.w;
 170         R1 = ( A1 += R6.L * R7.H ) (M), A0 += R6.L * R7.H (ISS2);
 171         P4 = A1.w;
 172         CHECKREG r0, 0x9AA64ABD;
 173         CHECKREG r1, 0xC54D5630;
 174         CHECKREG r2, 0xB114A649;
 175         CHECKREG r3, 0xBAB3123C;
 176         CHECKREG r4, 0xEFBCDB69;
 177         CHECKREG r5, 0xF26E8A8A;
 178         CHECKREG r6, 0x000C0D1B;
 179         CHECKREG r7, 0x678E0D01;
 180         CHECKREG p1, 0xF9374545;
 181         CHECKREG p2, 0xFD127BFC;
 182         CHECKREG p3, 0xDD59891E;
 183         CHECKREG p4, 0xE2A6AB18;
 184
 185         imm32 r0, 0xd136459d;
 186         imm32 r1, 0xabd69ec7;
 187         imm32 r2, 0x71145679;
 188         imm32 r3, 0xdd010007;
 189         imm32 r4, 0xeddc1569;
 190         imm32 r5, 0x122d010b;
 191         imm32 r6, 0x00e3d01d;
 192         imm32 r7, 0x678e0d61;
 193         R5 = A1 , A0 -= R1.L * R0.L (ISS2);
 194         P1 = A1.w;
 195         R7 = A1 , A0 = R2.H * R3.L (ISS2);
 196         P2 = A1.w;
 197         R1 = A1 , A0 += R4.H * R5.H (ISS2);
 198         P3 = A1.w;
 199         R5 = A1 , A0 += R6.L * R7.H (ISS2);
 200         P4 = A1.w;
 201         CHECKREG r0, 0xD136459D;
 202         CHECKREG r1, 0xC54D5630;
 203         CHECKREG r2, 0x71145679;
 204         CHECKREG r3, 0xDD010007;
 205         CHECKREG r4, 0xEDDC1569;
 206         CHECKREG r5, 0xC54D5630;
 207         CHECKREG r6, 0x00E3D01D;
 208         CHECKREG r7, 0xC54D5630;
 209         CHECKREG p1, 0xE2A6AB18;
 210         CHECKREG p2, 0xE2A6AB18;
 211         CHECKREG p3, 0xE2A6AB18;
 212         CHECKREG p4, 0xE2A6AB18;
 213
 214         imm32 r0, 0x125489bd;
 215         imm32 r1, 0x91b5fec7;
 216         imm32 r2, 0xa9145679;
 217         imm32 r3, 0xd0910507;
 218         imm32 r4, 0x34567859;
 219         imm32 r5, 0xd2359105;
 220         imm32 r6, 0x0d0c0999;
 221         imm32 r7, 0x67de0009;
 222         R1 = ( A1 += R5.H * R3.H ) (M,ISS2);
 223         P1 = A1.w;
 224         R3 = ( A1 = R2.H * R1.H ) (M,ISS2);
 225         P2 = A1.w;
 226         R5 = ( A1 -= R7.H * R0.H ) (M,ISS2);
 227         P3 = A1.w;
 228         R7 = ( A1 += R4.H * R6.H ) (M,ISS2);
 229         P4 = A1.w;
 230         CHECKREG r0, 0x125489BD;
 231         CHECKREG r1, 0x80000000;
 232         CHECKREG r2, 0xA9145679;
 233         CHECKREG r3, 0xA9140000;
 234         CHECKREG r4, 0x34567859;
 235         CHECKREG r5, 0x9A349E50;
 236         CHECKREG r6, 0x0D0C0999;
 237         CHECKREG r7, 0x9F8A4260;
 238         CHECKREG p1, 0xBD57CB1D;
 239         CHECKREG p2, 0xD48A0000;
 240         CHECKREG p3, 0xCD1A4F28;
 241         CHECKREG p4, 0xCFC52130;
 242
 243         pass