sim/testsuite/sim/bfin/c_dsp32mult_dr_m.s

   1 //Original:/testcases/core/c_dsp32mult_dr_m/c_dsp32mult_dr_m.dsp
   2 // Spec Reference: dsp32mult single dr (mix) MUNOP
   3 # mach: bfin
   4
   5 .include "testutils.inc"
   6         start
   7
   8 imm32 r0, 0x34235625;
   9 imm32 r1, 0x9f7a5127;
  10 imm32 r2, 0xa3286725;
  11 imm32 r3, 0x00069027;
  12 imm32 r4, 0xb0abc029;
  13 imm32 r5, 0x10acef2b;
  14 imm32 r6, 0xc00c00de;
  15 imm32 r7, 0xd246712f;
  16 R4.L = R0.L * R0.L;
  17 R5.L = R0.L * R1.H;
  18 R6.L = R1.H * R0.L;
  19 R7.L = R1.H * R1.H;
  20 R0.L = R0.L * R0.L;
  21 R1.L = R0.L * R1.H;
  22 R2.L = R1.H * R0.L;
  23 R3.L = R1.H * R1.H;
  24 CHECKREG r0, 0x342339FA;
  25 CHECKREG r1, 0x9F7AD448;
  26 CHECKREG r2, 0xA328D448;
  27 CHECKREG r3, 0x000648CA;
  28 CHECKREG r4, 0xB0AB39FA;
  29 CHECKREG r5, 0x10ACBF0A;
  30 CHECKREG r6, 0xC00CBF0A;
  31 CHECKREG r7, 0xD24648CA;
  32
  33 imm32 r0, 0x5b23a635;
  34 imm32 r1, 0x6fba5137;
  35 imm32 r2, 0x1324b735;
  36 imm32 r3, 0x90060037;
  37 imm32 r4, 0x80abcd39;
  38 imm32 r5, 0xb0acef3b;
  39 imm32 r6, 0xa00c003d;
  40 imm32 r7, 0x12467003;
  41 R4.L = R2.H * R2.L;
  42 R5.L = R2.H * R3.H;
  43 R6.L = R3.L * R2.L;
  44 R7.L = R3.L * R3.H;
  45 R0.L = R2.H * R2.L;
  46 R1.L = R2.H * R3.H;
  47 R2.L = R3.L * R2.L;
  48 R3.L = R3.L * R3.H;
  49 CHECKREG r0, 0x5B23F51D;
  50 CHECKREG r1, 0x6FBAEF41;
  51 CHECKREG r2, 0x1324FFE1;
  52 CHECKREG r3, 0x9006FFD0;
  53 CHECKREG r4, 0x80ABF51D;
  54 CHECKREG r5, 0xB0ACEF41;
  55 CHECKREG r6, 0xA00CFFE1;
  56 CHECKREG r7, 0x1246FFD0;
  57
  58 imm32 r0, 0x1b235655;
  59 imm32 r1, 0xc4ba5157;
  60 imm32 r2, 0x43246755;
  61 imm32 r3, 0x05060055;
  62 imm32 r4, 0x906bc509;
  63 imm32 r5, 0x10a7ef5b;
  64 imm32 r6, 0xb00c805d;
  65 imm32 r7, 0x1246795f;
  66 R0.L = R4.L * R4.L;
  67 R1.L = R4.L * R5.H;
  68 R2.L = R5.H * R4.L;
  69 R3.L = R5.H * R5.H;
  70 R4.L = R4.L * R4.L;
  71 R5.L = R4.L * R5.H;
  72 R6.L = R5.H * R4.L;
  73 R7.L = R5.H * R5.H;
  74 CHECKREG r0, 0x1B231B2A;
  75 CHECKREG r1, 0xC4BAF854;
  76 CHECKREG r2, 0x4324F854;
  77 CHECKREG r3, 0x0506022B;
  78 CHECKREG r4, 0x906B1B2A;
  79 CHECKREG r5, 0x10A70389;
  80 CHECKREG r6, 0xB00C0389;
  81 CHECKREG r7, 0x1246022B;
  82
  83 imm32 r0, 0xbb235666;
  84 imm32 r1, 0xefba5166;
  85 imm32 r2, 0x13248766;
  86 imm32 r3, 0xf0060066;
  87 imm32 r4, 0x90ab9d69;
  88 imm32 r5, 0x10acef6b;
  89 imm32 r6, 0x800cb06d;
  90 imm32 r7, 0x1246706f;
  91 // test the unsigned U=1
  92 R0.L = R6.L * R6.L;
  93 R1.L = R6.L * R7.H;
  94 R2.L = R7.H * R6.L;
  95 R3.L = R7.H * R7.H;
  96 R4.L = R6.L * R6.L;
  97 R5.L = R6.L * R7.H;
  98 R6.L = R7.H * R6.L;
  99 R7.L = R7.H * R7.H;
 100 CHECKREG r0, 0xBB233178;
 101 CHECKREG r1, 0xEFBAF4A4;
 102 CHECKREG r2, 0x1324F4A4;
 103 CHECKREG r3, 0xF006029C;
 104 CHECKREG r4, 0x90AB3178;
 105 CHECKREG r5, 0x10ACF4A4;
 106 CHECKREG r6, 0x800CF4A4;
 107 CHECKREG r7, 0x1246029C;
 108
 109 // mix order
 110 imm32 r0, 0xab23a675;
 111 imm32 r1, 0xcfba5127;
 112 imm32 r2, 0x13246705;
 113 imm32 r3, 0x00060007;
 114 imm32 r4, 0x90abcd09;
 115 imm32 r5, 0x10acdfdb;
 116 imm32 r6, 0x000c000d;
 117 imm32 r7, 0x1246f00f;
 118 R0.L = R0.H * R7.L;
 119 R1.L = R1.H * R6.H;
 120 R2.L = R2.L * R5.L;
 121 R3.L = R3.H * R4.H;
 122 R4.L = R4.L * R3.H;
 123 R5.L = R5.H * R2.L;
 124 R6.L = R6.L * R1.L;
 125 R7.L = R7.H * R0.L;
 126 CHECKREG r0, 0xAB230A92;
 127 CHECKREG r1, 0xCFBAFFFB;
 128 CHECKREG r2, 0x1324E621;
 129 CHECKREG r3, 0x0006FFFB;
 130 CHECKREG r4, 0x90ABFFFE;
 131 CHECKREG r5, 0x10ACFCA1;
 132 CHECKREG r6, 0x000C0000;
 133 CHECKREG r7, 0x12460182;
 134
 135 imm32 r0, 0xab235a75;
 136 imm32 r1, 0xcfba5127;
 137 imm32 r2, 0x13246905;
 138 imm32 r3, 0x00060007;
 139 imm32 r4, 0x90abcd09;
 140 imm32 r5, 0x10ace9db;
 141 imm32 r6, 0x000c0d0d;
 142 imm32 r7, 0x1246700f;
 143 R0.H = R7.H * R0.H;
 144 R1.H = R6.H * R1.H;
 145 R2.H = R5.H * R2.L;
 146 R3.H = R4.H * R3.H;
 147 R4.H = R3.L * R4.H;
 148 R5.H = R2.H * R5.L;
 149 R6.H = R1.H * R6.H;
 150 R7.H = R0.L * R7.H;
 151 CHECKREG r0, 0xF3E35A75;
 152 CHECKREG r1, 0xFFFB5127;
 153 CHECKREG r2, 0x0DAE6905;
 154 CHECKREG r3, 0xFFFB0007;
 155 CHECKREG r4, 0xFFFACD09;
 156 CHECKREG r5, 0xFDA2E9DB;
 157 CHECKREG r6, 0x00000D0D;
 158 CHECKREG r7, 0x0CEA700F;
 159
 160 imm32 r0, 0x9b235675;
 161 imm32 r1, 0xc9ba5127;
 162 imm32 r2, 0x13946705;
 163 imm32 r3, 0x00090007;
 164 imm32 r4, 0x90ab9d09;
 165 imm32 r5, 0x10ace9db;
 166 imm32 r6, 0x000c009d;
 167 imm32 r7, 0x12467009;
 168 R2.H = R0.L * R6.L;
 169 R3.H = R1.H * R7.L;
 170 R0.H = R2.L * R0.L;
 171 R1.H = R3.L * R1.H;
 172 R4.H = R4.H * R2.H;
 173 R5.H = R5.L * R3.H;
 174 R6.H = R6.H * R4.L;
 175 R7.H = R7.L * R5.H;
 176 CHECKREG r0, 0x45965675;
 177 CHECKREG r1, 0xFFFD5127;
 178 CHECKREG r2, 0x006A6705;
 179 CHECKREG r3, 0xD07F0007;
 180 CHECKREG r4, 0xFFA49D09;
 181 CHECKREG r5, 0x0838E9DB;
 182 CHECKREG r6, 0xFFF7009D;
 183 CHECKREG r7, 0x07327009;
 184
 185 imm32 r0, 0xeb235675;
 186 imm32 r1, 0xceba5127;
 187 imm32 r2, 0x13e46705;
 188 imm32 r3, 0x000e0007;
 189 imm32 r4, 0x90abed09;
 190 imm32 r5, 0x10aceedb;
 191 imm32 r6, 0x000c00ed;
 192 imm32 r7, 0x1246700e;
 193 R4.H = R5.L * R2.L;
 194 R6.H = R6.H * R3.H;
 195 R0.H = R7.H * R4.L;
 196 R1.H = R0.H * R5.L;
 197 R2.H = R1.H * R6.H;
 198 R5.H = R2.H * R7.L;
 199 R3.H = R3.H * R0.L;
 200 R7.H = R4.L * R1.H;
 201 CHECKREG r0, 0xFD4B5675;
 202 CHECKREG r1, 0x005D5127;
 203 CHECKREG r2, 0x00006705;
 204 CHECKREG r3, 0x00090007;
 205 CHECKREG r4, 0xF234ED09;
 206 CHECKREG r5, 0x0000EEDB;
 207 CHECKREG r6, 0x000000ED;
 208 CHECKREG r7, 0xFFF2700E;
 209
 210
 211 pass