sim/testsuite/sim/bfin/c_dsp32shift_rot_mix.s

   1 //Original:/proj/frio/dv/testcases/core/c_dsp32shift_rot_mix/c_dsp32shift_rot_mix.dsp
   2 // Spec Reference: dsp32shift rot
   3 # mach: bfin
   4
   5 .include "testutils.inc"
   6         start
   7
   8         R0 = 0;
   9         ASTAT = R0;
  10
  11
  12         imm32 r0, 0x01230000;
  13         imm32 r1, 0x12345678;
  14         imm32 r2, 0x83456789;
  15         imm32 r3, 0x9456789a;
  16         imm32 r4, 0xa56789ab;
  17         imm32 r5, 0xb6789abc;
  18         imm32 r6, 0xc789abcd;
  19         imm32 r7, 0xd89abcde;
  20         R1 = ROT R0 BY R0.L;
  21         R2 = ROT R1 BY R0.L;
  22         R3 = ROT R2 BY R0.L;
  23         R4 = ROT R3 BY R0.L;
  24         R5 = ROT R4 BY R0.L;
  25         R6 = ROT R5 BY R0.L;
  26         R7 = ROT R6 BY R0.L;
  27         R0 = ROT R7 BY R0.L;
  28         CHECKREG r0, 0x01230000;
  29         CHECKREG r1, 0x01230000;
  30         CHECKREG r2, 0x01230000;
  31         CHECKREG r3, 0x01230000;
  32         CHECKREG r4, 0x01230000;
  33         CHECKREG r5, 0x01230000;
  34         CHECKREG r6, 0x01230000;
  35         CHECKREG r7, 0x01230000;
  36
  37         A0 = 0;
  38         A0.L = R0.L;
  39         A0.H = R0.H;
  40         A0 = ROT A0 BY R1.L;
  41         R6 = A0.w;
  42         imm32 r4, 0x30003000;
  43         imm32 r1, 5;
  44         R7 = ROT R4 BY R1.L;
  45         CHECKREG r6, 0x01230000;
  46         CHECKREG r7, 0x00060003;
  47
  48         imm32 r0, 0x11230001;
  49         imm32 r1, 0xc2345678;
  50         imm32 r2, 0xd3456789;
  51         imm32 r3, 0xb456789a;
  52         imm32 r4, 0x056789ab;
  53         imm32 r5, 0x36789abc;
  54         imm32 r6, 0x1789abcd;
  55         imm32 r7, 0x189abcde;
  56         R1.L = 5;
  57         R2 = ROT R0 BY R1.L;
  58         R3 = ROT R1 BY R1.L;
  59         R4 = ROT R2 BY R1.L;
  60         R5 = ROT R3 BY R1.L;
  61         R6 = ROT R4 BY R1.L;
  62         R7 = ROT R5 BY R1.L;
  63         R0 = ROT R6 BY R1.L;
  64         R1 = ROT R7 BY R1.L;
  65         CHECKREG r0, 0x00108908;
  66         CHECKREG r1, 0x005613A0;
  67         CHECKREG r2, 0x24600021;
  68         CHECKREG r3, 0x468000AC;
  69         CHECKREG r4, 0x8C000422;
  70         CHECKREG r5, 0xD0001584;
  71         CHECKREG r6, 0x80008448;
  72         CHECKREG r7, 0x0002B09D;
  73
  74         imm32 r0, 0x01230002;
  75         imm32 r1, 0x12345678;
  76         imm32 r2, 0x23456789;
  77         imm32 r3, 0x8456789a;
  78         imm32 r4, 0x956789ab;
  79         imm32 r5, 0x56789abc;
  80         imm32 r6, 0xc789abcd;
  81         imm32 r7, 0x789abcde;
  82         R2 = 15;
  83         R3 = ROT R0 BY R2.L;
  84         R4 = ROT R1 BY R2.L;
  85         R5 = ROT R2 BY R2.L;
  86         R6 = ROT R3 BY R2.L;
  87         R7 = ROT R4 BY R2.L;
  88         R0 = ROT R5 BY R2.L;
  89         R1 = ROT R6 BY R2.L;
  90         R2 = ROT R7 BY R2.L;
  91         CHECKREG r0, 0xC0000001;
  92         CHECKREG r1, 0x10006009;
  93         CHECKREG r2, 0x45678891;
  94         CHECKREG r3, 0x80010048;
  95         CHECKREG r4, 0x2B3C448D;
  96         CHECKREG r5, 0x00078000;
  97         CHECKREG r6, 0x80242000;
  98         CHECKREG r7, 0x22468ACF;
  99
 100         imm32 r0, 0x21230003;
 101         imm32 r1, 0x22345678;
 102         imm32 r2, 0x23456789;
 103         imm32 r3, 0x2456789a;
 104         imm32 r4, 0x256789ab;
 105         imm32 r5, 0x26789abc;
 106         imm32 r6, 0x2789abcd;
 107         imm32 r7, 0x289abcde;
 108         R3.L = 24;
 109         R4 = ROT R0 BY R3.L;
 110         R5 = ROT R1 BY R3.L;
 111         R6 = ROT R2 BY R3.L;
 112         R7 = ROT R3 BY R3.L;
 113         R0 = ROT R4 BY R3.L;
 114         R1 = ROT R5 BY R3.L;
 115         R2 = ROT R6 BY R3.L;
 116         R3 = ROT R7 BY R3.L;
 117         CHECKREG r0, 0x8001C848;
 118         CHECKREG r1, 0x2BBC088D;
 119         CHECKREG r2, 0xB34488D1;
 120         CHECKREG r3, 0x000C4915;
 121         CHECKREG r4, 0x03909180;
 122         CHECKREG r5, 0x78111A2B;
 123         CHECKREG r6, 0x8911A2B3;
 124         CHECKREG r7, 0x18922B00;
 125
 126         imm32 r0, 0x01230004;
 127         imm32 r1, 0x12345678;
 128         imm32 r2, 0x23456789;
 129         imm32 r3, 0x3456789a;
 130         imm32 r4, 0x456789ab;
 131         imm32 r5, 0x56789abc;
 132         imm32 r6, 0x6789abcd;
 133         imm32 r7, 0x789abcde;
 134         R4.L = -1;
 135         R0 = ROT R0 BY R4.L;
 136         R1 = ROT R1 BY R4.L;
 137         R2 = ROT R2 BY R4.L;
 138         R3 = ROT R3 BY R4.L;
 139         R4 = ROT R4 BY R4.L;
 140         R5 = ROT R5 BY R4.L;
 141         R6 = ROT R6 BY R4.L;
 142         R7 = ROT R7 BY R4.L;
 143         CHECKREG r0, 0x80918002;
 144         CHECKREG r1, 0x091A2B3C;
 145         CHECKREG r2, 0x11A2B3C4;
 146         CHECKREG r3, 0x9A2B3C4D;
 147         CHECKREG r4, 0x22B3FFFF;
 148         CHECKREG r5, 0xAB3C4D5E;
 149         CHECKREG r6, 0x33C4D5E6;
 150         CHECKREG r7, 0xBC4D5E6F;
 151
 152         imm32 r0, 0x01230005;
 153         imm32 r1, 0x12345678;
 154         imm32 r2, 0x23456789;
 155         imm32 r3, 0x3456789a;
 156         imm32 r4, 0x456789ab;
 157         imm32 r5, 0x56789abc;
 158         imm32 r6, 0x6789abcd;
 159         imm32 r7, 0x789abcde;
 160         R5.L = -6;
 161         R6 = ROT R0 BY R5.L;
 162         R7 = ROT R1 BY R5.L;
 163         R0 = ROT R2 BY R5.L;
 164         R1 = ROT R3 BY R5.L;
 165         R2 = ROT R4 BY R5.L;
 166         R3 = ROT R5 BY R5.L;
 167         R4 = ROT R6 BY R5.L;
 168         R5 = ROT R7 BY R5.L;
 169         CHECKREG r0, 0x4C8D159E;
 170         CHECKREG r1, 0xD0D159E2;
 171         CHECKREG r2, 0x59159E26;
 172         CHECKREG r3, 0xD559E3FF;
 173         CHECKREG r4, 0x04A01230;
 174         CHECKREG r5, 0xCB012345;
 175         CHECKREG r6, 0x28048C00;
 176         CHECKREG r7, 0xC048D159;
 177
 178         imm32 r0, 0x01230006;
 179         imm32 r1, 0x82345678;
 180         imm32 r2, 0x73456789;
 181         imm32 r3, 0x3456789a;
 182         imm32 r4, 0xd56789ab;
 183         imm32 r5, 0x56789abc;
 184         imm32 r6, 0xc789abcd;
 185         imm32 r7, 0x789abcde;
 186         R6.L = -15;
 187         R7 = ROT R0 BY R6.L;
 188         R0 = ROT R1 BY R6.L;
 189         R1 = ROT R2 BY R6.L;
 190         R2 = ROT R3 BY R6.L;
 191         R3 = ROT R4 BY R6.L;
 192         R4 = ROT R5 BY R6.L;
 193         R5 = ROT R6 BY R6.L;
 194         R6 = ROT R7 BY R6.L;
 195         CHECKREG r0, 0x59E10468;
 196         CHECKREG r1, 0x9E26E68A;
 197         CHECKREG r2, 0xE26A68AC;
 198         CHECKREG r3, 0x26AFAACF;
 199         CHECKREG r4, 0x6AF0ACF1;
 200         CHECKREG r5, 0xFFC58F13;
 201         CHECKREG r6, 0x091A0030;
 202         CHECKREG r7, 0x00180246;
 203
 204         imm32 r0, 0x01230007;
 205         imm32 r1, 0x12345678;
 206         imm32 r2, 0x23456789;
 207         imm32 r3, 0x3456789a;
 208         imm32 r4, 0x456789ab;
 209         imm32 r5, 0x56789abc;
 210         imm32 r6, 0x6789abcd;
 211         imm32 r7, 0x789abcde;
 212         R7.L = -27;
 213         R0 = ROT R0 BY R7.L;
 214         R1 = ROT R1 BY R7.L;
 215         R2 = ROT R2 BY R7.L;
 216         R3 = ROT R3 BY R7.L;
 217         R4 = ROT R4 BY R7.L;
 218         R5 = ROT R5 BY R7.L;
 219         R6 = ROT R6 BY R7.L;
 220         R7 = ROT R7 BY R7.L;
 221         CHECKREG r0, 0x48C001C0;
 222         CHECKREG r1, 0x8D159E02;
 223         CHECKREG r2, 0xD159E244;
 224         CHECKREG r3, 0x159E2686;
 225         CHECKREG r4, 0x59E26AE8;
 226         CHECKREG r5, 0x9E26AF2A;
 227         CHECKREG r6, 0xE26AF36C;
 228         CHECKREG r7, 0x26BFF96F;
 229
 230         imm32 r0, 0x01230008;
 231         imm32 r1, 0x12345678;
 232         imm32 r2, 0x23456789;
 233         imm32 r3, 0x3456789a;
 234         imm32 r4, 0x456789ab;
 235         imm32 r5, 0x56789abc;
 236         imm32 r6, 0x6789abcd;
 237         imm32 r7, 0x789abcde;
 238         R0.L = 7;
 239 //r0  = rot   (r0 by rl0);
 240         R1 = ROT R1 BY R0.L;
 241         R2 = ROT R2 BY R0.L;
 242         R3 = ROT R3 BY R0.L;
 243         R4 = ROT R4 BY R0.L;
 244         R5 = ROT R5 BY R0.L;
 245         R6 = ROT R6 BY R0.L;
 246         R7 = ROT R7 BY R0.L;
 247         CHECKREG r0, 0x01230007;
 248         CHECKREG r1, 0x1A2B3C04;
 249         CHECKREG r2, 0xA2B3C4C8;
 250         CHECKREG r3, 0x2B3C4D4D;
 251         CHECKREG r4, 0xB3C4D591;
 252         CHECKREG r5, 0x3C4D5E15;
 253         CHECKREG r6, 0xC4D5E6D9;
 254         CHECKREG r7, 0x4D5E6F5E;
 255
 256         imm32 r0, 0x01230009;
 257         imm32 r1, 0x12345678;
 258         imm32 r2, 0x23456789;
 259         imm32 r3, 0x3456789a;
 260         imm32 r4, 0x456789ab;
 261         imm32 r5, 0x56789abc;
 262         imm32 r6, 0x6789abcd;
 263         imm32 r7, 0x789abcde;
 264         R1.L = 16;
 265         R0 = ROT R0 BY R1.L;
 266 //r1  = rot   (r1 by rl1);
 267         R2 = ROT R2 BY R1.L;
 268         R3 = ROT R3 BY R1.L;
 269         R4 = ROT R4 BY R1.L;
 270         R5 = ROT R5 BY R1.L;
 271         R6 = ROT R6 BY R1.L;
 272         R7 = ROT R7 BY R1.L;
 273         CHECKREG r0, 0x00090091;
 274         CHECKREG r1, 0x12340010;
 275         CHECKREG r2, 0x678991A2;
 276         CHECKREG r3, 0x789A9A2B;
 277         CHECKREG r4, 0x89AB22B3;
 278         CHECKREG r5, 0x9ABCAB3C;
 279         CHECKREG r6, 0xABCD33C4;
 280         CHECKREG r7, 0xBCDEBC4D;
 281
 282         imm32 r0, 0x0123000a;
 283         imm32 r1, 0x12345678;
 284         imm32 r2, 0x23456789;
 285         imm32 r3, 0x3456789a;
 286         imm32 r4, 0x456789ab;
 287         imm32 r5, 0x56789abc;
 288         imm32 r6, 0x6789abcd;
 289         imm32 r7, 0x789abcde;
 290         R2.L = 31;
 291         R0 = ROT R0 BY R2.L;
 292         R1 = ROT R1 BY R2.L;
 293 //r2  = rot   (r2 by rl2);
 294         R3 = ROT R3 BY R2.L;
 295         R4 = ROT R4 BY R2.L;
 296         R5 = ROT R5 BY R2.L;
 297         R6 = ROT R6 BY R2.L;
 298         R7 = ROT R7 BY R2.L;
 299         CHECKREG r0, 0x0048C002;
 300         CHECKREG r1, 0x448D159E;
 301         CHECKREG r2, 0x2345001F;
 302         CHECKREG r3, 0x0D159E26;
 303         CHECKREG r4, 0xD159E26A;
 304         CHECKREG r5, 0x559E26AF;
 305         CHECKREG r6, 0x99E26AF3;
 306         CHECKREG r7, 0x1E26AF37;
 307
 308         imm32 r0, 0x0123000b;
 309         imm32 r1, 0x92345678;
 310         imm32 r2, 0x93456789;
 311         imm32 r3, 0xc456789a;
 312         imm32 r4, 0xa56789ab;
 313         imm32 r5, 0xb6789abc;
 314         imm32 r6, 0xe789abcd;
 315         imm32 r7, 0xf89abcde;
 316         R3.L = 33;
 317         R0 = ROT R0 BY R3.L;
 318         R1 = ROT R1 BY R3.L;
 319         R2 = ROT R2 BY R3.L;
 320 //r3  = rot   (r3 by rl3);
 321         R4 = ROT R4 BY R3.L;
 322         R5 = ROT R5 BY R3.L;
 323         R6 = ROT R6 BY R3.L;
 324         R7 = ROT R7 BY R3.L;
 325         CHECKREG r0, 0x048C002E;
 326         CHECKREG r1, 0x48D159E1;
 327         CHECKREG r2, 0x4D159E25;
 328         CHECKREG r3, 0xC4560021;
 329         CHECKREG r4, 0x959E26AD;
 330         CHECKREG r5, 0xD9E26AF1;
 331         CHECKREG r6, 0x9E26AF35;
 332         CHECKREG r7, 0xE26AF37B;
 333
 334         imm32 r0, 0x0123000c;
 335         imm32 r1, 0x12345678;
 336         imm32 r2, 0x23456789;
 337         imm32 r3, 0x3456789a;
 338         imm32 r4, 0x456789ab;
 339         imm32 r5, 0x56789abc;
 340         imm32 r6, 0x6789abcd;
 341         imm32 r7, 0x789abcde;
 342         R4.L = -2;
 343         R0 = ROT R0 BY R4.L;
 344         R1 = ROT R1 BY R4.L;
 345         R2 = ROT R2 BY R4.L;
 346         R3 = ROT R3 BY R4.L;
 347 //r4  = rot   (r4 by rl4);
 348         R5 = ROT R5 BY R4.L;
 349         R6 = ROT R6 BY R4.L;
 350         R7 = ROT R7 BY R4.L;
 351         CHECKREG r0, 0x4048C003;
 352         CHECKREG r1, 0x048D159E;
 353         CHECKREG r2, 0x88D159E2;
 354         CHECKREG r3, 0x0D159E26;
 355         CHECKREG r4, 0x4567FFFE;
 356         CHECKREG r5, 0x559E26AF;
 357         CHECKREG r6, 0x99E26AF3;
 358         CHECKREG r7, 0x1E26AF37;
 359
 360         imm32 r0, 0x0123000d;
 361         imm32 r1, 0x12345678;
 362         imm32 r2, 0x23456789;
 363         imm32 r3, 0x3456789a;
 364         imm32 r4, 0x456789ab;
 365         imm32 r5, 0x56789abc;
 366         imm32 r6, 0x6789abcd;
 367         imm32 r7, 0x789abcde;
 368         R5.L = -14;
 369         R0 = ROT R0 BY R5.L;
 370         R1 = ROT R1 BY R5.L;
 371         R2 = ROT R2 BY R5.L;
 372         R3 = ROT R3 BY R5.L;
 373         R4 = ROT R4 BY R5.L;
 374 //r5  = rot   (r5 by rl5);
 375         R6 = ROT R6 BY R5.L;
 376         R7 = ROT R7 BY R5.L;
 377         CHECKREG r0, 0x006C048C;
 378         CHECKREG r1, 0xB3C048D1;
 379         CHECKREG r2, 0x3C488D15;
 380         CHECKREG r3, 0xC4D4D159;
 381         CHECKREG r4, 0x4D5D159E;
 382         CHECKREG r5, 0x5678FFF2;
 383         CHECKREG r6, 0x5E699E26;
 384         CHECKREG r7, 0xE6F5E26A;
 385
 386         imm32 r0, 0x0123000e;
 387         imm32 r1, 0x12345678;
 388         imm32 r2, 0x23456789;
 389         imm32 r3, 0x3456789a;
 390         imm32 r4, 0x456789ab;
 391         imm32 r5, 0x56789abc;
 392         imm32 r6, 0x6789abcd;
 393         imm32 r7, 0x789abcde;
 394         R6.L = -16;
 395         R0 = ROT R0 BY R6.L;
 396         R1 = ROT R1 BY R6.L;
 397         R2 = ROT R2 BY R6.L;
 398         R3 = ROT R3 BY R6.L;
 399         R4 = ROT R4 BY R6.L;
 400         R5 = ROT R5 BY R6.L;
 401 //r6  = rot   (r6 by rl6);
 402         R7 = ROT R7 BY R6.L;
 403         CHECKREG r0, 0x001D0123;
 404         CHECKREG r1, 0xACF01234;
 405         CHECKREG r2, 0xCF122345;
 406         CHECKREG r3, 0xF1343456;
 407         CHECKREG r4, 0x13564567;
 408         CHECKREG r5, 0x35795678;
 409         CHECKREG r6, 0x6789FFF0;
 410         CHECKREG r7, 0x79BD789A;
 411
 412         imm32 r0, 0x0123000f;
 413         imm32 r1, 0x12345678;
 414         imm32 r2, 0x83456789;
 415         imm32 r3, 0x3456789a;
 416         imm32 r4, 0xd56789ab;
 417         imm32 r5, 0x56789abc;
 418         imm32 r6, 0x9789abcd;
 419         imm32 r7, 0x789abcde;
 420         R7.L = -32;
 421         R0 = ROT R0 BY R7.L;
 422         R1 = ROT R1 BY R7.L;
 423         R2 = ROT R2 BY R7.L;
 424         R3 = ROT R3 BY R7.L;
 425         R4 = ROT R4 BY R7.L;
 426         R5 = ROT R5 BY R7.L;
 427         R6 = ROT R6 BY R7.L;
 428         R7 = ROT R7 BY R7.L;
 429         CHECKREG r0, 0x0246001f;
 430         CHECKREG r1, 0x2468ACF0;
 431         CHECKREG r2, 0x068ACF12;
 432         CHECKREG r3, 0x68ACF135;
 433         CHECKREG r4, 0xAACF1356;
 434         CHECKREG r5, 0xACF13579;
 435         CHECKREG r6, 0x2F13579A;
 436         CHECKREG r7, 0xF135FFC1;
 437         pass