sim/testsuite/sim/bfin/c_loopsetup_topbotcntr.s

   1 //Original:/proj/frio/dv/testcases/core/c_loopsetup_topbotcntr/c_loopsetup_topbotcntr.dsp
   2 // Spec Reference: loopsetup top bot counter
   3 # mach: bfin
   4
   5 .include "testutils.inc"
   6         start
   7
   8         INIT_R_REGS 0;
   9
  10
  11         ASTAT = r0;
  12
  13         R1 = 0x10;
  14         R2 = 0x20;
  15         R3 = 0x30;
  16         R4 = 0x40 (X);
  17         R5 = 0x08;
  18
  19         loadsym R6, start1;
  20         loadsym R7, end1;
  21
  22         LT0 = R6;
  23         LB0 = R7;
  24         LC0 = R5;
  25 //start immmediately
  26 start1:  R0 += 1;
  27         R1 += -2;
  28 end1:    R2 += 3;
  29         R3 += 4;
  30
  31         CHECKREG r0, 0x00000008;
  32         CHECKREG r1, 0x00000000;
  33         CHECKREG r2, 0x00000038;
  34         CHECKREG r3, 0x00000034;
  35         CHECKREG r4, 0x00000040;
  36         CHECKREG r5, 0x00000008;
  37 //CHECKREG r6, 0x00000090;
  38 //CHECKREG r7, 0x00000094;
  39
  40         R0 = 0x05;
  41         R1 = 0x10;
  42         R2 = 0x10;
  43         R3 = 0x10;
  44         R4 = 0x20;
  45         R5 = 0x20;
  46         R6 = 0x30;
  47         R7 = 0x30;
  48
  49         loadsym R1, start2;
  50         R0 = R1;
  51         loadsym R1, end2;
  52         LT1 = R0;
  53         LB1 = R1;
  54         LC1 = R2;
  55
  56 start2:  R4 += 1;
  57         R5 += 2;
  58 end2:    R6 += -3;
  59         R7 += 4;
  60         CHECKREG r3, 0x00000010;
  61         CHECKREG r4, 0x00000030;
  62         CHECKREG r5, 0x00000040;
  63         CHECKREG r6, 0x00000000;
  64         CHECKREG r7, 0x00000034;
  65
  66         R0 = 0x05;
  67         R1 = 0x10;
  68         R2 = 0x20;
  69         R3 = 0x30;
  70         R4 = 0x40 (X);
  71         R5 = 0x50 (X);
  72         R6 = 0x60 (X);
  73         R7 = 0x70 (X);
  74
  75         loadsym R1, start3
  76         r0 = r1;
  77         loadsym r1, end3;
  78         LT0 = R0;
  79         LB0 = R1;
  80         LC0 = R2;
  81         loadsym r3, start4;
  82         loadsym r4, end4;
  83         LT1 = R3;
  84         LB1 = R4;
  85         LC1 = R5;
  86
  87         R0 = 0x10;
  88         R1 = 0x15;
  89         R2 = 0x20;
  90         R3 = 0x26;
  91         R4 = 0x30;
  92         R5 = 0x40 (X);
  93
  94 start3:  R0 += 1;
  95         R1 += -2;
  96 start4:  R2 += 3;
  97         R3 += 4;
  98 end4:    R6 += 5;
  99 end3:    R7 += -6;
 100
 101         CHECKREG r0, 0x00000030;
 102         CHECKREG r1, 0xFFFFFFD5;
 103         CHECKREG r2, 0x0000016D;
 104         CHECKREG r3, 0x000001E2;
 105         CHECKREG r4, 0x00000030;
 106         CHECKREG r5, 0x00000040;
 107         CHECKREG r6, 0x0000028B;
 108         CHECKREG r7, 0xFFFFFFB0;
 109
 110         pass