sim/testsuite/sim/cris/asm/testutils.inc

   1 ; Copied from fr30 and modified.
   2 ; r9, r11-r13 are used as tmps, consider them call clobbered by these macros.
   3 ;
   4 ; Do not use the macro counter \@ in macros, there's a bug in
   5 ; gas 2.9.1 when it is also a line-separator.
   6 ;
   7
   8         ; Don't require the $-prefix on registers.
   9         .syntax no_register_prefix
  10
  11         .macro startnostack
  12         .data
  13         .space 64,0 ; Simple stack
  14 stackhi:
  15 failmsg:
  16         .ascii "fail\n"
  17 passmsg:
  18         .ascii "pass\n"
  19         .text
  20         break 11
  21         .global _start
  22 _start:
  23         .endm
  24
  25         .macro start
  26         startnostack
  27         move.d stackhi,sp
  28         .endm
  29
  30 ; Exit with return code
  31         .macro exit rc
  32         move.d \rc,r10
  33         moveq 1,r9      ; == __NR_exit
  34         break 13
  35         break 15
  36         .endm
  37
  38 ; Pass the test case
  39         .macro pass
  40         moveq 5,r12
  41         move.d passmsg,r11
  42         move.d 1,r10
  43         moveq 4,r9      ; == __NR_write
  44         break 13
  45         exit 0
  46         .endm
  47
  48 ; Fail the testcase
  49         .macro fail
  50 ;       moveq 5,r12
  51 ;       move.d failmsg,r11
  52 ;       move.d 1,r10
  53 ;       moveq 4,r1
  54 ;       break 13
  55 ;       exit 1
  56         break 15
  57         .endm
  58
  59         .macro quit
  60         break 15
  61         .endm
  62
  63         .macro dumpr3
  64         break 14
  65         .endm
  66
  67 ; Load an immediate value into a general register
  68 ; TODO: use minimal sized insn
  69         .macro mvi_h_gr val reg
  70         move.d \val,\reg
  71         .endm
  72
  73 ; Load an immediate value into a dedicated register
  74         .macro mvi_h_dr val reg
  75         move.d \val,r9
  76         move.d r9,\reg
  77         .endm
  78
  79 ; Load a general register into another general register
  80         .macro mvr_h_gr src targ
  81         move.d \src,\targ
  82         .endm
  83
  84 ; Store an immediate into a word in memory
  85         .macro mvi_h_mem val addr
  86         mvi_h_gr  \val r11
  87         mvr_h_mem r11,\addr
  88         .endm
  89
  90 ; Store a register into a word in memory
  91         .macro mvr_h_mem reg addr
  92         move.d \addr,$r13
  93         move.d \reg,[$r13]
  94         .endm
  95
  96 ; Store the current ps on the stack
  97         .macro save_ps
  98         .if ..asm.arch.cris.v32
  99         move ccs,acr ; Push will do a "subq" first.
 100         push acr
 101         .else
 102         push dccr
 103         .endif
 104         .endm
 105
 106 ; Load a word value from memory
 107         .macro ldmem_h_gr addr reg
 108         move.d \addr,$r13
 109         move.d [$r13],\reg
 110         .endm
 111
 112 ; Add 2 general registers
 113         .macro add_h_gr reg1 reg2
 114         add.d \reg1,\reg2
 115         .endm
 116
 117 ; Increment a register by and immediate
 118         .macro inci_h_gr inc reg
 119         mvi_h_gr \inc,r11
 120         add.d r11,\reg
 121         .endm
 122
 123 ; Test the value of an immediate against a general register
 124         .macro test_h_gr val reg
 125         cmp.d \val,\reg
 126         beq 9f
 127         nop
 128         fail
 129 9:
 130         .endm
 131
 132 ; compare two general registers
 133         .macro testr_h_gr reg1 reg2
 134         cmp.d \reg1,\reg2
 135         beq 9f
 136         fail
 137 9:
 138         .endm
 139
 140 ; Test the value of an immediate against a dedicated register
 141         .macro test_h_dr val reg
 142         move \reg,$r12
 143         test_h_gr \val $r12
 144         .endm
 145
 146 ; Test the value of an general register against a dedicated register
 147         .macro testr_h_dr gr dr
 148         move \dr,$r12
 149         testr_h_gr \gr $r12
 150         .endm
 151
 152 ; Compare an immediate with word in memory
 153         .macro test_h_mem val addr
 154         ldmem_h_gr \addr $r12
 155         test_h_gr \val $r12
 156         .endm
 157
 158 ; Compare a general register with word in memory
 159         .macro testr_h_mem reg addr
 160         ldmem_h_gr \addr r12
 161         testr_h_gr \reg r12
 162         .endm
 163
 164 ; Set the condition codes
 165 ; The lower bits of the mask *are* nzvc, so we don't
 166 ; have to do anything strange.
 167         .macro set_cc mask
 168         move.w \mask,r13
 169         .if ..asm.arch.cris.v32
 170         move r13,ccs
 171         .else
 172         move r13,ccr
 173         .endif
 174         .endm
 175
 176 ; Set the stack mode
 177 ;        .macro set_s_user
 178 ;        orccr  0x20
 179 ;        .endm
 180 ;
 181 ;        .macro set_s_system
 182 ;        andccr 0x1f
 183 ;        .endm
 184 ;
 185 ;; Test the stack mode
 186 ;        .macro test_s_user
 187 ;        mvr_h_gr ps,r9
 188 ;        mvi_h_gr 0x20,r11
 189 ;        and      r11,r9
 190 ;        test_h_gr 0x20,r9
 191 ;        .endm
 192 ;
 193 ;        .macro test_s_system
 194 ;        mvr_h_gr ps,r9
 195 ;        mvi_h_gr 0x20,r11
 196 ;        and      r11,r9
 197 ;        test_h_gr 0x0,r9
 198 ;        .endm
 199
 200 ; Set the interrupt bit
 201 ; ??? Do they mean "enable interrupts" or "disable interrupts"?
 202 ; Assuming enable here.
 203         .macro set_i val
 204         .if (\val == 1)
 205         ei
 206         .else
 207         di
 208         .endif
 209         .endm
 210
 211 ; Test the stack mode
 212 ;        .macro test_i val
 213 ;        mvr_h_gr  ps,r9
 214 ;        mvi_h_gr  0x10,r11
 215 ;        and       r11,r9
 216 ;        .if (\val == 1)
 217 ;        test_h_gr 0x10,r9
 218 ;        .else
 219 ;        test_h_gr 0x0,r9
 220 ;        .endif
 221 ;        .endm
 222 ;
 223 ;; Set the ilm
 224 ;        .macro set_ilm val
 225 ;        stilm \val
 226 ;        .endm
 227 ;
 228 ;; Test the ilm
 229 ;        .macro test_ilm val
 230 ;        mvr_h_gr   ps,r9
 231 ;        mvi_h_gr   0x1f0000,r11
 232 ;        and        r11,r9
 233 ;        mvi_h_gr   \val,r12
 234 ;        mvi_h_gr   0x1f,r11
 235 ;        and       r11,r12
 236 ;        lsl        15,r12
 237 ;        lsl        1,r12
 238 ;        testr_h_gr r9,r12
 239 ;        .endm
 240 ;
 241 ; Test the condition codes
 242         .macro test_cc N Z V C
 243         .if \N
 244         bpl 9f
 245         nop
 246         .else
 247         bmi 9f
 248         nop
 249         .endif
 250         .if \Z
 251         bne 9f
 252         nop
 253         .else
 254         beq 9f
 255         nop
 256         .endif
 257         .if \V
 258         bvc 9f
 259         nop
 260         .else
 261         bvs 9f
 262         nop
 263         .endif
 264         .if \C
 265         bcc 9f
 266         nop
 267         .else
 268         bcs 9f
 269         nop
 270         .endif
 271         ba 8f
 272         nop
 273 9:
 274         fail
 275 8:
 276         .endm
 277
 278         .macro test_move_cc N Z V C
 279         .if ..asm.arch.cris.v32
 280         ; V and C aren't affected on v32, so to re-use the test-cases,
 281         ; we fake them cleared.  There's a separate test, nonvcv32.ms
 282         ; covering this omission.
 283         clearf vc
 284         test_cc \N \Z 0 0
 285         .else
 286         test_cc \N \Z \V \C
 287         .endif
 288         .endm
 289
 290 ; Set the division bits
 291 ;        .macro set_dbits val
 292 ;        mvr_h_gr ps,r12
 293 ;        mvi_h_gr 0xfffff8ff,r11
 294 ;        and r11,r12
 295 ;        mvi_h_gr \val,r9
 296 ;        mvi_h_gr 3,r11
 297 ;        and r11,r9
 298 ;        lsl 9,r9
 299 ;        or r9,r12
 300 ;        mvr_h_gr r12,ps
 301 ;        .endm
 302 ;
 303 ;; Test the division bits
 304 ;        .macro test_dbits val
 305 ;        mvr_h_gr ps,r9
 306 ;        lsr 9,r9
 307 ;        mvi_h_gr 3,r11
 308 ;        and r11,r9
 309 ;        test_h_gr \val,r9
 310 ;        .endm
 311 ;
 312 ; Save the return pointer
 313         .macro save_rp
 314         push srp
 315         .ENDM
 316
 317 ; restore the return pointer
 318         .macro restore_rp
 319         pop srp
 320         .endm
 321
 322 ; Ensure branch taken
 323         .macro take_branch opcode
 324         \opcode 9f
 325         nop
 326         fail
 327 9:
 328         .endm
 329
 330         .macro take_branch_d opcode val
 331         \opcode 9f
 332         nop
 333         move.d \val,r9
 334         fail
 335 9:
 336         test_h_gr \val,r9
 337         .endm
 338
 339 ; Ensure branch not taken
 340         .macro no_branch opcode
 341         \opcode 9f
 342         nop
 343         ba      8f
 344         nop
 345 9:
 346         fail
 347 8:
 348         .endm
 349
 350         .macro no_branch_d opcode val
 351         \opcode 9f
 352         move.d   \val,r9
 353         nop
 354         ba      8f
 355         nop
 356 9:
 357         fail
 358 8:
 359         test_h_gr \val,r9
 360         .endm
 361