Revert "Turn off threaded minsym demangling by default"
[deliverable/binutils-gdb.git] / sim / testsuite / sim / sh / ftrc.s
1 # sh testcase for ftrc
2 # mach: sh
3 # as(sh): -defsym sim_cpu=0
4
5 .include "testutils.inc"
6
7 start
8 ftrc_single:
9 set_grs_a5a5
10 set_fprs_a5a5
11 # ftrc(0.0) = 0.
12 fldi0 fr0
13 ftrc fr0, fpul
14 # check results.
15 mov #0, r0
16 sts fpul, r1
17 cmp/eq r0, r1
18 bt .L0
19 fail
20 .L0:
21 # ftrc(1.5) = 1.
22 fldi1 fr0
23 fldi1 fr1
24 fldi1 fr2
25 # double it.
26 fadd fr2, fr2
27 # form the fraction.
28 fdiv fr2, fr1
29 fadd fr1, fr0
30 # now we've got 1.5 in fr0.
31 ftrc fr0, fpul
32 # check results.
33 mov #1, r0
34 sts fpul, r1
35 cmp/eq r0, r1
36 bt .L1
37 fail
38 .L1:
39 # ftrc(-1.5) = -1.
40 fldi1 fr0
41 fneg fr0
42 fldi1 fr1
43 fldi1 fr2
44 # double it.
45 fadd fr2, fr2
46 # form the fraction.
47 fdiv fr2, fr1
48 fneg fr1
49 # -1 + -0.5 = -1.5.
50 fadd fr1, fr0
51 # now we've got 1.5 in fr0.
52 ftrc fr0, fpul
53 # check results.
54 mov #1, r0
55 neg r0, r0
56 sts fpul, r1
57 cmp/eq r0, r1
58 bt ftrc_double
59 fail
60
61 ftrc_double:
62 double_prec
63 # ftrc(0.0) = 0.
64 fldi0 fr0
65 _s2d fr0, dr0
66 ftrc dr0, fpul
67 # check results.
68 mov #0, r0
69 sts fpul, r1
70 cmp/eq r0, r1
71 bt .L10
72 fail
73 .L10:
74 # ftrc(1.5) = 1.
75 fldi1 fr0
76 fldi1 fr2
77 fldi1 fr4
78 # double it.
79 single_prec
80 fadd fr4, fr4
81 # form 0.5.
82 fdiv fr4, fr2
83 fadd fr2, fr0
84 double_prec
85 # now we've got 1.5 in fr0, so do some single->double
86 # conversions and perform the ftrc.
87 _s2d fr0, dr0
88 _s2d fr2, dr2
89 _s2d fr4, dr4
90 ftrc dr0, fpul
91
92 # check results.
93 mov #1, r0
94 sts fpul, r1
95 cmp/eq r0, r1
96 bt .L11
97 fail
98 .L11:
99 # ftrc(-1.5) = -1.
100 fldi1 fr0
101 fneg fr0
102 fldi1 fr2
103 fldi1 fr4
104 single_prec
105 # double it.
106 fadd fr4, fr4
107 # form the fraction.
108 fdiv fr4, fr2
109 fneg fr2
110 # -1 + -0.5 = -1.5.
111 fadd fr2, fr0
112 double_prec
113 # now we've got 1.5 in fr0, so do some single->double
114 # conversions and perform the ftrc.
115 _s2d fr0, dr0
116 _s2d fr2, dr2
117 _s2d fr4, dr4
118 ftrc dr0, fpul
119
120 # check results.
121 mov #1, r0
122 neg r0, r0
123 sts fpul, r1
124 cmp/eq r0, r1
125 bt .L12
126 fail
127 .L12:
128 assertreg0 -1
129 assertreg -1, r1
130 test_gr_a5a5 r2
131 test_gr_a5a5 r3
132 test_gr_a5a5 r4
133 test_gr_a5a5 r5
134 test_gr_a5a5 r6
135 test_gr_a5a5 r7
136 test_gr_a5a5 r8
137 test_gr_a5a5 r9
138 test_gr_a5a5 r10
139 test_gr_a5a5 r11
140 test_gr_a5a5 r12
141 test_gr_a5a5 r13
142 test_gr_a5a5 r14
143
144 assert_dpreg_i 2, dr4
145 test_fpr_a5a5 fr6
146 test_fpr_a5a5 fr7
147 test_fpr_a5a5 fr8
148 test_fpr_a5a5 fr9
149 test_fpr_a5a5 fr10
150 test_fpr_a5a5 fr11
151 test_fpr_a5a5 fr12
152 test_fpr_a5a5 fr13
153 test_fpr_a5a5 fr14
154 test_fpr_a5a5 fr15
155 pass
156 exit 0
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