sim/tic80/ChangeLog

   1 Tue May 13 16:39:37 1997  Andrew Cagney  <cagney@b1.cygnus.com>
   2
   3         * alu.h (IMEM): Take full cia not just IP as argument.
   4
   5         * interp.c (engine_run_until_stop): Delete handling of annuled
   6         instructions.
   7         (engine_step): Ditto.
   8
   9         * insn (do_branch): New function.
  10         (do_bbo, do_bbz, do_bcnd, do_bsr, do_jsr): Use do_branch to handle
  11         annuled branches.
  12
  13 Mon May 12 17:15:52 1997  Mike Meissner  <meissner@cygnus.com>
  14
  15         * insns (do_{ld,st}): Fix tracing for ld/st.
  16
  17 Mon May 12 11:12:24 1997  Andrew Cagney  <cagney@b1.cygnus.com>
  18
  19         * sim-calls.c (sim_stop_reason): Restore keep_running after a
  20         CNTRL-C, don't re-clear it.
  21
  22         * interp.c (engine_error): stop rather than signal with SIGABRT
  23         when an error.
  24
  25         * insns (do_ld): For 64bit loads, always store LSW in rDest, MSW in
  26         rDest + 1. Also done by Michael Meissner  <meissner@cygnus.com>
  27         (do_st): Converse for store.
  28
  29         * misc.c (tic80_trace_fpu2i): Correct printf format for int type.
  30
  31 Sun May 11 11:02:57 1997  Andrew Cagney  <cagney@b1.cygnus.com>
  32
  33         * sim-calls.c (sim_stop_reason): Return a SIGINT if keep_running
  34         was cleared.
  35
  36         * interp.c (engine_step): New function.  Single step the simulator
  37         taking care of cntrl-c during a step.
  38
  39         * sim-calls.c (sim_resume): Differentiate between stepping and
  40         running so that a cntrl-c during a step is reported.
  41
  42 Sun May 11 10:54:31 1997  Mark Alexander    <marka@cygnus.com>
  43
  44         * sim-calls.c (sim_fetch_register): Use correct reg base.
  45         (sim_store_register): Ditto.
  46
  47 Sun May 11 10:25:14 1997  Michael Meissner  <meissner@cygnus.com>
  48
  49         * cpu.h (tic80_trace_shift): Add declaration.
  50         (TRACE_SHIFT): New macro to trace shift instructions.
  51
  52         * misc.c (tic80_trace_alu2): Align spacing.
  53         (tic80_trace_shift): New function to trace shifts.
  54
  55         * insns (lmo): Add missing 0b prefix to bits.
  56         (do_shift): Use ~ (unsigned32)0, instead of -1.  Use TRACE_SHIFT
  57         instead of TRACE_ALU2.
  58         (sl r): Use EndMask as is, instead of using Source+1 register.
  59         (subu): Operands are unsigned, not signed.
  60         (do_{ld,st}): Fix endian problems with ld.d/st.d.
  61
  62 Sat May 10 12:35:47 1997  Michael Meissner  <meissner@cygnus.com>
  63
  64         * insns (and{.tt,.tf,.ft,.ff}): Immediate values are unsigned, not
  65         signed.
  66
  67 Fri May  9 15:47:36 1997  Mike Meissner  <meissner@cygnus.com>
  68
  69         * insns (cmp_vals,do_cmp): Produce the correct bits as specified
  70         by the architecture.
  71         (xor): Fix xor immediate patterns to use the correct bits.
  72
  73 Fri May  9 09:55:33 1997  Andrew Cagney  <cagney@b1.cygnus.com>
  74
  75         * alu.h (long_immediate): Adjust the CIA delay-pointer as well as
  76         the NIA when a 64bit insn.
  77
  78 Thu May  8 11:57:47 1997  Michael Meissner  <meissner@cygnus.com>
  79
  80         * insns (jsr,bsr): For non-allulled calls, set r31 so that the
  81         return address does not reexecute the instruction in the delay
  82         slot.
  83         (bbo,bbz): Complement bit number to reverse the one's complement
  84         that the assembler is required to do.
  85
  86         * misc.c (tic80_trace_*): Change format slightly to accomidate
  87         real large decimal values.
  88
  89 Thu May  8 14:07:16 1997  Andrew Cagney  <cagney@b1.cygnus.com>
  90
  91         * sim-calls.c (sim_do_command): Implement.
  92         (sim_store_register): Fix typo T2H v H2T.
  93
  94 Wed May  7 11:48:55 1997  Andrew Cagney  <cagney@b1.cygnus.com>
  95
  96         * cpu.h (TRACE_FPU2, TRACE_FPU3, TRACE_FPU2I): Add.
  97         * insn: Clean up fpu tracing.
  98
  99         * sim-calls.c (sim_create_inferior): Start out with interrupts
 100         enabled.
 101
 102         * cpu.h (TRACE_SINK3), misc.c (tic80_trace_sink3): Three argument
 103         sink
 104
 105         * insns (rdcr, swcr, wrcr, brcr, rmo, lmo): Implement.
 106
 107         * insns (do_*): Remove MY_INDEX/indx argument from support functions,
 108         igen now handles this.
 109
 110         * cpu.h (CR): New macro - access TIc80 control registers.
 111
 112         * misc.c: New file.
 113         (tic80_cr2index): New function, map control register opcode index
 114         into the internal CR enum.
 115
 116         * interp.c
 117         (tic80_trace_{alu{2,3},nop,sink{1,2},{,u}cond_br,ldst}): Move from
 118         here
 119         * misc.c: to here.
 120
 121         * Makefile.in (SIM_OBJS): Add misc.o.
 122
 123 Tue May  6 15:22:58 1997  Mike Meissner  <meissner@cygnus.com>
 124
 125         * cpu.h ({,v}{S,D}P_FPR): Delete unused macros that won't work on
 126         big endian hosts.
 127         (tic80_trace_{alu{2,3},nop,sink{1,2},{,u}cond_br,ldst}): Declare
 128         new functions.
 129         (TRACE_{ALU{2,3},NOP,SINK{1,2},{,U}COND_BR,LD,ST}): New macros to
 130         trace various instruction types.
 131
 132         * insns: Modify all instructions to support semantic tracing.
 133
 134         * interp.c (toplevel): Include itable.h.
 135         (tic80_trace_{alu{2,3},nop,sink{1,2},{,u}cond_br,ldst}): New
 136         functions to provide semantic level tracing information.
 137
 138 Mon May  5 11:50:43 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 139
 140         * alu.h: Update usage of core object to reflect recent changes in
 141         ../common/sim-*core.
 142         * sim-calls.c (sim_open): Ditto.
 143
 144 Mon May  5 14:10:17 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 145
 146         * insn (cmnd): No-op cache flushes.
 147
 148         * insns (do_trap): Allow writes to STDERR.
 149
 150         * Makefile.in (SIM_OBJS): Link in sim-fpu.o.
 151         (SIM_EXTRA_LIBS): Link in the math library.
 152
 153         * alu.h: Add support for floating point unit using sim-alu.
 154
 155         * insns (fadd, fsub, fmpy, fdiv, fcmp, frnd*): Implement.
 156
 157 Fri May  2 14:57:14 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 158
 159         * sim-calls.c: Include sim-utils.h and sim-options.h.
 160
 161         * sim-main.h (sim_state): Drop sim_events and sim_core members,
 162         moved to simulator base type.
 163
 164         * alu.h (IMEM, MEM, STORE): Update track changes in common
 165         directory.
 166
 167         * insns: Drop cia argument from functions, igen now handles this.
 168
 169         * interp.c (engine_init): Include string.h/strings.h to define
 170         memset et.al.
 171
 172         * sim-main.h (sim_cia): Delcare, tracking common dir changes.
 173
 174         * cpu.h (sim_cpu): Update instruction_address with sim_cia.
 175
 176 Wed Apr 30 11:26:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 177
 178         * sim-main.h (signal.h): Include so that SIG* available to all
 179         callers of sig_halt.
 180
 181         * insns (do_shift): New function, implement shift operations.
 182         (do_trap): Add handler for trap 73 - SIGTRAP.
 183
 184 Tue Apr 29 10:58:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 185
 186         * alu.h (MEM, STORE): Force addresses to be correctly aligned.
 187
 188         * insns (do_jsr): Fix.
 189         (do_st, do_ld): Handle 64bit transfers.
 190         (do_trap): Match libgloss.
 191         (rdcr): Implement nop - Dest == r0 - variant.
 192
 193         * sim-calls.c (sim_create_inferior): Initialize SP.
 194
 195         * Makefile.in (ENGINE_H): Everything now depends on sim-options.h.
 196         (support.o): Depends on ENGINE_H.
 197
 198         * cpu.h: Four accumulators.
 199
 200         * Makefile.in (tmp-igen): Include line number information in
 201         generated files.
 202
 203         * insns (dld, dst): Fill in.
 204
 205 Mon Apr 28 13:02:26 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 206
 207         * insns (vld): Fix instruction format wrong.
 208
 209 Thu Apr 24 16:43:09 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 210
 211         * dc: Add additional rules so that minor opcode files are
 212         detected.
 213         * insns: Enable more instructions.
 214
 215         * sim-calls.c (sim_fetch_register,sim_store_register, sim_write):
 216         Implement.
 217
 218 Thu Apr 24 00:39:51 1997  Doug Evans  <dje@canuck.cygnus.com>
 219
 220         * configure: Regenerated to track ../common/aclocal.m4 changes.
 221         * Makefile.in (SIM_OBJS): Add sim-module.o, sim-profile.o.
 222         * sim-calls.c (sim_open): Call sim_module_uninstall if argument
 223         parsing fails.  Call sim_post_argv_init.
 224         (sim_close): Call sim_module_uninstall.
 225
 226 Wed Apr 23 20:05:33 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 227
 228         * insns (and, bbo, bcnd, bsr, dcache, jsr, or, xor, nor): Enable.
 229         * ic: Add fields for enabled instructions.
 230