sim/tic80/ChangeLog

   1 Thu May  8 11:57:47 1997  Michael Meissner  <meissner@cygnus.com>
   2
   3         * misc.c (SIZE_DECIMAL): Bump to 13.
   4
   5 Thu May  8 14:07:16 1997  Andrew Cagney  <cagney@b1.cygnus.com>
   6
   7         * sim-calls.c (sim_do_command): Implement.
   8         (sim_store_register): Fix typo T2H v H2T.
   9
  10 Wed May  7 11:48:55 1997  Andrew Cagney  <cagney@b1.cygnus.com>
  11
  12         * cpu.h (TRACE_FPU2, TRACE_FPU3, TRACE_FPU2I): Add.
  13         * insn: Clean up fpu tracing.
  14
  15         * sim-calls.c (sim_create_inferior): Start out with interrupts
  16         enabled.
  17
  18         * cpu.h (TRACE_SINK3), misc.c (tic80_trace_sink3): Three argument
  19         sink
  20
  21         * insns (rdcr, swcr, wrcr, brcr, rmo, lmo): Implement.
  22
  23         * insns (do_*): Remove MY_INDEX/indx argument from support functions,
  24         igen now handles this.
  25
  26         * cpu.h (CR): New macro - access TIc80 control registers.
  27
  28         * misc.c: New file.
  29         (tic80_cr2index): New function, map control register opcode index
  30         into the internal CR enum.
  31
  32         * interp.c
  33         (tic80_trace_{alu{2,3},nop,sink{1,2},{,u}cond_br,ldst}): Move from
  34         here
  35         * misc.c: to here.
  36
  37         * Makefile.in (SIM_OBJS): Add misc.o.
  38
  39 Tue May  6 15:22:58 1997  Mike Meissner  <meissner@cygnus.com>
  40
  41         * cpu.h ({,v}{S,D}P_FPR): Delete unused macros that won't work on
  42         big endian hosts.
  43         (tic80_trace_{alu{2,3},nop,sink{1,2},{,u}cond_br,ldst}): Declare
  44         new functions.
  45         (TRACE_{ALU{2,3},NOP,SINK{1,2},{,U}COND_BR,LD,ST}): New macros to
  46         trace various instruction types.
  47
  48         * insns: Modify all instructions to support semantic tracing.
  49
  50         * interp.c (toplevel): Include itable.h.
  51         (tic80_trace_{alu{2,3},nop,sink{1,2},{,u}cond_br,ldst}): New
  52         functions to provide semantic level tracing information.
  53
  54 Mon May  5 11:50:43 1997  Andrew Cagney  <cagney@b1.cygnus.com>
  55
  56         * alu.h: Update usage of core object to reflect recent changes in
  57         ../common/sim-*core.
  58         * sim-calls.c (sim_open): Ditto.
  59
  60 Mon May  5 14:10:17 1997  Andrew Cagney  <cagney@b1.cygnus.com>
  61
  62         * insn (cmnd): No-op cache flushes.
  63
  64         * insns (do_trap): Allow writes to STDERR.
  65
  66         * Makefile.in (SIM_OBJS): Link in sim-fpu.o.
  67         (SIM_EXTRA_LIBS): Link in the math library.
  68
  69         * alu.h: Add support for floating point unit using sim-alu.
  70
  71         * insns (fadd, fsub, fmpy, fdiv, fcmp, frnd*): Implement.
  72
  73 Fri May  2 14:57:14 1997  Andrew Cagney  <cagney@b1.cygnus.com>
  74
  75         * sim-calls.c: Include sim-utils.h and sim-options.h.
  76
  77         * sim-main.h (sim_state): Drop sim_events and sim_core members,
  78         moved to simulator base type.
  79
  80         * alu.h (IMEM, MEM, STORE): Update track changes in common
  81         directory.
  82
  83         * insns: Drop cia argument from functions, igen now handles this.
  84
  85         * interp.c (engine_init): Include string.h/strings.h to define
  86         memset et.al.
  87
  88         * sim-main.h (sim_cia): Delcare, tracking common dir changes.
  89
  90         * cpu.h (sim_cpu): Update instruction_address with sim_cia.
  91
  92 Wed Apr 30 11:26:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
  93
  94         * sim-main.h (signal.h): Include so that SIG* available to all
  95         callers of sig_halt.
  96
  97         * insns (do_shift): New function, implement shift operations.
  98         (do_trap): Add handler for trap 73 - SIGTRAP.
  99
 100 Tue Apr 29 10:58:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 101
 102         * alu.h (MEM, STORE): Force addresses to be correctly aligned.
 103
 104         * insns (do_jsr): Fix.
 105         (do_st, do_ld): Handle 64bit transfers.
 106         (do_trap): Match libgloss.
 107         (rdcr): Implement nop - Dest == r0 - variant.
 108
 109         * sim-calls.c (sim_create_inferior): Initialize SP.
 110
 111         * Makefile.in (ENGINE_H): Everything now depends on sim-options.h.
 112         (support.o): Depends on ENGINE_H.
 113
 114         * cpu.h: Four accumulators.
 115
 116         * Makefile.in (tmp-igen): Include line number information in
 117         generated files.
 118
 119         * insns (dld, dst): Fill in.
 120
 121 Mon Apr 28 13:02:26 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 122
 123         * insns (vld): Fix instruction format wrong.
 124
 125 Thu Apr 24 16:43:09 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 126
 127         * dc: Add additional rules so that minor opcode files are
 128         detected.
 129         * insns: Enable more instructions.
 130
 131         * sim-calls.c (sim_fetch_register,sim_store_register, sim_write):
 132         Implement.
 133
 134 Thu Apr 24 00:39:51 1997  Doug Evans  <dje@canuck.cygnus.com>
 135
 136         * configure: Regenerated to track ../common/aclocal.m4 changes.
 137         * Makefile.in (SIM_OBJS): Add sim-module.o, sim-profile.o.
 138         * sim-calls.c (sim_open): Call sim_module_uninstall if argument
 139         parsing fails.  Call sim_post_argv_init.
 140         (sim_close): Call sim_module_uninstall.
 141
 142 Wed Apr 23 20:05:33 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 143
 144         * insns (and, bbo, bcnd, bsr, dcache, jsr, or, xor, nor): Enable.
 145         * ic: Add fields for enabled instructions.
 146