Part II of adding callback argument to sim_open(). Update all the
[deliverable/binutils-gdb.git] / sim / tic80 / sim-calls.c
1 /* This file is part of the program psim.
2
3 Copyright (C) 1994-1996, Andrew Cagney <cagney@highland.com.au>
4 Copyright (C) 1997, Free Software Foundation
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
19
20 */
21
22
23 #include <signal.h> /* FIXME - should be machine dependant version */
24 #include <stdarg.h>
25 #include <ctype.h>
26
27 #include "bfd.h"
28 #include "sim-main.h"
29 #include "sim-utils.h"
30 #include "sim-options.h"
31
32 #ifdef HAVE_STDLIB_H
33 #include <stdlib.h>
34 #endif
35
36 #ifdef HAVE_STRING_H
37 #include <string.h>
38 #else
39 #ifdef HAVE_STRINGS_H
40 #include <strings.h>
41 #endif
42 #endif
43
44
45 #define SIM_ADDR unsigned
46
47 /* Structures used by the simulator, for gdb just have static structures */
48
49 struct sim_state simulation = { 0 };
50
51
52 SIM_DESC
53 sim_open (SIM_OPEN_KIND kind, struct host_callback_struct *callback, char **argv)
54 {
55 SIM_DESC sd = &simulation;
56 STATE_OPEN_KIND (sd) = kind;
57 STATE_MAGIC (sd) = SIM_MAGIC_NUMBER;
58 STATE_CALLBACK (&simulation) = callback;
59
60 if (sim_pre_argv_init (sd, argv[0]) != SIM_RC_OK)
61 return 0;
62
63 /* getopt will print the error message so we just have to exit if this fails.
64 FIXME: Hmmm... in the case of gdb we need getopt to call
65 print_filtered. */
66 if (sim_parse_args (sd, argv) != SIM_RC_OK)
67 {
68 /* Uninstall the modules to avoid memory leaks,
69 file descriptor leaks, etc. */
70 sim_module_uninstall (sd);
71 return 0;
72 }
73
74 if (sim_post_argv_init (sd) != SIM_RC_OK)
75 {
76 /* Uninstall the modules to avoid memory leaks,
77 file descriptor leaks, etc. */
78 sim_module_uninstall (sd);
79 return 0;
80 }
81
82 /* Initialize the main processor */
83 memset (&STATE_CPU (sd, 0)->reg, 0, sizeof STATE_CPU (sd, 0)->reg);
84 memset (&STATE_CPU (sd, 0)->acc, 0, sizeof STATE_CPU (sd, 0)->acc);
85 memset (&STATE_CPU (sd, 0)->cr, 0, sizeof STATE_CPU (sd, 0)->cr);
86 STATE_CPU (sd, 0)->is_user_mode = 0;
87 memset (&STATE_CPU (sd, 0)->cia, 0, sizeof STATE_CPU (sd, 0)->cia);
88 CPU_STATE (STATE_CPU (sd, 0)) = sd;
89
90 /* establish the simulator configuration */
91 sim_config (sd, LITTLE_ENDIAN/*d30v always big endian*/);
92
93 #define TIC80_MEM_START 0x2000000
94 #define TIC80_MEM_SIZE 0x100000
95
96 /* external memory */
97 sim_core_attach(sd,
98 NULL,
99 attach_raw_memory,
100 access_read_write_exec,
101 0, TIC80_MEM_START, TIC80_MEM_SIZE, NULL, NULL);
102 sim_core_attach(sd,
103 NULL,
104 attach_raw_memory,
105 access_read_write_exec,
106 0, 0, TIC80_MEM_SIZE, NULL, NULL);
107
108 /* FIXME: for now */
109 return sd;
110 }
111
112
113 void
114 sim_close (SIM_DESC sd, int quitting)
115 {
116 /* Uninstall the modules to avoid memory leaks,
117 file descriptor leaks, etc. */
118 sim_module_uninstall (sd);
119 }
120
121
122 SIM_RC
123 sim_load (SIM_DESC sd, char *prog, bfd *abfd, int from_tty)
124 {
125 bfd *prog_bfd;
126
127 prog_bfd = sim_load_file (sd, STATE_MY_NAME (sd),
128 STATE_CALLBACK (sd),
129 prog,
130 /* pass NULL for abfd, we always open our own */
131 NULL,
132 STATE_OPEN_KIND (sd) == SIM_OPEN_DEBUG);
133 if (prog_bfd == NULL)
134 return SIM_RC_FAIL;
135 sim_analyze_program (sd, prog_bfd);
136 return SIM_RC_OK;
137 }
138
139
140 void
141 sim_kill (SIM_DESC sd)
142 {
143 }
144
145
146 int
147 sim_read (SIM_DESC sd, SIM_ADDR mem, unsigned char *buf, int length)
148 {
149 return sim_core_read_buffer (sd, sim_core_write_map,
150 buf, mem, length);
151 }
152
153
154 int
155 sim_write (SIM_DESC sd, SIM_ADDR mem, unsigned char *buf, int length)
156 {
157 return sim_core_write_buffer (sd, sim_core_write_map,
158 buf, mem, length);
159 }
160
161
162 /* FIXME - these magic numbers need to be moved elsewhere */
163
164 #define SP_REGNUM 1 /* Contains address of top of stack */
165 #define FP_REGNUM 31 /* Contains address of executing stack frame */
166 #define PC_REGNUM 32 /* Contains program counter (FIXME?) */
167 #define NPC_REGNUM 33 /* Contains the next program counter (FIXME?) */
168 #define A0_REGNUM 34 /* Accumulator register 0 */
169 #define A3_REGNUM 37 /* Accumulator register 1 */
170
171 #define R0_REGNUM 0 /* General Purpose Register 0 - for sim */
172 #define Rn_REGNUM 31 /* Last General Purpose Register - for sim */
173 #define An_REGNUM A3_REGNUM /* Last Accumulator register - for sim */
174
175 void
176 sim_fetch_register (SIM_DESC sd, int regnr, unsigned char *buf)
177 {
178 if (regnr == R0_REGNUM)
179 memset (buf, 0, sizeof (unsigned32));
180 else if (regnr > R0_REGNUM && regnr <= Rn_REGNUM)
181 *(unsigned32*)buf = H2T_4 (STATE_CPU (sd, 0)->reg[regnr - R0_REGNUM]);
182 else if (regnr == PC_REGNUM)
183 *(unsigned32*)buf = H2T_4 (STATE_CPU (sd, 0)->cia.ip);
184 else if (regnr == NPC_REGNUM)
185 *(unsigned32*)buf = H2T_4 (STATE_CPU (sd, 0)->cia.dp);
186 else if (regnr >= A0_REGNUM && regnr <= An_REGNUM)
187 *(unsigned64*)buf = H2T_8 (STATE_CPU (sd, 0)->acc[regnr - A0_REGNUM]);
188 else
189 sim_io_error (sd, "sim_fetch_register - unknown register nr %d", regnr);
190 return;
191 }
192
193
194 void
195 sim_store_register (SIM_DESC sd, int regnr, unsigned char *buf)
196 {
197 if (regnr >= R0_REGNUM && regnr <= Rn_REGNUM)
198 STATE_CPU (sd, 0)->reg[regnr - R0_REGNUM] = T2H_4 (*(unsigned32*)buf);
199 else if (regnr == PC_REGNUM)
200 STATE_CPU (sd, 0)->cia.ip = T2H_4 (*(unsigned32*)buf);
201 else if (regnr == NPC_REGNUM)
202 STATE_CPU (sd, 0)->cia.dp = T2H_4 (*(unsigned32*)buf);
203 else if (regnr == A0_REGNUM && regnr <= An_REGNUM)
204 STATE_CPU (sd, 0)->acc[regnr - A0_REGNUM] = T2H_8 (*(unsigned64*)buf);
205 else
206 sim_io_error (sd, "sim_fetch_register - unknown register nr %d", regnr);
207 return;
208 }
209
210
211 void
212 sim_info (SIM_DESC sd, int verbose)
213 {
214 }
215
216
217 SIM_RC
218 sim_create_inferior (SIM_DESC sd,
219 char **argv,
220 char **envp)
221 {
222 STATE_CPU (sd, 0)->cia.ip = STATE_START_ADDR(sd);
223 STATE_CPU (sd, 0)->cia.dp = (STATE_START_ADDR(sd)
224 + sizeof (instruction_word));
225 STATE_CPU (sd, 0)->cr[IE_CR] |= IE_CR_IE;
226 STATE_CPU (sd, 0)->reg[1] = TIC80_MEM_START + TIC80_MEM_SIZE - 16;
227 return SIM_RC_OK;
228 }
229
230
231 void
232 sim_do_command (SIM_DESC sd, char *cmd)
233 {
234 if (sim_args_command (sd, cmd) != SIM_RC_OK)
235 sim_io_eprintf (sd, "Unknown command `%s'\n", cmd);
236 }
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