52a3cb23febb1e83c880ac84ea04a39092afd63c
[deliverable/binutils-gdb.git] / sim / txvu / engine-sky.c
1 /* Copyright (C) 1994-1997, Andrew Cagney <cagney@highland.com.au>
2 Copyright (C) 1998, Cygnus Solutions
3
4 This program is free software; you can redistribute it and/or modify
5 it under the terms of the GNU General Public License as published by
6 the Free Software Foundation; either version 2 of the License, or
7 (at your option) any later version.
8
9 This program is distributed in the hope that it will be useful,
10 but WITHOUT ANY WARRANTY; without even the implied warranty of
11 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 GNU General Public License for more details.
13
14 You should have received a copy of the GNU General Public License
15 along with this program; if not, write to the Free Software
16 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
17
18 */
19
20 #ifndef _ENGINE_C_
21 #define _ENGINE_C_
22
23 #include "sim-inline.c"
24
25 #include "sim-main.h"
26 #include "itable.h"
27 #include "idecode.h"
28 #include "semantics.h"
29 #include "icache.h"
30 #include "engine.h"
31 #include "support.h"
32
33 #include "sim-assert.h"
34
35 #include "hardware.h"
36
37 enum {
38 /* greater or equal to zero => table */
39 function_entry = -1,
40 boolean_entry = -2,
41 };
42
43 typedef struct _idecode_table_entry {
44 int shift;
45 unsigned32 mask;
46 unsigned32 value;
47 void *function_or_table;
48 } idecode_table_entry;
49
50
51 INLINE_ENGINE\
52 (void) engine_run
53 (SIM_DESC sd,
54 int next_cpu_nr,
55 int siggnal)
56 {
57 sim_cpu *processor = NULL;
58 instruction_address cia;
59 int current_cpu = next_cpu_nr;
60 instruction_word instruction_0;
61
62 /* Hard coded main loop. Not pretty, but should work. */
63 ASSERT(current_cpu >= 0 && current_cpu < NUMBER_CPUS);
64
65 cia = CPU_CIA (0); /* Only the 5900 uses this. */
66 processor = STATE_CPU (sd, 0); /* Only the 5900 uses this. */
67
68 switch(current_cpu)
69 {
70 case 0:
71 goto cpu_0;
72 case 1:
73 goto cpu_1;
74 case 2:
75 goto cpu_2;
76 case 3:
77 goto cpu_3;
78 case 4:
79 goto cpu_4;
80 }
81
82 while (1)
83 {
84
85 cpu_0:
86
87 cia = CPU_CIA (processor);
88 instruction_0 = IMEM (cia);
89
90 #if defined (ENGINE_ISSUE_PREFIX_HOOK)
91 ENGINE_ISSUE_PREFIX_HOOK();
92 #endif
93
94 cia = idecode_issue(sd, instruction_0, cia);
95
96 #if defined (ENGINE_ISSUE_POSTFIX_HOOK)
97 ENGINE_ISSUE_POSTFIX_HOOK();
98 #endif
99
100 /* Update the instruction address */
101 CPU_CIA (processor) = cia;
102
103 cpu_1:
104 pke0_issue();
105
106 cpu_2:
107 pke1_issue();
108
109 cpu_3:
110 vu0_issue();
111
112 cpu_4:
113 vu1_issue();
114
115 events:
116
117 /* process any events */
118 if (sim_events_tick (sd))
119 {
120 sim_events_process (sd);
121 }
122 }
123 }
124
125 #endif /* _ENGINE_C_*/
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