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ALSA: AACI cleanup
[deliverable/linux.git] / sound / arm / aaci.c
1 /*
2 * linux/sound/arm/aaci.c - ARM PrimeCell AACI PL041 driver
3 *
4 * Copyright (C) 2003 Deep Blue Solutions Ltd, All Rights Reserved.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * Documentation: ARM DDI 0173B
11 */
12 #include <linux/module.h>
13 #include <linux/delay.h>
14 #include <linux/init.h>
15 #include <linux/ioport.h>
16 #include <linux/device.h>
17 #include <linux/spinlock.h>
18 #include <linux/interrupt.h>
19 #include <linux/err.h>
20 #include <linux/amba/bus.h>
21 #include <linux/io.h>
22
23 #include <sound/core.h>
24 #include <sound/initval.h>
25 #include <sound/ac97_codec.h>
26 #include <sound/pcm.h>
27 #include <sound/pcm_params.h>
28
29 #include "aaci.h"
30 #include "devdma.h"
31
32 #define DRIVER_NAME "aaci-pl041"
33
34 /*
35 * PM support is not complete. Turn it off.
36 */
37 #undef CONFIG_PM
38
39 static void aaci_ac97_select_codec(struct aaci *aaci, struct snd_ac97 *ac97)
40 {
41 u32 v, maincr = aaci->maincr | MAINCR_SCRA(ac97->num);
42
43 /*
44 * Ensure that the slot 1/2 RX registers are empty.
45 */
46 v = readl(aaci->base + AACI_SLFR);
47 if (v & SLFR_2RXV)
48 readl(aaci->base + AACI_SL2RX);
49 if (v & SLFR_1RXV)
50 readl(aaci->base + AACI_SL1RX);
51
52 writel(maincr, aaci->base + AACI_MAINCR);
53 }
54
55 /*
56 * P29:
57 * The recommended use of programming the external codec through slot 1
58 * and slot 2 data is to use the channels during setup routines and the
59 * slot register at any other time. The data written into slot 1, slot 2
60 * and slot 12 registers is transmitted only when their corresponding
61 * SI1TxEn, SI2TxEn and SI12TxEn bits are set in the AACI_MAINCR
62 * register.
63 */
64 static void aaci_ac97_write(struct snd_ac97 *ac97, unsigned short reg,
65 unsigned short val)
66 {
67 struct aaci *aaci = ac97->private_data;
68 u32 v;
69 int timeout = 5000;
70
71 if (ac97->num >= 4)
72 return;
73
74 mutex_lock(&aaci->ac97_sem);
75
76 aaci_ac97_select_codec(aaci, ac97);
77
78 /*
79 * P54: You must ensure that AACI_SL2TX is always written
80 * to, if required, before data is written to AACI_SL1TX.
81 */
82 writel(val << 4, aaci->base + AACI_SL2TX);
83 writel(reg << 12, aaci->base + AACI_SL1TX);
84
85 /*
86 * Wait for the transmission of both slots to complete.
87 */
88 do {
89 v = readl(aaci->base + AACI_SLFR);
90 } while ((v & (SLFR_1TXB|SLFR_2TXB)) && --timeout);
91
92 if (!timeout)
93 dev_err(&aaci->dev->dev,
94 "timeout waiting for write to complete\n");
95
96 mutex_unlock(&aaci->ac97_sem);
97 }
98
99 /*
100 * Read an AC'97 register.
101 */
102 static unsigned short aaci_ac97_read(struct snd_ac97 *ac97, unsigned short reg)
103 {
104 struct aaci *aaci = ac97->private_data;
105 u32 v;
106 int timeout = 5000;
107 int retries = 10;
108
109 if (ac97->num >= 4)
110 return ~0;
111
112 mutex_lock(&aaci->ac97_sem);
113
114 aaci_ac97_select_codec(aaci, ac97);
115
116 /*
117 * Write the register address to slot 1.
118 */
119 writel((reg << 12) | (1 << 19), aaci->base + AACI_SL1TX);
120
121 /*
122 * Wait for the transmission to complete.
123 */
124 do {
125 v = readl(aaci->base + AACI_SLFR);
126 } while ((v & SLFR_1TXB) && --timeout);
127
128 if (!timeout) {
129 dev_err(&aaci->dev->dev, "timeout on slot 1 TX busy\n");
130 v = ~0;
131 goto out;
132 }
133
134 /*
135 * Give the AC'97 codec more than enough time
136 * to respond. (42us = ~2 frames at 48kHz.)
137 */
138 udelay(42);
139
140 /*
141 * Wait for slot 2 to indicate data.
142 */
143 timeout = 5000;
144 do {
145 cond_resched();
146 v = readl(aaci->base + AACI_SLFR) & (SLFR_1RXV|SLFR_2RXV);
147 } while ((v != (SLFR_1RXV|SLFR_2RXV)) && --timeout);
148
149 if (!timeout) {
150 dev_err(&aaci->dev->dev, "timeout on RX valid\n");
151 v = ~0;
152 goto out;
153 }
154
155 do {
156 v = readl(aaci->base + AACI_SL1RX) >> 12;
157 if (v == reg) {
158 v = readl(aaci->base + AACI_SL2RX) >> 4;
159 break;
160 } else if (--retries) {
161 dev_warn(&aaci->dev->dev,
162 "ac97 read back fail. retry\n");
163 continue;
164 } else {
165 dev_warn(&aaci->dev->dev,
166 "wrong ac97 register read back (%x != %x)\n",
167 v, reg);
168 v = ~0;
169 }
170 } while (retries);
171 out:
172 mutex_unlock(&aaci->ac97_sem);
173 return v;
174 }
175
176 static inline void aaci_chan_wait_ready(struct aaci_runtime *aacirun)
177 {
178 u32 val;
179 int timeout = 5000;
180
181 do {
182 val = readl(aacirun->base + AACI_SR);
183 } while (val & (SR_TXB|SR_RXB) && timeout--);
184 }
185
186
187
188 /*
189 * Interrupt support.
190 */
191 static void aaci_fifo_irq(struct aaci *aaci, int channel, u32 mask)
192 {
193 if (mask & ISR_ORINTR) {
194 dev_warn(&aaci->dev->dev, "RX overrun on chan %d\n", channel);
195 writel(ICLR_RXOEC1 << channel, aaci->base + AACI_INTCLR);
196 }
197
198 if (mask & ISR_RXTOINTR) {
199 dev_warn(&aaci->dev->dev, "RX timeout on chan %d\n", channel);
200 writel(ICLR_RXTOFEC1 << channel, aaci->base + AACI_INTCLR);
201 }
202
203 if (mask & ISR_RXINTR) {
204 struct aaci_runtime *aacirun = &aaci->capture;
205 void *ptr;
206
207 if (!aacirun->substream || !aacirun->start) {
208 dev_warn(&aaci->dev->dev, "RX interrupt???\n");
209 writel(0, aacirun->base + AACI_IE);
210 return;
211 }
212 ptr = aacirun->ptr;
213
214 do {
215 unsigned int len = aacirun->fifosz;
216 u32 val;
217
218 if (aacirun->bytes <= 0) {
219 aacirun->bytes += aacirun->period;
220 aacirun->ptr = ptr;
221 spin_unlock(&aaci->lock);
222 snd_pcm_period_elapsed(aacirun->substream);
223 spin_lock(&aaci->lock);
224 }
225 if (!(aacirun->cr & CR_EN))
226 break;
227
228 val = readl(aacirun->base + AACI_SR);
229 if (!(val & SR_RXHF))
230 break;
231 if (!(val & SR_RXFF))
232 len >>= 1;
233
234 aacirun->bytes -= len;
235
236 /* reading 16 bytes at a time */
237 for( ; len > 0; len -= 16) {
238 asm(
239 "ldmia %1, {r0, r1, r2, r3}\n\t"
240 "stmia %0!, {r0, r1, r2, r3}"
241 : "+r" (ptr)
242 : "r" (aacirun->fifo)
243 : "r0", "r1", "r2", "r3", "cc");
244
245 if (ptr >= aacirun->end)
246 ptr = aacirun->start;
247 }
248 } while(1);
249 aacirun->ptr = ptr;
250 }
251
252 if (mask & ISR_URINTR) {
253 dev_dbg(&aaci->dev->dev, "TX underrun on chan %d\n", channel);
254 writel(ICLR_TXUEC1 << channel, aaci->base + AACI_INTCLR);
255 }
256
257 if (mask & ISR_TXINTR) {
258 struct aaci_runtime *aacirun = &aaci->playback;
259 void *ptr;
260
261 if (!aacirun->substream || !aacirun->start) {
262 dev_warn(&aaci->dev->dev, "TX interrupt???\n");
263 writel(0, aacirun->base + AACI_IE);
264 return;
265 }
266
267 ptr = aacirun->ptr;
268 do {
269 unsigned int len = aacirun->fifosz;
270 u32 val;
271
272 if (aacirun->bytes <= 0) {
273 aacirun->bytes += aacirun->period;
274 aacirun->ptr = ptr;
275 spin_unlock(&aaci->lock);
276 snd_pcm_period_elapsed(aacirun->substream);
277 spin_lock(&aaci->lock);
278 }
279 if (!(aacirun->cr & CR_EN))
280 break;
281
282 val = readl(aacirun->base + AACI_SR);
283 if (!(val & SR_TXHE))
284 break;
285 if (!(val & SR_TXFE))
286 len >>= 1;
287
288 aacirun->bytes -= len;
289
290 /* writing 16 bytes at a time */
291 for ( ; len > 0; len -= 16) {
292 asm(
293 "ldmia %0!, {r0, r1, r2, r3}\n\t"
294 "stmia %1, {r0, r1, r2, r3}"
295 : "+r" (ptr)
296 : "r" (aacirun->fifo)
297 : "r0", "r1", "r2", "r3", "cc");
298
299 if (ptr >= aacirun->end)
300 ptr = aacirun->start;
301 }
302 } while (1);
303
304 aacirun->ptr = ptr;
305 }
306 }
307
308 static irqreturn_t aaci_irq(int irq, void *devid)
309 {
310 struct aaci *aaci = devid;
311 u32 mask;
312 int i;
313
314 spin_lock(&aaci->lock);
315 mask = readl(aaci->base + AACI_ALLINTS);
316 if (mask) {
317 u32 m = mask;
318 for (i = 0; i < 4; i++, m >>= 7) {
319 if (m & 0x7f) {
320 aaci_fifo_irq(aaci, i, m);
321 }
322 }
323 }
324 spin_unlock(&aaci->lock);
325
326 return mask ? IRQ_HANDLED : IRQ_NONE;
327 }
328
329
330
331 /*
332 * ALSA support.
333 */
334
335 struct aaci_stream {
336 unsigned char codec_idx;
337 unsigned char rate_idx;
338 };
339
340 static struct aaci_stream aaci_streams[] = {
341 [ACSTREAM_FRONT] = {
342 .codec_idx = 0,
343 .rate_idx = AC97_RATES_FRONT_DAC,
344 },
345 [ACSTREAM_SURROUND] = {
346 .codec_idx = 0,
347 .rate_idx = AC97_RATES_SURR_DAC,
348 },
349 [ACSTREAM_LFE] = {
350 .codec_idx = 0,
351 .rate_idx = AC97_RATES_LFE_DAC,
352 },
353 };
354
355 static inline unsigned int aaci_rate_mask(struct aaci *aaci, int streamid)
356 {
357 struct aaci_stream *s = aaci_streams + streamid;
358 return aaci->ac97_bus->codec[s->codec_idx]->rates[s->rate_idx];
359 }
360
361 static unsigned int rate_list[] = {
362 5512, 8000, 11025, 16000, 22050, 32000, 44100,
363 48000, 64000, 88200, 96000, 176400, 192000
364 };
365
366 /*
367 * Double-rate rule: we can support double rate iff channels == 2
368 * (unimplemented)
369 */
370 static int
371 aaci_rule_rate_by_channels(struct snd_pcm_hw_params *p, struct snd_pcm_hw_rule *rule)
372 {
373 struct aaci *aaci = rule->private;
374 unsigned int rate_mask = SNDRV_PCM_RATE_8000_48000|SNDRV_PCM_RATE_5512;
375 struct snd_interval *c = hw_param_interval(p, SNDRV_PCM_HW_PARAM_CHANNELS);
376
377 switch (c->max) {
378 case 6:
379 rate_mask &= aaci_rate_mask(aaci, ACSTREAM_LFE);
380 case 4:
381 rate_mask &= aaci_rate_mask(aaci, ACSTREAM_SURROUND);
382 case 2:
383 rate_mask &= aaci_rate_mask(aaci, ACSTREAM_FRONT);
384 }
385
386 return snd_interval_list(hw_param_interval(p, rule->var),
387 ARRAY_SIZE(rate_list), rate_list,
388 rate_mask);
389 }
390
391 static struct snd_pcm_hardware aaci_hw_info = {
392 .info = SNDRV_PCM_INFO_MMAP |
393 SNDRV_PCM_INFO_MMAP_VALID |
394 SNDRV_PCM_INFO_INTERLEAVED |
395 SNDRV_PCM_INFO_BLOCK_TRANSFER |
396 SNDRV_PCM_INFO_RESUME,
397
398 /*
399 * ALSA doesn't support 18-bit or 20-bit packed into 32-bit
400 * words. It also doesn't support 12-bit at all.
401 */
402 .formats = SNDRV_PCM_FMTBIT_S16_LE,
403
404 /* should this be continuous or knot? */
405 .rates = SNDRV_PCM_RATE_CONTINUOUS,
406 .rate_max = 48000,
407 .rate_min = 4000,
408 .channels_min = 2,
409 .channels_max = 6,
410 .buffer_bytes_max = 64 * 1024,
411 .period_bytes_min = 256,
412 .period_bytes_max = PAGE_SIZE,
413 .periods_min = 4,
414 .periods_max = PAGE_SIZE / 16,
415 };
416
417 static int __aaci_pcm_open(struct aaci *aaci,
418 struct snd_pcm_substream *substream,
419 struct aaci_runtime *aacirun)
420 {
421 struct snd_pcm_runtime *runtime = substream->runtime;
422 int ret;
423
424 aacirun->substream = substream;
425 runtime->private_data = aacirun;
426 runtime->hw = aaci_hw_info;
427
428 /*
429 * FIXME: ALSA specifies fifo_size in bytes. If we're in normal
430 * mode, each 32-bit word contains one sample. If we're in
431 * compact mode, each 32-bit word contains two samples, effectively
432 * halving the FIFO size. However, we don't know for sure which
433 * we'll be using at this point. We set this to the lower limit.
434 */
435 runtime->hw.fifo_size = aaci->fifosize * 2;
436
437 /*
438 * Add rule describing hardware rate dependency
439 * on the number of channels.
440 */
441 ret = snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
442 aaci_rule_rate_by_channels, aaci,
443 SNDRV_PCM_HW_PARAM_CHANNELS,
444 SNDRV_PCM_HW_PARAM_RATE, -1);
445 if (ret)
446 goto out;
447
448 ret = request_irq(aaci->dev->irq[0], aaci_irq, IRQF_SHARED|IRQF_DISABLED,
449 DRIVER_NAME, aaci);
450 if (ret)
451 goto out;
452
453 return 0;
454
455 out:
456 return ret;
457 }
458
459
460 /*
461 * Common ALSA stuff
462 */
463 static int aaci_pcm_close(struct snd_pcm_substream *substream)
464 {
465 struct aaci *aaci = substream->private_data;
466 struct aaci_runtime *aacirun = substream->runtime->private_data;
467
468 WARN_ON(aacirun->cr & CR_EN);
469
470 aacirun->substream = NULL;
471 free_irq(aaci->dev->irq[0], aaci);
472
473 return 0;
474 }
475
476 static int aaci_pcm_hw_free(struct snd_pcm_substream *substream)
477 {
478 struct aaci_runtime *aacirun = substream->runtime->private_data;
479
480 /*
481 * This must not be called with the device enabled.
482 */
483 WARN_ON(aacirun->cr & CR_EN);
484
485 if (aacirun->pcm_open)
486 snd_ac97_pcm_close(aacirun->pcm);
487 aacirun->pcm_open = 0;
488
489 /*
490 * Clear out the DMA and any allocated buffers.
491 */
492 devdma_hw_free(NULL, substream);
493
494 return 0;
495 }
496
497 static int aaci_pcm_hw_params(struct snd_pcm_substream *substream,
498 struct aaci_runtime *aacirun,
499 struct snd_pcm_hw_params *params)
500 {
501 int err;
502
503 aaci_pcm_hw_free(substream);
504
505 err = devdma_hw_alloc(NULL, substream,
506 params_buffer_bytes(params));
507 if (err < 0)
508 goto out;
509
510 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
511 err = snd_ac97_pcm_open(aacirun->pcm, params_rate(params),
512 params_channels(params),
513 aacirun->pcm->r[0].slots);
514 else
515 err = snd_ac97_pcm_open(aacirun->pcm, params_rate(params),
516 params_channels(params),
517 aacirun->pcm->r[1].slots);
518
519 if (err)
520 goto out;
521
522 aacirun->pcm_open = 1;
523
524 out:
525 return err;
526 }
527
528 static int aaci_pcm_prepare(struct snd_pcm_substream *substream)
529 {
530 struct snd_pcm_runtime *runtime = substream->runtime;
531 struct aaci_runtime *aacirun = runtime->private_data;
532
533 aacirun->start = (void *)runtime->dma_area;
534 aacirun->end = aacirun->start + snd_pcm_lib_buffer_bytes(substream);
535 aacirun->ptr = aacirun->start;
536 aacirun->period =
537 aacirun->bytes = frames_to_bytes(runtime, runtime->period_size);
538
539 return 0;
540 }
541
542 static snd_pcm_uframes_t aaci_pcm_pointer(struct snd_pcm_substream *substream)
543 {
544 struct snd_pcm_runtime *runtime = substream->runtime;
545 struct aaci_runtime *aacirun = runtime->private_data;
546 ssize_t bytes = aacirun->ptr - aacirun->start;
547
548 return bytes_to_frames(runtime, bytes);
549 }
550
551 static int aaci_pcm_mmap(struct snd_pcm_substream *substream, struct vm_area_struct *vma)
552 {
553 return devdma_mmap(NULL, substream, vma);
554 }
555
556
557 /*
558 * Playback specific ALSA stuff
559 */
560 static const u32 channels_to_txmask[] = {
561 [2] = CR_SL3 | CR_SL4,
562 [4] = CR_SL3 | CR_SL4 | CR_SL7 | CR_SL8,
563 [6] = CR_SL3 | CR_SL4 | CR_SL7 | CR_SL8 | CR_SL6 | CR_SL9,
564 };
565
566 /*
567 * We can support two and four channel audio. Unfortunately
568 * six channel audio requires a non-standard channel ordering:
569 * 2 -> FL(3), FR(4)
570 * 4 -> FL(3), FR(4), SL(7), SR(8)
571 * 6 -> FL(3), FR(4), SL(7), SR(8), C(6), LFE(9) (required)
572 * FL(3), FR(4), C(6), SL(7), SR(8), LFE(9) (actual)
573 * This requires an ALSA configuration file to correct.
574 */
575 static unsigned int channel_list[] = { 2, 4, 6 };
576
577 static int
578 aaci_rule_channels(struct snd_pcm_hw_params *p, struct snd_pcm_hw_rule *rule)
579 {
580 struct aaci *aaci = rule->private;
581 unsigned int chan_mask = 1 << 0, slots;
582
583 /*
584 * pcms[0] is the our 5.1 PCM instance.
585 */
586 slots = aaci->ac97_bus->pcms[0].r[0].slots;
587 if (slots & (1 << AC97_SLOT_PCM_SLEFT)) {
588 chan_mask |= 1 << 1;
589 if (slots & (1 << AC97_SLOT_LFE))
590 chan_mask |= 1 << 2;
591 }
592
593 return snd_interval_list(hw_param_interval(p, rule->var),
594 ARRAY_SIZE(channel_list), channel_list,
595 chan_mask);
596 }
597
598 static int aaci_pcm_open(struct snd_pcm_substream *substream)
599 {
600 struct aaci *aaci = substream->private_data;
601 int ret;
602
603 /*
604 * Add rule describing channel dependency.
605 */
606 ret = snd_pcm_hw_rule_add(substream->runtime, 0,
607 SNDRV_PCM_HW_PARAM_CHANNELS,
608 aaci_rule_channels, aaci,
609 SNDRV_PCM_HW_PARAM_CHANNELS, -1);
610 if (ret)
611 return ret;
612
613 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
614 ret = __aaci_pcm_open(aaci, substream, &aaci->playback);
615 } else {
616 ret = __aaci_pcm_open(aaci, substream, &aaci->capture);
617 }
618 return ret;
619 }
620
621 static int aaci_pcm_playback_hw_params(struct snd_pcm_substream *substream,
622 struct snd_pcm_hw_params *params)
623 {
624 struct aaci *aaci = substream->private_data;
625 struct aaci_runtime *aacirun = substream->runtime->private_data;
626 unsigned int channels = params_channels(params);
627 int ret;
628
629 WARN_ON(channels >= ARRAY_SIZE(channels_to_txmask) ||
630 !channels_to_txmask[channels]);
631
632 ret = aaci_pcm_hw_params(substream, aacirun, params);
633
634 /*
635 * Enable FIFO, compact mode, 16 bits per sample.
636 * FIXME: double rate slots?
637 */
638 if (ret >= 0) {
639 aacirun->cr = CR_FEN | CR_COMPACT | CR_SZ16;
640 aacirun->cr |= channels_to_txmask[channels];
641
642 aacirun->fifosz = aaci->fifosize * 4;
643 if (aacirun->cr & CR_COMPACT)
644 aacirun->fifosz >>= 1;
645 }
646 return ret;
647 }
648
649 static void aaci_pcm_playback_stop(struct aaci_runtime *aacirun)
650 {
651 u32 ie;
652
653 ie = readl(aacirun->base + AACI_IE);
654 ie &= ~(IE_URIE|IE_TXIE);
655 writel(ie, aacirun->base + AACI_IE);
656 aacirun->cr &= ~CR_EN;
657 aaci_chan_wait_ready(aacirun);
658 writel(aacirun->cr, aacirun->base + AACI_TXCR);
659 }
660
661 static void aaci_pcm_playback_start(struct aaci_runtime *aacirun)
662 {
663 u32 ie;
664
665 aaci_chan_wait_ready(aacirun);
666 aacirun->cr |= CR_EN;
667
668 ie = readl(aacirun->base + AACI_IE);
669 ie |= IE_URIE | IE_TXIE;
670 writel(ie, aacirun->base + AACI_IE);
671 writel(aacirun->cr, aacirun->base + AACI_TXCR);
672 }
673
674 static int aaci_pcm_playback_trigger(struct snd_pcm_substream *substream, int cmd)
675 {
676 struct aaci *aaci = substream->private_data;
677 struct aaci_runtime *aacirun = substream->runtime->private_data;
678 unsigned long flags;
679 int ret = 0;
680
681 spin_lock_irqsave(&aaci->lock, flags);
682 switch (cmd) {
683 case SNDRV_PCM_TRIGGER_START:
684 aaci_pcm_playback_start(aacirun);
685 break;
686
687 case SNDRV_PCM_TRIGGER_RESUME:
688 aaci_pcm_playback_start(aacirun);
689 break;
690
691 case SNDRV_PCM_TRIGGER_STOP:
692 aaci_pcm_playback_stop(aacirun);
693 break;
694
695 case SNDRV_PCM_TRIGGER_SUSPEND:
696 aaci_pcm_playback_stop(aacirun);
697 break;
698
699 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
700 break;
701
702 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
703 break;
704
705 default:
706 ret = -EINVAL;
707 }
708 spin_unlock_irqrestore(&aaci->lock, flags);
709
710 return ret;
711 }
712
713 static struct snd_pcm_ops aaci_playback_ops = {
714 .open = aaci_pcm_open,
715 .close = aaci_pcm_close,
716 .ioctl = snd_pcm_lib_ioctl,
717 .hw_params = aaci_pcm_playback_hw_params,
718 .hw_free = aaci_pcm_hw_free,
719 .prepare = aaci_pcm_prepare,
720 .trigger = aaci_pcm_playback_trigger,
721 .pointer = aaci_pcm_pointer,
722 .mmap = aaci_pcm_mmap,
723 };
724
725 static int aaci_pcm_capture_hw_params(struct snd_pcm_substream *substream,
726 struct snd_pcm_hw_params *params)
727 {
728 struct aaci *aaci = substream->private_data;
729 struct aaci_runtime *aacirun = substream->runtime->private_data;
730 int ret;
731
732 ret = aaci_pcm_hw_params(substream, aacirun, params);
733
734 if (ret >= 0) {
735 aacirun->cr = CR_FEN | CR_COMPACT | CR_SZ16;
736
737 /* Line in record: slot 3 and 4 */
738 aacirun->cr |= CR_SL3 | CR_SL4;
739
740 aacirun->fifosz = aaci->fifosize * 4;
741
742 if (aacirun->cr & CR_COMPACT)
743 aacirun->fifosz >>= 1;
744 }
745 return ret;
746 }
747
748 static void aaci_pcm_capture_stop(struct aaci_runtime *aacirun)
749 {
750 u32 ie;
751
752 aaci_chan_wait_ready(aacirun);
753
754 ie = readl(aacirun->base + AACI_IE);
755 ie &= ~(IE_ORIE | IE_RXIE);
756 writel(ie, aacirun->base+AACI_IE);
757
758 aacirun->cr &= ~CR_EN;
759
760 writel(aacirun->cr, aacirun->base + AACI_RXCR);
761 }
762
763 static void aaci_pcm_capture_start(struct aaci_runtime *aacirun)
764 {
765 u32 ie;
766
767 aaci_chan_wait_ready(aacirun);
768
769 #ifdef DEBUG
770 /* RX Timeout value: bits 28:17 in RXCR */
771 aacirun->cr |= 0xf << 17;
772 #endif
773
774 aacirun->cr |= CR_EN;
775 writel(aacirun->cr, aacirun->base + AACI_RXCR);
776
777 ie = readl(aacirun->base + AACI_IE);
778 ie |= IE_ORIE |IE_RXIE; // overrun and rx interrupt -- half full
779 writel(ie, aacirun->base + AACI_IE);
780 }
781
782 static int aaci_pcm_capture_trigger(struct snd_pcm_substream *substream, int cmd)
783 {
784 struct aaci *aaci = substream->private_data;
785 struct aaci_runtime *aacirun = substream->runtime->private_data;
786 unsigned long flags;
787 int ret = 0;
788
789 spin_lock_irqsave(&aaci->lock, flags);
790
791 switch (cmd) {
792 case SNDRV_PCM_TRIGGER_START:
793 aaci_pcm_capture_start(aacirun);
794 break;
795
796 case SNDRV_PCM_TRIGGER_RESUME:
797 aaci_pcm_capture_start(aacirun);
798 break;
799
800 case SNDRV_PCM_TRIGGER_STOP:
801 aaci_pcm_capture_stop(aacirun);
802 break;
803
804 case SNDRV_PCM_TRIGGER_SUSPEND:
805 aaci_pcm_capture_stop(aacirun);
806 break;
807
808 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
809 break;
810
811 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
812 break;
813
814 default:
815 ret = -EINVAL;
816 }
817
818 spin_unlock_irqrestore(&aaci->lock, flags);
819
820 return ret;
821 }
822
823 static int aaci_pcm_capture_prepare(struct snd_pcm_substream *substream)
824 {
825 struct snd_pcm_runtime *runtime = substream->runtime;
826 struct aaci *aaci = substream->private_data;
827
828 aaci_pcm_prepare(substream);
829
830 /* allow changing of sample rate */
831 aaci_ac97_write(aaci->ac97, AC97_EXTENDED_STATUS, 0x0001); /* VRA */
832 aaci_ac97_write(aaci->ac97, AC97_PCM_LR_ADC_RATE, runtime->rate);
833 aaci_ac97_write(aaci->ac97, AC97_PCM_MIC_ADC_RATE, runtime->rate);
834
835 /* Record select: Mic: 0, Aux: 3, Line: 4 */
836 aaci_ac97_write(aaci->ac97, AC97_REC_SEL, 0x0404);
837
838 return 0;
839 }
840
841 static struct snd_pcm_ops aaci_capture_ops = {
842 .open = aaci_pcm_open,
843 .close = aaci_pcm_close,
844 .ioctl = snd_pcm_lib_ioctl,
845 .hw_params = aaci_pcm_capture_hw_params,
846 .hw_free = aaci_pcm_hw_free,
847 .prepare = aaci_pcm_capture_prepare,
848 .trigger = aaci_pcm_capture_trigger,
849 .pointer = aaci_pcm_pointer,
850 .mmap = aaci_pcm_mmap,
851 };
852
853 /*
854 * Power Management.
855 */
856 #ifdef CONFIG_PM
857 static int aaci_do_suspend(struct snd_card *card, unsigned int state)
858 {
859 struct aaci *aaci = card->private_data;
860 snd_power_change_state(card, SNDRV_CTL_POWER_D3cold);
861 snd_pcm_suspend_all(aaci->pcm);
862 return 0;
863 }
864
865 static int aaci_do_resume(struct snd_card *card, unsigned int state)
866 {
867 snd_power_change_state(card, SNDRV_CTL_POWER_D0);
868 return 0;
869 }
870
871 static int aaci_suspend(struct amba_device *dev, pm_message_t state)
872 {
873 struct snd_card *card = amba_get_drvdata(dev);
874 return card ? aaci_do_suspend(card) : 0;
875 }
876
877 static int aaci_resume(struct amba_device *dev)
878 {
879 struct snd_card *card = amba_get_drvdata(dev);
880 return card ? aaci_do_resume(card) : 0;
881 }
882 #else
883 #define aaci_do_suspend NULL
884 #define aaci_do_resume NULL
885 #define aaci_suspend NULL
886 #define aaci_resume NULL
887 #endif
888
889
890 static struct ac97_pcm ac97_defs[] __devinitdata = {
891 [0] = { /* Front PCM */
892 .exclusive = 1,
893 .r = {
894 [0] = {
895 .slots = (1 << AC97_SLOT_PCM_LEFT) |
896 (1 << AC97_SLOT_PCM_RIGHT) |
897 (1 << AC97_SLOT_PCM_CENTER) |
898 (1 << AC97_SLOT_PCM_SLEFT) |
899 (1 << AC97_SLOT_PCM_SRIGHT) |
900 (1 << AC97_SLOT_LFE),
901 },
902 },
903 },
904 [1] = { /* PCM in */
905 .stream = 1,
906 .exclusive = 1,
907 .r = {
908 [0] = {
909 .slots = (1 << AC97_SLOT_PCM_LEFT) |
910 (1 << AC97_SLOT_PCM_RIGHT),
911 },
912 },
913 },
914 [2] = { /* Mic in */
915 .stream = 1,
916 .exclusive = 1,
917 .r = {
918 [0] = {
919 .slots = (1 << AC97_SLOT_MIC),
920 },
921 },
922 }
923 };
924
925 static struct snd_ac97_bus_ops aaci_bus_ops = {
926 .write = aaci_ac97_write,
927 .read = aaci_ac97_read,
928 };
929
930 static int __devinit aaci_probe_ac97(struct aaci *aaci)
931 {
932 struct snd_ac97_template ac97_template;
933 struct snd_ac97_bus *ac97_bus;
934 struct snd_ac97 *ac97;
935 int ret;
936
937 writel(0, aaci->base + AC97_POWERDOWN);
938 /*
939 * Assert AACIRESET for 2us
940 */
941 writel(0, aaci->base + AACI_RESET);
942 udelay(2);
943 writel(RESET_NRST, aaci->base + AACI_RESET);
944
945 /*
946 * Give the AC'97 codec more than enough time
947 * to wake up. (42us = ~2 frames at 48kHz.)
948 */
949 udelay(42);
950
951 ret = snd_ac97_bus(aaci->card, 0, &aaci_bus_ops, aaci, &ac97_bus);
952 if (ret)
953 goto out;
954
955 ac97_bus->clock = 48000;
956 aaci->ac97_bus = ac97_bus;
957
958 memset(&ac97_template, 0, sizeof(struct snd_ac97_template));
959 ac97_template.private_data = aaci;
960 ac97_template.num = 0;
961 ac97_template.scaps = AC97_SCAP_SKIP_MODEM;
962
963 ret = snd_ac97_mixer(ac97_bus, &ac97_template, &ac97);
964 if (ret)
965 goto out;
966 aaci->ac97 = ac97;
967
968 /*
969 * Disable AC97 PC Beep input on audio codecs.
970 */
971 if (ac97_is_audio(ac97))
972 snd_ac97_write_cache(ac97, AC97_PC_BEEP, 0x801e);
973
974 ret = snd_ac97_pcm_assign(ac97_bus, ARRAY_SIZE(ac97_defs), ac97_defs);
975 if (ret)
976 goto out;
977
978 aaci->playback.pcm = &ac97_bus->pcms[0];
979 aaci->capture.pcm = &ac97_bus->pcms[1];
980
981 out:
982 return ret;
983 }
984
985 static void aaci_free_card(struct snd_card *card)
986 {
987 struct aaci *aaci = card->private_data;
988 if (aaci->base)
989 iounmap(aaci->base);
990 }
991
992 static struct aaci * __devinit aaci_init_card(struct amba_device *dev)
993 {
994 struct aaci *aaci;
995 struct snd_card *card;
996 int err;
997
998 err = snd_card_create(SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1,
999 THIS_MODULE, sizeof(struct aaci), &card);
1000 if (err < 0)
1001 return NULL;
1002
1003 card->private_free = aaci_free_card;
1004
1005 strlcpy(card->driver, DRIVER_NAME, sizeof(card->driver));
1006 strlcpy(card->shortname, "ARM AC'97 Interface", sizeof(card->shortname));
1007 snprintf(card->longname, sizeof(card->longname),
1008 "%s at 0x%016llx, irq %d",
1009 card->shortname, (unsigned long long)dev->res.start,
1010 dev->irq[0]);
1011
1012 aaci = card->private_data;
1013 mutex_init(&aaci->ac97_sem);
1014 spin_lock_init(&aaci->lock);
1015 aaci->card = card;
1016 aaci->dev = dev;
1017
1018 /* Set MAINCR to allow slot 1 and 2 data IO */
1019 aaci->maincr = MAINCR_IE | MAINCR_SL1RXEN | MAINCR_SL1TXEN |
1020 MAINCR_SL2RXEN | MAINCR_SL2TXEN;
1021
1022 return aaci;
1023 }
1024
1025 static int __devinit aaci_init_pcm(struct aaci *aaci)
1026 {
1027 struct snd_pcm *pcm;
1028 int ret;
1029
1030 ret = snd_pcm_new(aaci->card, "AACI AC'97", 0, 1, 1, &pcm);
1031 if (ret == 0) {
1032 aaci->pcm = pcm;
1033 pcm->private_data = aaci;
1034 pcm->info_flags = 0;
1035
1036 strlcpy(pcm->name, DRIVER_NAME, sizeof(pcm->name));
1037
1038 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &aaci_playback_ops);
1039 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &aaci_capture_ops);
1040 }
1041
1042 return ret;
1043 }
1044
1045 static unsigned int __devinit aaci_size_fifo(struct aaci *aaci)
1046 {
1047 struct aaci_runtime *aacirun = &aaci->playback;
1048 int i;
1049
1050 writel(CR_FEN | CR_SZ16 | CR_EN, aacirun->base + AACI_TXCR);
1051
1052 for (i = 0; !(readl(aacirun->base + AACI_SR) & SR_TXFF) && i < 4096; i++)
1053 writel(0, aacirun->fifo);
1054
1055 writel(0, aacirun->base + AACI_TXCR);
1056
1057 /*
1058 * Re-initialise the AACI after the FIFO depth test, to
1059 * ensure that the FIFOs are empty. Unfortunately, merely
1060 * disabling the channel doesn't clear the FIFO.
1061 */
1062 writel(aaci->maincr & ~MAINCR_IE, aaci->base + AACI_MAINCR);
1063 writel(aaci->maincr, aaci->base + AACI_MAINCR);
1064
1065 /*
1066 * If we hit 4096, we failed. Go back to the specified
1067 * fifo depth.
1068 */
1069 if (i == 4096)
1070 i = 8;
1071
1072 return i;
1073 }
1074
1075 static int __devinit aaci_probe(struct amba_device *dev, struct amba_id *id)
1076 {
1077 struct aaci *aaci;
1078 int ret, i;
1079
1080 ret = amba_request_regions(dev, NULL);
1081 if (ret)
1082 return ret;
1083
1084 aaci = aaci_init_card(dev);
1085 if (!aaci) {
1086 ret = -ENOMEM;
1087 goto out;
1088 }
1089
1090 aaci->base = ioremap(dev->res.start, resource_size(&dev->res));
1091 if (!aaci->base) {
1092 ret = -ENOMEM;
1093 goto out;
1094 }
1095
1096 /*
1097 * Playback uses AACI channel 0
1098 */
1099 aaci->playback.base = aaci->base + AACI_CSCH1;
1100 aaci->playback.fifo = aaci->base + AACI_DR1;
1101
1102 /*
1103 * Capture uses AACI channel 0
1104 */
1105 aaci->capture.base = aaci->base + AACI_CSCH1;
1106 aaci->capture.fifo = aaci->base + AACI_DR1;
1107
1108 for (i = 0; i < 4; i++) {
1109 void __iomem *base = aaci->base + i * 0x14;
1110
1111 writel(0, base + AACI_IE);
1112 writel(0, base + AACI_TXCR);
1113 writel(0, base + AACI_RXCR);
1114 }
1115
1116 writel(0x1fff, aaci->base + AACI_INTCLR);
1117 writel(aaci->maincr, aaci->base + AACI_MAINCR);
1118
1119 ret = aaci_probe_ac97(aaci);
1120 if (ret)
1121 goto out;
1122
1123 /*
1124 * Size the FIFOs (must be multiple of 16).
1125 */
1126 aaci->fifosize = aaci_size_fifo(aaci);
1127 if (aaci->fifosize & 15) {
1128 printk(KERN_WARNING "AACI: fifosize = %d not supported\n",
1129 aaci->fifosize);
1130 ret = -ENODEV;
1131 goto out;
1132 }
1133
1134 ret = aaci_init_pcm(aaci);
1135 if (ret)
1136 goto out;
1137
1138 snd_card_set_dev(aaci->card, &dev->dev);
1139
1140 ret = snd_card_register(aaci->card);
1141 if (ret == 0) {
1142 dev_info(&dev->dev, "%s, fifo %d\n", aaci->card->longname,
1143 aaci->fifosize);
1144 amba_set_drvdata(dev, aaci->card);
1145 return ret;
1146 }
1147
1148 out:
1149 if (aaci)
1150 snd_card_free(aaci->card);
1151 amba_release_regions(dev);
1152 return ret;
1153 }
1154
1155 static int __devexit aaci_remove(struct amba_device *dev)
1156 {
1157 struct snd_card *card = amba_get_drvdata(dev);
1158
1159 amba_set_drvdata(dev, NULL);
1160
1161 if (card) {
1162 struct aaci *aaci = card->private_data;
1163 writel(0, aaci->base + AACI_MAINCR);
1164
1165 snd_card_free(card);
1166 amba_release_regions(dev);
1167 }
1168
1169 return 0;
1170 }
1171
1172 static struct amba_id aaci_ids[] = {
1173 {
1174 .id = 0x00041041,
1175 .mask = 0x000fffff,
1176 },
1177 { 0, 0 },
1178 };
1179
1180 static struct amba_driver aaci_driver = {
1181 .drv = {
1182 .name = DRIVER_NAME,
1183 },
1184 .probe = aaci_probe,
1185 .remove = __devexit_p(aaci_remove),
1186 .suspend = aaci_suspend,
1187 .resume = aaci_resume,
1188 .id_table = aaci_ids,
1189 };
1190
1191 static int __init aaci_init(void)
1192 {
1193 return amba_driver_register(&aaci_driver);
1194 }
1195
1196 static void __exit aaci_exit(void)
1197 {
1198 amba_driver_unregister(&aaci_driver);
1199 }
1200
1201 module_init(aaci_init);
1202 module_exit(aaci_exit);
1203
1204 MODULE_LICENSE("GPL");
1205 MODULE_DESCRIPTION("ARM PrimeCell PL041 Advanced Audio CODEC Interface driver");
Linux kernel - Deliverables
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