2 * Copyright (c) by Jaroslav Kysela <perex@suse.cz>
4 * Routines for effect processor FX8010
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
28 #include <sound/driver.h>
29 #include <linux/pci.h>
30 #include <linux/delay.h>
31 #include <linux/slab.h>
32 #include <linux/init.h>
33 #include <sound/core.h>
34 #include <sound/emu10k1.h>
36 #if 0 /* for testing purposes - digital out -> capture */
37 #define EMU10K1_CAPTURE_DIGITAL_OUT
39 #if 0 /* for testing purposes - set S/PDIF to AC3 output */
40 #define EMU10K1_SET_AC3_IEC958
42 #if 0 /* for testing purposes - feed the front signal to Center/LFE outputs */
43 #define EMU10K1_CENTER_LFE_FROM_FRONT
50 static char *fxbuses
[16] = {
51 /* 0x00 */ "PCM Left",
52 /* 0x01 */ "PCM Right",
53 /* 0x02 */ "PCM Surround Left",
54 /* 0x03 */ "PCM Surround Right",
55 /* 0x04 */ "MIDI Left",
56 /* 0x05 */ "MIDI Right",
63 /* 0x0c */ "MIDI Reverb",
64 /* 0x0d */ "MIDI Chorus",
69 static char *creative_ins
[16] = {
70 /* 0x00 */ "AC97 Left",
71 /* 0x01 */ "AC97 Right",
72 /* 0x02 */ "TTL IEC958 Left",
73 /* 0x03 */ "TTL IEC958 Right",
74 /* 0x04 */ "Zoom Video Left",
75 /* 0x05 */ "Zoom Video Right",
76 /* 0x06 */ "Optical IEC958 Left",
77 /* 0x07 */ "Optical IEC958 Right",
78 /* 0x08 */ "Line/Mic 1 Left",
79 /* 0x09 */ "Line/Mic 1 Right",
80 /* 0x0a */ "Coaxial IEC958 Left",
81 /* 0x0b */ "Coaxial IEC958 Right",
82 /* 0x0c */ "Line/Mic 2 Left",
83 /* 0x0d */ "Line/Mic 2 Right",
88 static char *audigy_ins
[16] = {
89 /* 0x00 */ "AC97 Left",
90 /* 0x01 */ "AC97 Right",
91 /* 0x02 */ "Audigy CD Left",
92 /* 0x03 */ "Audigy CD Right",
93 /* 0x04 */ "Optical IEC958 Left",
94 /* 0x05 */ "Optical IEC958 Right",
97 /* 0x08 */ "Line/Mic 2 Left",
98 /* 0x09 */ "Line/Mic 2 Right",
99 /* 0x0a */ "SPDIF Left",
100 /* 0x0b */ "SPDIF Right",
101 /* 0x0c */ "Aux2 Left",
102 /* 0x0d */ "Aux2 Right",
107 static char *creative_outs
[32] = {
108 /* 0x00 */ "AC97 Left",
109 /* 0x01 */ "AC97 Right",
110 /* 0x02 */ "Optical IEC958 Left",
111 /* 0x03 */ "Optical IEC958 Right",
114 /* 0x06 */ "Headphone Left",
115 /* 0x07 */ "Headphone Right",
116 /* 0x08 */ "Surround Left",
117 /* 0x09 */ "Surround Right",
118 /* 0x0a */ "PCM Capture Left",
119 /* 0x0b */ "PCM Capture Right",
120 /* 0x0c */ "MIC Capture",
121 /* 0x0d */ "AC97 Surround Left",
122 /* 0x0e */ "AC97 Surround Right",
125 /* 0x11 */ "Analog Center",
126 /* 0x12 */ "Analog LFE",
142 static char *audigy_outs
[32] = {
143 /* 0x00 */ "Digital Front Left",
144 /* 0x01 */ "Digital Front Right",
145 /* 0x02 */ "Digital Center",
146 /* 0x03 */ "Digital LEF",
147 /* 0x04 */ "Headphone Left",
148 /* 0x05 */ "Headphone Right",
149 /* 0x06 */ "Digital Rear Left",
150 /* 0x07 */ "Digital Rear Right",
151 /* 0x08 */ "Front Left",
152 /* 0x09 */ "Front Right",
157 /* 0x0e */ "Rear Left",
158 /* 0x0f */ "Rear Right",
159 /* 0x10 */ "AC97 Front Left",
160 /* 0x11 */ "AC97 Front Right",
161 /* 0x12 */ "ADC Caputre Left",
162 /* 0x13 */ "ADC Capture Right",
177 static const u32 bass_table
[41][5] = {
178 { 0x3e4f844f, 0x84ed4cc3, 0x3cc69927, 0x7b03553a, 0xc4da8486 },
179 { 0x3e69a17a, 0x84c280fb, 0x3cd77cd4, 0x7b2f2a6f, 0xc4b08d1d },
180 { 0x3e82ff42, 0x849991d5, 0x3ce7466b, 0x7b5917c6, 0xc48863ee },
181 { 0x3e9bab3c, 0x847267f0, 0x3cf5ffe8, 0x7b813560, 0xc461f22c },
182 { 0x3eb3b275, 0x844ced29, 0x3d03b295, 0x7ba79a1c, 0xc43d223b },
183 { 0x3ecb2174, 0x84290c8b, 0x3d106714, 0x7bcc5ba3, 0xc419dfa5 },
184 { 0x3ee2044b, 0x8406b244, 0x3d1c2561, 0x7bef8e77, 0xc3f8170f },
185 { 0x3ef86698, 0x83e5cb96, 0x3d26f4d8, 0x7c114600, 0xc3d7b625 },
186 { 0x3f0e5390, 0x83c646c9, 0x3d30dc39, 0x7c319498, 0xc3b8ab97 },
187 { 0x3f23d60b, 0x83a81321, 0x3d39e1af, 0x7c508b9c, 0xc39ae704 },
188 { 0x3f38f884, 0x838b20d2, 0x3d420ad2, 0x7c6e3b75, 0xc37e58f1 },
189 { 0x3f4dc52c, 0x836f60ef, 0x3d495cab, 0x7c8ab3a6, 0xc362f2be },
190 { 0x3f6245e8, 0x8354c565, 0x3d4fdbb8, 0x7ca602d6, 0xc348a69b },
191 { 0x3f76845f, 0x833b40ec, 0x3d558bf0, 0x7cc036df, 0xc32f677c },
192 { 0x3f8a8a03, 0x8322c6fb, 0x3d5a70c4, 0x7cd95cd7, 0xc317290b },
193 { 0x3f9e6014, 0x830b4bc3, 0x3d5e8d25, 0x7cf1811a, 0xc2ffdfa5 },
194 { 0x3fb20fae, 0x82f4c420, 0x3d61e37f, 0x7d08af56, 0xc2e9804a },
195 { 0x3fc5a1cc, 0x82df2592, 0x3d6475c3, 0x7d1ef294, 0xc2d40096 },
196 { 0x3fd91f55, 0x82ca6632, 0x3d664564, 0x7d345541, 0xc2bf56b9 },
197 { 0x3fec9120, 0x82b67cac, 0x3d675356, 0x7d48e138, 0xc2ab796e },
198 { 0x40000000, 0x82a36037, 0x3d67a012, 0x7d5c9fc9, 0xc2985fee },
199 { 0x401374c7, 0x8291088a, 0x3d672b93, 0x7d6f99c3, 0xc28601f2 },
200 { 0x4026f857, 0x827f6dd7, 0x3d65f559, 0x7d81d77c, 0xc27457a3 },
201 { 0x403a939f, 0x826e88c5, 0x3d63fc63, 0x7d9360d4, 0xc2635996 },
202 { 0x404e4faf, 0x825e5266, 0x3d613f32, 0x7da43d42, 0xc25300c6 },
203 { 0x406235ba, 0x824ec434, 0x3d5dbbc3, 0x7db473d7, 0xc243468e },
204 { 0x40764f1f, 0x823fd80c, 0x3d596f8f, 0x7dc40b44, 0xc23424a2 },
205 { 0x408aa576, 0x82318824, 0x3d545787, 0x7dd309e2, 0xc2259509 },
206 { 0x409f4296, 0x8223cf0b, 0x3d4e7012, 0x7de175b5, 0xc2179218 },
207 { 0x40b430a0, 0x8216a7a1, 0x3d47b505, 0x7def5475, 0xc20a1670 },
208 { 0x40c97a0a, 0x820a0d12, 0x3d4021a1, 0x7dfcab8d, 0xc1fd1cf5 },
209 { 0x40df29a6, 0x81fdfad6, 0x3d37b08d, 0x7e098028, 0xc1f0a0ca },
210 { 0x40f54ab1, 0x81f26ca9, 0x3d2e5bd1, 0x7e15d72b, 0xc1e49d52 },
211 { 0x410be8da, 0x81e75e89, 0x3d241cce, 0x7e21b544, 0xc1d90e24 },
212 { 0x41231051, 0x81dcccb3, 0x3d18ec37, 0x7e2d1ee6, 0xc1cdef10 },
213 { 0x413acdd0, 0x81d2b39e, 0x3d0cc20a, 0x7e38184e, 0xc1c33c13 },
214 { 0x41532ea7, 0x81c90ffb, 0x3cff9585, 0x7e42a58b, 0xc1b8f15a },
215 { 0x416c40cd, 0x81bfdeb2, 0x3cf15d21, 0x7e4cca7c, 0xc1af0b3f },
216 { 0x418612ea, 0x81b71cdc, 0x3ce20e85, 0x7e568ad3, 0xc1a58640 },
217 { 0x41a0b465, 0x81aec7c5, 0x3cd19e7c, 0x7e5fea1e, 0xc19c5f03 },
218 { 0x41bc3573, 0x81a6dcea, 0x3cc000e9, 0x7e68ebc2, 0xc1939250 }
221 static const u32 treble_table
[41][5] = {
222 { 0x0125cba9, 0xfed5debd, 0x00599b6c, 0x0d2506da, 0xfa85b354 },
223 { 0x0142f67e, 0xfeb03163, 0x0066cd0f, 0x0d14c69d, 0xfa914473 },
224 { 0x016328bd, 0xfe860158, 0x0075b7f2, 0x0d03eb27, 0xfa9d32d2 },
225 { 0x0186b438, 0xfe56c982, 0x00869234, 0x0cf27048, 0xfaa97fca },
226 { 0x01adf358, 0xfe21f5fe, 0x00999842, 0x0ce051c2, 0xfab62ca5 },
227 { 0x01d949fa, 0xfde6e287, 0x00af0d8d, 0x0ccd8b4a, 0xfac33aa7 },
228 { 0x02092669, 0xfda4d8bf, 0x00c73d4c, 0x0cba1884, 0xfad0ab07 },
229 { 0x023e0268, 0xfd5b0e4a, 0x00e27b54, 0x0ca5f509, 0xfade7ef2 },
230 { 0x0278645c, 0xfd08a2b0, 0x01012509, 0x0c911c63, 0xfaecb788 },
231 { 0x02b8e091, 0xfcac9d1a, 0x0123a262, 0x0c7b8a14, 0xfafb55df },
232 { 0x03001a9a, 0xfc45e9ce, 0x014a6709, 0x0c65398f, 0xfb0a5aff },
233 { 0x034ec6d7, 0xfbd3576b, 0x0175f397, 0x0c4e2643, 0xfb19c7e4 },
234 { 0x03a5ac15, 0xfb5393ee, 0x01a6d6ed, 0x0c364b94, 0xfb299d7c },
235 { 0x0405a562, 0xfac52968, 0x01ddafae, 0x0c1da4e2, 0xfb39dca5 },
236 { 0x046fa3fe, 0xfa267a66, 0x021b2ddd, 0x0c042d8d, 0xfb4a8631 },
237 { 0x04e4b17f, 0xf975be0f, 0x0260149f, 0x0be9e0f2, 0xfb5b9ae0 },
238 { 0x0565f220, 0xf8b0fbe5, 0x02ad3c29, 0x0bceba73, 0xfb6d1b60 },
239 { 0x05f4a745, 0xf7d60722, 0x030393d4, 0x0bb2b578, 0xfb7f084d },
240 { 0x06923236, 0xf6e279bd, 0x03642465, 0x0b95cd75, 0xfb916233 },
241 { 0x07401713, 0xf5d3aef9, 0x03d01283, 0x0b77fded, 0xfba42984 },
242 { 0x08000000, 0xf4a6bd88, 0x0448a161, 0x0b594278, 0xfbb75e9f },
243 { 0x08d3c097, 0xf3587131, 0x04cf35a4, 0x0b3996c9, 0xfbcb01cb },
244 { 0x09bd59a2, 0xf1e543f9, 0x05655880, 0x0b18f6b2, 0xfbdf1333 },
245 { 0x0abefd0f, 0xf04956ca, 0x060cbb12, 0x0af75e2c, 0xfbf392e8 },
246 { 0x0bdb123e, 0xee806984, 0x06c739fe, 0x0ad4c962, 0xfc0880dd },
247 { 0x0d143a94, 0xec85d287, 0x0796e150, 0x0ab134b0, 0xfc1ddce5 },
248 { 0x0e6d5664, 0xea547598, 0x087df0a0, 0x0a8c9cb6, 0xfc33a6ad },
249 { 0x0fe98a2a, 0xe7e6ba35, 0x097edf83, 0x0a66fe5b, 0xfc49ddc2 },
250 { 0x118c4421, 0xe536813a, 0x0a9c6248, 0x0a4056d7, 0xfc608185 },
251 { 0x1359422e, 0xe23d19eb, 0x0bd96efb, 0x0a18a3bf, 0xfc77912c },
252 { 0x1554982b, 0xdef33645, 0x0d3942bd, 0x09efe312, 0xfc8f0bc1 },
253 { 0x1782b68a, 0xdb50deb1, 0x0ebf676d, 0x09c6133f, 0xfca6f019 },
254 { 0x19e8715d, 0xd74d64fd, 0x106fb999, 0x099b3337, 0xfcbf3cd6 },
255 { 0x1c8b07b8, 0xd2df56ab, 0x124e6ec8, 0x096f4274, 0xfcd7f060 },
256 { 0x1f702b6d, 0xcdfc6e92, 0x14601c10, 0x0942410b, 0xfcf108e5 },
257 { 0x229e0933, 0xc89985cd, 0x16a9bcfa, 0x09142fb5, 0xfd0a8451 },
258 { 0x261b5118, 0xc2aa8409, 0x1930bab6, 0x08e50fdc, 0xfd24604d },
259 { 0x29ef3f5d, 0xbc224f28, 0x1bfaf396, 0x08b4e3aa, 0xfd3e9a3b },
260 { 0x2e21a59b, 0xb4f2ba46, 0x1f0ec2d6, 0x0883ae15, 0xfd592f33 },
261 { 0x32baf44b, 0xad0c7429, 0x227308a3, 0x085172eb, 0xfd741bfd },
262 { 0x37c4448b, 0xa45ef51d, 0x262f3267, 0x081e36dc, 0xfd8f5d14 }
265 static const u32 db_table
[101] = {
266 0x00000000, 0x01571f82, 0x01674b41, 0x01783a1b, 0x0189f540,
267 0x019c8651, 0x01aff763, 0x01c45306, 0x01d9a446, 0x01eff6b8,
268 0x0207567a, 0x021fd03d, 0x0239714c, 0x02544792, 0x027061a1,
269 0x028dcebb, 0x02ac9edc, 0x02cce2bf, 0x02eeabe8, 0x03120cb0,
270 0x0337184e, 0x035de2df, 0x03868173, 0x03b10a18, 0x03dd93e9,
271 0x040c3713, 0x043d0cea, 0x04702ff3, 0x04a5bbf2, 0x04ddcdfb,
272 0x0518847f, 0x0555ff62, 0x05966005, 0x05d9c95d, 0x06206005,
273 0x066a4a52, 0x06b7b067, 0x0708bc4c, 0x075d9a01, 0x07b6779d,
274 0x08138561, 0x0874f5d5, 0x08dafde1, 0x0945d4ed, 0x09b5b4fd,
275 0x0a2adad1, 0x0aa58605, 0x0b25f936, 0x0bac7a24, 0x0c3951d8,
276 0x0ccccccc, 0x0d673b17, 0x0e08f093, 0x0eb24510, 0x0f639481,
277 0x101d3f2d, 0x10dfa9e6, 0x11ab3e3f, 0x12806ac3, 0x135fa333,
278 0x144960c5, 0x153e2266, 0x163e6cfe, 0x174acbb7, 0x1863d04d,
279 0x198a1357, 0x1abe349f, 0x1c00db77, 0x1d52b712, 0x1eb47ee6,
280 0x2026f30f, 0x21aadcb6, 0x23410e7e, 0x24ea64f9, 0x26a7c71d,
281 0x287a26c4, 0x2a62812c, 0x2c61df84, 0x2e795779, 0x30aa0bcf,
282 0x32f52cfe, 0x355bf9d8, 0x37dfc033, 0x3a81dda4, 0x3d43c038,
283 0x4026e73c, 0x432ce40f, 0x46575af8, 0x49a8040f, 0x4d20ac2a,
284 0x50c335d3, 0x54919a57, 0x588dead1, 0x5cba514a, 0x611911ea,
285 0x65ac8c2f, 0x6a773c39, 0x6f7bbc23, 0x74bcc56c, 0x7a3d3272,
289 static const u32 onoff_table
[2] = {
290 0x00000000, 0x00000001
296 static inline mm_segment_t
snd_enter_user(void)
298 mm_segment_t fs
= get_fs();
303 static inline void snd_leave_user(mm_segment_t fs
)
312 static int snd_emu10k1_gpr_ctl_info(snd_kcontrol_t
*kcontrol
, snd_ctl_elem_info_t
* uinfo
)
314 snd_emu10k1_fx8010_ctl_t
*ctl
= (snd_emu10k1_fx8010_ctl_t
*)kcontrol
->private_value
;
316 if (ctl
->min
== 0 && ctl
->max
== 1)
317 uinfo
->type
= SNDRV_CTL_ELEM_TYPE_BOOLEAN
;
319 uinfo
->type
= SNDRV_CTL_ELEM_TYPE_INTEGER
;
320 uinfo
->count
= ctl
->vcount
;
321 uinfo
->value
.integer
.min
= ctl
->min
;
322 uinfo
->value
.integer
.max
= ctl
->max
;
326 static int snd_emu10k1_gpr_ctl_get(snd_kcontrol_t
* kcontrol
, snd_ctl_elem_value_t
* ucontrol
)
328 emu10k1_t
*emu
= snd_kcontrol_chip(kcontrol
);
329 snd_emu10k1_fx8010_ctl_t
*ctl
= (snd_emu10k1_fx8010_ctl_t
*)kcontrol
->private_value
;
333 spin_lock_irqsave(&emu
->reg_lock
, flags
);
334 for (i
= 0; i
< ctl
->vcount
; i
++)
335 ucontrol
->value
.integer
.value
[i
] = ctl
->value
[i
];
336 spin_unlock_irqrestore(&emu
->reg_lock
, flags
);
340 static int snd_emu10k1_gpr_ctl_put(snd_kcontrol_t
* kcontrol
, snd_ctl_elem_value_t
* ucontrol
)
342 emu10k1_t
*emu
= snd_kcontrol_chip(kcontrol
);
343 snd_emu10k1_fx8010_ctl_t
*ctl
= (snd_emu10k1_fx8010_ctl_t
*)kcontrol
->private_value
;
345 unsigned int nval
, val
;
349 spin_lock_irqsave(&emu
->reg_lock
, flags
);
350 for (i
= 0; i
< ctl
->vcount
; i
++) {
351 nval
= ucontrol
->value
.integer
.value
[i
];
356 if (nval
!= ctl
->value
[i
])
358 val
= ctl
->value
[i
] = nval
;
359 switch (ctl
->translation
) {
360 case EMU10K1_GPR_TRANSLATION_NONE
:
361 snd_emu10k1_ptr_write(emu
, emu
->gpr_base
+ ctl
->gpr
[i
], 0, val
);
363 case EMU10K1_GPR_TRANSLATION_TABLE100
:
364 snd_emu10k1_ptr_write(emu
, emu
->gpr_base
+ ctl
->gpr
[i
], 0, db_table
[val
]);
366 case EMU10K1_GPR_TRANSLATION_BASS
:
367 snd_runtime_check((ctl
->count
% 5) == 0 && (ctl
->count
/ 5) == ctl
->vcount
, change
= -EIO
; goto __error
);
368 for (j
= 0; j
< 5; j
++)
369 snd_emu10k1_ptr_write(emu
, emu
->gpr_base
+ ctl
->gpr
[j
* ctl
->vcount
+ i
], 0, bass_table
[val
][j
]);
371 case EMU10K1_GPR_TRANSLATION_TREBLE
:
372 snd_runtime_check((ctl
->count
% 5) == 0 && (ctl
->count
/ 5) == ctl
->vcount
, change
= -EIO
; goto __error
);
373 for (j
= 0; j
< 5; j
++)
374 snd_emu10k1_ptr_write(emu
, emu
->gpr_base
+ ctl
->gpr
[j
* ctl
->vcount
+ i
], 0, treble_table
[val
][j
]);
376 case EMU10K1_GPR_TRANSLATION_ONOFF
:
377 snd_emu10k1_ptr_write(emu
, emu
->gpr_base
+ ctl
->gpr
[i
], 0, onoff_table
[val
]);
382 spin_unlock_irqrestore(&emu
->reg_lock
, flags
);
390 static void snd_emu10k1_fx8010_interrupt(emu10k1_t
*emu
)
392 snd_emu10k1_fx8010_irq_t
*irq
, *nirq
;
394 irq
= emu
->fx8010
.irq_handlers
;
396 nirq
= irq
->next
; /* irq ptr can be removed from list */
397 if (snd_emu10k1_ptr_read(emu
, emu
->gpr_base
+ irq
->gpr_running
, 0) & 0xffff0000) {
399 irq
->handler(emu
, irq
->private_data
);
400 snd_emu10k1_ptr_write(emu
, emu
->gpr_base
+ irq
->gpr_running
, 0, 1);
406 int snd_emu10k1_fx8010_register_irq_handler(emu10k1_t
*emu
,
407 snd_fx8010_irq_handler_t
*handler
,
408 unsigned char gpr_running
,
410 snd_emu10k1_fx8010_irq_t
**r_irq
)
412 snd_emu10k1_fx8010_irq_t
*irq
;
415 snd_runtime_check(emu
, return -EINVAL
);
416 snd_runtime_check(handler
, return -EINVAL
);
417 irq
= kmalloc(sizeof(*irq
), GFP_ATOMIC
);
420 irq
->handler
= handler
;
421 irq
->gpr_running
= gpr_running
;
422 irq
->private_data
= private_data
;
424 spin_lock_irqsave(&emu
->fx8010
.irq_lock
, flags
);
425 if (emu
->fx8010
.irq_handlers
== NULL
) {
426 emu
->fx8010
.irq_handlers
= irq
;
427 emu
->dsp_interrupt
= snd_emu10k1_fx8010_interrupt
;
428 snd_emu10k1_intr_enable(emu
, INTE_FXDSPENABLE
);
430 irq
->next
= emu
->fx8010
.irq_handlers
;
431 emu
->fx8010
.irq_handlers
= irq
;
433 spin_unlock_irqrestore(&emu
->fx8010
.irq_lock
, flags
);
439 int snd_emu10k1_fx8010_unregister_irq_handler(emu10k1_t
*emu
,
440 snd_emu10k1_fx8010_irq_t
*irq
)
442 snd_emu10k1_fx8010_irq_t
*tmp
;
445 snd_runtime_check(irq
, return -EINVAL
);
446 spin_lock_irqsave(&emu
->fx8010
.irq_lock
, flags
);
447 if ((tmp
= emu
->fx8010
.irq_handlers
) == irq
) {
448 emu
->fx8010
.irq_handlers
= tmp
->next
;
449 if (emu
->fx8010
.irq_handlers
== NULL
) {
450 snd_emu10k1_intr_disable(emu
, INTE_FXDSPENABLE
);
451 emu
->dsp_interrupt
= NULL
;
454 while (tmp
&& tmp
->next
!= irq
)
457 tmp
->next
= tmp
->next
->next
;
459 spin_unlock_irqrestore(&emu
->fx8010
.irq_lock
, flags
);
464 /*************************************************************************
465 * EMU10K1 effect manager
466 *************************************************************************/
468 static void snd_emu10k1_write_op(emu10k1_fx8010_code_t
*icode
, unsigned int *ptr
,
469 u32 op
, u32 r
, u32 a
, u32 x
, u32 y
)
472 snd_assert(*ptr
< 512, return);
473 code
= (u_int32_t __force
*)icode
->code
+ (*ptr
) * 2;
474 set_bit(*ptr
, icode
->code_valid
);
475 code
[0] = ((x
& 0x3ff) << 10) | (y
& 0x3ff);
476 code
[1] = ((op
& 0x0f) << 20) | ((r
& 0x3ff) << 10) | (a
& 0x3ff);
480 #define OP(icode, ptr, op, r, a, x, y) \
481 snd_emu10k1_write_op(icode, ptr, op, r, a, x, y)
483 static void snd_emu10k1_audigy_write_op(emu10k1_fx8010_code_t
*icode
, unsigned int *ptr
,
484 u32 op
, u32 r
, u32 a
, u32 x
, u32 y
)
487 snd_assert(*ptr
< 1024, return);
488 code
= (u_int32_t __force
*)icode
->code
+ (*ptr
) * 2;
489 set_bit(*ptr
, icode
->code_valid
);
490 code
[0] = ((x
& 0x7ff) << 12) | (y
& 0x7ff);
491 code
[1] = ((op
& 0x0f) << 24) | ((r
& 0x7ff) << 12) | (a
& 0x7ff);
495 #define A_OP(icode, ptr, op, r, a, x, y) \
496 snd_emu10k1_audigy_write_op(icode, ptr, op, r, a, x, y)
498 static void snd_emu10k1_efx_write(emu10k1_t
*emu
, unsigned int pc
, unsigned int data
)
500 pc
+= emu
->audigy
? A_MICROCODEBASE
: MICROCODEBASE
;
501 snd_emu10k1_ptr_write(emu
, pc
, 0, data
);
504 unsigned int snd_emu10k1_efx_read(emu10k1_t
*emu
, unsigned int pc
)
506 pc
+= emu
->audigy
? A_MICROCODEBASE
: MICROCODEBASE
;
507 return snd_emu10k1_ptr_read(emu
, pc
, 0);
510 static int snd_emu10k1_gpr_poke(emu10k1_t
*emu
, emu10k1_fx8010_code_t
*icode
)
515 for (gpr
= 0; gpr
< (emu
->audigy
? 0x200 : 0x100); gpr
++) {
516 if (!test_bit(gpr
, icode
->gpr_valid
))
518 if (get_user(val
, &icode
->gpr_map
[gpr
]))
520 snd_emu10k1_ptr_write(emu
, emu
->gpr_base
+ gpr
, 0, val
);
525 static int snd_emu10k1_gpr_peek(emu10k1_t
*emu
, emu10k1_fx8010_code_t
*icode
)
530 for (gpr
= 0; gpr
< (emu
->audigy
? 0x200 : 0x100); gpr
++) {
531 set_bit(gpr
, icode
->gpr_valid
);
532 val
= snd_emu10k1_ptr_read(emu
, emu
->gpr_base
+ gpr
, 0);
533 if (put_user(val
, &icode
->gpr_map
[gpr
]))
539 static int snd_emu10k1_tram_poke(emu10k1_t
*emu
, emu10k1_fx8010_code_t
*icode
)
544 for (tram
= 0; tram
< (emu
->audigy
? 0x100 : 0xa0); tram
++) {
545 if (!test_bit(tram
, icode
->tram_valid
))
547 if (get_user(val
, &icode
->tram_data_map
[tram
]) ||
548 get_user(addr
, &icode
->tram_addr_map
[tram
]))
550 snd_emu10k1_ptr_write(emu
, TANKMEMDATAREGBASE
+ tram
, 0, val
);
552 snd_emu10k1_ptr_write(emu
, TANKMEMADDRREGBASE
+ tram
, 0, addr
);
554 snd_emu10k1_ptr_write(emu
, TANKMEMADDRREGBASE
+ tram
, 0, addr
<< 12);
555 snd_emu10k1_ptr_write(emu
, A_TANKMEMCTLREGBASE
+ tram
, 0, addr
>> 20);
561 static int snd_emu10k1_tram_peek(emu10k1_t
*emu
, emu10k1_fx8010_code_t
*icode
)
566 memset(icode
->tram_valid
, 0, sizeof(icode
->tram_valid
));
567 for (tram
= 0; tram
< (emu
->audigy
? 0x100 : 0xa0); tram
++) {
568 set_bit(tram
, icode
->tram_valid
);
569 val
= snd_emu10k1_ptr_read(emu
, TANKMEMDATAREGBASE
+ tram
, 0);
571 addr
= snd_emu10k1_ptr_read(emu
, TANKMEMADDRREGBASE
+ tram
, 0);
573 addr
= snd_emu10k1_ptr_read(emu
, TANKMEMADDRREGBASE
+ tram
, 0) >> 12;
574 addr
|= snd_emu10k1_ptr_read(emu
, A_TANKMEMCTLREGBASE
+ tram
, 0) << 20;
576 if (put_user(val
, &icode
->tram_data_map
[tram
]) ||
577 put_user(addr
, &icode
->tram_addr_map
[tram
]))
583 static int snd_emu10k1_code_poke(emu10k1_t
*emu
, emu10k1_fx8010_code_t
*icode
)
587 for (pc
= 0; pc
< (emu
->audigy
? 2*1024 : 2*512); pc
+= 2) {
588 if (!test_bit(pc
/ 2, icode
->code_valid
))
590 if (get_user(lo
, &icode
->code
[pc
+ 0]) ||
591 get_user(hi
, &icode
->code
[pc
+ 1]))
593 snd_emu10k1_efx_write(emu
, pc
+ 0, lo
);
594 snd_emu10k1_efx_write(emu
, pc
+ 1, hi
);
599 static int snd_emu10k1_code_peek(emu10k1_t
*emu
, emu10k1_fx8010_code_t
*icode
)
603 memset(icode
->code_valid
, 0, sizeof(icode
->code_valid
));
604 for (pc
= 0; pc
< (emu
->audigy
? 2*1024 : 2*512); pc
+= 2) {
605 set_bit(pc
/ 2, icode
->code_valid
);
606 if (put_user(snd_emu10k1_efx_read(emu
, pc
+ 0), &icode
->code
[pc
+ 0]))
608 if (put_user(snd_emu10k1_efx_read(emu
, pc
+ 1), &icode
->code
[pc
+ 1]))
614 static snd_emu10k1_fx8010_ctl_t
*snd_emu10k1_look_for_ctl(emu10k1_t
*emu
, snd_ctl_elem_id_t
*id
)
616 snd_emu10k1_fx8010_ctl_t
*ctl
;
617 snd_kcontrol_t
*kcontrol
;
618 struct list_head
*list
;
620 list_for_each(list
, &emu
->fx8010
.gpr_ctl
) {
621 ctl
= emu10k1_gpr_ctl(list
);
622 kcontrol
= ctl
->kcontrol
;
623 if (kcontrol
->id
.iface
== id
->iface
&&
624 !strcmp(kcontrol
->id
.name
, id
->name
) &&
625 kcontrol
->id
.index
== id
->index
)
631 static int snd_emu10k1_verify_controls(emu10k1_t
*emu
, emu10k1_fx8010_code_t
*icode
)
634 snd_ctl_elem_id_t __user
*_id
;
635 snd_ctl_elem_id_t id
;
636 emu10k1_fx8010_control_gpr_t __user
*_gctl
;
637 emu10k1_fx8010_control_gpr_t
*gctl
;
640 for (i
= 0, _id
= icode
->gpr_del_controls
;
641 i
< icode
->gpr_del_control_count
; i
++, _id
++) {
642 if (copy_from_user(&id
, _id
, sizeof(id
)))
644 if (snd_emu10k1_look_for_ctl(emu
, &id
) == NULL
)
647 gctl
= kmalloc(sizeof(*gctl
), GFP_KERNEL
);
651 for (i
= 0, _gctl
= icode
->gpr_add_controls
;
652 i
< icode
->gpr_add_control_count
; i
++, _gctl
++) {
653 if (copy_from_user(gctl
, _gctl
, sizeof(*gctl
))) {
657 if (snd_emu10k1_look_for_ctl(emu
, &gctl
->id
))
659 down_read(&emu
->card
->controls_rwsem
);
660 if (snd_ctl_find_id(emu
->card
, &gctl
->id
) != NULL
) {
661 up_read(&emu
->card
->controls_rwsem
);
665 up_read(&emu
->card
->controls_rwsem
);
666 if (gctl
->id
.iface
!= SNDRV_CTL_ELEM_IFACE_MIXER
&&
667 gctl
->id
.iface
!= SNDRV_CTL_ELEM_IFACE_PCM
) {
672 for (i
= 0, _gctl
= icode
->gpr_list_controls
;
673 i
< icode
->gpr_list_control_count
; i
++, _gctl
++) {
674 /* FIXME: we need to check the WRITE access */
675 if (copy_from_user(gctl
, _gctl
, sizeof(*gctl
))) {
685 static void snd_emu10k1_ctl_private_free(snd_kcontrol_t
*kctl
)
687 snd_emu10k1_fx8010_ctl_t
*ctl
;
689 ctl
= (snd_emu10k1_fx8010_ctl_t
*)kctl
->private_value
;
690 kctl
->private_value
= 0;
691 list_del(&ctl
->list
);
695 static int snd_emu10k1_add_controls(emu10k1_t
*emu
, emu10k1_fx8010_code_t
*icode
)
698 emu10k1_fx8010_control_gpr_t __user
*_gctl
;
699 emu10k1_fx8010_control_gpr_t
*gctl
;
700 snd_emu10k1_fx8010_ctl_t
*ctl
, *nctl
;
701 snd_kcontrol_new_t knew
;
702 snd_kcontrol_t
*kctl
;
703 snd_ctl_elem_value_t
*val
;
706 val
= (snd_ctl_elem_value_t
*)kmalloc(sizeof(*val
), GFP_KERNEL
);
707 gctl
= kmalloc(sizeof(*gctl
), GFP_KERNEL
);
708 nctl
= kmalloc(sizeof(*nctl
), GFP_KERNEL
);
709 if (!val
|| !gctl
|| !nctl
) {
714 for (i
= 0, _gctl
= icode
->gpr_add_controls
;
715 i
< icode
->gpr_add_control_count
; i
++, _gctl
++) {
716 if (copy_from_user(gctl
, _gctl
, sizeof(*gctl
))) {
720 snd_runtime_check(gctl
->id
.iface
== SNDRV_CTL_ELEM_IFACE_MIXER
||
721 gctl
->id
.iface
== SNDRV_CTL_ELEM_IFACE_PCM
, err
= -EINVAL
; goto __error
);
722 snd_runtime_check(gctl
->id
.name
[0] != '\0', err
= -EINVAL
; goto __error
);
723 ctl
= snd_emu10k1_look_for_ctl(emu
, &gctl
->id
);
724 memset(&knew
, 0, sizeof(knew
));
725 knew
.iface
= gctl
->id
.iface
;
726 knew
.name
= gctl
->id
.name
;
727 knew
.index
= gctl
->id
.index
;
728 knew
.device
= gctl
->id
.device
;
729 knew
.subdevice
= gctl
->id
.subdevice
;
730 knew
.info
= snd_emu10k1_gpr_ctl_info
;
731 knew
.get
= snd_emu10k1_gpr_ctl_get
;
732 knew
.put
= snd_emu10k1_gpr_ctl_put
;
733 memset(nctl
, 0, sizeof(*nctl
));
734 nctl
->vcount
= gctl
->vcount
;
735 nctl
->count
= gctl
->count
;
736 for (j
= 0; j
< 32; j
++) {
737 nctl
->gpr
[j
] = gctl
->gpr
[j
];
738 nctl
->value
[j
] = ~gctl
->value
[j
]; /* inverted, we want to write new value in gpr_ctl_put() */
739 val
->value
.integer
.value
[j
] = gctl
->value
[j
];
741 nctl
->min
= gctl
->min
;
742 nctl
->max
= gctl
->max
;
743 nctl
->translation
= gctl
->translation
;
745 ctl
= (snd_emu10k1_fx8010_ctl_t
*)kmalloc(sizeof(*ctl
), GFP_KERNEL
);
750 knew
.private_value
= (unsigned long)ctl
;
752 if ((err
= snd_ctl_add(emu
->card
, kctl
= snd_ctl_new1(&knew
, emu
))) < 0) {
756 kctl
->private_free
= snd_emu10k1_ctl_private_free
;
757 ctl
->kcontrol
= kctl
;
758 list_add_tail(&ctl
->list
, &emu
->fx8010
.gpr_ctl
);
761 nctl
->list
= ctl
->list
;
762 nctl
->kcontrol
= ctl
->kcontrol
;
764 snd_ctl_notify(emu
->card
, SNDRV_CTL_EVENT_MASK_VALUE
|
765 SNDRV_CTL_EVENT_MASK_INFO
, &ctl
->kcontrol
->id
);
767 snd_emu10k1_gpr_ctl_put(ctl
->kcontrol
, val
);
776 static int snd_emu10k1_del_controls(emu10k1_t
*emu
, emu10k1_fx8010_code_t
*icode
)
779 snd_ctl_elem_id_t id
;
780 snd_ctl_elem_id_t __user
*_id
;
781 snd_emu10k1_fx8010_ctl_t
*ctl
;
782 snd_card_t
*card
= emu
->card
;
784 for (i
= 0, _id
= icode
->gpr_del_controls
;
785 i
< icode
->gpr_del_control_count
; i
++, _id
++) {
786 snd_runtime_check(copy_from_user(&id
, _id
, sizeof(id
)) == 0, return -EFAULT
);
787 down_write(&card
->controls_rwsem
);
788 ctl
= snd_emu10k1_look_for_ctl(emu
, &id
);
790 snd_ctl_remove(card
, ctl
->kcontrol
);
791 up_write(&card
->controls_rwsem
);
796 static int snd_emu10k1_list_controls(emu10k1_t
*emu
, emu10k1_fx8010_code_t
*icode
)
798 unsigned int i
= 0, j
;
799 unsigned int total
= 0;
800 emu10k1_fx8010_control_gpr_t
*gctl
;
801 emu10k1_fx8010_control_gpr_t __user
*_gctl
;
802 snd_emu10k1_fx8010_ctl_t
*ctl
;
803 snd_ctl_elem_id_t
*id
;
804 struct list_head
*list
;
806 gctl
= kmalloc(sizeof(*gctl
), GFP_KERNEL
);
810 _gctl
= icode
->gpr_list_controls
;
811 list_for_each(list
, &emu
->fx8010
.gpr_ctl
) {
812 ctl
= emu10k1_gpr_ctl(list
);
814 if (_gctl
&& i
< icode
->gpr_list_control_count
) {
815 memset(gctl
, 0, sizeof(*gctl
));
816 id
= &ctl
->kcontrol
->id
;
817 gctl
->id
.iface
= id
->iface
;
818 strlcpy(gctl
->id
.name
, id
->name
, sizeof(gctl
->id
.name
));
819 gctl
->id
.index
= id
->index
;
820 gctl
->id
.device
= id
->device
;
821 gctl
->id
.subdevice
= id
->subdevice
;
822 gctl
->vcount
= ctl
->vcount
;
823 gctl
->count
= ctl
->count
;
824 for (j
= 0; j
< 32; j
++) {
825 gctl
->gpr
[j
] = ctl
->gpr
[j
];
826 gctl
->value
[j
] = ctl
->value
[j
];
828 gctl
->min
= ctl
->min
;
829 gctl
->max
= ctl
->max
;
830 gctl
->translation
= ctl
->translation
;
831 if (copy_to_user(_gctl
, gctl
, sizeof(*gctl
))) {
839 icode
->gpr_list_control_total
= total
;
844 static int snd_emu10k1_icode_poke(emu10k1_t
*emu
, emu10k1_fx8010_code_t
*icode
)
848 down(&emu
->fx8010
.lock
);
849 if ((err
= snd_emu10k1_verify_controls(emu
, icode
)) < 0)
851 strlcpy(emu
->fx8010
.name
, icode
->name
, sizeof(emu
->fx8010
.name
));
852 /* stop FX processor - this may be dangerous, but it's better to miss
853 some samples than generate wrong ones - [jk] */
855 snd_emu10k1_ptr_write(emu
, A_DBG
, 0, emu
->fx8010
.dbg
| A_DBG_SINGLE_STEP
);
857 snd_emu10k1_ptr_write(emu
, DBG
, 0, emu
->fx8010
.dbg
| EMU10K1_DBG_SINGLE_STEP
);
858 /* ok, do the main job */
859 if ((err
= snd_emu10k1_del_controls(emu
, icode
)) < 0 ||
860 (err
= snd_emu10k1_gpr_poke(emu
, icode
)) < 0 ||
861 (err
= snd_emu10k1_tram_poke(emu
, icode
)) < 0 ||
862 (err
= snd_emu10k1_code_poke(emu
, icode
)) < 0 ||
863 (err
= snd_emu10k1_add_controls(emu
, icode
)) < 0)
865 /* start FX processor when the DSP code is updated */
867 snd_emu10k1_ptr_write(emu
, A_DBG
, 0, emu
->fx8010
.dbg
);
869 snd_emu10k1_ptr_write(emu
, DBG
, 0, emu
->fx8010
.dbg
);
871 up(&emu
->fx8010
.lock
);
875 static int snd_emu10k1_icode_peek(emu10k1_t
*emu
, emu10k1_fx8010_code_t
*icode
)
879 down(&emu
->fx8010
.lock
);
880 strlcpy(icode
->name
, emu
->fx8010
.name
, sizeof(icode
->name
));
881 /* ok, do the main job */
882 err
= snd_emu10k1_gpr_peek(emu
, icode
);
884 err
= snd_emu10k1_tram_peek(emu
, icode
);
886 err
= snd_emu10k1_code_peek(emu
, icode
);
888 err
= snd_emu10k1_list_controls(emu
, icode
);
889 up(&emu
->fx8010
.lock
);
893 static int snd_emu10k1_ipcm_poke(emu10k1_t
*emu
, emu10k1_fx8010_pcm_t
*ipcm
)
897 snd_emu10k1_fx8010_pcm_t
*pcm
;
899 if (ipcm
->substream
>= EMU10K1_FX8010_PCM_COUNT
)
901 if (ipcm
->channels
> 32)
903 pcm
= &emu
->fx8010
.pcm
[ipcm
->substream
];
904 down(&emu
->fx8010
.lock
);
905 spin_lock_irq(&emu
->reg_lock
);
910 if (ipcm
->channels
== 0) { /* remove */
913 /* FIXME: we need to add universal code to the PCM transfer routine */
914 if (ipcm
->channels
!= 2) {
920 pcm
->channels
= ipcm
->channels
;
921 pcm
->tram_start
= ipcm
->tram_start
;
922 pcm
->buffer_size
= ipcm
->buffer_size
;
923 pcm
->gpr_size
= ipcm
->gpr_size
;
924 pcm
->gpr_count
= ipcm
->gpr_count
;
925 pcm
->gpr_tmpcount
= ipcm
->gpr_tmpcount
;
926 pcm
->gpr_ptr
= ipcm
->gpr_ptr
;
927 pcm
->gpr_trigger
= ipcm
->gpr_trigger
;
928 pcm
->gpr_running
= ipcm
->gpr_running
;
929 for (i
= 0; i
< pcm
->channels
; i
++)
930 pcm
->etram
[i
] = ipcm
->etram
[i
];
933 spin_unlock_irq(&emu
->reg_lock
);
934 up(&emu
->fx8010
.lock
);
938 static int snd_emu10k1_ipcm_peek(emu10k1_t
*emu
, emu10k1_fx8010_pcm_t
*ipcm
)
942 snd_emu10k1_fx8010_pcm_t
*pcm
;
944 if (ipcm
->substream
>= EMU10K1_FX8010_PCM_COUNT
)
946 pcm
= &emu
->fx8010
.pcm
[ipcm
->substream
];
947 down(&emu
->fx8010
.lock
);
948 spin_lock_irq(&emu
->reg_lock
);
949 ipcm
->channels
= pcm
->channels
;
950 ipcm
->tram_start
= pcm
->tram_start
;
951 ipcm
->buffer_size
= pcm
->buffer_size
;
952 ipcm
->gpr_size
= pcm
->gpr_size
;
953 ipcm
->gpr_ptr
= pcm
->gpr_ptr
;
954 ipcm
->gpr_count
= pcm
->gpr_count
;
955 ipcm
->gpr_tmpcount
= pcm
->gpr_tmpcount
;
956 ipcm
->gpr_trigger
= pcm
->gpr_trigger
;
957 ipcm
->gpr_running
= pcm
->gpr_running
;
958 for (i
= 0; i
< pcm
->channels
; i
++)
959 ipcm
->etram
[i
] = pcm
->etram
[i
];
960 ipcm
->res1
= ipcm
->res2
= 0;
962 spin_unlock_irq(&emu
->reg_lock
);
963 up(&emu
->fx8010
.lock
);
967 #define SND_EMU10K1_GPR_CONTROLS 44
968 #define SND_EMU10K1_INPUTS 12
969 #define SND_EMU10K1_PLAYBACK_CHANNELS 8
970 #define SND_EMU10K1_CAPTURE_CHANNELS 4
972 static void __devinit
snd_emu10k1_init_mono_control(emu10k1_fx8010_control_gpr_t
*ctl
, const char *name
, int gpr
, int defval
)
974 ctl
->id
.iface
= SNDRV_CTL_ELEM_IFACE_MIXER
;
975 strcpy(ctl
->id
.name
, name
);
976 ctl
->vcount
= ctl
->count
= 1;
977 ctl
->gpr
[0] = gpr
+ 0; ctl
->value
[0] = defval
;
980 ctl
->translation
= EMU10K1_GPR_TRANSLATION_TABLE100
;
983 static void __devinit
snd_emu10k1_init_stereo_control(emu10k1_fx8010_control_gpr_t
*ctl
, const char *name
, int gpr
, int defval
)
985 ctl
->id
.iface
= SNDRV_CTL_ELEM_IFACE_MIXER
;
986 strcpy(ctl
->id
.name
, name
);
987 ctl
->vcount
= ctl
->count
= 2;
988 ctl
->gpr
[0] = gpr
+ 0; ctl
->value
[0] = defval
;
989 ctl
->gpr
[1] = gpr
+ 1; ctl
->value
[1] = defval
;
992 ctl
->translation
= EMU10K1_GPR_TRANSLATION_TABLE100
;
995 static void __devinit
snd_emu10k1_init_mono_onoff_control(emu10k1_fx8010_control_gpr_t
*ctl
, const char *name
, int gpr
, int defval
)
997 ctl
->id
.iface
= SNDRV_CTL_ELEM_IFACE_MIXER
;
998 strcpy(ctl
->id
.name
, name
);
999 ctl
->vcount
= ctl
->count
= 1;
1000 ctl
->gpr
[0] = gpr
+ 0; ctl
->value
[0] = defval
;
1003 ctl
->translation
= EMU10K1_GPR_TRANSLATION_ONOFF
;
1006 static void __devinit
snd_emu10k1_init_stereo_onoff_control(emu10k1_fx8010_control_gpr_t
*ctl
, const char *name
, int gpr
, int defval
)
1008 ctl
->id
.iface
= SNDRV_CTL_ELEM_IFACE_MIXER
;
1009 strcpy(ctl
->id
.name
, name
);
1010 ctl
->vcount
= ctl
->count
= 2;
1011 ctl
->gpr
[0] = gpr
+ 0; ctl
->value
[0] = defval
;
1012 ctl
->gpr
[1] = gpr
+ 1; ctl
->value
[1] = defval
;
1015 ctl
->translation
= EMU10K1_GPR_TRANSLATION_ONOFF
;
1020 * initial DSP configuration for Audigy
1023 static int __devinit
_snd_emu10k1_audigy_init_efx(emu10k1_t
*emu
)
1025 int err
, i
, z
, gpr
, nctl
;
1026 const int playback
= 10;
1027 const int capture
= playback
+ (SND_EMU10K1_PLAYBACK_CHANNELS
* 2); /* we reserve 10 voices */
1028 const int stereo_mix
= capture
+ 2;
1029 const int tmp
= 0x88;
1031 emu10k1_fx8010_code_t
*icode
= NULL
;
1032 emu10k1_fx8010_control_gpr_t
*controls
= NULL
, *ctl
;
1036 spin_lock_init(&emu
->fx8010
.irq_lock
);
1037 INIT_LIST_HEAD(&emu
->fx8010
.gpr_ctl
);
1039 if ((icode
= kzalloc(sizeof(*icode
), GFP_KERNEL
)) == NULL
||
1040 (icode
->gpr_map
= (u_int32_t __user
*)kcalloc(512 + 256 + 256 + 2 * 1024, sizeof(u_int32_t
), GFP_KERNEL
)) == NULL
||
1041 (controls
= kcalloc(SND_EMU10K1_GPR_CONTROLS
, sizeof(*controls
), GFP_KERNEL
)) == NULL
) {
1045 gpr_map
= (u32 __force
*)icode
->gpr_map
;
1047 icode
->tram_data_map
= icode
->gpr_map
+ 512;
1048 icode
->tram_addr_map
= icode
->tram_data_map
+ 256;
1049 icode
->code
= icode
->tram_addr_map
+ 256;
1051 /* clear free GPRs */
1052 for (i
= 0; i
< 512; i
++)
1053 set_bit(i
, icode
->gpr_valid
);
1055 /* clear TRAM data & address lines */
1056 for (i
= 0; i
< 256; i
++)
1057 set_bit(i
, icode
->tram_valid
);
1059 strcpy(icode
->name
, "Audigy DSP code for ALSA");
1062 gpr
= stereo_mix
+ 10;
1064 /* stop FX processor */
1065 snd_emu10k1_ptr_write(emu
, A_DBG
, 0, (emu
->fx8010
.dbg
= 0) | A_DBG_SINGLE_STEP
);
1067 /* PCM front Playback Volume (independent from stereo mix) */
1068 A_OP(icode
, &ptr
, iMAC0
, A_GPR(playback
), A_C_00000000
, A_GPR(gpr
), A_FXBUS(FXBUS_PCM_LEFT_FRONT
));
1069 A_OP(icode
, &ptr
, iMAC0
, A_GPR(playback
+1), A_C_00000000
, A_GPR(gpr
+1), A_FXBUS(FXBUS_PCM_RIGHT_FRONT
));
1070 snd_emu10k1_init_stereo_control(&controls
[nctl
++], "PCM Front Playback Volume", gpr
, 100);
1073 /* PCM Surround Playback (independent from stereo mix) */
1074 A_OP(icode
, &ptr
, iMAC0
, A_GPR(playback
+2), A_C_00000000
, A_GPR(gpr
), A_FXBUS(FXBUS_PCM_LEFT_REAR
));
1075 A_OP(icode
, &ptr
, iMAC0
, A_GPR(playback
+3), A_C_00000000
, A_GPR(gpr
+1), A_FXBUS(FXBUS_PCM_RIGHT_REAR
));
1076 snd_emu10k1_init_stereo_control(&controls
[nctl
++], "PCM Surround Playback Volume", gpr
, 100);
1079 /* PCM Side Playback (independent from stereo mix) */
1080 if (emu
->card_capabilities
->spk71
) {
1081 A_OP(icode
, &ptr
, iMAC0
, A_GPR(playback
+6), A_C_00000000
, A_GPR(gpr
), A_FXBUS(FXBUS_PCM_LEFT_SIDE
));
1082 A_OP(icode
, &ptr
, iMAC0
, A_GPR(playback
+7), A_C_00000000
, A_GPR(gpr
+1), A_FXBUS(FXBUS_PCM_RIGHT_SIDE
));
1083 snd_emu10k1_init_stereo_control(&controls
[nctl
++], "PCM Side Playback Volume", gpr
, 100);
1087 /* PCM Center Playback (independent from stereo mix) */
1088 A_OP(icode
, &ptr
, iMAC0
, A_GPR(playback
+4), A_C_00000000
, A_GPR(gpr
), A_FXBUS(FXBUS_PCM_CENTER
));
1089 snd_emu10k1_init_mono_control(&controls
[nctl
++], "PCM Center Playback Volume", gpr
, 100);
1092 /* PCM LFE Playback (independent from stereo mix) */
1093 A_OP(icode
, &ptr
, iMAC0
, A_GPR(playback
+5), A_C_00000000
, A_GPR(gpr
), A_FXBUS(FXBUS_PCM_LFE
));
1094 snd_emu10k1_init_mono_control(&controls
[nctl
++], "PCM LFE Playback Volume", gpr
, 100);
1100 /* Wave (PCM) Playback Volume (will be renamed later) */
1101 A_OP(icode
, &ptr
, iMAC0
, A_GPR(stereo_mix
), A_C_00000000
, A_GPR(gpr
), A_FXBUS(FXBUS_PCM_LEFT
));
1102 A_OP(icode
, &ptr
, iMAC0
, A_GPR(stereo_mix
+1), A_C_00000000
, A_GPR(gpr
+1), A_FXBUS(FXBUS_PCM_RIGHT
));
1103 snd_emu10k1_init_stereo_control(&controls
[nctl
++], "Wave Playback Volume", gpr
, 100);
1106 /* Synth Playback */
1107 A_OP(icode
, &ptr
, iMAC0
, A_GPR(stereo_mix
+0), A_GPR(stereo_mix
+0), A_GPR(gpr
), A_FXBUS(FXBUS_MIDI_LEFT
));
1108 A_OP(icode
, &ptr
, iMAC0
, A_GPR(stereo_mix
+1), A_GPR(stereo_mix
+1), A_GPR(gpr
+1), A_FXBUS(FXBUS_MIDI_RIGHT
));
1109 snd_emu10k1_init_stereo_control(&controls
[nctl
++], "Synth Playback Volume", gpr
, 100);
1112 /* Wave (PCM) Capture */
1113 A_OP(icode
, &ptr
, iMAC0
, A_GPR(capture
+0), A_C_00000000
, A_GPR(gpr
), A_FXBUS(FXBUS_PCM_LEFT
));
1114 A_OP(icode
, &ptr
, iMAC0
, A_GPR(capture
+1), A_C_00000000
, A_GPR(gpr
+1), A_FXBUS(FXBUS_PCM_RIGHT
));
1115 snd_emu10k1_init_stereo_control(&controls
[nctl
++], "PCM Capture Volume", gpr
, 0);
1119 A_OP(icode
, &ptr
, iMAC0
, A_GPR(capture
+0), A_GPR(capture
+0), A_GPR(gpr
), A_FXBUS(FXBUS_MIDI_LEFT
));
1120 A_OP(icode
, &ptr
, iMAC0
, A_GPR(capture
+1), A_GPR(capture
+1), A_GPR(gpr
+1), A_FXBUS(FXBUS_MIDI_RIGHT
));
1121 snd_emu10k1_init_stereo_control(&controls
[nctl
++], "Synth Capture Volume", gpr
, 0);
1127 #define A_ADD_VOLUME_IN(var,vol,input) \
1128 A_OP(icode, &ptr, iMAC0, A_GPR(var), A_GPR(var), A_GPR(vol), A_EXTIN(input))
1130 /* AC'97 Playback Volume - used only for mic (renamed later) */
1131 A_ADD_VOLUME_IN(stereo_mix
, gpr
, A_EXTIN_AC97_L
);
1132 A_ADD_VOLUME_IN(stereo_mix
+1, gpr
+1, A_EXTIN_AC97_R
);
1133 snd_emu10k1_init_stereo_control(&controls
[nctl
++], "AMic Playback Volume", gpr
, 0);
1135 /* AC'97 Capture Volume - used only for mic */
1136 A_ADD_VOLUME_IN(capture
, gpr
, A_EXTIN_AC97_L
);
1137 A_ADD_VOLUME_IN(capture
+1, gpr
+1, A_EXTIN_AC97_R
);
1138 snd_emu10k1_init_stereo_control(&controls
[nctl
++], "Mic Capture Volume", gpr
, 0);
1141 /* mic capture buffer */
1142 A_OP(icode
, &ptr
, iINTERP
, A_EXTOUT(A_EXTOUT_MIC_CAP
), A_EXTIN(A_EXTIN_AC97_L
), 0xcd, A_EXTIN(A_EXTIN_AC97_R
));
1144 /* Audigy CD Playback Volume */
1145 A_ADD_VOLUME_IN(stereo_mix
, gpr
, A_EXTIN_SPDIF_CD_L
);
1146 A_ADD_VOLUME_IN(stereo_mix
+1, gpr
+1, A_EXTIN_SPDIF_CD_R
);
1147 snd_emu10k1_init_stereo_control(&controls
[nctl
++],
1148 emu
->card_capabilities
->ac97_chip
? "Audigy CD Playback Volume" : "CD Playback Volume",
1151 /* Audigy CD Capture Volume */
1152 A_ADD_VOLUME_IN(capture
, gpr
, A_EXTIN_SPDIF_CD_L
);
1153 A_ADD_VOLUME_IN(capture
+1, gpr
+1, A_EXTIN_SPDIF_CD_R
);
1154 snd_emu10k1_init_stereo_control(&controls
[nctl
++],
1155 emu
->card_capabilities
->ac97_chip
? "Audigy CD Capture Volume" : "CD Capture Volume",
1159 /* Optical SPDIF Playback Volume */
1160 A_ADD_VOLUME_IN(stereo_mix
, gpr
, A_EXTIN_OPT_SPDIF_L
);
1161 A_ADD_VOLUME_IN(stereo_mix
+1, gpr
+1, A_EXTIN_OPT_SPDIF_R
);
1162 snd_emu10k1_init_stereo_control(&controls
[nctl
++], SNDRV_CTL_NAME_IEC958("Optical ",PLAYBACK
,VOLUME
), gpr
, 0);
1164 /* Optical SPDIF Capture Volume */
1165 A_ADD_VOLUME_IN(capture
, gpr
, A_EXTIN_OPT_SPDIF_L
);
1166 A_ADD_VOLUME_IN(capture
+1, gpr
+1, A_EXTIN_OPT_SPDIF_R
);
1167 snd_emu10k1_init_stereo_control(&controls
[nctl
++], SNDRV_CTL_NAME_IEC958("Optical ",CAPTURE
,VOLUME
), gpr
, 0);
1170 /* Line2 Playback Volume */
1171 A_ADD_VOLUME_IN(stereo_mix
, gpr
, A_EXTIN_LINE2_L
);
1172 A_ADD_VOLUME_IN(stereo_mix
+1, gpr
+1, A_EXTIN_LINE2_R
);
1173 snd_emu10k1_init_stereo_control(&controls
[nctl
++],
1174 emu
->card_capabilities
->ac97_chip
? "Line2 Playback Volume" : "Line Playback Volume",
1177 /* Line2 Capture Volume */
1178 A_ADD_VOLUME_IN(capture
, gpr
, A_EXTIN_LINE2_L
);
1179 A_ADD_VOLUME_IN(capture
+1, gpr
+1, A_EXTIN_LINE2_R
);
1180 snd_emu10k1_init_stereo_control(&controls
[nctl
++],
1181 emu
->card_capabilities
->ac97_chip
? "Line2 Capture Volume" : "Line Capture Volume",
1185 /* Philips ADC Playback Volume */
1186 A_ADD_VOLUME_IN(stereo_mix
, gpr
, A_EXTIN_ADC_L
);
1187 A_ADD_VOLUME_IN(stereo_mix
+1, gpr
+1, A_EXTIN_ADC_R
);
1188 snd_emu10k1_init_stereo_control(&controls
[nctl
++], "Analog Mix Playback Volume", gpr
, 0);
1190 /* Philips ADC Capture Volume */
1191 A_ADD_VOLUME_IN(capture
, gpr
, A_EXTIN_ADC_L
);
1192 A_ADD_VOLUME_IN(capture
+1, gpr
+1, A_EXTIN_ADC_R
);
1193 snd_emu10k1_init_stereo_control(&controls
[nctl
++], "Analog Mix Capture Volume", gpr
, 0);
1196 /* Aux2 Playback Volume */
1197 A_ADD_VOLUME_IN(stereo_mix
, gpr
, A_EXTIN_AUX2_L
);
1198 A_ADD_VOLUME_IN(stereo_mix
+1, gpr
+1, A_EXTIN_AUX2_R
);
1199 snd_emu10k1_init_stereo_control(&controls
[nctl
++],
1200 emu
->card_capabilities
->ac97_chip
? "Aux2 Playback Volume" : "Aux Playback Volume",
1203 /* Aux2 Capture Volume */
1204 A_ADD_VOLUME_IN(capture
, gpr
, A_EXTIN_AUX2_L
);
1205 A_ADD_VOLUME_IN(capture
+1, gpr
+1, A_EXTIN_AUX2_R
);
1206 snd_emu10k1_init_stereo_control(&controls
[nctl
++],
1207 emu
->card_capabilities
->ac97_chip
? "Aux2 Capture Volume" : "Aux Capture Volume",
1211 /* Stereo Mix Front Playback Volume */
1212 A_OP(icode
, &ptr
, iMAC0
, A_GPR(playback
), A_GPR(playback
), A_GPR(gpr
), A_GPR(stereo_mix
));
1213 A_OP(icode
, &ptr
, iMAC0
, A_GPR(playback
+1), A_GPR(playback
+1), A_GPR(gpr
+1), A_GPR(stereo_mix
+1));
1214 snd_emu10k1_init_stereo_control(&controls
[nctl
++], "Front Playback Volume", gpr
, 100);
1217 /* Stereo Mix Surround Playback */
1218 A_OP(icode
, &ptr
, iMAC0
, A_GPR(playback
+2), A_GPR(playback
+2), A_GPR(gpr
), A_GPR(stereo_mix
));
1219 A_OP(icode
, &ptr
, iMAC0
, A_GPR(playback
+3), A_GPR(playback
+3), A_GPR(gpr
+1), A_GPR(stereo_mix
+1));
1220 snd_emu10k1_init_stereo_control(&controls
[nctl
++], "Surround Playback Volume", gpr
, 0);
1223 /* Stereo Mix Center Playback */
1224 /* Center = sub = Left/2 + Right/2 */
1225 A_OP(icode
, &ptr
, iINTERP
, A_GPR(tmp
), A_GPR(stereo_mix
), 0xcd, A_GPR(stereo_mix
+1));
1226 A_OP(icode
, &ptr
, iMAC0
, A_GPR(playback
+4), A_GPR(playback
+4), A_GPR(gpr
), A_GPR(tmp
));
1227 snd_emu10k1_init_mono_control(&controls
[nctl
++], "Center Playback Volume", gpr
, 0);
1230 /* Stereo Mix LFE Playback */
1231 A_OP(icode
, &ptr
, iMAC0
, A_GPR(playback
+5), A_GPR(playback
+5), A_GPR(gpr
), A_GPR(tmp
));
1232 snd_emu10k1_init_mono_control(&controls
[nctl
++], "LFE Playback Volume", gpr
, 0);
1235 if (emu
->card_capabilities
->spk71
) {
1236 /* Stereo Mix Side Playback */
1237 A_OP(icode
, &ptr
, iMAC0
, A_GPR(playback
+6), A_GPR(playback
+6), A_GPR(gpr
), A_GPR(stereo_mix
));
1238 A_OP(icode
, &ptr
, iMAC0
, A_GPR(playback
+7), A_GPR(playback
+7), A_GPR(gpr
+1), A_GPR(stereo_mix
+1));
1239 snd_emu10k1_init_stereo_control(&controls
[nctl
++], "Side Playback Volume", gpr
, 0);
1246 #define A_PUT_OUTPUT(out,src) A_OP(icode, &ptr, iACC3, A_EXTOUT(out), A_C_00000000, A_C_00000000, A_GPR(src))
1247 #define A_PUT_STEREO_OUTPUT(out1,out2,src) \
1248 {A_PUT_OUTPUT(out1,src); A_PUT_OUTPUT(out2,src+1);}
1250 #define _A_SWITCH(icode, ptr, dst, src, sw) \
1251 A_OP((icode), ptr, iMACINT0, dst, A_C_00000000, src, sw);
1252 #define A_SWITCH(icode, ptr, dst, src, sw) \
1253 _A_SWITCH(icode, ptr, A_GPR(dst), A_GPR(src), A_GPR(sw))
1254 #define _A_SWITCH_NEG(icode, ptr, dst, src) \
1255 A_OP((icode), ptr, iANDXOR, dst, src, A_C_00000001, A_C_00000001);
1256 #define A_SWITCH_NEG(icode, ptr, dst, src) \
1257 _A_SWITCH_NEG(icode, ptr, A_GPR(dst), A_GPR(src))
1261 * Process tone control
1263 A_OP(icode
, &ptr
, iACC3
, A_GPR(playback
+ SND_EMU10K1_PLAYBACK_CHANNELS
+ 0), A_GPR(playback
+ 0), A_C_00000000
, A_C_00000000
); /* left */
1264 A_OP(icode
, &ptr
, iACC3
, A_GPR(playback
+ SND_EMU10K1_PLAYBACK_CHANNELS
+ 1), A_GPR(playback
+ 1), A_C_00000000
, A_C_00000000
); /* right */
1265 A_OP(icode
, &ptr
, iACC3
, A_GPR(playback
+ SND_EMU10K1_PLAYBACK_CHANNELS
+ 2), A_GPR(playback
+ 2), A_C_00000000
, A_C_00000000
); /* rear left */
1266 A_OP(icode
, &ptr
, iACC3
, A_GPR(playback
+ SND_EMU10K1_PLAYBACK_CHANNELS
+ 3), A_GPR(playback
+ 3), A_C_00000000
, A_C_00000000
); /* rear right */
1267 A_OP(icode
, &ptr
, iACC3
, A_GPR(playback
+ SND_EMU10K1_PLAYBACK_CHANNELS
+ 4), A_GPR(playback
+ 4), A_C_00000000
, A_C_00000000
); /* center */
1268 A_OP(icode
, &ptr
, iACC3
, A_GPR(playback
+ SND_EMU10K1_PLAYBACK_CHANNELS
+ 5), A_GPR(playback
+ 5), A_C_00000000
, A_C_00000000
); /* LFE */
1269 if (emu
->card_capabilities
->spk71
) {
1270 A_OP(icode
, &ptr
, iACC3
, A_GPR(playback
+ SND_EMU10K1_PLAYBACK_CHANNELS
+ 6), A_GPR(playback
+ 6), A_C_00000000
, A_C_00000000
); /* side left */
1271 A_OP(icode
, &ptr
, iACC3
, A_GPR(playback
+ SND_EMU10K1_PLAYBACK_CHANNELS
+ 7), A_GPR(playback
+ 7), A_C_00000000
, A_C_00000000
); /* side right */
1275 ctl
= &controls
[nctl
+ 0];
1276 ctl
->id
.iface
= SNDRV_CTL_ELEM_IFACE_MIXER
;
1277 strcpy(ctl
->id
.name
, "Tone Control - Bass");
1282 ctl
->value
[0] = ctl
->value
[1] = 20;
1283 ctl
->translation
= EMU10K1_GPR_TRANSLATION_BASS
;
1284 ctl
= &controls
[nctl
+ 1];
1285 ctl
->id
.iface
= SNDRV_CTL_ELEM_IFACE_MIXER
;
1286 strcpy(ctl
->id
.name
, "Tone Control - Treble");
1291 ctl
->value
[0] = ctl
->value
[1] = 20;
1292 ctl
->translation
= EMU10K1_GPR_TRANSLATION_TREBLE
;
1294 #define BASS_GPR 0x8c
1295 #define TREBLE_GPR 0x96
1297 for (z
= 0; z
< 5; z
++) {
1299 for (j
= 0; j
< 2; j
++) {
1300 controls
[nctl
+ 0].gpr
[z
* 2 + j
] = BASS_GPR
+ z
* 2 + j
;
1301 controls
[nctl
+ 1].gpr
[z
* 2 + j
] = TREBLE_GPR
+ z
* 2 + j
;
1304 for (z
= 0; z
< 4; z
++) { /* front/rear/center-lfe/side */
1306 for (j
= 0; j
< 2; j
++) { /* left/right */
1307 k
= 0xb0 + (z
* 8) + (j
* 4);
1308 l
= 0xe0 + (z
* 8) + (j
* 4);
1309 d
= playback
+ SND_EMU10K1_PLAYBACK_CHANNELS
+ z
* 2 + j
;
1311 A_OP(icode
, &ptr
, iMAC0
, A_C_00000000
, A_C_00000000
, A_GPR(d
), A_GPR(BASS_GPR
+ 0 + j
));
1312 A_OP(icode
, &ptr
, iMACMV
, A_GPR(k
+1), A_GPR(k
), A_GPR(k
+1), A_GPR(BASS_GPR
+ 4 + j
));
1313 A_OP(icode
, &ptr
, iMACMV
, A_GPR(k
), A_GPR(d
), A_GPR(k
), A_GPR(BASS_GPR
+ 2 + j
));
1314 A_OP(icode
, &ptr
, iMACMV
, A_GPR(k
+3), A_GPR(k
+2), A_GPR(k
+3), A_GPR(BASS_GPR
+ 8 + j
));
1315 A_OP(icode
, &ptr
, iMAC0
, A_GPR(k
+2), A_GPR_ACCU
, A_GPR(k
+2), A_GPR(BASS_GPR
+ 6 + j
));
1316 A_OP(icode
, &ptr
, iACC3
, A_GPR(k
+2), A_GPR(k
+2), A_GPR(k
+2), A_C_00000000
);
1318 A_OP(icode
, &ptr
, iMAC0
, A_C_00000000
, A_C_00000000
, A_GPR(k
+2), A_GPR(TREBLE_GPR
+ 0 + j
));
1319 A_OP(icode
, &ptr
, iMACMV
, A_GPR(l
+1), A_GPR(l
), A_GPR(l
+1), A_GPR(TREBLE_GPR
+ 4 + j
));
1320 A_OP(icode
, &ptr
, iMACMV
, A_GPR(l
), A_GPR(k
+2), A_GPR(l
), A_GPR(TREBLE_GPR
+ 2 + j
));
1321 A_OP(icode
, &ptr
, iMACMV
, A_GPR(l
+3), A_GPR(l
+2), A_GPR(l
+3), A_GPR(TREBLE_GPR
+ 8 + j
));
1322 A_OP(icode
, &ptr
, iMAC0
, A_GPR(l
+2), A_GPR_ACCU
, A_GPR(l
+2), A_GPR(TREBLE_GPR
+ 6 + j
));
1323 A_OP(icode
, &ptr
, iMACINT0
, A_GPR(l
+2), A_C_00000000
, A_GPR(l
+2), A_C_00000010
);
1325 A_OP(icode
, &ptr
, iACC3
, A_GPR(d
), A_GPR(l
+2), A_C_00000000
, A_C_00000000
);
1327 if (z
== 2) /* center */
1336 for (z
= 0; z
< 8; z
++) {
1337 A_SWITCH(icode
, &ptr
, tmp
+ 0, playback
+ SND_EMU10K1_PLAYBACK_CHANNELS
+ z
, gpr
+ 0);
1338 A_SWITCH_NEG(icode
, &ptr
, tmp
+ 1, gpr
+ 0);
1339 A_SWITCH(icode
, &ptr
, tmp
+ 1, playback
+ z
, tmp
+ 1);
1340 A_OP(icode
, &ptr
, iACC3
, A_GPR(playback
+ SND_EMU10K1_PLAYBACK_CHANNELS
+ z
), A_GPR(tmp
+ 0), A_GPR(tmp
+ 1), A_C_00000000
);
1342 snd_emu10k1_init_stereo_onoff_control(controls
+ nctl
++, "Tone Control - Switch", gpr
, 0);
1345 /* Master volume (will be renamed later) */
1346 A_OP(icode
, &ptr
, iMAC0
, A_GPR(playback
+0+SND_EMU10K1_PLAYBACK_CHANNELS
), A_C_00000000
, A_GPR(gpr
), A_GPR(playback
+0+SND_EMU10K1_PLAYBACK_CHANNELS
));
1347 A_OP(icode
, &ptr
, iMAC0
, A_GPR(playback
+1+SND_EMU10K1_PLAYBACK_CHANNELS
), A_C_00000000
, A_GPR(gpr
), A_GPR(playback
+1+SND_EMU10K1_PLAYBACK_CHANNELS
));
1348 A_OP(icode
, &ptr
, iMAC0
, A_GPR(playback
+2+SND_EMU10K1_PLAYBACK_CHANNELS
), A_C_00000000
, A_GPR(gpr
), A_GPR(playback
+2+SND_EMU10K1_PLAYBACK_CHANNELS
));
1349 A_OP(icode
, &ptr
, iMAC0
, A_GPR(playback
+3+SND_EMU10K1_PLAYBACK_CHANNELS
), A_C_00000000
, A_GPR(gpr
), A_GPR(playback
+3+SND_EMU10K1_PLAYBACK_CHANNELS
));
1350 A_OP(icode
, &ptr
, iMAC0
, A_GPR(playback
+4+SND_EMU10K1_PLAYBACK_CHANNELS
), A_C_00000000
, A_GPR(gpr
), A_GPR(playback
+4+SND_EMU10K1_PLAYBACK_CHANNELS
));
1351 A_OP(icode
, &ptr
, iMAC0
, A_GPR(playback
+5+SND_EMU10K1_PLAYBACK_CHANNELS
), A_C_00000000
, A_GPR(gpr
), A_GPR(playback
+5+SND_EMU10K1_PLAYBACK_CHANNELS
));
1352 A_OP(icode
, &ptr
, iMAC0
, A_GPR(playback
+6+SND_EMU10K1_PLAYBACK_CHANNELS
), A_C_00000000
, A_GPR(gpr
), A_GPR(playback
+6+SND_EMU10K1_PLAYBACK_CHANNELS
));
1353 A_OP(icode
, &ptr
, iMAC0
, A_GPR(playback
+7+SND_EMU10K1_PLAYBACK_CHANNELS
), A_C_00000000
, A_GPR(gpr
), A_GPR(playback
+7+SND_EMU10K1_PLAYBACK_CHANNELS
));
1354 snd_emu10k1_init_mono_control(&controls
[nctl
++], "Wave Master Playback Volume", gpr
, 0);
1357 /* analog speakers */
1358 A_PUT_STEREO_OUTPUT(A_EXTOUT_AFRONT_L
, A_EXTOUT_AFRONT_R
, playback
+ SND_EMU10K1_PLAYBACK_CHANNELS
);
1359 A_PUT_STEREO_OUTPUT(A_EXTOUT_AREAR_L
, A_EXTOUT_AREAR_R
, playback
+2 + SND_EMU10K1_PLAYBACK_CHANNELS
);
1360 A_PUT_OUTPUT(A_EXTOUT_ACENTER
, playback
+4 + SND_EMU10K1_PLAYBACK_CHANNELS
);
1361 A_PUT_OUTPUT(A_EXTOUT_ALFE
, playback
+5 + SND_EMU10K1_PLAYBACK_CHANNELS
);
1362 if (emu
->card_capabilities
->spk71
)
1363 A_PUT_STEREO_OUTPUT(A_EXTOUT_ASIDE_L
, A_EXTOUT_ASIDE_R
, playback
+6 + SND_EMU10K1_PLAYBACK_CHANNELS
);
1366 A_PUT_STEREO_OUTPUT(A_EXTOUT_HEADPHONE_L
, A_EXTOUT_HEADPHONE_R
, playback
+ SND_EMU10K1_PLAYBACK_CHANNELS
);
1368 /* digital outputs */
1369 /* A_PUT_STEREO_OUTPUT(A_EXTOUT_FRONT_L, A_EXTOUT_FRONT_R, playback + SND_EMU10K1_PLAYBACK_CHANNELS); */
1371 /* IEC958 Optical Raw Playback Switch */
1373 gpr_map
[gpr
++] = 0x1008;
1374 gpr_map
[gpr
++] = 0xffff0000;
1375 for (z
= 0; z
< 2; z
++) {
1376 A_OP(icode
, &ptr
, iMAC0
, A_GPR(tmp
+ 2), A_FXBUS(FXBUS_PT_LEFT
+ z
), A_C_00000000
, A_C_00000000
);
1377 A_OP(icode
, &ptr
, iSKIP
, A_GPR_COND
, A_GPR_COND
, A_GPR(gpr
- 2), A_C_00000001
);
1378 A_OP(icode
, &ptr
, iACC3
, A_GPR(tmp
+ 2), A_C_00000000
, A_C_00010000
, A_GPR(tmp
+ 2));
1379 A_OP(icode
, &ptr
, iANDXOR
, A_GPR(tmp
+ 2), A_GPR(tmp
+ 2), A_GPR(gpr
- 1), A_C_00000000
);
1380 A_SWITCH(icode
, &ptr
, tmp
+ 0, tmp
+ 2, gpr
+ z
);
1381 A_SWITCH_NEG(icode
, &ptr
, tmp
+ 1, gpr
+ z
);
1382 A_SWITCH(icode
, &ptr
, tmp
+ 1, playback
+ SND_EMU10K1_PLAYBACK_CHANNELS
+ z
, tmp
+ 1);
1383 if ((z
==1) && (emu
->card_capabilities
->spdif_bug
)) {
1384 /* Due to a SPDIF output bug on some Audigy cards, this code delays the Right channel by 1 sample */
1385 snd_printk("Installing spdif_bug patch: %s\n", emu
->card_capabilities
->name
);
1386 A_OP(icode
, &ptr
, iACC3
, A_EXTOUT(A_EXTOUT_FRONT_L
+ z
), A_GPR(gpr
- 3), A_C_00000000
, A_C_00000000
);
1387 A_OP(icode
, &ptr
, iACC3
, A_GPR(gpr
- 3), A_GPR(tmp
+ 0), A_GPR(tmp
+ 1), A_C_00000000
);
1389 A_OP(icode
, &ptr
, iACC3
, A_EXTOUT(A_EXTOUT_FRONT_L
+ z
), A_GPR(tmp
+ 0), A_GPR(tmp
+ 1), A_C_00000000
);
1392 snd_emu10k1_init_stereo_onoff_control(controls
+ nctl
++, SNDRV_CTL_NAME_IEC958("Optical Raw ",PLAYBACK
,SWITCH
), gpr
, 0);
1395 A_PUT_STEREO_OUTPUT(A_EXTOUT_REAR_L
, A_EXTOUT_REAR_R
, playback
+2 + SND_EMU10K1_PLAYBACK_CHANNELS
);
1396 A_PUT_OUTPUT(A_EXTOUT_CENTER
, playback
+4 + SND_EMU10K1_PLAYBACK_CHANNELS
);
1397 A_PUT_OUTPUT(A_EXTOUT_LFE
, playback
+5 + SND_EMU10K1_PLAYBACK_CHANNELS
);
1400 #ifdef EMU10K1_CAPTURE_DIGITAL_OUT
1401 A_PUT_STEREO_OUTPUT(A_EXTOUT_ADC_CAP_L
, A_EXTOUT_ADC_CAP_R
, playback
+ SND_EMU10K1_PLAYBACK_CHANNELS
);
1403 A_PUT_OUTPUT(A_EXTOUT_ADC_CAP_L
, capture
);
1404 A_PUT_OUTPUT(A_EXTOUT_ADC_CAP_R
, capture
+1);
1407 /* EFX capture - capture the 16 EXTINs */
1408 for (z
= 0; z
< 16; z
++) {
1409 A_OP(icode
, &ptr
, iACC3
, A_FXBUS2(z
), A_C_00000000
, A_C_00000000
, A_EXTIN(z
));
1421 /* clear remaining instruction memory */
1423 A_OP(icode
, &ptr
, 0x0f, 0xc0, 0xc0, 0xcf, 0xc0);
1425 seg
= snd_enter_user();
1426 icode
->gpr_add_control_count
= nctl
;
1427 icode
->gpr_add_controls
= (emu10k1_fx8010_control_gpr_t __user
*)controls
;
1428 err
= snd_emu10k1_icode_poke(emu
, icode
);
1429 snd_leave_user(seg
);
1433 if (icode
!= NULL
) {
1434 kfree((void __force
*)icode
->gpr_map
);
1442 * initial DSP configuration for Emu10k1
1445 /* when volume = max, then copy only to avoid volume modification */
1446 /* with iMAC0 (negative values) */
1447 static void __devinit
_volume(emu10k1_fx8010_code_t
*icode
, u32
*ptr
, u32 dst
, u32 src
, u32 vol
)
1449 OP(icode
, ptr
, iMAC0
, dst
, C_00000000
, src
, vol
);
1450 OP(icode
, ptr
, iANDXOR
, C_00000000
, vol
, C_ffffffff
, C_7fffffff
);
1451 OP(icode
, ptr
, iSKIP
, GPR_COND
, GPR_COND
, CC_REG_NONZERO
, C_00000001
);
1452 OP(icode
, ptr
, iACC3
, dst
, src
, C_00000000
, C_00000000
);
1454 static void __devinit
_volume_add(emu10k1_fx8010_code_t
*icode
, u32
*ptr
, u32 dst
, u32 src
, u32 vol
)
1456 OP(icode
, ptr
, iANDXOR
, C_00000000
, vol
, C_ffffffff
, C_7fffffff
);
1457 OP(icode
, ptr
, iSKIP
, GPR_COND
, GPR_COND
, CC_REG_NONZERO
, C_00000002
);
1458 OP(icode
, ptr
, iMACINT0
, dst
, dst
, src
, C_00000001
);
1459 OP(icode
, ptr
, iSKIP
, C_00000000
, C_7fffffff
, C_7fffffff
, C_00000001
);
1460 OP(icode
, ptr
, iMAC0
, dst
, dst
, src
, vol
);
1462 static void __devinit
_volume_out(emu10k1_fx8010_code_t
*icode
, u32
*ptr
, u32 dst
, u32 src
, u32 vol
)
1464 OP(icode
, ptr
, iANDXOR
, C_00000000
, vol
, C_ffffffff
, C_7fffffff
);
1465 OP(icode
, ptr
, iSKIP
, GPR_COND
, GPR_COND
, CC_REG_NONZERO
, C_00000002
);
1466 OP(icode
, ptr
, iACC3
, dst
, src
, C_00000000
, C_00000000
);
1467 OP(icode
, ptr
, iSKIP
, C_00000000
, C_7fffffff
, C_7fffffff
, C_00000001
);
1468 OP(icode
, ptr
, iMAC0
, dst
, C_00000000
, src
, vol
);
1471 #define VOLUME(icode, ptr, dst, src, vol) \
1472 _volume(icode, ptr, GPR(dst), GPR(src), GPR(vol))
1473 #define VOLUME_IN(icode, ptr, dst, src, vol) \
1474 _volume(icode, ptr, GPR(dst), EXTIN(src), GPR(vol))
1475 #define VOLUME_ADD(icode, ptr, dst, src, vol) \
1476 _volume_add(icode, ptr, GPR(dst), GPR(src), GPR(vol))
1477 #define VOLUME_ADDIN(icode, ptr, dst, src, vol) \
1478 _volume_add(icode, ptr, GPR(dst), EXTIN(src), GPR(vol))
1479 #define VOLUME_OUT(icode, ptr, dst, src, vol) \
1480 _volume_out(icode, ptr, EXTOUT(dst), GPR(src), GPR(vol))
1481 #define _SWITCH(icode, ptr, dst, src, sw) \
1482 OP((icode), ptr, iMACINT0, dst, C_00000000, src, sw);
1483 #define SWITCH(icode, ptr, dst, src, sw) \
1484 _SWITCH(icode, ptr, GPR(dst), GPR(src), GPR(sw))
1485 #define SWITCH_IN(icode, ptr, dst, src, sw) \
1486 _SWITCH(icode, ptr, GPR(dst), EXTIN(src), GPR(sw))
1487 #define _SWITCH_NEG(icode, ptr, dst, src) \
1488 OP((icode), ptr, iANDXOR, dst, src, C_00000001, C_00000001);
1489 #define SWITCH_NEG(icode, ptr, dst, src) \
1490 _SWITCH_NEG(icode, ptr, GPR(dst), GPR(src))
1493 static int __devinit
_snd_emu10k1_init_efx(emu10k1_t
*emu
)
1495 int err
, i
, z
, gpr
, tmp
, playback
, capture
;
1497 emu10k1_fx8010_code_t
*icode
;
1498 emu10k1_fx8010_pcm_t
*ipcm
= NULL
;
1499 emu10k1_fx8010_control_gpr_t
*controls
= NULL
, *ctl
;
1503 spin_lock_init(&emu
->fx8010
.irq_lock
);
1504 INIT_LIST_HEAD(&emu
->fx8010
.gpr_ctl
);
1506 if ((icode
= kzalloc(sizeof(*icode
), GFP_KERNEL
)) == NULL
)
1508 if ((icode
->gpr_map
= (u_int32_t __user
*)kcalloc(256 + 160 + 160 + 2 * 512, sizeof(u_int32_t
), GFP_KERNEL
)) == NULL
||
1509 (controls
= kcalloc(SND_EMU10K1_GPR_CONTROLS
, sizeof(emu10k1_fx8010_control_gpr_t
), GFP_KERNEL
)) == NULL
||
1510 (ipcm
= kzalloc(sizeof(*ipcm
), GFP_KERNEL
)) == NULL
) {
1514 gpr_map
= (u32 __force
*)icode
->gpr_map
;
1516 icode
->tram_data_map
= icode
->gpr_map
+ 256;
1517 icode
->tram_addr_map
= icode
->tram_data_map
+ 160;
1518 icode
->code
= icode
->tram_addr_map
+ 160;
1520 /* clear free GPRs */
1521 for (i
= 0; i
< 256; i
++)
1522 set_bit(i
, icode
->gpr_valid
);
1524 /* clear TRAM data & address lines */
1525 for (i
= 0; i
< 160; i
++)
1526 set_bit(i
, icode
->tram_valid
);
1528 strcpy(icode
->name
, "SB Live! FX8010 code for ALSA v1.2 by Jaroslav Kysela");
1530 /* we have 12 inputs */
1531 playback
= SND_EMU10K1_INPUTS
;
1532 /* we have 6 playback channels and tone control doubles */
1533 capture
= playback
+ (SND_EMU10K1_PLAYBACK_CHANNELS
* 2);
1534 gpr
= capture
+ SND_EMU10K1_CAPTURE_CHANNELS
;
1535 tmp
= 0x88; /* we need 4 temporary GPR */
1536 /* from 0x8c to 0xff is the area for tone control */
1538 /* stop FX processor */
1539 snd_emu10k1_ptr_write(emu
, DBG
, 0, (emu
->fx8010
.dbg
= 0) | EMU10K1_DBG_SINGLE_STEP
);
1544 OP(icode
, &ptr
, iMACINT0
, GPR(0), C_00000000
, FXBUS(FXBUS_PCM_LEFT
), C_00000004
);
1545 OP(icode
, &ptr
, iMACINT0
, GPR(1), C_00000000
, FXBUS(FXBUS_PCM_RIGHT
), C_00000004
);
1546 OP(icode
, &ptr
, iMACINT0
, GPR(2), C_00000000
, FXBUS(FXBUS_MIDI_LEFT
), C_00000004
);
1547 OP(icode
, &ptr
, iMACINT0
, GPR(3), C_00000000
, FXBUS(FXBUS_MIDI_RIGHT
), C_00000004
);
1548 OP(icode
, &ptr
, iMACINT0
, GPR(4), C_00000000
, FXBUS(FXBUS_PCM_LEFT_REAR
), C_00000004
);
1549 OP(icode
, &ptr
, iMACINT0
, GPR(5), C_00000000
, FXBUS(FXBUS_PCM_RIGHT_REAR
), C_00000004
);
1550 OP(icode
, &ptr
, iMACINT0
, GPR(6), C_00000000
, FXBUS(FXBUS_PCM_CENTER
), C_00000004
);
1551 OP(icode
, &ptr
, iMACINT0
, GPR(7), C_00000000
, FXBUS(FXBUS_PCM_LFE
), C_00000004
);
1552 OP(icode
, &ptr
, iMACINT0
, GPR(8), C_00000000
, C_00000000
, C_00000000
); /* S/PDIF left */
1553 OP(icode
, &ptr
, iMACINT0
, GPR(9), C_00000000
, C_00000000
, C_00000000
); /* S/PDIF right */
1554 OP(icode
, &ptr
, iMACINT0
, GPR(10), C_00000000
, FXBUS(FXBUS_PCM_LEFT_FRONT
), C_00000004
);
1555 OP(icode
, &ptr
, iMACINT0
, GPR(11), C_00000000
, FXBUS(FXBUS_PCM_RIGHT_FRONT
), C_00000004
);
1557 /* Raw S/PDIF PCM */
1558 ipcm
->substream
= 0;
1560 ipcm
->tram_start
= 0;
1561 ipcm
->buffer_size
= (64 * 1024) / 2;
1562 ipcm
->gpr_size
= gpr
++;
1563 ipcm
->gpr_ptr
= gpr
++;
1564 ipcm
->gpr_count
= gpr
++;
1565 ipcm
->gpr_tmpcount
= gpr
++;
1566 ipcm
->gpr_trigger
= gpr
++;
1567 ipcm
->gpr_running
= gpr
++;
1571 gpr_map
[gpr
+ 0] = 0xfffff000;
1572 gpr_map
[gpr
+ 1] = 0xffff0000;
1573 gpr_map
[gpr
+ 2] = 0x70000000;
1574 gpr_map
[gpr
+ 3] = 0x00000007;
1575 gpr_map
[gpr
+ 4] = 0x001f << 11;
1576 gpr_map
[gpr
+ 5] = 0x001c << 11;
1577 gpr_map
[gpr
+ 6] = (0x22 - 0x01) - 1; /* skip at 01 to 22 */
1578 gpr_map
[gpr
+ 7] = (0x22 - 0x06) - 1; /* skip at 06 to 22 */
1579 gpr_map
[gpr
+ 8] = 0x2000000 + (2<<11);
1580 gpr_map
[gpr
+ 9] = 0x4000000 + (2<<11);
1581 gpr_map
[gpr
+ 10] = 1<<11;
1582 gpr_map
[gpr
+ 11] = (0x24 - 0x0a) - 1; /* skip at 0a to 24 */
1583 gpr_map
[gpr
+ 12] = 0;
1585 /* if the trigger flag is not set, skip */
1586 /* 00: */ OP(icode
, &ptr
, iMAC0
, C_00000000
, GPR(ipcm
->gpr_trigger
), C_00000000
, C_00000000
);
1587 /* 01: */ OP(icode
, &ptr
, iSKIP
, GPR_COND
, GPR_COND
, CC_REG_ZERO
, GPR(gpr
+ 6));
1588 /* if the running flag is set, we're running */
1589 /* 02: */ OP(icode
, &ptr
, iMAC0
, C_00000000
, GPR(ipcm
->gpr_running
), C_00000000
, C_00000000
);
1590 /* 03: */ OP(icode
, &ptr
, iSKIP
, GPR_COND
, GPR_COND
, CC_REG_NONZERO
, C_00000004
);
1591 /* wait until ((GPR_DBAC>>11) & 0x1f) == 0x1c) */
1592 /* 04: */ OP(icode
, &ptr
, iANDXOR
, GPR(tmp
+ 0), GPR_DBAC
, GPR(gpr
+ 4), C_00000000
);
1593 /* 05: */ OP(icode
, &ptr
, iMACINT0
, C_00000000
, GPR(tmp
+ 0), C_ffffffff
, GPR(gpr
+ 5));
1594 /* 06: */ OP(icode
, &ptr
, iSKIP
, GPR_COND
, GPR_COND
, CC_REG_NONZERO
, GPR(gpr
+ 7));
1595 /* 07: */ OP(icode
, &ptr
, iACC3
, GPR(gpr
+ 12), C_00000010
, C_00000001
, C_00000000
);
1597 /* 08: */ OP(icode
, &ptr
, iANDXOR
, GPR(ipcm
->gpr_running
), GPR(ipcm
->gpr_running
), C_00000000
, C_00000001
);
1598 /* 09: */ OP(icode
, &ptr
, iACC3
, GPR(gpr
+ 12), GPR(gpr
+ 12), C_ffffffff
, C_00000000
);
1599 /* 0a: */ OP(icode
, &ptr
, iSKIP
, GPR_COND
, GPR_COND
, CC_REG_NONZERO
, GPR(gpr
+ 11));
1600 /* 0b: */ OP(icode
, &ptr
, iACC3
, GPR(gpr
+ 12), C_00000001
, C_00000000
, C_00000000
);
1602 /* 0c: */ OP(icode
, &ptr
, iANDXOR
, GPR(tmp
+ 0), ETRAM_DATA(ipcm
->etram
[0]), GPR(gpr
+ 0), C_00000000
);
1603 /* 0d: */ OP(icode
, &ptr
, iLOG
, GPR(tmp
+ 0), GPR(tmp
+ 0), GPR(gpr
+ 3), C_00000000
);
1604 /* 0e: */ OP(icode
, &ptr
, iANDXOR
, GPR(8), GPR(tmp
+ 0), GPR(gpr
+ 1), GPR(gpr
+ 2));
1605 /* 0f: */ OP(icode
, &ptr
, iSKIP
, C_00000000
, GPR_COND
, CC_REG_MINUS
, C_00000001
);
1606 /* 10: */ OP(icode
, &ptr
, iANDXOR
, GPR(8), GPR(8), GPR(gpr
+ 1), GPR(gpr
+ 2));
1608 /* 11: */ OP(icode
, &ptr
, iANDXOR
, GPR(tmp
+ 0), ETRAM_DATA(ipcm
->etram
[1]), GPR(gpr
+ 0), C_00000000
);
1609 /* 12: */ OP(icode
, &ptr
, iLOG
, GPR(tmp
+ 0), GPR(tmp
+ 0), GPR(gpr
+ 3), C_00000000
);
1610 /* 13: */ OP(icode
, &ptr
, iANDXOR
, GPR(9), GPR(tmp
+ 0), GPR(gpr
+ 1), GPR(gpr
+ 2));
1611 /* 14: */ OP(icode
, &ptr
, iSKIP
, C_00000000
, GPR_COND
, CC_REG_MINUS
, C_00000001
);
1612 /* 15: */ OP(icode
, &ptr
, iANDXOR
, GPR(9), GPR(9), GPR(gpr
+ 1), GPR(gpr
+ 2));
1614 /* 16: */ OP(icode
, &ptr
, iACC3
, GPR(tmp
+ 0), GPR(ipcm
->gpr_ptr
), C_00000001
, C_00000000
);
1615 /* 17: */ OP(icode
, &ptr
, iMACINT0
, C_00000000
, GPR(tmp
+ 0), C_ffffffff
, GPR(ipcm
->gpr_size
));
1616 /* 18: */ OP(icode
, &ptr
, iSKIP
, GPR_COND
, GPR_COND
, CC_REG_MINUS
, C_00000001
);
1617 /* 19: */ OP(icode
, &ptr
, iACC3
, GPR(tmp
+ 0), C_00000000
, C_00000000
, C_00000000
);
1618 /* 1a: */ OP(icode
, &ptr
, iACC3
, GPR(ipcm
->gpr_ptr
), GPR(tmp
+ 0), C_00000000
, C_00000000
);
1620 /* 1b: */ OP(icode
, &ptr
, iACC3
, GPR(ipcm
->gpr_tmpcount
), GPR(ipcm
->gpr_tmpcount
), C_ffffffff
, C_00000000
);
1621 /* 1c: */ OP(icode
, &ptr
, iSKIP
, GPR_COND
, GPR_COND
, CC_REG_NONZERO
, C_00000002
);
1622 /* 1d: */ OP(icode
, &ptr
, iACC3
, GPR(ipcm
->gpr_tmpcount
), GPR(ipcm
->gpr_count
), C_00000000
, C_00000000
);
1623 /* 1e: */ OP(icode
, &ptr
, iACC3
, GPR_IRQ
, C_80000000
, C_00000000
, C_00000000
);
1624 /* 1f: */ OP(icode
, &ptr
, iANDXOR
, GPR(ipcm
->gpr_running
), GPR(ipcm
->gpr_running
), C_00000001
, C_00010000
);
1626 /* 20: */ OP(icode
, &ptr
, iANDXOR
, GPR(ipcm
->gpr_running
), GPR(ipcm
->gpr_running
), C_00010000
, C_00000001
);
1627 /* 21: */ OP(icode
, &ptr
, iSKIP
, C_00000000
, C_7fffffff
, C_7fffffff
, C_00000002
);
1629 /* 22: */ OP(icode
, &ptr
, iMACINT1
, ETRAM_ADDR(ipcm
->etram
[0]), GPR(gpr
+ 8), GPR_DBAC
, C_ffffffff
);
1630 /* 23: */ OP(icode
, &ptr
, iMACINT1
, ETRAM_ADDR(ipcm
->etram
[1]), GPR(gpr
+ 9), GPR_DBAC
, C_ffffffff
);
1635 /* Wave Playback Volume */
1636 for (z
= 0; z
< 2; z
++)
1637 VOLUME(icode
, &ptr
, playback
+ z
, z
, gpr
+ z
);
1638 snd_emu10k1_init_stereo_control(controls
+ i
++, "Wave Playback Volume", gpr
, 100);
1641 /* Wave Surround Playback Volume */
1642 for (z
= 0; z
< 2; z
++)
1643 VOLUME(icode
, &ptr
, playback
+ 2 + z
, z
, gpr
+ z
);
1644 snd_emu10k1_init_stereo_control(controls
+ i
++, "Wave Surround Playback Volume", gpr
, 0);
1647 /* Wave Center/LFE Playback Volume */
1648 OP(icode
, &ptr
, iACC3
, GPR(tmp
+ 0), FXBUS(FXBUS_PCM_LEFT
), FXBUS(FXBUS_PCM_RIGHT
), C_00000000
);
1649 OP(icode
, &ptr
, iMACINT0
, GPR(tmp
+ 0), C_00000000
, GPR(tmp
+ 0), C_00000002
);
1650 VOLUME(icode
, &ptr
, playback
+ 4, tmp
+ 0, gpr
);
1651 snd_emu10k1_init_mono_control(controls
+ i
++, "Wave Center Playback Volume", gpr
++, 0);
1652 VOLUME(icode
, &ptr
, playback
+ 5, tmp
+ 0, gpr
);
1653 snd_emu10k1_init_mono_control(controls
+ i
++, "Wave LFE Playback Volume", gpr
++, 0);
1655 /* Wave Capture Volume + Switch */
1656 for (z
= 0; z
< 2; z
++) {
1657 SWITCH(icode
, &ptr
, tmp
+ 0, z
, gpr
+ 2 + z
);
1658 VOLUME(icode
, &ptr
, capture
+ z
, tmp
+ 0, gpr
+ z
);
1660 snd_emu10k1_init_stereo_control(controls
+ i
++, "Wave Capture Volume", gpr
, 0);
1661 snd_emu10k1_init_stereo_onoff_control(controls
+ i
++, "Wave Capture Switch", gpr
+ 2, 0);
1664 /* Synth Playback Volume */
1665 for (z
= 0; z
< 2; z
++)
1666 VOLUME_ADD(icode
, &ptr
, playback
+ z
, 2 + z
, gpr
+ z
);
1667 snd_emu10k1_init_stereo_control(controls
+ i
++, "Synth Playback Volume", gpr
, 100);
1670 /* Synth Capture Volume + Switch */
1671 for (z
= 0; z
< 2; z
++) {
1672 SWITCH(icode
, &ptr
, tmp
+ 0, 2 + z
, gpr
+ 2 + z
);
1673 VOLUME_ADD(icode
, &ptr
, capture
+ z
, tmp
+ 0, gpr
+ z
);
1675 snd_emu10k1_init_stereo_control(controls
+ i
++, "Synth Capture Volume", gpr
, 0);
1676 snd_emu10k1_init_stereo_onoff_control(controls
+ i
++, "Synth Capture Switch", gpr
+ 2, 0);
1679 /* Surround Digital Playback Volume (renamed later without Digital) */
1680 for (z
= 0; z
< 2; z
++)
1681 VOLUME_ADD(icode
, &ptr
, playback
+ 2 + z
, 4 + z
, gpr
+ z
);
1682 snd_emu10k1_init_stereo_control(controls
+ i
++, "Surround Digital Playback Volume", gpr
, 100);
1685 /* Surround Capture Volume + Switch */
1686 for (z
= 0; z
< 2; z
++) {
1687 SWITCH(icode
, &ptr
, tmp
+ 0, 4 + z
, gpr
+ 2 + z
);
1688 VOLUME_ADD(icode
, &ptr
, capture
+ z
, tmp
+ 0, gpr
+ z
);
1690 snd_emu10k1_init_stereo_control(controls
+ i
++, "Surround Capture Volume", gpr
, 0);
1691 snd_emu10k1_init_stereo_onoff_control(controls
+ i
++, "Surround Capture Switch", gpr
+ 2, 0);
1694 /* Center Playback Volume (renamed later without Digital) */
1695 VOLUME_ADD(icode
, &ptr
, playback
+ 4, 6, gpr
);
1696 snd_emu10k1_init_mono_control(controls
+ i
++, "Center Digital Playback Volume", gpr
++, 100);
1698 /* LFE Playback Volume + Switch (renamed later without Digital) */
1699 VOLUME_ADD(icode
, &ptr
, playback
+ 5, 7, gpr
);
1700 snd_emu10k1_init_mono_control(controls
+ i
++, "LFE Digital Playback Volume", gpr
++, 100);
1702 /* Front Playback Volume */
1703 for (z
= 0; z
< 2; z
++)
1704 VOLUME_ADD(icode
, &ptr
, playback
+ z
, 10 + z
, gpr
+ z
);
1705 snd_emu10k1_init_stereo_control(controls
+ i
++, "Front Playback Volume", gpr
, 100);
1708 /* Front Capture Volume + Switch */
1709 for (z
= 0; z
< 2; z
++) {
1710 SWITCH(icode
, &ptr
, tmp
+ 0, 10 + z
, gpr
+ 2);
1711 VOLUME_ADD(icode
, &ptr
, capture
+ z
, tmp
+ 0, gpr
+ z
);
1713 snd_emu10k1_init_stereo_control(controls
+ i
++, "Front Capture Volume", gpr
, 0);
1714 snd_emu10k1_init_mono_onoff_control(controls
+ i
++, "Front Capture Switch", gpr
+ 2, 0);
1721 if (emu
->fx8010
.extin_mask
& ((1<<EXTIN_AC97_L
)|(1<<EXTIN_AC97_R
))) {
1722 /* AC'97 Playback Volume */
1723 VOLUME_ADDIN(icode
, &ptr
, playback
+ 0, EXTIN_AC97_L
, gpr
); gpr
++;
1724 VOLUME_ADDIN(icode
, &ptr
, playback
+ 1, EXTIN_AC97_R
, gpr
); gpr
++;
1725 snd_emu10k1_init_stereo_control(controls
+ i
++, "AC97 Playback Volume", gpr
-2, 0);
1726 /* AC'97 Capture Volume */
1727 VOLUME_ADDIN(icode
, &ptr
, capture
+ 0, EXTIN_AC97_L
, gpr
); gpr
++;
1728 VOLUME_ADDIN(icode
, &ptr
, capture
+ 1, EXTIN_AC97_R
, gpr
); gpr
++;
1729 snd_emu10k1_init_stereo_control(controls
+ i
++, "AC97 Capture Volume", gpr
-2, 100);
1732 if (emu
->fx8010
.extin_mask
& ((1<<EXTIN_SPDIF_CD_L
)|(1<<EXTIN_SPDIF_CD_R
))) {
1733 /* IEC958 TTL Playback Volume */
1734 for (z
= 0; z
< 2; z
++)
1735 VOLUME_ADDIN(icode
, &ptr
, playback
+ z
, EXTIN_SPDIF_CD_L
+ z
, gpr
+ z
);
1736 snd_emu10k1_init_stereo_control(controls
+ i
++, SNDRV_CTL_NAME_IEC958("TTL ",PLAYBACK
,VOLUME
), gpr
, 0);
1739 /* IEC958 TTL Capture Volume + Switch */
1740 for (z
= 0; z
< 2; z
++) {
1741 SWITCH_IN(icode
, &ptr
, tmp
+ 0, EXTIN_SPDIF_CD_L
+ z
, gpr
+ 2 + z
);
1742 VOLUME_ADD(icode
, &ptr
, capture
+ z
, tmp
+ 0, gpr
+ z
);
1744 snd_emu10k1_init_stereo_control(controls
+ i
++, SNDRV_CTL_NAME_IEC958("TTL ",CAPTURE
,VOLUME
), gpr
, 0);
1745 snd_emu10k1_init_stereo_onoff_control(controls
+ i
++, SNDRV_CTL_NAME_IEC958("TTL ",CAPTURE
,SWITCH
), gpr
+ 2, 0);
1749 if (emu
->fx8010
.extin_mask
& ((1<<EXTIN_ZOOM_L
)|(1<<EXTIN_ZOOM_R
))) {
1750 /* Zoom Video Playback Volume */
1751 for (z
= 0; z
< 2; z
++)
1752 VOLUME_ADDIN(icode
, &ptr
, playback
+ z
, EXTIN_ZOOM_L
+ z
, gpr
+ z
);
1753 snd_emu10k1_init_stereo_control(controls
+ i
++, "Zoom Video Playback Volume", gpr
, 0);
1756 /* Zoom Video Capture Volume + Switch */
1757 for (z
= 0; z
< 2; z
++) {
1758 SWITCH_IN(icode
, &ptr
, tmp
+ 0, EXTIN_ZOOM_L
+ z
, gpr
+ 2 + z
);
1759 VOLUME_ADD(icode
, &ptr
, capture
+ z
, tmp
+ 0, gpr
+ z
);
1761 snd_emu10k1_init_stereo_control(controls
+ i
++, "Zoom Video Capture Volume", gpr
, 0);
1762 snd_emu10k1_init_stereo_onoff_control(controls
+ i
++, "Zoom Video Capture Switch", gpr
+ 2, 0);
1766 if (emu
->fx8010
.extin_mask
& ((1<<EXTIN_TOSLINK_L
)|(1<<EXTIN_TOSLINK_R
))) {
1767 /* IEC958 Optical Playback Volume */
1768 for (z
= 0; z
< 2; z
++)
1769 VOLUME_ADDIN(icode
, &ptr
, playback
+ z
, EXTIN_TOSLINK_L
+ z
, gpr
+ z
);
1770 snd_emu10k1_init_stereo_control(controls
+ i
++, SNDRV_CTL_NAME_IEC958("LiveDrive ",PLAYBACK
,VOLUME
), gpr
, 0);
1773 /* IEC958 Optical Capture Volume */
1774 for (z
= 0; z
< 2; z
++) {
1775 SWITCH_IN(icode
, &ptr
, tmp
+ 0, EXTIN_TOSLINK_L
+ z
, gpr
+ 2 + z
);
1776 VOLUME_ADD(icode
, &ptr
, capture
+ z
, tmp
+ 0, gpr
+ z
);
1778 snd_emu10k1_init_stereo_control(controls
+ i
++, SNDRV_CTL_NAME_IEC958("LiveDrive ",CAPTURE
,VOLUME
), gpr
, 0);
1779 snd_emu10k1_init_stereo_onoff_control(controls
+ i
++, SNDRV_CTL_NAME_IEC958("LiveDrive ",CAPTURE
,SWITCH
), gpr
+ 2, 0);
1783 if (emu
->fx8010
.extin_mask
& ((1<<EXTIN_LINE1_L
)|(1<<EXTIN_LINE1_R
))) {
1784 /* Line LiveDrive Playback Volume */
1785 for (z
= 0; z
< 2; z
++)
1786 VOLUME_ADDIN(icode
, &ptr
, playback
+ z
, EXTIN_LINE1_L
+ z
, gpr
+ z
);
1787 snd_emu10k1_init_stereo_control(controls
+ i
++, "Line LiveDrive Playback Volume", gpr
, 0);
1790 /* Line LiveDrive Capture Volume + Switch */
1791 for (z
= 0; z
< 2; z
++) {
1792 SWITCH_IN(icode
, &ptr
, tmp
+ 0, EXTIN_LINE1_L
+ z
, gpr
+ 2 + z
);
1793 VOLUME_ADD(icode
, &ptr
, capture
+ z
, tmp
+ 0, gpr
+ z
);
1795 snd_emu10k1_init_stereo_control(controls
+ i
++, "Line LiveDrive Capture Volume", gpr
, 0);
1796 snd_emu10k1_init_stereo_onoff_control(controls
+ i
++, "Line LiveDrive Capture Switch", gpr
+ 2, 0);
1800 if (emu
->fx8010
.extin_mask
& ((1<<EXTIN_COAX_SPDIF_L
)|(1<<EXTIN_COAX_SPDIF_R
))) {
1801 /* IEC958 Coax Playback Volume */
1802 for (z
= 0; z
< 2; z
++)
1803 VOLUME_ADDIN(icode
, &ptr
, playback
+ z
, EXTIN_COAX_SPDIF_L
+ z
, gpr
+ z
);
1804 snd_emu10k1_init_stereo_control(controls
+ i
++, SNDRV_CTL_NAME_IEC958("Coaxial ",PLAYBACK
,VOLUME
), gpr
, 0);
1807 /* IEC958 Coax Capture Volume + Switch */
1808 for (z
= 0; z
< 2; z
++) {
1809 SWITCH_IN(icode
, &ptr
, tmp
+ 0, EXTIN_COAX_SPDIF_L
+ z
, gpr
+ 2 + z
);
1810 VOLUME_ADD(icode
, &ptr
, capture
+ z
, tmp
+ 0, gpr
+ z
);
1812 snd_emu10k1_init_stereo_control(controls
+ i
++, SNDRV_CTL_NAME_IEC958("Coaxial ",CAPTURE
,VOLUME
), gpr
, 0);
1813 snd_emu10k1_init_stereo_onoff_control(controls
+ i
++, SNDRV_CTL_NAME_IEC958("Coaxial ",CAPTURE
,SWITCH
), gpr
+ 2, 0);
1817 if (emu
->fx8010
.extin_mask
& ((1<<EXTIN_LINE2_L
)|(1<<EXTIN_LINE2_R
))) {
1818 /* Line LiveDrive Playback Volume */
1819 for (z
= 0; z
< 2; z
++)
1820 VOLUME_ADDIN(icode
, &ptr
, playback
+ z
, EXTIN_LINE2_L
+ z
, gpr
+ z
);
1821 snd_emu10k1_init_stereo_control(controls
+ i
++, "Line2 LiveDrive Playback Volume", gpr
, 0);
1822 controls
[i
-1].id
.index
= 1;
1825 /* Line LiveDrive Capture Volume */
1826 for (z
= 0; z
< 2; z
++) {
1827 SWITCH_IN(icode
, &ptr
, tmp
+ 0, EXTIN_LINE2_L
+ z
, gpr
+ 2 + z
);
1828 VOLUME_ADD(icode
, &ptr
, capture
+ z
, tmp
+ 0, gpr
+ z
);
1830 snd_emu10k1_init_stereo_control(controls
+ i
++, "Line2 LiveDrive Capture Volume", gpr
, 0);
1831 controls
[i
-1].id
.index
= 1;
1832 snd_emu10k1_init_stereo_onoff_control(controls
+ i
++, "Line2 LiveDrive Capture Switch", gpr
+ 2, 0);
1833 controls
[i
-1].id
.index
= 1;
1838 * Process tone control
1840 OP(icode
, &ptr
, iACC3
, GPR(playback
+ SND_EMU10K1_PLAYBACK_CHANNELS
+ 0), GPR(playback
+ 0), C_00000000
, C_00000000
); /* left */
1841 OP(icode
, &ptr
, iACC3
, GPR(playback
+ SND_EMU10K1_PLAYBACK_CHANNELS
+ 1), GPR(playback
+ 1), C_00000000
, C_00000000
); /* right */
1842 OP(icode
, &ptr
, iACC3
, GPR(playback
+ SND_EMU10K1_PLAYBACK_CHANNELS
+ 2), GPR(playback
+ 2), C_00000000
, C_00000000
); /* rear left */
1843 OP(icode
, &ptr
, iACC3
, GPR(playback
+ SND_EMU10K1_PLAYBACK_CHANNELS
+ 3), GPR(playback
+ 3), C_00000000
, C_00000000
); /* rear right */
1844 OP(icode
, &ptr
, iACC3
, GPR(playback
+ SND_EMU10K1_PLAYBACK_CHANNELS
+ 4), GPR(playback
+ 4), C_00000000
, C_00000000
); /* center */
1845 OP(icode
, &ptr
, iACC3
, GPR(playback
+ SND_EMU10K1_PLAYBACK_CHANNELS
+ 5), GPR(playback
+ 5), C_00000000
, C_00000000
); /* LFE */
1847 ctl
= &controls
[i
+ 0];
1848 ctl
->id
.iface
= SNDRV_CTL_ELEM_IFACE_MIXER
;
1849 strcpy(ctl
->id
.name
, "Tone Control - Bass");
1854 ctl
->value
[0] = ctl
->value
[1] = 20;
1855 ctl
->translation
= EMU10K1_GPR_TRANSLATION_BASS
;
1856 ctl
= &controls
[i
+ 1];
1857 ctl
->id
.iface
= SNDRV_CTL_ELEM_IFACE_MIXER
;
1858 strcpy(ctl
->id
.name
, "Tone Control - Treble");
1863 ctl
->value
[0] = ctl
->value
[1] = 20;
1864 ctl
->translation
= EMU10K1_GPR_TRANSLATION_TREBLE
;
1866 #define BASS_GPR 0x8c
1867 #define TREBLE_GPR 0x96
1869 for (z
= 0; z
< 5; z
++) {
1871 for (j
= 0; j
< 2; j
++) {
1872 controls
[i
+ 0].gpr
[z
* 2 + j
] = BASS_GPR
+ z
* 2 + j
;
1873 controls
[i
+ 1].gpr
[z
* 2 + j
] = TREBLE_GPR
+ z
* 2 + j
;
1876 for (z
= 0; z
< 3; z
++) { /* front/rear/center-lfe */
1878 for (j
= 0; j
< 2; j
++) { /* left/right */
1879 k
= 0xa0 + (z
* 8) + (j
* 4);
1880 l
= 0xd0 + (z
* 8) + (j
* 4);
1881 d
= playback
+ SND_EMU10K1_PLAYBACK_CHANNELS
+ z
* 2 + j
;
1883 OP(icode
, &ptr
, iMAC0
, C_00000000
, C_00000000
, GPR(d
), GPR(BASS_GPR
+ 0 + j
));
1884 OP(icode
, &ptr
, iMACMV
, GPR(k
+1), GPR(k
), GPR(k
+1), GPR(BASS_GPR
+ 4 + j
));
1885 OP(icode
, &ptr
, iMACMV
, GPR(k
), GPR(d
), GPR(k
), GPR(BASS_GPR
+ 2 + j
));
1886 OP(icode
, &ptr
, iMACMV
, GPR(k
+3), GPR(k
+2), GPR(k
+3), GPR(BASS_GPR
+ 8 + j
));
1887 OP(icode
, &ptr
, iMAC0
, GPR(k
+2), GPR_ACCU
, GPR(k
+2), GPR(BASS_GPR
+ 6 + j
));
1888 OP(icode
, &ptr
, iACC3
, GPR(k
+2), GPR(k
+2), GPR(k
+2), C_00000000
);
1890 OP(icode
, &ptr
, iMAC0
, C_00000000
, C_00000000
, GPR(k
+2), GPR(TREBLE_GPR
+ 0 + j
));
1891 OP(icode
, &ptr
, iMACMV
, GPR(l
+1), GPR(l
), GPR(l
+1), GPR(TREBLE_GPR
+ 4 + j
));
1892 OP(icode
, &ptr
, iMACMV
, GPR(l
), GPR(k
+2), GPR(l
), GPR(TREBLE_GPR
+ 2 + j
));
1893 OP(icode
, &ptr
, iMACMV
, GPR(l
+3), GPR(l
+2), GPR(l
+3), GPR(TREBLE_GPR
+ 8 + j
));
1894 OP(icode
, &ptr
, iMAC0
, GPR(l
+2), GPR_ACCU
, GPR(l
+2), GPR(TREBLE_GPR
+ 6 + j
));
1895 OP(icode
, &ptr
, iMACINT0
, GPR(l
+2), C_00000000
, GPR(l
+2), C_00000010
);
1897 OP(icode
, &ptr
, iACC3
, GPR(d
), GPR(l
+2), C_00000000
, C_00000000
);
1899 if (z
== 2) /* center */
1908 for (z
= 0; z
< 6; z
++) {
1909 SWITCH(icode
, &ptr
, tmp
+ 0, playback
+ SND_EMU10K1_PLAYBACK_CHANNELS
+ z
, gpr
+ 0);
1910 SWITCH_NEG(icode
, &ptr
, tmp
+ 1, gpr
+ 0);
1911 SWITCH(icode
, &ptr
, tmp
+ 1, playback
+ z
, tmp
+ 1);
1912 OP(icode
, &ptr
, iACC3
, GPR(playback
+ SND_EMU10K1_PLAYBACK_CHANNELS
+ z
), GPR(tmp
+ 0), GPR(tmp
+ 1), C_00000000
);
1914 snd_emu10k1_init_stereo_onoff_control(controls
+ i
++, "Tone Control - Switch", gpr
, 0);
1920 if (emu
->fx8010
.extout_mask
& ((1<<EXTOUT_AC97_L
)|(1<<EXTOUT_AC97_R
))) {
1921 /* AC'97 Playback Volume */
1923 for (z
= 0; z
< 2; z
++)
1924 OP(icode
, &ptr
, iACC3
, EXTOUT(EXTOUT_AC97_L
+ z
), GPR(playback
+ SND_EMU10K1_PLAYBACK_CHANNELS
+ z
), C_00000000
, C_00000000
);
1927 if (emu
->fx8010
.extout_mask
& ((1<<EXTOUT_TOSLINK_L
)|(1<<EXTOUT_TOSLINK_R
))) {
1928 /* IEC958 Optical Raw Playback Switch */
1930 for (z
= 0; z
< 2; z
++) {
1931 SWITCH(icode
, &ptr
, tmp
+ 0, 8 + z
, gpr
+ z
);
1932 SWITCH_NEG(icode
, &ptr
, tmp
+ 1, gpr
+ z
);
1933 SWITCH(icode
, &ptr
, tmp
+ 1, playback
+ SND_EMU10K1_PLAYBACK_CHANNELS
+ z
, tmp
+ 1);
1934 OP(icode
, &ptr
, iACC3
, EXTOUT(EXTOUT_TOSLINK_L
+ z
), GPR(tmp
+ 0), GPR(tmp
+ 1), C_00000000
);
1935 #ifdef EMU10K1_CAPTURE_DIGITAL_OUT
1936 OP(icode
, &ptr
, iACC3
, EXTOUT(EXTOUT_ADC_CAP_L
+ z
), GPR(tmp
+ 0), GPR(tmp
+ 1), C_00000000
);
1940 snd_emu10k1_init_stereo_onoff_control(controls
+ i
++, SNDRV_CTL_NAME_IEC958("Optical Raw ",PLAYBACK
,SWITCH
), gpr
, 0);
1944 if (emu
->fx8010
.extout_mask
& ((1<<EXTOUT_HEADPHONE_L
)|(1<<EXTOUT_HEADPHONE_R
))) {
1945 /* Headphone Playback Volume */
1947 for (z
= 0; z
< 2; z
++) {
1948 SWITCH(icode
, &ptr
, tmp
+ 0, playback
+ SND_EMU10K1_PLAYBACK_CHANNELS
+ 4 + z
, gpr
+ 2 + z
);
1949 SWITCH_NEG(icode
, &ptr
, tmp
+ 1, gpr
+ 2 + z
);
1950 SWITCH(icode
, &ptr
, tmp
+ 1, playback
+ SND_EMU10K1_PLAYBACK_CHANNELS
+ z
, tmp
+ 1);
1951 OP(icode
, &ptr
, iACC3
, GPR(tmp
+ 0), GPR(tmp
+ 0), GPR(tmp
+ 1), C_00000000
);
1952 VOLUME_OUT(icode
, &ptr
, EXTOUT_HEADPHONE_L
+ z
, tmp
+ 0, gpr
+ z
);
1955 snd_emu10k1_init_stereo_control(controls
+ i
++, "Headphone Playback Volume", gpr
+ 0, 0);
1956 controls
[i
-1].id
.index
= 1; /* AC'97 can have also Headphone control */
1957 snd_emu10k1_init_mono_onoff_control(controls
+ i
++, "Headphone Center Playback Switch", gpr
+ 2, 0);
1958 controls
[i
-1].id
.index
= 1;
1959 snd_emu10k1_init_mono_onoff_control(controls
+ i
++, "Headphone LFE Playback Switch", gpr
+ 3, 0);
1960 controls
[i
-1].id
.index
= 1;
1965 if (emu
->fx8010
.extout_mask
& ((1<<EXTOUT_REAR_L
)|(1<<EXTOUT_REAR_R
)))
1966 for (z
= 0; z
< 2; z
++)
1967 OP(icode
, &ptr
, iACC3
, EXTOUT(EXTOUT_REAR_L
+ z
), GPR(playback
+ SND_EMU10K1_PLAYBACK_CHANNELS
+ 2 + z
), C_00000000
, C_00000000
);
1969 if (emu
->fx8010
.extout_mask
& ((1<<EXTOUT_AC97_REAR_L
)|(1<<EXTOUT_AC97_REAR_R
)))
1970 for (z
= 0; z
< 2; z
++)
1971 OP(icode
, &ptr
, iACC3
, EXTOUT(EXTOUT_AC97_REAR_L
+ z
), GPR(playback
+ SND_EMU10K1_PLAYBACK_CHANNELS
+ 2 + z
), C_00000000
, C_00000000
);
1973 if (emu
->fx8010
.extout_mask
& (1<<EXTOUT_AC97_CENTER
)) {
1974 #ifndef EMU10K1_CENTER_LFE_FROM_FRONT
1975 OP(icode
, &ptr
, iACC3
, EXTOUT(EXTOUT_AC97_CENTER
), GPR(playback
+ SND_EMU10K1_PLAYBACK_CHANNELS
+ 4), C_00000000
, C_00000000
);
1976 OP(icode
, &ptr
, iACC3
, EXTOUT(EXTOUT_ACENTER
), GPR(playback
+ SND_EMU10K1_PLAYBACK_CHANNELS
+ 4), C_00000000
, C_00000000
);
1978 OP(icode
, &ptr
, iACC3
, EXTOUT(EXTOUT_AC97_CENTER
), GPR(playback
+ SND_EMU10K1_PLAYBACK_CHANNELS
+ 0), C_00000000
, C_00000000
);
1979 OP(icode
, &ptr
, iACC3
, EXTOUT(EXTOUT_ACENTER
), GPR(playback
+ SND_EMU10K1_PLAYBACK_CHANNELS
+ 0), C_00000000
, C_00000000
);
1983 if (emu
->fx8010
.extout_mask
& (1<<EXTOUT_AC97_LFE
)) {
1984 #ifndef EMU10K1_CENTER_LFE_FROM_FRONT
1985 OP(icode
, &ptr
, iACC3
, EXTOUT(EXTOUT_AC97_LFE
), GPR(playback
+ SND_EMU10K1_PLAYBACK_CHANNELS
+ 5), C_00000000
, C_00000000
);
1986 OP(icode
, &ptr
, iACC3
, EXTOUT(EXTOUT_ALFE
), GPR(playback
+ SND_EMU10K1_PLAYBACK_CHANNELS
+ 5), C_00000000
, C_00000000
);
1988 OP(icode
, &ptr
, iACC3
, EXTOUT(EXTOUT_AC97_LFE
), GPR(playback
+ SND_EMU10K1_PLAYBACK_CHANNELS
+ 1), C_00000000
, C_00000000
);
1989 OP(icode
, &ptr
, iACC3
, EXTOUT(EXTOUT_ALFE
), GPR(playback
+ SND_EMU10K1_PLAYBACK_CHANNELS
+ 1), C_00000000
, C_00000000
);
1993 #ifndef EMU10K1_CAPTURE_DIGITAL_OUT
1994 for (z
= 0; z
< 2; z
++)
1995 OP(icode
, &ptr
, iACC3
, EXTOUT(EXTOUT_ADC_CAP_L
+ z
), GPR(capture
+ z
), C_00000000
, C_00000000
);
1998 if (emu
->fx8010
.extout_mask
& (1<<EXTOUT_MIC_CAP
))
1999 OP(icode
, &ptr
, iACC3
, EXTOUT(EXTOUT_MIC_CAP
), GPR(capture
+ 2), C_00000000
, C_00000000
);
2001 /* EFX capture - capture the 16 EXTINS */
2002 if (emu
->card_capabilities
->sblive51
) {
2003 /* On the Live! 5.1, FXBUS2(1) and FXBUS(2) are shared with EXTOUT_ACENTER
2004 * and EXTOUT_ALFE, so we can't connect inputs to them for multitrack recording.
2006 * Since only 14 of the 16 EXTINs are used, this is not a big problem.
2007 * We route AC97L and R to FX capture 14 and 15, SPDIF CD in to FX capture
2008 * 0 and 3, then the rest of the EXTINs to the corresponding FX capture
2009 * channel. Multitrack recorders will still see the center/lfe output signal
2010 * on the second and third channels.
2012 OP(icode
, &ptr
, iACC3
, FXBUS2(14), C_00000000
, C_00000000
, EXTIN(0));
2013 OP(icode
, &ptr
, iACC3
, FXBUS2(15), C_00000000
, C_00000000
, EXTIN(1));
2014 OP(icode
, &ptr
, iACC3
, FXBUS2(0), C_00000000
, C_00000000
, EXTIN(2));
2015 OP(icode
, &ptr
, iACC3
, FXBUS2(3), C_00000000
, C_00000000
, EXTIN(3));
2016 for (z
= 4; z
< 14; z
++)
2017 OP(icode
, &ptr
, iACC3
, FXBUS2(z
), C_00000000
, C_00000000
, EXTIN(z
));
2019 for (z
= 0; z
< 16; z
++)
2020 OP(icode
, &ptr
, iACC3
, FXBUS2(z
), C_00000000
, C_00000000
, EXTIN(z
));
2029 if (i
> SND_EMU10K1_GPR_CONTROLS
) {
2035 /* clear remaining instruction memory */
2037 OP(icode
, &ptr
, iACC3
, C_00000000
, C_00000000
, C_00000000
, C_00000000
);
2039 if ((err
= snd_emu10k1_fx8010_tram_setup(emu
, ipcm
->buffer_size
)) < 0)
2041 seg
= snd_enter_user();
2042 icode
->gpr_add_control_count
= i
;
2043 icode
->gpr_add_controls
= (emu10k1_fx8010_control_gpr_t __user
*)controls
;
2044 err
= snd_emu10k1_icode_poke(emu
, icode
);
2045 snd_leave_user(seg
);
2047 err
= snd_emu10k1_ipcm_poke(emu
, ipcm
);
2051 if (icode
!= NULL
) {
2052 kfree((void __force
*)icode
->gpr_map
);
2058 int __devinit
snd_emu10k1_init_efx(emu10k1_t
*emu
)
2061 return _snd_emu10k1_audigy_init_efx(emu
);
2063 return _snd_emu10k1_init_efx(emu
);
2066 void snd_emu10k1_free_efx(emu10k1_t
*emu
)
2068 /* stop processor */
2070 snd_emu10k1_ptr_write(emu
, A_DBG
, 0, emu
->fx8010
.dbg
= A_DBG_SINGLE_STEP
);
2072 snd_emu10k1_ptr_write(emu
, DBG
, 0, emu
->fx8010
.dbg
= EMU10K1_DBG_SINGLE_STEP
);
2075 #if 0 // FIXME: who use them?
2076 int snd_emu10k1_fx8010_tone_control_activate(emu10k1_t
*emu
, int output
)
2078 snd_runtime_check(output
>= 0 && output
< 6, return -EINVAL
);
2079 snd_emu10k1_ptr_write(emu
, emu
->gpr_base
+ 0x94 + output
, 0, 1);
2083 int snd_emu10k1_fx8010_tone_control_deactivate(emu10k1_t
*emu
, int output
)
2085 snd_runtime_check(output
>= 0 && output
< 6, return -EINVAL
);
2086 snd_emu10k1_ptr_write(emu
, emu
->gpr_base
+ 0x94 + output
, 0, 0);
2091 int snd_emu10k1_fx8010_tram_setup(emu10k1_t
*emu
, u32 size
)
2095 /* size is in samples */
2097 size
= (size
- 1) >> 13;
2103 size
= 0x2000 << size_reg
;
2105 if ((emu
->fx8010
.etram_pages
.bytes
/ 2) == size
)
2107 spin_lock_irq(&emu
->emu_lock
);
2108 outl(HCFG_LOCKTANKCACHE_MASK
| inl(emu
->port
+ HCFG
), emu
->port
+ HCFG
);
2109 spin_unlock_irq(&emu
->emu_lock
);
2110 snd_emu10k1_ptr_write(emu
, TCB
, 0, 0);
2111 snd_emu10k1_ptr_write(emu
, TCBS
, 0, 0);
2112 if (emu
->fx8010
.etram_pages
.area
!= NULL
) {
2113 snd_dma_free_pages(&emu
->fx8010
.etram_pages
);
2114 emu
->fx8010
.etram_pages
.area
= NULL
;
2115 emu
->fx8010
.etram_pages
.bytes
= 0;
2119 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV
, snd_dma_pci_data(emu
->pci
),
2120 size
* 2, &emu
->fx8010
.etram_pages
) < 0)
2122 memset(emu
->fx8010
.etram_pages
.area
, 0, size
* 2);
2123 snd_emu10k1_ptr_write(emu
, TCB
, 0, emu
->fx8010
.etram_pages
.addr
);
2124 snd_emu10k1_ptr_write(emu
, TCBS
, 0, size_reg
);
2125 spin_lock_irq(&emu
->emu_lock
);
2126 outl(inl(emu
->port
+ HCFG
) & ~HCFG_LOCKTANKCACHE_MASK
, emu
->port
+ HCFG
);
2127 spin_unlock_irq(&emu
->emu_lock
);
2133 static int snd_emu10k1_fx8010_open(snd_hwdep_t
* hw
, struct file
*file
)
2138 static void copy_string(char *dst
, char *src
, char *null
, int idx
)
2141 sprintf(dst
, "%s %02X", null
, idx
);
2146 static int snd_emu10k1_fx8010_info(emu10k1_t
*emu
, emu10k1_fx8010_info_t
*info
)
2148 char **fxbus
, **extin
, **extout
;
2149 unsigned short fxbus_mask
, extin_mask
, extout_mask
;
2152 memset(info
, 0, sizeof(info
));
2153 info
->internal_tram_size
= emu
->fx8010
.itram_size
;
2154 info
->external_tram_size
= emu
->fx8010
.etram_pages
.bytes
/ 2;
2156 extin
= emu
->audigy
? audigy_ins
: creative_ins
;
2157 extout
= emu
->audigy
? audigy_outs
: creative_outs
;
2158 fxbus_mask
= emu
->fx8010
.fxbus_mask
;
2159 extin_mask
= emu
->fx8010
.extin_mask
;
2160 extout_mask
= emu
->fx8010
.extout_mask
;
2161 for (res
= 0; res
< 16; res
++, fxbus
++, extin
++, extout
++) {
2162 copy_string(info
->fxbus_names
[res
], fxbus_mask
& (1 << res
) ? *fxbus
: NULL
, "FXBUS", res
);
2163 copy_string(info
->extin_names
[res
], extin_mask
& (1 << res
) ? *extin
: NULL
, "Unused", res
);
2164 copy_string(info
->extout_names
[res
], extout_mask
& (1 << res
) ? *extout
: NULL
, "Unused", res
);
2166 for (res
= 16; res
< 32; res
++, extout
++)
2167 copy_string(info
->extout_names
[res
], extout_mask
& (1 << res
) ? *extout
: NULL
, "Unused", res
);
2168 info
->gpr_controls
= emu
->fx8010
.gpr_count
;
2172 static int snd_emu10k1_fx8010_ioctl(snd_hwdep_t
* hw
, struct file
*file
, unsigned int cmd
, unsigned long arg
)
2174 emu10k1_t
*emu
= hw
->private_data
;
2175 emu10k1_fx8010_info_t
*info
;
2176 emu10k1_fx8010_code_t
*icode
;
2177 emu10k1_fx8010_pcm_t
*ipcm
;
2179 void __user
*argp
= (void __user
*)arg
;
2183 case SNDRV_EMU10K1_IOCTL_INFO
:
2184 info
= (emu10k1_fx8010_info_t
*)kmalloc(sizeof(*info
), GFP_KERNEL
);
2187 if ((res
= snd_emu10k1_fx8010_info(emu
, info
)) < 0) {
2191 if (copy_to_user(argp
, info
, sizeof(*info
))) {
2197 case SNDRV_EMU10K1_IOCTL_CODE_POKE
:
2198 if (!capable(CAP_SYS_ADMIN
))
2200 icode
= (emu10k1_fx8010_code_t
*)kmalloc(sizeof(*icode
), GFP_KERNEL
);
2203 if (copy_from_user(icode
, argp
, sizeof(*icode
))) {
2207 res
= snd_emu10k1_icode_poke(emu
, icode
);
2210 case SNDRV_EMU10K1_IOCTL_CODE_PEEK
:
2211 icode
= (emu10k1_fx8010_code_t
*)kmalloc(sizeof(*icode
), GFP_KERNEL
);
2214 if (copy_from_user(icode
, argp
, sizeof(*icode
))) {
2218 res
= snd_emu10k1_icode_peek(emu
, icode
);
2219 if (res
== 0 && copy_to_user(argp
, icode
, sizeof(*icode
))) {
2225 case SNDRV_EMU10K1_IOCTL_PCM_POKE
:
2226 ipcm
= (emu10k1_fx8010_pcm_t
*)kmalloc(sizeof(*ipcm
), GFP_KERNEL
);
2229 if (copy_from_user(ipcm
, argp
, sizeof(*ipcm
))) {
2233 res
= snd_emu10k1_ipcm_poke(emu
, ipcm
);
2236 case SNDRV_EMU10K1_IOCTL_PCM_PEEK
:
2237 ipcm
= kzalloc(sizeof(*ipcm
), GFP_KERNEL
);
2240 if (copy_from_user(ipcm
, argp
, sizeof(*ipcm
))) {
2244 res
= snd_emu10k1_ipcm_peek(emu
, ipcm
);
2245 if (res
== 0 && copy_to_user(argp
, ipcm
, sizeof(*ipcm
))) {
2251 case SNDRV_EMU10K1_IOCTL_TRAM_SETUP
:
2252 if (!capable(CAP_SYS_ADMIN
))
2254 if (get_user(addr
, (unsigned int __user
*)argp
))
2256 down(&emu
->fx8010
.lock
);
2257 res
= snd_emu10k1_fx8010_tram_setup(emu
, addr
);
2258 up(&emu
->fx8010
.lock
);
2260 case SNDRV_EMU10K1_IOCTL_STOP
:
2261 if (!capable(CAP_SYS_ADMIN
))
2264 snd_emu10k1_ptr_write(emu
, A_DBG
, 0, emu
->fx8010
.dbg
|= A_DBG_SINGLE_STEP
);
2266 snd_emu10k1_ptr_write(emu
, DBG
, 0, emu
->fx8010
.dbg
|= EMU10K1_DBG_SINGLE_STEP
);
2268 case SNDRV_EMU10K1_IOCTL_CONTINUE
:
2269 if (!capable(CAP_SYS_ADMIN
))
2272 snd_emu10k1_ptr_write(emu
, A_DBG
, 0, emu
->fx8010
.dbg
= 0);
2274 snd_emu10k1_ptr_write(emu
, DBG
, 0, emu
->fx8010
.dbg
= 0);
2276 case SNDRV_EMU10K1_IOCTL_ZERO_TRAM_COUNTER
:
2277 if (!capable(CAP_SYS_ADMIN
))
2280 snd_emu10k1_ptr_write(emu
, A_DBG
, 0, emu
->fx8010
.dbg
| A_DBG_ZC
);
2282 snd_emu10k1_ptr_write(emu
, DBG
, 0, emu
->fx8010
.dbg
| EMU10K1_DBG_ZC
);
2285 snd_emu10k1_ptr_write(emu
, A_DBG
, 0, emu
->fx8010
.dbg
);
2287 snd_emu10k1_ptr_write(emu
, DBG
, 0, emu
->fx8010
.dbg
);
2289 case SNDRV_EMU10K1_IOCTL_SINGLE_STEP
:
2290 if (!capable(CAP_SYS_ADMIN
))
2292 if (get_user(addr
, (unsigned int __user
*)argp
))
2297 snd_emu10k1_ptr_write(emu
, A_DBG
, 0, emu
->fx8010
.dbg
|= A_DBG_SINGLE_STEP
| addr
);
2299 snd_emu10k1_ptr_write(emu
, DBG
, 0, emu
->fx8010
.dbg
|= EMU10K1_DBG_SINGLE_STEP
| addr
);
2302 snd_emu10k1_ptr_write(emu
, A_DBG
, 0, emu
->fx8010
.dbg
|= A_DBG_SINGLE_STEP
| A_DBG_STEP_ADDR
| addr
);
2304 snd_emu10k1_ptr_write(emu
, DBG
, 0, emu
->fx8010
.dbg
|= EMU10K1_DBG_SINGLE_STEP
| EMU10K1_DBG_STEP
| addr
);
2306 case SNDRV_EMU10K1_IOCTL_DBG_READ
:
2308 addr
= snd_emu10k1_ptr_read(emu
, A_DBG
, 0);
2310 addr
= snd_emu10k1_ptr_read(emu
, DBG
, 0);
2311 if (put_user(addr
, (unsigned int __user
*)argp
))
2318 static int snd_emu10k1_fx8010_release(snd_hwdep_t
* hw
, struct file
*file
)
2323 int __devinit
snd_emu10k1_fx8010_new(emu10k1_t
*emu
, int device
, snd_hwdep_t
** rhwdep
)
2330 if ((err
= snd_hwdep_new(emu
->card
, "FX8010", device
, &hw
)) < 0)
2332 strcpy(hw
->name
, "EMU10K1 (FX8010)");
2333 hw
->iface
= SNDRV_HWDEP_IFACE_EMU10K1
;
2334 hw
->ops
.open
= snd_emu10k1_fx8010_open
;
2335 hw
->ops
.ioctl
= snd_emu10k1_fx8010_ioctl
;
2336 hw
->ops
.release
= snd_emu10k1_fx8010_release
;
2337 hw
->private_data
= emu
;