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Merge 3.16-rc5 into char-misc-next
[deliverable/linux.git] / sound / pci / hda / hda_intel.c
1 /*
2 *
3 * hda_intel.c - Implementation of primary alsa driver code base
4 * for Intel HD Audio.
5 *
6 * Copyright(c) 2004 Intel Corporation. All rights reserved.
7 *
8 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
9 * PeiSen Hou <pshou@realtek.com.tw>
10 *
11 * This program is free software; you can redistribute it and/or modify it
12 * under the terms of the GNU General Public License as published by the Free
13 * Software Foundation; either version 2 of the License, or (at your option)
14 * any later version.
15 *
16 * This program is distributed in the hope that it will be useful, but WITHOUT
17 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
18 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
19 * more details.
20 *
21 * You should have received a copy of the GNU General Public License along with
22 * this program; if not, write to the Free Software Foundation, Inc., 59
23 * Temple Place - Suite 330, Boston, MA 02111-1307, USA.
24 *
25 * CONTACTS:
26 *
27 * Matt Jared matt.jared@intel.com
28 * Andy Kopp andy.kopp@intel.com
29 * Dan Kogan dan.d.kogan@intel.com
30 *
31 * CHANGES:
32 *
33 * 2004.12.01 Major rewrite by tiwai, merged the work of pshou
34 *
35 */
36
37 #include <linux/delay.h>
38 #include <linux/interrupt.h>
39 #include <linux/kernel.h>
40 #include <linux/module.h>
41 #include <linux/dma-mapping.h>
42 #include <linux/moduleparam.h>
43 #include <linux/init.h>
44 #include <linux/slab.h>
45 #include <linux/pci.h>
46 #include <linux/mutex.h>
47 #include <linux/reboot.h>
48 #include <linux/io.h>
49 #include <linux/pm_runtime.h>
50 #include <linux/clocksource.h>
51 #include <linux/time.h>
52 #include <linux/completion.h>
53
54 #ifdef CONFIG_X86
55 /* for snoop control */
56 #include <asm/pgtable.h>
57 #include <asm/cacheflush.h>
58 #endif
59 #include <sound/core.h>
60 #include <sound/initval.h>
61 #include <linux/vgaarb.h>
62 #include <linux/vga_switcheroo.h>
63 #include <linux/firmware.h>
64 #include "hda_codec.h"
65 #include "hda_controller.h"
66 #include "hda_priv.h"
67 #include "hda_i915.h"
68
69
70 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;
71 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;
72 static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;
73 static char *model[SNDRV_CARDS];
74 static int position_fix[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS-1)] = -1};
75 static int bdl_pos_adj[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS-1)] = -1};
76 static int probe_mask[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS-1)] = -1};
77 static int probe_only[SNDRV_CARDS];
78 static int jackpoll_ms[SNDRV_CARDS];
79 static bool single_cmd;
80 static int enable_msi = -1;
81 #ifdef CONFIG_SND_HDA_PATCH_LOADER
82 static char *patch[SNDRV_CARDS];
83 #endif
84 #ifdef CONFIG_SND_HDA_INPUT_BEEP
85 static bool beep_mode[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS-1)] =
86 CONFIG_SND_HDA_INPUT_BEEP_MODE};
87 #endif
88
89 module_param_array(index, int, NULL, 0444);
90 MODULE_PARM_DESC(index, "Index value for Intel HD audio interface.");
91 module_param_array(id, charp, NULL, 0444);
92 MODULE_PARM_DESC(id, "ID string for Intel HD audio interface.");
93 module_param_array(enable, bool, NULL, 0444);
94 MODULE_PARM_DESC(enable, "Enable Intel HD audio interface.");
95 module_param_array(model, charp, NULL, 0444);
96 MODULE_PARM_DESC(model, "Use the given board model.");
97 module_param_array(position_fix, int, NULL, 0444);
98 MODULE_PARM_DESC(position_fix, "DMA pointer read method."
99 "(-1 = system default, 0 = auto, 1 = LPIB, 2 = POSBUF, 3 = VIACOMBO, 4 = COMBO).");
100 module_param_array(bdl_pos_adj, int, NULL, 0644);
101 MODULE_PARM_DESC(bdl_pos_adj, "BDL position adjustment offset.");
102 module_param_array(probe_mask, int, NULL, 0444);
103 MODULE_PARM_DESC(probe_mask, "Bitmask to probe codecs (default = -1).");
104 module_param_array(probe_only, int, NULL, 0444);
105 MODULE_PARM_DESC(probe_only, "Only probing and no codec initialization.");
106 module_param_array(jackpoll_ms, int, NULL, 0444);
107 MODULE_PARM_DESC(jackpoll_ms, "Ms between polling for jack events (default = 0, using unsol events only)");
108 module_param(single_cmd, bool, 0444);
109 MODULE_PARM_DESC(single_cmd, "Use single command to communicate with codecs "
110 "(for debugging only).");
111 module_param(enable_msi, bint, 0444);
112 MODULE_PARM_DESC(enable_msi, "Enable Message Signaled Interrupt (MSI)");
113 #ifdef CONFIG_SND_HDA_PATCH_LOADER
114 module_param_array(patch, charp, NULL, 0444);
115 MODULE_PARM_DESC(patch, "Patch file for Intel HD audio interface.");
116 #endif
117 #ifdef CONFIG_SND_HDA_INPUT_BEEP
118 module_param_array(beep_mode, bool, NULL, 0444);
119 MODULE_PARM_DESC(beep_mode, "Select HDA Beep registration mode "
120 "(0=off, 1=on) (default=1).");
121 #endif
122
123 #ifdef CONFIG_PM
124 static int param_set_xint(const char *val, const struct kernel_param *kp);
125 static struct kernel_param_ops param_ops_xint = {
126 .set = param_set_xint,
127 .get = param_get_int,
128 };
129 #define param_check_xint param_check_int
130
131 static int power_save = CONFIG_SND_HDA_POWER_SAVE_DEFAULT;
132 static int *power_save_addr = &power_save;
133 module_param(power_save, xint, 0644);
134 MODULE_PARM_DESC(power_save, "Automatic power-saving timeout "
135 "(in second, 0 = disable).");
136
137 /* reset the HD-audio controller in power save mode.
138 * this may give more power-saving, but will take longer time to
139 * wake up.
140 */
141 static bool power_save_controller = 1;
142 module_param(power_save_controller, bool, 0644);
143 MODULE_PARM_DESC(power_save_controller, "Reset controller in power save mode.");
144 #else
145 static int *power_save_addr;
146 #endif /* CONFIG_PM */
147
148 static int align_buffer_size = -1;
149 module_param(align_buffer_size, bint, 0644);
150 MODULE_PARM_DESC(align_buffer_size,
151 "Force buffer and period sizes to be multiple of 128 bytes.");
152
153 #ifdef CONFIG_X86
154 static bool hda_snoop = true;
155 module_param_named(snoop, hda_snoop, bool, 0444);
156 MODULE_PARM_DESC(snoop, "Enable/disable snooping");
157 #else
158 #define hda_snoop true
159 #endif
160
161
162 MODULE_LICENSE("GPL");
163 MODULE_SUPPORTED_DEVICE("{{Intel, ICH6},"
164 "{Intel, ICH6M},"
165 "{Intel, ICH7},"
166 "{Intel, ESB2},"
167 "{Intel, ICH8},"
168 "{Intel, ICH9},"
169 "{Intel, ICH10},"
170 "{Intel, PCH},"
171 "{Intel, CPT},"
172 "{Intel, PPT},"
173 "{Intel, LPT},"
174 "{Intel, LPT_LP},"
175 "{Intel, WPT_LP},"
176 "{Intel, HPT},"
177 "{Intel, PBG},"
178 "{Intel, SCH},"
179 "{ATI, SB450},"
180 "{ATI, SB600},"
181 "{ATI, RS600},"
182 "{ATI, RS690},"
183 "{ATI, RS780},"
184 "{ATI, R600},"
185 "{ATI, RV630},"
186 "{ATI, RV610},"
187 "{ATI, RV670},"
188 "{ATI, RV635},"
189 "{ATI, RV620},"
190 "{ATI, RV770},"
191 "{VIA, VT8251},"
192 "{VIA, VT8237A},"
193 "{SiS, SIS966},"
194 "{ULI, M5461}}");
195 MODULE_DESCRIPTION("Intel HDA driver");
196
197 #if defined(CONFIG_PM) && defined(CONFIG_VGA_SWITCHEROO)
198 #if IS_ENABLED(CONFIG_SND_HDA_CODEC_HDMI)
199 #define SUPPORT_VGA_SWITCHEROO
200 #endif
201 #endif
202
203
204 /*
205 */
206
207 /* driver types */
208 enum {
209 AZX_DRIVER_ICH,
210 AZX_DRIVER_PCH,
211 AZX_DRIVER_SCH,
212 AZX_DRIVER_HDMI,
213 AZX_DRIVER_ATI,
214 AZX_DRIVER_ATIHDMI,
215 AZX_DRIVER_ATIHDMI_NS,
216 AZX_DRIVER_VIA,
217 AZX_DRIVER_SIS,
218 AZX_DRIVER_ULI,
219 AZX_DRIVER_NVIDIA,
220 AZX_DRIVER_TERA,
221 AZX_DRIVER_CTX,
222 AZX_DRIVER_CTHDA,
223 AZX_DRIVER_GENERIC,
224 AZX_NUM_DRIVERS, /* keep this as last entry */
225 };
226
227 /* quirks for Intel PCH */
228 #define AZX_DCAPS_INTEL_PCH_NOPM \
229 (AZX_DCAPS_SCH_SNOOP | AZX_DCAPS_BUFSIZE | \
230 AZX_DCAPS_COUNT_LPIB_DELAY)
231
232 #define AZX_DCAPS_INTEL_PCH \
233 (AZX_DCAPS_INTEL_PCH_NOPM | AZX_DCAPS_PM_RUNTIME)
234
235 #define AZX_DCAPS_INTEL_HASWELL \
236 (AZX_DCAPS_SCH_SNOOP | AZX_DCAPS_ALIGN_BUFSIZE | \
237 AZX_DCAPS_COUNT_LPIB_DELAY | AZX_DCAPS_PM_RUNTIME | \
238 AZX_DCAPS_I915_POWERWELL)
239
240 /* Broadwell HDMI can't use position buffer reliably, force to use LPIB */
241 #define AZX_DCAPS_INTEL_BROADWELL \
242 (AZX_DCAPS_SCH_SNOOP | AZX_DCAPS_ALIGN_BUFSIZE | \
243 AZX_DCAPS_POSFIX_LPIB | AZX_DCAPS_PM_RUNTIME | \
244 AZX_DCAPS_I915_POWERWELL)
245
246 /* quirks for ATI SB / AMD Hudson */
247 #define AZX_DCAPS_PRESET_ATI_SB \
248 (AZX_DCAPS_ATI_SNOOP | AZX_DCAPS_NO_TCSEL | \
249 AZX_DCAPS_SYNC_WRITE | AZX_DCAPS_POSFIX_LPIB)
250
251 /* quirks for ATI/AMD HDMI */
252 #define AZX_DCAPS_PRESET_ATI_HDMI \
253 (AZX_DCAPS_NO_TCSEL | AZX_DCAPS_SYNC_WRITE | AZX_DCAPS_POSFIX_LPIB)
254
255 /* quirks for Nvidia */
256 #define AZX_DCAPS_PRESET_NVIDIA \
257 (AZX_DCAPS_NVIDIA_SNOOP | AZX_DCAPS_RIRB_DELAY | AZX_DCAPS_NO_MSI |\
258 AZX_DCAPS_ALIGN_BUFSIZE | AZX_DCAPS_NO_64BIT |\
259 AZX_DCAPS_CORBRP_SELF_CLEAR)
260
261 #define AZX_DCAPS_PRESET_CTHDA \
262 (AZX_DCAPS_NO_MSI | AZX_DCAPS_POSFIX_LPIB | AZX_DCAPS_4K_BDLE_BOUNDARY)
263
264 /*
265 * VGA-switcher support
266 */
267 #ifdef SUPPORT_VGA_SWITCHEROO
268 #define use_vga_switcheroo(chip) ((chip)->use_vga_switcheroo)
269 #else
270 #define use_vga_switcheroo(chip) 0
271 #endif
272
273 static char *driver_short_names[] = {
274 [AZX_DRIVER_ICH] = "HDA Intel",
275 [AZX_DRIVER_PCH] = "HDA Intel PCH",
276 [AZX_DRIVER_SCH] = "HDA Intel MID",
277 [AZX_DRIVER_HDMI] = "HDA Intel HDMI",
278 [AZX_DRIVER_ATI] = "HDA ATI SB",
279 [AZX_DRIVER_ATIHDMI] = "HDA ATI HDMI",
280 [AZX_DRIVER_ATIHDMI_NS] = "HDA ATI HDMI",
281 [AZX_DRIVER_VIA] = "HDA VIA VT82xx",
282 [AZX_DRIVER_SIS] = "HDA SIS966",
283 [AZX_DRIVER_ULI] = "HDA ULI M5461",
284 [AZX_DRIVER_NVIDIA] = "HDA NVidia",
285 [AZX_DRIVER_TERA] = "HDA Teradici",
286 [AZX_DRIVER_CTX] = "HDA Creative",
287 [AZX_DRIVER_CTHDA] = "HDA Creative",
288 [AZX_DRIVER_GENERIC] = "HD-Audio Generic",
289 };
290
291 struct hda_intel {
292 struct azx chip;
293 };
294
295
296 #ifdef CONFIG_X86
297 static void __mark_pages_wc(struct azx *chip, struct snd_dma_buffer *dmab, bool on)
298 {
299 int pages;
300
301 if (azx_snoop(chip))
302 return;
303 if (!dmab || !dmab->area || !dmab->bytes)
304 return;
305
306 #ifdef CONFIG_SND_DMA_SGBUF
307 if (dmab->dev.type == SNDRV_DMA_TYPE_DEV_SG) {
308 struct snd_sg_buf *sgbuf = dmab->private_data;
309 if (on)
310 set_pages_array_wc(sgbuf->page_table, sgbuf->pages);
311 else
312 set_pages_array_wb(sgbuf->page_table, sgbuf->pages);
313 return;
314 }
315 #endif
316
317 pages = (dmab->bytes + PAGE_SIZE - 1) >> PAGE_SHIFT;
318 if (on)
319 set_memory_wc((unsigned long)dmab->area, pages);
320 else
321 set_memory_wb((unsigned long)dmab->area, pages);
322 }
323
324 static inline void mark_pages_wc(struct azx *chip, struct snd_dma_buffer *buf,
325 bool on)
326 {
327 __mark_pages_wc(chip, buf, on);
328 }
329 static inline void mark_runtime_wc(struct azx *chip, struct azx_dev *azx_dev,
330 struct snd_pcm_substream *substream, bool on)
331 {
332 if (azx_dev->wc_marked != on) {
333 __mark_pages_wc(chip, snd_pcm_get_dma_buf(substream), on);
334 azx_dev->wc_marked = on;
335 }
336 }
337 #else
338 /* NOP for other archs */
339 static inline void mark_pages_wc(struct azx *chip, struct snd_dma_buffer *buf,
340 bool on)
341 {
342 }
343 static inline void mark_runtime_wc(struct azx *chip, struct azx_dev *azx_dev,
344 struct snd_pcm_substream *substream, bool on)
345 {
346 }
347 #endif
348
349 static int azx_acquire_irq(struct azx *chip, int do_disconnect);
350
351 /*
352 * initialize the PCI registers
353 */
354 /* update bits in a PCI register byte */
355 static void update_pci_byte(struct pci_dev *pci, unsigned int reg,
356 unsigned char mask, unsigned char val)
357 {
358 unsigned char data;
359
360 pci_read_config_byte(pci, reg, &data);
361 data &= ~mask;
362 data |= (val & mask);
363 pci_write_config_byte(pci, reg, data);
364 }
365
366 static void azx_init_pci(struct azx *chip)
367 {
368 /* Clear bits 0-2 of PCI register TCSEL (at offset 0x44)
369 * TCSEL == Traffic Class Select Register, which sets PCI express QOS
370 * Ensuring these bits are 0 clears playback static on some HD Audio
371 * codecs.
372 * The PCI register TCSEL is defined in the Intel manuals.
373 */
374 if (!(chip->driver_caps & AZX_DCAPS_NO_TCSEL)) {
375 dev_dbg(chip->card->dev, "Clearing TCSEL\n");
376 update_pci_byte(chip->pci, ICH6_PCIREG_TCSEL, 0x07, 0);
377 }
378
379 /* For ATI SB450/600/700/800/900 and AMD Hudson azalia HD audio,
380 * we need to enable snoop.
381 */
382 if (chip->driver_caps & AZX_DCAPS_ATI_SNOOP) {
383 dev_dbg(chip->card->dev, "Setting ATI snoop: %d\n",
384 azx_snoop(chip));
385 update_pci_byte(chip->pci,
386 ATI_SB450_HDAUDIO_MISC_CNTR2_ADDR, 0x07,
387 azx_snoop(chip) ? ATI_SB450_HDAUDIO_ENABLE_SNOOP : 0);
388 }
389
390 /* For NVIDIA HDA, enable snoop */
391 if (chip->driver_caps & AZX_DCAPS_NVIDIA_SNOOP) {
392 dev_dbg(chip->card->dev, "Setting Nvidia snoop: %d\n",
393 azx_snoop(chip));
394 update_pci_byte(chip->pci,
395 NVIDIA_HDA_TRANSREG_ADDR,
396 0x0f, NVIDIA_HDA_ENABLE_COHBITS);
397 update_pci_byte(chip->pci,
398 NVIDIA_HDA_ISTRM_COH,
399 0x01, NVIDIA_HDA_ENABLE_COHBIT);
400 update_pci_byte(chip->pci,
401 NVIDIA_HDA_OSTRM_COH,
402 0x01, NVIDIA_HDA_ENABLE_COHBIT);
403 }
404
405 /* Enable SCH/PCH snoop if needed */
406 if (chip->driver_caps & AZX_DCAPS_SCH_SNOOP) {
407 unsigned short snoop;
408 pci_read_config_word(chip->pci, INTEL_SCH_HDA_DEVC, &snoop);
409 if ((!azx_snoop(chip) && !(snoop & INTEL_SCH_HDA_DEVC_NOSNOOP)) ||
410 (azx_snoop(chip) && (snoop & INTEL_SCH_HDA_DEVC_NOSNOOP))) {
411 snoop &= ~INTEL_SCH_HDA_DEVC_NOSNOOP;
412 if (!azx_snoop(chip))
413 snoop |= INTEL_SCH_HDA_DEVC_NOSNOOP;
414 pci_write_config_word(chip->pci, INTEL_SCH_HDA_DEVC, snoop);
415 pci_read_config_word(chip->pci,
416 INTEL_SCH_HDA_DEVC, &snoop);
417 }
418 dev_dbg(chip->card->dev, "SCH snoop: %s\n",
419 (snoop & INTEL_SCH_HDA_DEVC_NOSNOOP) ?
420 "Disabled" : "Enabled");
421 }
422 }
423
424 static int azx_position_ok(struct azx *chip, struct azx_dev *azx_dev);
425
426 /* called from IRQ */
427 static int azx_position_check(struct azx *chip, struct azx_dev *azx_dev)
428 {
429 int ok;
430
431 ok = azx_position_ok(chip, azx_dev);
432 if (ok == 1) {
433 azx_dev->irq_pending = 0;
434 return ok;
435 } else if (ok == 0 && chip->bus && chip->bus->workq) {
436 /* bogus IRQ, process it later */
437 azx_dev->irq_pending = 1;
438 queue_work(chip->bus->workq, &chip->irq_pending_work);
439 }
440 return 0;
441 }
442
443 /*
444 * Check whether the current DMA position is acceptable for updating
445 * periods. Returns non-zero if it's OK.
446 *
447 * Many HD-audio controllers appear pretty inaccurate about
448 * the update-IRQ timing. The IRQ is issued before actually the
449 * data is processed. So, we need to process it afterwords in a
450 * workqueue.
451 */
452 static int azx_position_ok(struct azx *chip, struct azx_dev *azx_dev)
453 {
454 u32 wallclk;
455 unsigned int pos;
456
457 wallclk = azx_readl(chip, WALLCLK) - azx_dev->start_wallclk;
458 if (wallclk < (azx_dev->period_wallclk * 2) / 3)
459 return -1; /* bogus (too early) interrupt */
460
461 pos = azx_get_position(chip, azx_dev, true);
462
463 if (WARN_ONCE(!azx_dev->period_bytes,
464 "hda-intel: zero azx_dev->period_bytes"))
465 return -1; /* this shouldn't happen! */
466 if (wallclk < (azx_dev->period_wallclk * 5) / 4 &&
467 pos % azx_dev->period_bytes > azx_dev->period_bytes / 2)
468 /* NG - it's below the first next period boundary */
469 return chip->bdl_pos_adj[chip->dev_index] ? 0 : -1;
470 azx_dev->start_wallclk += wallclk;
471 return 1; /* OK, it's fine */
472 }
473
474 /*
475 * The work for pending PCM period updates.
476 */
477 static void azx_irq_pending_work(struct work_struct *work)
478 {
479 struct azx *chip = container_of(work, struct azx, irq_pending_work);
480 int i, pending, ok;
481
482 if (!chip->irq_pending_warned) {
483 dev_info(chip->card->dev,
484 "IRQ timing workaround is activated for card #%d. Suggest a bigger bdl_pos_adj.\n",
485 chip->card->number);
486 chip->irq_pending_warned = 1;
487 }
488
489 for (;;) {
490 pending = 0;
491 spin_lock_irq(&chip->reg_lock);
492 for (i = 0; i < chip->num_streams; i++) {
493 struct azx_dev *azx_dev = &chip->azx_dev[i];
494 if (!azx_dev->irq_pending ||
495 !azx_dev->substream ||
496 !azx_dev->running)
497 continue;
498 ok = azx_position_ok(chip, azx_dev);
499 if (ok > 0) {
500 azx_dev->irq_pending = 0;
501 spin_unlock(&chip->reg_lock);
502 snd_pcm_period_elapsed(azx_dev->substream);
503 spin_lock(&chip->reg_lock);
504 } else if (ok < 0) {
505 pending = 0; /* too early */
506 } else
507 pending++;
508 }
509 spin_unlock_irq(&chip->reg_lock);
510 if (!pending)
511 return;
512 msleep(1);
513 }
514 }
515
516 /* clear irq_pending flags and assure no on-going workq */
517 static void azx_clear_irq_pending(struct azx *chip)
518 {
519 int i;
520
521 spin_lock_irq(&chip->reg_lock);
522 for (i = 0; i < chip->num_streams; i++)
523 chip->azx_dev[i].irq_pending = 0;
524 spin_unlock_irq(&chip->reg_lock);
525 }
526
527 static int azx_acquire_irq(struct azx *chip, int do_disconnect)
528 {
529 if (request_irq(chip->pci->irq, azx_interrupt,
530 chip->msi ? 0 : IRQF_SHARED,
531 KBUILD_MODNAME, chip)) {
532 dev_err(chip->card->dev,
533 "unable to grab IRQ %d, disabling device\n",
534 chip->pci->irq);
535 if (do_disconnect)
536 snd_card_disconnect(chip->card);
537 return -1;
538 }
539 chip->irq = chip->pci->irq;
540 pci_intx(chip->pci, !chip->msi);
541 return 0;
542 }
543
544 #ifdef CONFIG_PM
545 static DEFINE_MUTEX(card_list_lock);
546 static LIST_HEAD(card_list);
547
548 static void azx_add_card_list(struct azx *chip)
549 {
550 mutex_lock(&card_list_lock);
551 list_add(&chip->list, &card_list);
552 mutex_unlock(&card_list_lock);
553 }
554
555 static void azx_del_card_list(struct azx *chip)
556 {
557 mutex_lock(&card_list_lock);
558 list_del_init(&chip->list);
559 mutex_unlock(&card_list_lock);
560 }
561
562 /* trigger power-save check at writing parameter */
563 static int param_set_xint(const char *val, const struct kernel_param *kp)
564 {
565 struct azx *chip;
566 struct hda_codec *c;
567 int prev = power_save;
568 int ret = param_set_int(val, kp);
569
570 if (ret || prev == power_save)
571 return ret;
572
573 mutex_lock(&card_list_lock);
574 list_for_each_entry(chip, &card_list, list) {
575 if (!chip->bus || chip->disabled)
576 continue;
577 list_for_each_entry(c, &chip->bus->codec_list, list)
578 snd_hda_power_sync(c);
579 }
580 mutex_unlock(&card_list_lock);
581 return 0;
582 }
583 #else
584 #define azx_add_card_list(chip) /* NOP */
585 #define azx_del_card_list(chip) /* NOP */
586 #endif /* CONFIG_PM */
587
588 #if defined(CONFIG_PM_SLEEP) || defined(SUPPORT_VGA_SWITCHEROO)
589 /*
590 * power management
591 */
592 static int azx_suspend(struct device *dev)
593 {
594 struct pci_dev *pci = to_pci_dev(dev);
595 struct snd_card *card = dev_get_drvdata(dev);
596 struct azx *chip = card->private_data;
597 struct azx_pcm *p;
598
599 if (chip->disabled)
600 return 0;
601
602 snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
603 azx_clear_irq_pending(chip);
604 list_for_each_entry(p, &chip->pcm_list, list)
605 snd_pcm_suspend_all(p->pcm);
606 if (chip->initialized)
607 snd_hda_suspend(chip->bus);
608 azx_stop_chip(chip);
609 azx_enter_link_reset(chip);
610 if (chip->irq >= 0) {
611 free_irq(chip->irq, chip);
612 chip->irq = -1;
613 }
614
615 if (chip->msi)
616 pci_disable_msi(chip->pci);
617 pci_disable_device(pci);
618 pci_save_state(pci);
619 pci_set_power_state(pci, PCI_D3hot);
620 if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL)
621 hda_display_power(false);
622 return 0;
623 }
624
625 static int azx_resume(struct device *dev)
626 {
627 struct pci_dev *pci = to_pci_dev(dev);
628 struct snd_card *card = dev_get_drvdata(dev);
629 struct azx *chip = card->private_data;
630
631 if (chip->disabled)
632 return 0;
633
634 if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL) {
635 hda_display_power(true);
636 haswell_set_bclk(chip);
637 }
638 pci_set_power_state(pci, PCI_D0);
639 pci_restore_state(pci);
640 if (pci_enable_device(pci) < 0) {
641 dev_err(chip->card->dev,
642 "pci_enable_device failed, disabling device\n");
643 snd_card_disconnect(card);
644 return -EIO;
645 }
646 pci_set_master(pci);
647 if (chip->msi)
648 if (pci_enable_msi(pci) < 0)
649 chip->msi = 0;
650 if (azx_acquire_irq(chip, 1) < 0)
651 return -EIO;
652 azx_init_pci(chip);
653
654 azx_init_chip(chip, true);
655
656 snd_hda_resume(chip->bus);
657 snd_power_change_state(card, SNDRV_CTL_POWER_D0);
658 return 0;
659 }
660 #endif /* CONFIG_PM_SLEEP || SUPPORT_VGA_SWITCHEROO */
661
662 #ifdef CONFIG_PM_RUNTIME
663 static int azx_runtime_suspend(struct device *dev)
664 {
665 struct snd_card *card = dev_get_drvdata(dev);
666 struct azx *chip = card->private_data;
667
668 if (chip->disabled)
669 return 0;
670
671 if (!(chip->driver_caps & AZX_DCAPS_PM_RUNTIME))
672 return 0;
673
674 /* enable controller wake up event */
675 azx_writew(chip, WAKEEN, azx_readw(chip, WAKEEN) |
676 STATESTS_INT_MASK);
677
678 azx_stop_chip(chip);
679 azx_enter_link_reset(chip);
680 azx_clear_irq_pending(chip);
681 if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL)
682 hda_display_power(false);
683
684 return 0;
685 }
686
687 static int azx_runtime_resume(struct device *dev)
688 {
689 struct snd_card *card = dev_get_drvdata(dev);
690 struct azx *chip = card->private_data;
691 struct hda_bus *bus;
692 struct hda_codec *codec;
693 int status;
694
695 if (chip->disabled)
696 return 0;
697
698 if (!(chip->driver_caps & AZX_DCAPS_PM_RUNTIME))
699 return 0;
700
701 if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL) {
702 hda_display_power(true);
703 haswell_set_bclk(chip);
704 }
705
706 /* Read STATESTS before controller reset */
707 status = azx_readw(chip, STATESTS);
708
709 azx_init_pci(chip);
710 azx_init_chip(chip, true);
711
712 bus = chip->bus;
713 if (status && bus) {
714 list_for_each_entry(codec, &bus->codec_list, list)
715 if (status & (1 << codec->addr))
716 queue_delayed_work(codec->bus->workq,
717 &codec->jackpoll_work, codec->jackpoll_interval);
718 }
719
720 /* disable controller Wake Up event*/
721 azx_writew(chip, WAKEEN, azx_readw(chip, WAKEEN) &
722 ~STATESTS_INT_MASK);
723
724 return 0;
725 }
726
727 static int azx_runtime_idle(struct device *dev)
728 {
729 struct snd_card *card = dev_get_drvdata(dev);
730 struct azx *chip = card->private_data;
731
732 if (chip->disabled)
733 return 0;
734
735 if (!power_save_controller ||
736 !(chip->driver_caps & AZX_DCAPS_PM_RUNTIME))
737 return -EBUSY;
738
739 return 0;
740 }
741
742 #endif /* CONFIG_PM_RUNTIME */
743
744 #ifdef CONFIG_PM
745 static const struct dev_pm_ops azx_pm = {
746 SET_SYSTEM_SLEEP_PM_OPS(azx_suspend, azx_resume)
747 SET_RUNTIME_PM_OPS(azx_runtime_suspend, azx_runtime_resume, azx_runtime_idle)
748 };
749
750 #define AZX_PM_OPS &azx_pm
751 #else
752 #define AZX_PM_OPS NULL
753 #endif /* CONFIG_PM */
754
755
756 /*
757 * reboot notifier for hang-up problem at power-down
758 */
759 static int azx_halt(struct notifier_block *nb, unsigned long event, void *buf)
760 {
761 struct azx *chip = container_of(nb, struct azx, reboot_notifier);
762 snd_hda_bus_reboot_notify(chip->bus);
763 azx_stop_chip(chip);
764 return NOTIFY_OK;
765 }
766
767 static void azx_notifier_register(struct azx *chip)
768 {
769 chip->reboot_notifier.notifier_call = azx_halt;
770 register_reboot_notifier(&chip->reboot_notifier);
771 }
772
773 static void azx_notifier_unregister(struct azx *chip)
774 {
775 if (chip->reboot_notifier.notifier_call)
776 unregister_reboot_notifier(&chip->reboot_notifier);
777 }
778
779 static int azx_probe_continue(struct azx *chip);
780
781 #ifdef SUPPORT_VGA_SWITCHEROO
782 static struct pci_dev *get_bound_vga(struct pci_dev *pci);
783
784 static void azx_vs_set_state(struct pci_dev *pci,
785 enum vga_switcheroo_state state)
786 {
787 struct snd_card *card = pci_get_drvdata(pci);
788 struct azx *chip = card->private_data;
789 bool disabled;
790
791 wait_for_completion(&chip->probe_wait);
792 if (chip->init_failed)
793 return;
794
795 disabled = (state == VGA_SWITCHEROO_OFF);
796 if (chip->disabled == disabled)
797 return;
798
799 if (!chip->bus) {
800 chip->disabled = disabled;
801 if (!disabled) {
802 dev_info(chip->card->dev,
803 "Start delayed initialization\n");
804 if (azx_probe_continue(chip) < 0) {
805 dev_err(chip->card->dev, "initialization error\n");
806 chip->init_failed = true;
807 }
808 }
809 } else {
810 dev_info(chip->card->dev, "%s via VGA-switcheroo\n",
811 disabled ? "Disabling" : "Enabling");
812 if (disabled) {
813 pm_runtime_put_sync_suspend(card->dev);
814 azx_suspend(card->dev);
815 /* when we get suspended by vga switcheroo we end up in D3cold,
816 * however we have no ACPI handle, so pci/acpi can't put us there,
817 * put ourselves there */
818 pci->current_state = PCI_D3cold;
819 chip->disabled = true;
820 if (snd_hda_lock_devices(chip->bus))
821 dev_warn(chip->card->dev,
822 "Cannot lock devices!\n");
823 } else {
824 snd_hda_unlock_devices(chip->bus);
825 pm_runtime_get_noresume(card->dev);
826 chip->disabled = false;
827 azx_resume(card->dev);
828 }
829 }
830 }
831
832 static bool azx_vs_can_switch(struct pci_dev *pci)
833 {
834 struct snd_card *card = pci_get_drvdata(pci);
835 struct azx *chip = card->private_data;
836
837 wait_for_completion(&chip->probe_wait);
838 if (chip->init_failed)
839 return false;
840 if (chip->disabled || !chip->bus)
841 return true;
842 if (snd_hda_lock_devices(chip->bus))
843 return false;
844 snd_hda_unlock_devices(chip->bus);
845 return true;
846 }
847
848 static void init_vga_switcheroo(struct azx *chip)
849 {
850 struct pci_dev *p = get_bound_vga(chip->pci);
851 if (p) {
852 dev_info(chip->card->dev,
853 "Handle VGA-switcheroo audio client\n");
854 chip->use_vga_switcheroo = 1;
855 pci_dev_put(p);
856 }
857 }
858
859 static const struct vga_switcheroo_client_ops azx_vs_ops = {
860 .set_gpu_state = azx_vs_set_state,
861 .can_switch = azx_vs_can_switch,
862 };
863
864 static int register_vga_switcheroo(struct azx *chip)
865 {
866 int err;
867
868 if (!chip->use_vga_switcheroo)
869 return 0;
870 /* FIXME: currently only handling DIS controller
871 * is there any machine with two switchable HDMI audio controllers?
872 */
873 err = vga_switcheroo_register_audio_client(chip->pci, &azx_vs_ops,
874 VGA_SWITCHEROO_DIS,
875 chip->bus != NULL);
876 if (err < 0)
877 return err;
878 chip->vga_switcheroo_registered = 1;
879
880 /* register as an optimus hdmi audio power domain */
881 vga_switcheroo_init_domain_pm_optimus_hdmi_audio(chip->card->dev,
882 &chip->hdmi_pm_domain);
883 return 0;
884 }
885 #else
886 #define init_vga_switcheroo(chip) /* NOP */
887 #define register_vga_switcheroo(chip) 0
888 #define check_hdmi_disabled(pci) false
889 #endif /* SUPPORT_VGA_SWITCHER */
890
891 /*
892 * destructor
893 */
894 static int azx_free(struct azx *chip)
895 {
896 struct pci_dev *pci = chip->pci;
897 struct hda_intel *hda = container_of(chip, struct hda_intel, chip);
898
899 int i;
900
901 if ((chip->driver_caps & AZX_DCAPS_PM_RUNTIME)
902 && chip->running)
903 pm_runtime_get_noresume(&pci->dev);
904
905 azx_del_card_list(chip);
906
907 azx_notifier_unregister(chip);
908
909 chip->init_failed = 1; /* to be sure */
910 complete_all(&chip->probe_wait);
911
912 if (use_vga_switcheroo(chip)) {
913 if (chip->disabled && chip->bus)
914 snd_hda_unlock_devices(chip->bus);
915 if (chip->vga_switcheroo_registered)
916 vga_switcheroo_unregister_client(chip->pci);
917 }
918
919 if (chip->initialized) {
920 azx_clear_irq_pending(chip);
921 for (i = 0; i < chip->num_streams; i++)
922 azx_stream_stop(chip, &chip->azx_dev[i]);
923 azx_stop_chip(chip);
924 }
925
926 if (chip->irq >= 0)
927 free_irq(chip->irq, (void*)chip);
928 if (chip->msi)
929 pci_disable_msi(chip->pci);
930 if (chip->remap_addr)
931 iounmap(chip->remap_addr);
932
933 azx_free_stream_pages(chip);
934 if (chip->region_requested)
935 pci_release_regions(chip->pci);
936 pci_disable_device(chip->pci);
937 kfree(chip->azx_dev);
938 #ifdef CONFIG_SND_HDA_PATCH_LOADER
939 if (chip->fw)
940 release_firmware(chip->fw);
941 #endif
942 if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL) {
943 hda_display_power(false);
944 hda_i915_exit();
945 }
946 kfree(hda);
947
948 return 0;
949 }
950
951 static int azx_dev_free(struct snd_device *device)
952 {
953 return azx_free(device->device_data);
954 }
955
956 #ifdef SUPPORT_VGA_SWITCHEROO
957 /*
958 * Check of disabled HDMI controller by vga-switcheroo
959 */
960 static struct pci_dev *get_bound_vga(struct pci_dev *pci)
961 {
962 struct pci_dev *p;
963
964 /* check only discrete GPU */
965 switch (pci->vendor) {
966 case PCI_VENDOR_ID_ATI:
967 case PCI_VENDOR_ID_AMD:
968 case PCI_VENDOR_ID_NVIDIA:
969 if (pci->devfn == 1) {
970 p = pci_get_domain_bus_and_slot(pci_domain_nr(pci->bus),
971 pci->bus->number, 0);
972 if (p) {
973 if ((p->class >> 8) == PCI_CLASS_DISPLAY_VGA)
974 return p;
975 pci_dev_put(p);
976 }
977 }
978 break;
979 }
980 return NULL;
981 }
982
983 static bool check_hdmi_disabled(struct pci_dev *pci)
984 {
985 bool vga_inactive = false;
986 struct pci_dev *p = get_bound_vga(pci);
987
988 if (p) {
989 if (vga_switcheroo_get_client_state(p) == VGA_SWITCHEROO_OFF)
990 vga_inactive = true;
991 pci_dev_put(p);
992 }
993 return vga_inactive;
994 }
995 #endif /* SUPPORT_VGA_SWITCHEROO */
996
997 /*
998 * white/black-listing for position_fix
999 */
1000 static struct snd_pci_quirk position_fix_list[] = {
1001 SND_PCI_QUIRK(0x1028, 0x01cc, "Dell D820", POS_FIX_LPIB),
1002 SND_PCI_QUIRK(0x1028, 0x01de, "Dell Precision 390", POS_FIX_LPIB),
1003 SND_PCI_QUIRK(0x103c, 0x306d, "HP dv3", POS_FIX_LPIB),
1004 SND_PCI_QUIRK(0x1043, 0x813d, "ASUS P5AD2", POS_FIX_LPIB),
1005 SND_PCI_QUIRK(0x1043, 0x81b3, "ASUS", POS_FIX_LPIB),
1006 SND_PCI_QUIRK(0x1043, 0x81e7, "ASUS M2V", POS_FIX_LPIB),
1007 SND_PCI_QUIRK(0x104d, 0x9069, "Sony VPCS11V9E", POS_FIX_LPIB),
1008 SND_PCI_QUIRK(0x10de, 0xcb89, "Macbook Pro 7,1", POS_FIX_LPIB),
1009 SND_PCI_QUIRK(0x1297, 0x3166, "Shuttle", POS_FIX_LPIB),
1010 SND_PCI_QUIRK(0x1458, 0xa022, "ga-ma770-ud3", POS_FIX_LPIB),
1011 SND_PCI_QUIRK(0x1462, 0x1002, "MSI Wind U115", POS_FIX_LPIB),
1012 SND_PCI_QUIRK(0x1565, 0x8218, "Biostar Microtech", POS_FIX_LPIB),
1013 SND_PCI_QUIRK(0x1849, 0x0888, "775Dual-VSTA", POS_FIX_LPIB),
1014 SND_PCI_QUIRK(0x8086, 0x2503, "DG965OT AAD63733-203", POS_FIX_LPIB),
1015 {}
1016 };
1017
1018 static int check_position_fix(struct azx *chip, int fix)
1019 {
1020 const struct snd_pci_quirk *q;
1021
1022 switch (fix) {
1023 case POS_FIX_AUTO:
1024 case POS_FIX_LPIB:
1025 case POS_FIX_POSBUF:
1026 case POS_FIX_VIACOMBO:
1027 case POS_FIX_COMBO:
1028 return fix;
1029 }
1030
1031 q = snd_pci_quirk_lookup(chip->pci, position_fix_list);
1032 if (q) {
1033 dev_info(chip->card->dev,
1034 "position_fix set to %d for device %04x:%04x\n",
1035 q->value, q->subvendor, q->subdevice);
1036 return q->value;
1037 }
1038
1039 /* Check VIA/ATI HD Audio Controller exist */
1040 if (chip->driver_caps & AZX_DCAPS_POSFIX_VIA) {
1041 dev_dbg(chip->card->dev, "Using VIACOMBO position fix\n");
1042 return POS_FIX_VIACOMBO;
1043 }
1044 if (chip->driver_caps & AZX_DCAPS_POSFIX_LPIB) {
1045 dev_dbg(chip->card->dev, "Using LPIB position fix\n");
1046 return POS_FIX_LPIB;
1047 }
1048 return POS_FIX_AUTO;
1049 }
1050
1051 /*
1052 * black-lists for probe_mask
1053 */
1054 static struct snd_pci_quirk probe_mask_list[] = {
1055 /* Thinkpad often breaks the controller communication when accessing
1056 * to the non-working (or non-existing) modem codec slot.
1057 */
1058 SND_PCI_QUIRK(0x1014, 0x05b7, "Thinkpad Z60", 0x01),
1059 SND_PCI_QUIRK(0x17aa, 0x2010, "Thinkpad X/T/R60", 0x01),
1060 SND_PCI_QUIRK(0x17aa, 0x20ac, "Thinkpad X/T/R61", 0x01),
1061 /* broken BIOS */
1062 SND_PCI_QUIRK(0x1028, 0x20ac, "Dell Studio Desktop", 0x01),
1063 /* including bogus ALC268 in slot#2 that conflicts with ALC888 */
1064 SND_PCI_QUIRK(0x17c0, 0x4085, "Medion MD96630", 0x01),
1065 /* forced codec slots */
1066 SND_PCI_QUIRK(0x1043, 0x1262, "ASUS W5Fm", 0x103),
1067 SND_PCI_QUIRK(0x1046, 0x1262, "ASUS W5F", 0x103),
1068 /* WinFast VP200 H (Teradici) user reported broken communication */
1069 SND_PCI_QUIRK(0x3a21, 0x040d, "WinFast VP200 H", 0x101),
1070 {}
1071 };
1072
1073 #define AZX_FORCE_CODEC_MASK 0x100
1074
1075 static void check_probe_mask(struct azx *chip, int dev)
1076 {
1077 const struct snd_pci_quirk *q;
1078
1079 chip->codec_probe_mask = probe_mask[dev];
1080 if (chip->codec_probe_mask == -1) {
1081 q = snd_pci_quirk_lookup(chip->pci, probe_mask_list);
1082 if (q) {
1083 dev_info(chip->card->dev,
1084 "probe_mask set to 0x%x for device %04x:%04x\n",
1085 q->value, q->subvendor, q->subdevice);
1086 chip->codec_probe_mask = q->value;
1087 }
1088 }
1089
1090 /* check forced option */
1091 if (chip->codec_probe_mask != -1 &&
1092 (chip->codec_probe_mask & AZX_FORCE_CODEC_MASK)) {
1093 chip->codec_mask = chip->codec_probe_mask & 0xff;
1094 dev_info(chip->card->dev, "codec_mask forced to 0x%x\n",
1095 chip->codec_mask);
1096 }
1097 }
1098
1099 /*
1100 * white/black-list for enable_msi
1101 */
1102 static struct snd_pci_quirk msi_black_list[] = {
1103 SND_PCI_QUIRK(0x103c, 0x2191, "HP", 0), /* AMD Hudson */
1104 SND_PCI_QUIRK(0x103c, 0x2192, "HP", 0), /* AMD Hudson */
1105 SND_PCI_QUIRK(0x103c, 0x21f7, "HP", 0), /* AMD Hudson */
1106 SND_PCI_QUIRK(0x103c, 0x21fa, "HP", 0), /* AMD Hudson */
1107 SND_PCI_QUIRK(0x1043, 0x81f2, "ASUS", 0), /* Athlon64 X2 + nvidia */
1108 SND_PCI_QUIRK(0x1043, 0x81f6, "ASUS", 0), /* nvidia */
1109 SND_PCI_QUIRK(0x1043, 0x822d, "ASUS", 0), /* Athlon64 X2 + nvidia MCP55 */
1110 SND_PCI_QUIRK(0x1179, 0xfb44, "Toshiba Satellite C870", 0), /* AMD Hudson */
1111 SND_PCI_QUIRK(0x1849, 0x0888, "ASRock", 0), /* Athlon64 X2 + nvidia */
1112 SND_PCI_QUIRK(0xa0a0, 0x0575, "Aopen MZ915-M", 0), /* ICH6 */
1113 {}
1114 };
1115
1116 static void check_msi(struct azx *chip)
1117 {
1118 const struct snd_pci_quirk *q;
1119
1120 if (enable_msi >= 0) {
1121 chip->msi = !!enable_msi;
1122 return;
1123 }
1124 chip->msi = 1; /* enable MSI as default */
1125 q = snd_pci_quirk_lookup(chip->pci, msi_black_list);
1126 if (q) {
1127 dev_info(chip->card->dev,
1128 "msi for device %04x:%04x set to %d\n",
1129 q->subvendor, q->subdevice, q->value);
1130 chip->msi = q->value;
1131 return;
1132 }
1133
1134 /* NVidia chipsets seem to cause troubles with MSI */
1135 if (chip->driver_caps & AZX_DCAPS_NO_MSI) {
1136 dev_info(chip->card->dev, "Disabling MSI\n");
1137 chip->msi = 0;
1138 }
1139 }
1140
1141 /* check the snoop mode availability */
1142 static void azx_check_snoop_available(struct azx *chip)
1143 {
1144 bool snoop = chip->snoop;
1145
1146 switch (chip->driver_type) {
1147 case AZX_DRIVER_VIA:
1148 /* force to non-snoop mode for a new VIA controller
1149 * when BIOS is set
1150 */
1151 if (snoop) {
1152 u8 val;
1153 pci_read_config_byte(chip->pci, 0x42, &val);
1154 if (!(val & 0x80) && chip->pci->revision == 0x30)
1155 snoop = false;
1156 }
1157 break;
1158 case AZX_DRIVER_ATIHDMI_NS:
1159 /* new ATI HDMI requires non-snoop */
1160 snoop = false;
1161 break;
1162 case AZX_DRIVER_CTHDA:
1163 snoop = false;
1164 break;
1165 }
1166
1167 if (snoop != chip->snoop) {
1168 dev_info(chip->card->dev, "Force to %s mode\n",
1169 snoop ? "snoop" : "non-snoop");
1170 chip->snoop = snoop;
1171 }
1172 }
1173
1174 static void azx_probe_work(struct work_struct *work)
1175 {
1176 azx_probe_continue(container_of(work, struct azx, probe_work));
1177 }
1178
1179 /*
1180 * constructor
1181 */
1182 static int azx_create(struct snd_card *card, struct pci_dev *pci,
1183 int dev, unsigned int driver_caps,
1184 const struct hda_controller_ops *hda_ops,
1185 struct azx **rchip)
1186 {
1187 static struct snd_device_ops ops = {
1188 .dev_free = azx_dev_free,
1189 };
1190 struct hda_intel *hda;
1191 struct azx *chip;
1192 int err;
1193
1194 *rchip = NULL;
1195
1196 err = pci_enable_device(pci);
1197 if (err < 0)
1198 return err;
1199
1200 hda = kzalloc(sizeof(*hda), GFP_KERNEL);
1201 if (!hda) {
1202 dev_err(card->dev, "Cannot allocate hda\n");
1203 pci_disable_device(pci);
1204 return -ENOMEM;
1205 }
1206
1207 chip = &hda->chip;
1208 spin_lock_init(&chip->reg_lock);
1209 mutex_init(&chip->open_mutex);
1210 chip->card = card;
1211 chip->pci = pci;
1212 chip->ops = hda_ops;
1213 chip->irq = -1;
1214 chip->driver_caps = driver_caps;
1215 chip->driver_type = driver_caps & 0xff;
1216 check_msi(chip);
1217 chip->dev_index = dev;
1218 chip->jackpoll_ms = jackpoll_ms;
1219 INIT_WORK(&chip->irq_pending_work, azx_irq_pending_work);
1220 INIT_LIST_HEAD(&chip->pcm_list);
1221 INIT_LIST_HEAD(&chip->list);
1222 init_vga_switcheroo(chip);
1223 init_completion(&chip->probe_wait);
1224
1225 chip->position_fix[0] = chip->position_fix[1] =
1226 check_position_fix(chip, position_fix[dev]);
1227 /* combo mode uses LPIB for playback */
1228 if (chip->position_fix[0] == POS_FIX_COMBO) {
1229 chip->position_fix[0] = POS_FIX_LPIB;
1230 chip->position_fix[1] = POS_FIX_AUTO;
1231 }
1232
1233 check_probe_mask(chip, dev);
1234
1235 chip->single_cmd = single_cmd;
1236 chip->snoop = hda_snoop;
1237 azx_check_snoop_available(chip);
1238
1239 if (bdl_pos_adj[dev] < 0) {
1240 switch (chip->driver_type) {
1241 case AZX_DRIVER_ICH:
1242 case AZX_DRIVER_PCH:
1243 bdl_pos_adj[dev] = 1;
1244 break;
1245 default:
1246 bdl_pos_adj[dev] = 32;
1247 break;
1248 }
1249 }
1250 chip->bdl_pos_adj = bdl_pos_adj;
1251
1252 err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops);
1253 if (err < 0) {
1254 dev_err(card->dev, "Error creating device [card]!\n");
1255 azx_free(chip);
1256 return err;
1257 }
1258
1259 /* continue probing in work context as may trigger request module */
1260 INIT_WORK(&chip->probe_work, azx_probe_work);
1261
1262 *rchip = chip;
1263
1264 return 0;
1265 }
1266
1267 static int azx_first_init(struct azx *chip)
1268 {
1269 int dev = chip->dev_index;
1270 struct pci_dev *pci = chip->pci;
1271 struct snd_card *card = chip->card;
1272 int err;
1273 unsigned short gcap;
1274
1275 #if BITS_PER_LONG != 64
1276 /* Fix up base address on ULI M5461 */
1277 if (chip->driver_type == AZX_DRIVER_ULI) {
1278 u16 tmp3;
1279 pci_read_config_word(pci, 0x40, &tmp3);
1280 pci_write_config_word(pci, 0x40, tmp3 | 0x10);
1281 pci_write_config_dword(pci, PCI_BASE_ADDRESS_1, 0);
1282 }
1283 #endif
1284
1285 err = pci_request_regions(pci, "ICH HD audio");
1286 if (err < 0)
1287 return err;
1288 chip->region_requested = 1;
1289
1290 chip->addr = pci_resource_start(pci, 0);
1291 chip->remap_addr = pci_ioremap_bar(pci, 0);
1292 if (chip->remap_addr == NULL) {
1293 dev_err(card->dev, "ioremap error\n");
1294 return -ENXIO;
1295 }
1296
1297 if (chip->msi)
1298 if (pci_enable_msi(pci) < 0)
1299 chip->msi = 0;
1300
1301 if (azx_acquire_irq(chip, 0) < 0)
1302 return -EBUSY;
1303
1304 pci_set_master(pci);
1305 synchronize_irq(chip->irq);
1306
1307 gcap = azx_readw(chip, GCAP);
1308 dev_dbg(card->dev, "chipset global capabilities = 0x%x\n", gcap);
1309
1310 /* disable SB600 64bit support for safety */
1311 if (chip->pci->vendor == PCI_VENDOR_ID_ATI) {
1312 struct pci_dev *p_smbus;
1313 p_smbus = pci_get_device(PCI_VENDOR_ID_ATI,
1314 PCI_DEVICE_ID_ATI_SBX00_SMBUS,
1315 NULL);
1316 if (p_smbus) {
1317 if (p_smbus->revision < 0x30)
1318 gcap &= ~ICH6_GCAP_64OK;
1319 pci_dev_put(p_smbus);
1320 }
1321 }
1322
1323 /* disable 64bit DMA address on some devices */
1324 if (chip->driver_caps & AZX_DCAPS_NO_64BIT) {
1325 dev_dbg(card->dev, "Disabling 64bit DMA\n");
1326 gcap &= ~ICH6_GCAP_64OK;
1327 }
1328
1329 /* disable buffer size rounding to 128-byte multiples if supported */
1330 if (align_buffer_size >= 0)
1331 chip->align_buffer_size = !!align_buffer_size;
1332 else {
1333 if (chip->driver_caps & AZX_DCAPS_BUFSIZE)
1334 chip->align_buffer_size = 0;
1335 else if (chip->driver_caps & AZX_DCAPS_ALIGN_BUFSIZE)
1336 chip->align_buffer_size = 1;
1337 else
1338 chip->align_buffer_size = 1;
1339 }
1340
1341 /* allow 64bit DMA address if supported by H/W */
1342 if ((gcap & ICH6_GCAP_64OK) && !pci_set_dma_mask(pci, DMA_BIT_MASK(64)))
1343 pci_set_consistent_dma_mask(pci, DMA_BIT_MASK(64));
1344 else {
1345 pci_set_dma_mask(pci, DMA_BIT_MASK(32));
1346 pci_set_consistent_dma_mask(pci, DMA_BIT_MASK(32));
1347 }
1348
1349 /* read number of streams from GCAP register instead of using
1350 * hardcoded value
1351 */
1352 chip->capture_streams = (gcap >> 8) & 0x0f;
1353 chip->playback_streams = (gcap >> 12) & 0x0f;
1354 if (!chip->playback_streams && !chip->capture_streams) {
1355 /* gcap didn't give any info, switching to old method */
1356
1357 switch (chip->driver_type) {
1358 case AZX_DRIVER_ULI:
1359 chip->playback_streams = ULI_NUM_PLAYBACK;
1360 chip->capture_streams = ULI_NUM_CAPTURE;
1361 break;
1362 case AZX_DRIVER_ATIHDMI:
1363 case AZX_DRIVER_ATIHDMI_NS:
1364 chip->playback_streams = ATIHDMI_NUM_PLAYBACK;
1365 chip->capture_streams = ATIHDMI_NUM_CAPTURE;
1366 break;
1367 case AZX_DRIVER_GENERIC:
1368 default:
1369 chip->playback_streams = ICH6_NUM_PLAYBACK;
1370 chip->capture_streams = ICH6_NUM_CAPTURE;
1371 break;
1372 }
1373 }
1374 chip->capture_index_offset = 0;
1375 chip->playback_index_offset = chip->capture_streams;
1376 chip->num_streams = chip->playback_streams + chip->capture_streams;
1377 chip->azx_dev = kcalloc(chip->num_streams, sizeof(*chip->azx_dev),
1378 GFP_KERNEL);
1379 if (!chip->azx_dev) {
1380 dev_err(card->dev, "cannot malloc azx_dev\n");
1381 return -ENOMEM;
1382 }
1383
1384 err = azx_alloc_stream_pages(chip);
1385 if (err < 0)
1386 return err;
1387
1388 /* initialize streams */
1389 azx_init_stream(chip);
1390
1391 /* initialize chip */
1392 azx_init_pci(chip);
1393
1394 if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL)
1395 haswell_set_bclk(chip);
1396
1397 azx_init_chip(chip, (probe_only[dev] & 2) == 0);
1398
1399 /* codec detection */
1400 if (!chip->codec_mask) {
1401 dev_err(card->dev, "no codecs found!\n");
1402 return -ENODEV;
1403 }
1404
1405 strcpy(card->driver, "HDA-Intel");
1406 strlcpy(card->shortname, driver_short_names[chip->driver_type],
1407 sizeof(card->shortname));
1408 snprintf(card->longname, sizeof(card->longname),
1409 "%s at 0x%lx irq %i",
1410 card->shortname, chip->addr, chip->irq);
1411
1412 return 0;
1413 }
1414
1415 static void power_down_all_codecs(struct azx *chip)
1416 {
1417 #ifdef CONFIG_PM
1418 /* The codecs were powered up in snd_hda_codec_new().
1419 * Now all initialization done, so turn them down if possible
1420 */
1421 struct hda_codec *codec;
1422 list_for_each_entry(codec, &chip->bus->codec_list, list) {
1423 snd_hda_power_down(codec);
1424 }
1425 #endif
1426 }
1427
1428 #ifdef CONFIG_SND_HDA_PATCH_LOADER
1429 /* callback from request_firmware_nowait() */
1430 static void azx_firmware_cb(const struct firmware *fw, void *context)
1431 {
1432 struct snd_card *card = context;
1433 struct azx *chip = card->private_data;
1434 struct pci_dev *pci = chip->pci;
1435
1436 if (!fw) {
1437 dev_err(card->dev, "Cannot load firmware, aborting\n");
1438 goto error;
1439 }
1440
1441 chip->fw = fw;
1442 if (!chip->disabled) {
1443 /* continue probing */
1444 if (azx_probe_continue(chip))
1445 goto error;
1446 }
1447 return; /* OK */
1448
1449 error:
1450 snd_card_free(card);
1451 pci_set_drvdata(pci, NULL);
1452 }
1453 #endif
1454
1455 /*
1456 * HDA controller ops.
1457 */
1458
1459 /* PCI register access. */
1460 static void pci_azx_writel(u32 value, u32 __iomem *addr)
1461 {
1462 writel(value, addr);
1463 }
1464
1465 static u32 pci_azx_readl(u32 __iomem *addr)
1466 {
1467 return readl(addr);
1468 }
1469
1470 static void pci_azx_writew(u16 value, u16 __iomem *addr)
1471 {
1472 writew(value, addr);
1473 }
1474
1475 static u16 pci_azx_readw(u16 __iomem *addr)
1476 {
1477 return readw(addr);
1478 }
1479
1480 static void pci_azx_writeb(u8 value, u8 __iomem *addr)
1481 {
1482 writeb(value, addr);
1483 }
1484
1485 static u8 pci_azx_readb(u8 __iomem *addr)
1486 {
1487 return readb(addr);
1488 }
1489
1490 static int disable_msi_reset_irq(struct azx *chip)
1491 {
1492 int err;
1493
1494 free_irq(chip->irq, chip);
1495 chip->irq = -1;
1496 pci_disable_msi(chip->pci);
1497 chip->msi = 0;
1498 err = azx_acquire_irq(chip, 1);
1499 if (err < 0)
1500 return err;
1501
1502 return 0;
1503 }
1504
1505 /* DMA page allocation helpers. */
1506 static int dma_alloc_pages(struct azx *chip,
1507 int type,
1508 size_t size,
1509 struct snd_dma_buffer *buf)
1510 {
1511 int err;
1512
1513 err = snd_dma_alloc_pages(type,
1514 chip->card->dev,
1515 size, buf);
1516 if (err < 0)
1517 return err;
1518 mark_pages_wc(chip, buf, true);
1519 return 0;
1520 }
1521
1522 static void dma_free_pages(struct azx *chip, struct snd_dma_buffer *buf)
1523 {
1524 mark_pages_wc(chip, buf, false);
1525 snd_dma_free_pages(buf);
1526 }
1527
1528 static int substream_alloc_pages(struct azx *chip,
1529 struct snd_pcm_substream *substream,
1530 size_t size)
1531 {
1532 struct azx_dev *azx_dev = get_azx_dev(substream);
1533 int ret;
1534
1535 mark_runtime_wc(chip, azx_dev, substream, false);
1536 azx_dev->bufsize = 0;
1537 azx_dev->period_bytes = 0;
1538 azx_dev->format_val = 0;
1539 ret = snd_pcm_lib_malloc_pages(substream, size);
1540 if (ret < 0)
1541 return ret;
1542 mark_runtime_wc(chip, azx_dev, substream, true);
1543 return 0;
1544 }
1545
1546 static int substream_free_pages(struct azx *chip,
1547 struct snd_pcm_substream *substream)
1548 {
1549 struct azx_dev *azx_dev = get_azx_dev(substream);
1550 mark_runtime_wc(chip, azx_dev, substream, false);
1551 return snd_pcm_lib_free_pages(substream);
1552 }
1553
1554 static void pcm_mmap_prepare(struct snd_pcm_substream *substream,
1555 struct vm_area_struct *area)
1556 {
1557 #ifdef CONFIG_X86
1558 struct azx_pcm *apcm = snd_pcm_substream_chip(substream);
1559 struct azx *chip = apcm->chip;
1560 if (!azx_snoop(chip))
1561 area->vm_page_prot = pgprot_writecombine(area->vm_page_prot);
1562 #endif
1563 }
1564
1565 static const struct hda_controller_ops pci_hda_ops = {
1566 .reg_writel = pci_azx_writel,
1567 .reg_readl = pci_azx_readl,
1568 .reg_writew = pci_azx_writew,
1569 .reg_readw = pci_azx_readw,
1570 .reg_writeb = pci_azx_writeb,
1571 .reg_readb = pci_azx_readb,
1572 .disable_msi_reset_irq = disable_msi_reset_irq,
1573 .dma_alloc_pages = dma_alloc_pages,
1574 .dma_free_pages = dma_free_pages,
1575 .substream_alloc_pages = substream_alloc_pages,
1576 .substream_free_pages = substream_free_pages,
1577 .pcm_mmap_prepare = pcm_mmap_prepare,
1578 .position_check = azx_position_check,
1579 };
1580
1581 static int azx_probe(struct pci_dev *pci,
1582 const struct pci_device_id *pci_id)
1583 {
1584 static int dev;
1585 struct snd_card *card;
1586 struct azx *chip;
1587 bool schedule_probe;
1588 int err;
1589
1590 if (dev >= SNDRV_CARDS)
1591 return -ENODEV;
1592 if (!enable[dev]) {
1593 dev++;
1594 return -ENOENT;
1595 }
1596
1597 err = snd_card_new(&pci->dev, index[dev], id[dev], THIS_MODULE,
1598 0, &card);
1599 if (err < 0) {
1600 dev_err(&pci->dev, "Error creating card!\n");
1601 return err;
1602 }
1603
1604 err = azx_create(card, pci, dev, pci_id->driver_data,
1605 &pci_hda_ops, &chip);
1606 if (err < 0)
1607 goto out_free;
1608 card->private_data = chip;
1609
1610 pci_set_drvdata(pci, card);
1611
1612 err = register_vga_switcheroo(chip);
1613 if (err < 0) {
1614 dev_err(card->dev, "Error registering VGA-switcheroo client\n");
1615 goto out_free;
1616 }
1617
1618 if (check_hdmi_disabled(pci)) {
1619 dev_info(card->dev, "VGA controller is disabled\n");
1620 dev_info(card->dev, "Delaying initialization\n");
1621 chip->disabled = true;
1622 }
1623
1624 schedule_probe = !chip->disabled;
1625
1626 #ifdef CONFIG_SND_HDA_PATCH_LOADER
1627 if (patch[dev] && *patch[dev]) {
1628 dev_info(card->dev, "Applying patch firmware '%s'\n",
1629 patch[dev]);
1630 err = request_firmware_nowait(THIS_MODULE, true, patch[dev],
1631 &pci->dev, GFP_KERNEL, card,
1632 azx_firmware_cb);
1633 if (err < 0)
1634 goto out_free;
1635 schedule_probe = false; /* continued in azx_firmware_cb() */
1636 }
1637 #endif /* CONFIG_SND_HDA_PATCH_LOADER */
1638
1639 #ifndef CONFIG_SND_HDA_I915
1640 if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL)
1641 dev_err(card->dev, "Haswell must build in CONFIG_SND_HDA_I915\n");
1642 #endif
1643
1644 if (schedule_probe)
1645 schedule_work(&chip->probe_work);
1646
1647 dev++;
1648 if (chip->disabled)
1649 complete_all(&chip->probe_wait);
1650 return 0;
1651
1652 out_free:
1653 snd_card_free(card);
1654 return err;
1655 }
1656
1657 /* number of codec slots for each chipset: 0 = default slots (i.e. 4) */
1658 static unsigned int azx_max_codecs[AZX_NUM_DRIVERS] = {
1659 [AZX_DRIVER_NVIDIA] = 8,
1660 [AZX_DRIVER_TERA] = 1,
1661 };
1662
1663 static int azx_probe_continue(struct azx *chip)
1664 {
1665 struct pci_dev *pci = chip->pci;
1666 int dev = chip->dev_index;
1667 int err;
1668
1669 /* Request power well for Haswell HDA controller and codec */
1670 if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL) {
1671 #ifdef CONFIG_SND_HDA_I915
1672 err = hda_i915_init();
1673 if (err < 0) {
1674 dev_err(chip->card->dev,
1675 "Error request power-well from i915\n");
1676 goto out_free;
1677 }
1678 err = hda_display_power(true);
1679 if (err < 0) {
1680 dev_err(chip->card->dev,
1681 "Cannot turn on display power on i915\n");
1682 goto out_free;
1683 }
1684 #endif
1685 }
1686
1687 err = azx_first_init(chip);
1688 if (err < 0)
1689 goto out_free;
1690
1691 #ifdef CONFIG_SND_HDA_INPUT_BEEP
1692 chip->beep_mode = beep_mode[dev];
1693 #endif
1694
1695 /* create codec instances */
1696 err = azx_codec_create(chip, model[dev],
1697 azx_max_codecs[chip->driver_type],
1698 power_save_addr);
1699
1700 if (err < 0)
1701 goto out_free;
1702 #ifdef CONFIG_SND_HDA_PATCH_LOADER
1703 if (chip->fw) {
1704 err = snd_hda_load_patch(chip->bus, chip->fw->size,
1705 chip->fw->data);
1706 if (err < 0)
1707 goto out_free;
1708 #ifndef CONFIG_PM
1709 release_firmware(chip->fw); /* no longer needed */
1710 chip->fw = NULL;
1711 #endif
1712 }
1713 #endif
1714 if ((probe_only[dev] & 1) == 0) {
1715 err = azx_codec_configure(chip);
1716 if (err < 0)
1717 goto out_free;
1718 }
1719
1720 /* create PCM streams */
1721 err = snd_hda_build_pcms(chip->bus);
1722 if (err < 0)
1723 goto out_free;
1724
1725 /* create mixer controls */
1726 err = azx_mixer_create(chip);
1727 if (err < 0)
1728 goto out_free;
1729
1730 err = snd_card_register(chip->card);
1731 if (err < 0)
1732 goto out_free;
1733
1734 chip->running = 1;
1735 power_down_all_codecs(chip);
1736 azx_notifier_register(chip);
1737 azx_add_card_list(chip);
1738 if ((chip->driver_caps & AZX_DCAPS_PM_RUNTIME) || chip->use_vga_switcheroo)
1739 pm_runtime_put_noidle(&pci->dev);
1740
1741 out_free:
1742 if (err < 0)
1743 chip->init_failed = 1;
1744 complete_all(&chip->probe_wait);
1745 return err;
1746 }
1747
1748 static void azx_remove(struct pci_dev *pci)
1749 {
1750 struct snd_card *card = pci_get_drvdata(pci);
1751
1752 if (card)
1753 snd_card_free(card);
1754 }
1755
1756 /* PCI IDs */
1757 static const struct pci_device_id azx_ids[] = {
1758 /* CPT */
1759 { PCI_DEVICE(0x8086, 0x1c20),
1760 .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH_NOPM },
1761 /* PBG */
1762 { PCI_DEVICE(0x8086, 0x1d20),
1763 .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH_NOPM },
1764 /* Panther Point */
1765 { PCI_DEVICE(0x8086, 0x1e20),
1766 .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
1767 /* Lynx Point */
1768 { PCI_DEVICE(0x8086, 0x8c20),
1769 .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
1770 /* 9 Series */
1771 { PCI_DEVICE(0x8086, 0x8ca0),
1772 .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
1773 /* Wellsburg */
1774 { PCI_DEVICE(0x8086, 0x8d20),
1775 .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
1776 { PCI_DEVICE(0x8086, 0x8d21),
1777 .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
1778 /* Lynx Point-LP */
1779 { PCI_DEVICE(0x8086, 0x9c20),
1780 .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
1781 /* Lynx Point-LP */
1782 { PCI_DEVICE(0x8086, 0x9c21),
1783 .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
1784 /* Wildcat Point-LP */
1785 { PCI_DEVICE(0x8086, 0x9ca0),
1786 .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
1787 /* Haswell */
1788 { PCI_DEVICE(0x8086, 0x0a0c),
1789 .driver_data = AZX_DRIVER_HDMI | AZX_DCAPS_INTEL_HASWELL },
1790 { PCI_DEVICE(0x8086, 0x0c0c),
1791 .driver_data = AZX_DRIVER_HDMI | AZX_DCAPS_INTEL_HASWELL },
1792 { PCI_DEVICE(0x8086, 0x0d0c),
1793 .driver_data = AZX_DRIVER_HDMI | AZX_DCAPS_INTEL_HASWELL },
1794 /* Broadwell */
1795 { PCI_DEVICE(0x8086, 0x160c),
1796 .driver_data = AZX_DRIVER_HDMI | AZX_DCAPS_INTEL_BROADWELL },
1797 /* 5 Series/3400 */
1798 { PCI_DEVICE(0x8086, 0x3b56),
1799 .driver_data = AZX_DRIVER_SCH | AZX_DCAPS_INTEL_PCH_NOPM },
1800 /* Poulsbo */
1801 { PCI_DEVICE(0x8086, 0x811b),
1802 .driver_data = AZX_DRIVER_SCH | AZX_DCAPS_INTEL_PCH_NOPM },
1803 /* Oaktrail */
1804 { PCI_DEVICE(0x8086, 0x080a),
1805 .driver_data = AZX_DRIVER_SCH | AZX_DCAPS_INTEL_PCH_NOPM },
1806 /* BayTrail */
1807 { PCI_DEVICE(0x8086, 0x0f04),
1808 .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH_NOPM },
1809 /* ICH */
1810 { PCI_DEVICE(0x8086, 0x2668),
1811 .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_OLD_SSYNC |
1812 AZX_DCAPS_BUFSIZE }, /* ICH6 */
1813 { PCI_DEVICE(0x8086, 0x27d8),
1814 .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_OLD_SSYNC |
1815 AZX_DCAPS_BUFSIZE }, /* ICH7 */
1816 { PCI_DEVICE(0x8086, 0x269a),
1817 .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_OLD_SSYNC |
1818 AZX_DCAPS_BUFSIZE }, /* ESB2 */
1819 { PCI_DEVICE(0x8086, 0x284b),
1820 .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_OLD_SSYNC |
1821 AZX_DCAPS_BUFSIZE }, /* ICH8 */
1822 { PCI_DEVICE(0x8086, 0x293e),
1823 .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_OLD_SSYNC |
1824 AZX_DCAPS_BUFSIZE }, /* ICH9 */
1825 { PCI_DEVICE(0x8086, 0x293f),
1826 .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_OLD_SSYNC |
1827 AZX_DCAPS_BUFSIZE }, /* ICH9 */
1828 { PCI_DEVICE(0x8086, 0x3a3e),
1829 .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_OLD_SSYNC |
1830 AZX_DCAPS_BUFSIZE }, /* ICH10 */
1831 { PCI_DEVICE(0x8086, 0x3a6e),
1832 .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_OLD_SSYNC |
1833 AZX_DCAPS_BUFSIZE }, /* ICH10 */
1834 /* Generic Intel */
1835 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_ANY_ID),
1836 .class = PCI_CLASS_MULTIMEDIA_HD_AUDIO << 8,
1837 .class_mask = 0xffffff,
1838 .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_BUFSIZE },
1839 /* ATI SB 450/600/700/800/900 */
1840 { PCI_DEVICE(0x1002, 0x437b),
1841 .driver_data = AZX_DRIVER_ATI | AZX_DCAPS_PRESET_ATI_SB },
1842 { PCI_DEVICE(0x1002, 0x4383),
1843 .driver_data = AZX_DRIVER_ATI | AZX_DCAPS_PRESET_ATI_SB },
1844 /* AMD Hudson */
1845 { PCI_DEVICE(0x1022, 0x780d),
1846 .driver_data = AZX_DRIVER_GENERIC | AZX_DCAPS_PRESET_ATI_SB },
1847 /* ATI HDMI */
1848 { PCI_DEVICE(0x1002, 0x793b),
1849 .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
1850 { PCI_DEVICE(0x1002, 0x7919),
1851 .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
1852 { PCI_DEVICE(0x1002, 0x960f),
1853 .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
1854 { PCI_DEVICE(0x1002, 0x970f),
1855 .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
1856 { PCI_DEVICE(0x1002, 0xaa00),
1857 .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
1858 { PCI_DEVICE(0x1002, 0xaa08),
1859 .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
1860 { PCI_DEVICE(0x1002, 0xaa10),
1861 .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
1862 { PCI_DEVICE(0x1002, 0xaa18),
1863 .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
1864 { PCI_DEVICE(0x1002, 0xaa20),
1865 .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
1866 { PCI_DEVICE(0x1002, 0xaa28),
1867 .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
1868 { PCI_DEVICE(0x1002, 0xaa30),
1869 .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
1870 { PCI_DEVICE(0x1002, 0xaa38),
1871 .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
1872 { PCI_DEVICE(0x1002, 0xaa40),
1873 .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
1874 { PCI_DEVICE(0x1002, 0xaa48),
1875 .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
1876 { PCI_DEVICE(0x1002, 0xaa50),
1877 .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
1878 { PCI_DEVICE(0x1002, 0xaa58),
1879 .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
1880 { PCI_DEVICE(0x1002, 0xaa60),
1881 .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
1882 { PCI_DEVICE(0x1002, 0xaa68),
1883 .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
1884 { PCI_DEVICE(0x1002, 0xaa80),
1885 .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
1886 { PCI_DEVICE(0x1002, 0xaa88),
1887 .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
1888 { PCI_DEVICE(0x1002, 0xaa90),
1889 .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
1890 { PCI_DEVICE(0x1002, 0xaa98),
1891 .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
1892 { PCI_DEVICE(0x1002, 0x9902),
1893 .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI },
1894 { PCI_DEVICE(0x1002, 0xaaa0),
1895 .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI },
1896 { PCI_DEVICE(0x1002, 0xaaa8),
1897 .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI },
1898 { PCI_DEVICE(0x1002, 0xaab0),
1899 .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI },
1900 /* VIA VT8251/VT8237A */
1901 { PCI_DEVICE(0x1106, 0x3288),
1902 .driver_data = AZX_DRIVER_VIA | AZX_DCAPS_POSFIX_VIA },
1903 /* VIA GFX VT7122/VX900 */
1904 { PCI_DEVICE(0x1106, 0x9170), .driver_data = AZX_DRIVER_GENERIC },
1905 /* VIA GFX VT6122/VX11 */
1906 { PCI_DEVICE(0x1106, 0x9140), .driver_data = AZX_DRIVER_GENERIC },
1907 /* SIS966 */
1908 { PCI_DEVICE(0x1039, 0x7502), .driver_data = AZX_DRIVER_SIS },
1909 /* ULI M5461 */
1910 { PCI_DEVICE(0x10b9, 0x5461), .driver_data = AZX_DRIVER_ULI },
1911 /* NVIDIA MCP */
1912 { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID),
1913 .class = PCI_CLASS_MULTIMEDIA_HD_AUDIO << 8,
1914 .class_mask = 0xffffff,
1915 .driver_data = AZX_DRIVER_NVIDIA | AZX_DCAPS_PRESET_NVIDIA },
1916 /* Teradici */
1917 { PCI_DEVICE(0x6549, 0x1200),
1918 .driver_data = AZX_DRIVER_TERA | AZX_DCAPS_NO_64BIT },
1919 { PCI_DEVICE(0x6549, 0x2200),
1920 .driver_data = AZX_DRIVER_TERA | AZX_DCAPS_NO_64BIT },
1921 /* Creative X-Fi (CA0110-IBG) */
1922 /* CTHDA chips */
1923 { PCI_DEVICE(0x1102, 0x0010),
1924 .driver_data = AZX_DRIVER_CTHDA | AZX_DCAPS_PRESET_CTHDA },
1925 { PCI_DEVICE(0x1102, 0x0012),
1926 .driver_data = AZX_DRIVER_CTHDA | AZX_DCAPS_PRESET_CTHDA },
1927 #if !IS_ENABLED(CONFIG_SND_CTXFI)
1928 /* the following entry conflicts with snd-ctxfi driver,
1929 * as ctxfi driver mutates from HD-audio to native mode with
1930 * a special command sequence.
1931 */
1932 { PCI_DEVICE(PCI_VENDOR_ID_CREATIVE, PCI_ANY_ID),
1933 .class = PCI_CLASS_MULTIMEDIA_HD_AUDIO << 8,
1934 .class_mask = 0xffffff,
1935 .driver_data = AZX_DRIVER_CTX | AZX_DCAPS_CTX_WORKAROUND |
1936 AZX_DCAPS_RIRB_PRE_DELAY | AZX_DCAPS_POSFIX_LPIB },
1937 #else
1938 /* this entry seems still valid -- i.e. without emu20kx chip */
1939 { PCI_DEVICE(0x1102, 0x0009),
1940 .driver_data = AZX_DRIVER_CTX | AZX_DCAPS_CTX_WORKAROUND |
1941 AZX_DCAPS_RIRB_PRE_DELAY | AZX_DCAPS_POSFIX_LPIB },
1942 #endif
1943 /* Vortex86MX */
1944 { PCI_DEVICE(0x17f3, 0x3010), .driver_data = AZX_DRIVER_GENERIC },
1945 /* VMware HDAudio */
1946 { PCI_DEVICE(0x15ad, 0x1977), .driver_data = AZX_DRIVER_GENERIC },
1947 /* AMD/ATI Generic, PCI class code and Vendor ID for HD Audio */
1948 { PCI_DEVICE(PCI_VENDOR_ID_ATI, PCI_ANY_ID),
1949 .class = PCI_CLASS_MULTIMEDIA_HD_AUDIO << 8,
1950 .class_mask = 0xffffff,
1951 .driver_data = AZX_DRIVER_GENERIC | AZX_DCAPS_PRESET_ATI_HDMI },
1952 { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_ANY_ID),
1953 .class = PCI_CLASS_MULTIMEDIA_HD_AUDIO << 8,
1954 .class_mask = 0xffffff,
1955 .driver_data = AZX_DRIVER_GENERIC | AZX_DCAPS_PRESET_ATI_HDMI },
1956 { 0, }
1957 };
1958 MODULE_DEVICE_TABLE(pci, azx_ids);
1959
1960 /* pci_driver definition */
1961 static struct pci_driver azx_driver = {
1962 .name = KBUILD_MODNAME,
1963 .id_table = azx_ids,
1964 .probe = azx_probe,
1965 .remove = azx_remove,
1966 .driver = {
1967 .pm = AZX_PM_OPS,
1968 },
1969 };
1970
1971 module_pci_driver(azx_driver);
Linux kernel - Deliverables
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