3 * patch_hdmi.c - routines for HDMI/DisplayPort codecs
5 * Copyright(c) 2008-2010 Intel Corporation. All rights reserved.
6 * Copyright (c) 2006 ATI Technologies Inc.
7 * Copyright (c) 2008 NVIDIA Corp. All rights reserved.
8 * Copyright (c) 2008 Wei Ni <wni@nvidia.com>
11 * Wu Fengguang <wfg@linux.intel.com>
14 * Wu Fengguang <wfg@linux.intel.com>
16 * This program is free software; you can redistribute it and/or modify it
17 * under the terms of the GNU General Public License as published by the Free
18 * Software Foundation; either version 2 of the License, or (at your option)
21 * This program is distributed in the hope that it will be useful, but
22 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
23 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
26 * You should have received a copy of the GNU General Public License
27 * along with this program; if not, write to the Free Software Foundation,
28 * Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
31 #include <linux/init.h>
32 #include <linux/delay.h>
33 #include <linux/slab.h>
34 #include <linux/module.h>
35 #include <sound/core.h>
36 #include <sound/jack.h>
37 #include <sound/asoundef.h>
38 #include <sound/tlv.h>
39 #include "hda_codec.h"
40 #include "hda_local.h"
43 static bool static_hdmi_pcm
;
44 module_param(static_hdmi_pcm
, bool, 0644);
45 MODULE_PARM_DESC(static_hdmi_pcm
, "Don't restrict PCM parameters per ELD info");
47 struct hdmi_spec_per_cvt
{
50 unsigned int channels_min
;
51 unsigned int channels_max
;
57 /* max. connections to a widget */
58 #define HDA_MAX_CONNECTIONS 32
60 struct hdmi_spec_per_pin
{
63 hda_nid_t mux_nids
[HDA_MAX_CONNECTIONS
];
65 struct hda_codec
*codec
;
66 struct hdmi_eld sink_eld
;
67 struct delayed_work work
;
68 struct snd_kcontrol
*eld_ctl
;
71 bool chmap_set
; /* channel-map override by ALSA API? */
72 unsigned char chmap
[8]; /* ALSA API channel-map */
73 char pcm_name
[8]; /* filled in build_pcm callbacks */
78 struct snd_array cvts
; /* struct hdmi_spec_per_cvt */
79 hda_nid_t cvt_nids
[4]; /* only for haswell fix */
82 struct snd_array pins
; /* struct hdmi_spec_per_pin */
83 struct snd_array pcm_rec
; /* struct hda_pcm */
84 unsigned int channels_max
; /* max over all cvts */
86 struct hdmi_eld temp_eld
;
88 * Non-generic ATI/NVIDIA specific
90 struct hda_multi_out multiout
;
91 struct hda_pcm_stream pcm_playback
;
95 struct hdmi_audio_infoframe
{
102 u8 CC02_CT47
; /* CC in bits 0:2, CT in 4:7 */
106 u8 LFEPBL01_LSV36_DM_INH7
;
109 struct dp_audio_infoframe
{
112 u8 ver
; /* 0x11 << 2 */
114 u8 CC02_CT47
; /* match with HDMI infoframe from this on */
118 u8 LFEPBL01_LSV36_DM_INH7
;
121 union audio_infoframe
{
122 struct hdmi_audio_infoframe hdmi
;
123 struct dp_audio_infoframe dp
;
128 * CEA speaker placement:
131 * FLW FL FLC FC FRC FR FRW
138 * The Left/Right Surround channel _notions_ LS/RS in SMPTE 320M corresponds to
139 * CEA RL/RR; The SMPTE channel _assignment_ C/LFE is swapped to CEA LFE/FC.
141 enum cea_speaker_placement
{
142 FL
= (1 << 0), /* Front Left */
143 FC
= (1 << 1), /* Front Center */
144 FR
= (1 << 2), /* Front Right */
145 FLC
= (1 << 3), /* Front Left Center */
146 FRC
= (1 << 4), /* Front Right Center */
147 RL
= (1 << 5), /* Rear Left */
148 RC
= (1 << 6), /* Rear Center */
149 RR
= (1 << 7), /* Rear Right */
150 RLC
= (1 << 8), /* Rear Left Center */
151 RRC
= (1 << 9), /* Rear Right Center */
152 LFE
= (1 << 10), /* Low Frequency Effect */
153 FLW
= (1 << 11), /* Front Left Wide */
154 FRW
= (1 << 12), /* Front Right Wide */
155 FLH
= (1 << 13), /* Front Left High */
156 FCH
= (1 << 14), /* Front Center High */
157 FRH
= (1 << 15), /* Front Right High */
158 TC
= (1 << 16), /* Top Center */
162 * ELD SA bits in the CEA Speaker Allocation data block
164 static int eld_speaker_allocation_bits
[] = {
172 /* the following are not defined in ELD yet */
179 struct cea_channel_speaker_allocation
{
183 /* derived values, just for convenience */
191 * surround40 surround41 surround50 surround51 surround71
192 * ch0 front left = = = =
193 * ch1 front right = = = =
194 * ch2 rear left = = = =
195 * ch3 rear right = = = =
196 * ch4 LFE center center center
201 * surround71 = {FL, FR, RLC, RRC, FC, LFE, RL, RR}
203 static int hdmi_channel_mapping
[0x32][8] = {
205 [0x00] = { 0x00, 0x11, 0xf2, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 },
207 [0x01] = { 0x00, 0x11, 0x22, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 },
209 [0x02] = { 0x00, 0x11, 0x23, 0xf2, 0xf4, 0xf5, 0xf6, 0xf7 },
211 [0x08] = { 0x00, 0x11, 0x24, 0x35, 0xf3, 0xf2, 0xf6, 0xf7 },
213 [0x03] = { 0x00, 0x11, 0x23, 0x32, 0x44, 0xf5, 0xf6, 0xf7 },
215 [0x09] = { 0x00, 0x11, 0x24, 0x35, 0x42, 0xf3, 0xf6, 0xf7 },
217 [0x0a] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0xf2, 0xf6, 0xf7 },
219 [0x0b] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0x52, 0xf6, 0xf7 },
221 [0x13] = { 0x00, 0x11, 0x26, 0x37, 0x43, 0x52, 0x64, 0x75 },
225 * This is an ordered list!
227 * The preceding ones have better chances to be selected by
228 * hdmi_channel_allocation().
230 static struct cea_channel_speaker_allocation channel_allocations
[] = {
231 /* channel: 7 6 5 4 3 2 1 0 */
232 { .ca_index
= 0x00, .speakers
= { 0, 0, 0, 0, 0, 0, FR
, FL
} },
234 { .ca_index
= 0x01, .speakers
= { 0, 0, 0, 0, 0, LFE
, FR
, FL
} },
236 { .ca_index
= 0x02, .speakers
= { 0, 0, 0, 0, FC
, 0, FR
, FL
} },
238 { .ca_index
= 0x08, .speakers
= { 0, 0, RR
, RL
, 0, 0, FR
, FL
} },
240 { .ca_index
= 0x09, .speakers
= { 0, 0, RR
, RL
, 0, LFE
, FR
, FL
} },
242 { .ca_index
= 0x0a, .speakers
= { 0, 0, RR
, RL
, FC
, 0, FR
, FL
} },
244 { .ca_index
= 0x0b, .speakers
= { 0, 0, RR
, RL
, FC
, LFE
, FR
, FL
} },
246 { .ca_index
= 0x0f, .speakers
= { 0, RC
, RR
, RL
, FC
, LFE
, FR
, FL
} },
248 { .ca_index
= 0x13, .speakers
= { RRC
, RLC
, RR
, RL
, FC
, LFE
, FR
, FL
} },
250 { .ca_index
= 0x03, .speakers
= { 0, 0, 0, 0, FC
, LFE
, FR
, FL
} },
251 { .ca_index
= 0x04, .speakers
= { 0, 0, 0, RC
, 0, 0, FR
, FL
} },
252 { .ca_index
= 0x05, .speakers
= { 0, 0, 0, RC
, 0, LFE
, FR
, FL
} },
253 { .ca_index
= 0x06, .speakers
= { 0, 0, 0, RC
, FC
, 0, FR
, FL
} },
254 { .ca_index
= 0x07, .speakers
= { 0, 0, 0, RC
, FC
, LFE
, FR
, FL
} },
255 { .ca_index
= 0x0c, .speakers
= { 0, RC
, RR
, RL
, 0, 0, FR
, FL
} },
256 { .ca_index
= 0x0d, .speakers
= { 0, RC
, RR
, RL
, 0, LFE
, FR
, FL
} },
257 { .ca_index
= 0x0e, .speakers
= { 0, RC
, RR
, RL
, FC
, 0, FR
, FL
} },
258 { .ca_index
= 0x10, .speakers
= { RRC
, RLC
, RR
, RL
, 0, 0, FR
, FL
} },
259 { .ca_index
= 0x11, .speakers
= { RRC
, RLC
, RR
, RL
, 0, LFE
, FR
, FL
} },
260 { .ca_index
= 0x12, .speakers
= { RRC
, RLC
, RR
, RL
, FC
, 0, FR
, FL
} },
261 { .ca_index
= 0x14, .speakers
= { FRC
, FLC
, 0, 0, 0, 0, FR
, FL
} },
262 { .ca_index
= 0x15, .speakers
= { FRC
, FLC
, 0, 0, 0, LFE
, FR
, FL
} },
263 { .ca_index
= 0x16, .speakers
= { FRC
, FLC
, 0, 0, FC
, 0, FR
, FL
} },
264 { .ca_index
= 0x17, .speakers
= { FRC
, FLC
, 0, 0, FC
, LFE
, FR
, FL
} },
265 { .ca_index
= 0x18, .speakers
= { FRC
, FLC
, 0, RC
, 0, 0, FR
, FL
} },
266 { .ca_index
= 0x19, .speakers
= { FRC
, FLC
, 0, RC
, 0, LFE
, FR
, FL
} },
267 { .ca_index
= 0x1a, .speakers
= { FRC
, FLC
, 0, RC
, FC
, 0, FR
, FL
} },
268 { .ca_index
= 0x1b, .speakers
= { FRC
, FLC
, 0, RC
, FC
, LFE
, FR
, FL
} },
269 { .ca_index
= 0x1c, .speakers
= { FRC
, FLC
, RR
, RL
, 0, 0, FR
, FL
} },
270 { .ca_index
= 0x1d, .speakers
= { FRC
, FLC
, RR
, RL
, 0, LFE
, FR
, FL
} },
271 { .ca_index
= 0x1e, .speakers
= { FRC
, FLC
, RR
, RL
, FC
, 0, FR
, FL
} },
272 { .ca_index
= 0x1f, .speakers
= { FRC
, FLC
, RR
, RL
, FC
, LFE
, FR
, FL
} },
273 { .ca_index
= 0x20, .speakers
= { 0, FCH
, RR
, RL
, FC
, 0, FR
, FL
} },
274 { .ca_index
= 0x21, .speakers
= { 0, FCH
, RR
, RL
, FC
, LFE
, FR
, FL
} },
275 { .ca_index
= 0x22, .speakers
= { TC
, 0, RR
, RL
, FC
, 0, FR
, FL
} },
276 { .ca_index
= 0x23, .speakers
= { TC
, 0, RR
, RL
, FC
, LFE
, FR
, FL
} },
277 { .ca_index
= 0x24, .speakers
= { FRH
, FLH
, RR
, RL
, 0, 0, FR
, FL
} },
278 { .ca_index
= 0x25, .speakers
= { FRH
, FLH
, RR
, RL
, 0, LFE
, FR
, FL
} },
279 { .ca_index
= 0x26, .speakers
= { FRW
, FLW
, RR
, RL
, 0, 0, FR
, FL
} },
280 { .ca_index
= 0x27, .speakers
= { FRW
, FLW
, RR
, RL
, 0, LFE
, FR
, FL
} },
281 { .ca_index
= 0x28, .speakers
= { TC
, RC
, RR
, RL
, FC
, 0, FR
, FL
} },
282 { .ca_index
= 0x29, .speakers
= { TC
, RC
, RR
, RL
, FC
, LFE
, FR
, FL
} },
283 { .ca_index
= 0x2a, .speakers
= { FCH
, RC
, RR
, RL
, FC
, 0, FR
, FL
} },
284 { .ca_index
= 0x2b, .speakers
= { FCH
, RC
, RR
, RL
, FC
, LFE
, FR
, FL
} },
285 { .ca_index
= 0x2c, .speakers
= { TC
, FCH
, RR
, RL
, FC
, 0, FR
, FL
} },
286 { .ca_index
= 0x2d, .speakers
= { TC
, FCH
, RR
, RL
, FC
, LFE
, FR
, FL
} },
287 { .ca_index
= 0x2e, .speakers
= { FRH
, FLH
, RR
, RL
, FC
, 0, FR
, FL
} },
288 { .ca_index
= 0x2f, .speakers
= { FRH
, FLH
, RR
, RL
, FC
, LFE
, FR
, FL
} },
289 { .ca_index
= 0x30, .speakers
= { FRW
, FLW
, RR
, RL
, FC
, 0, FR
, FL
} },
290 { .ca_index
= 0x31, .speakers
= { FRW
, FLW
, RR
, RL
, FC
, LFE
, FR
, FL
} },
298 #define get_pin(spec, idx) \
299 ((struct hdmi_spec_per_pin *)snd_array_elem(&spec->pins, idx))
300 #define get_cvt(spec, idx) \
301 ((struct hdmi_spec_per_cvt *)snd_array_elem(&spec->cvts, idx))
302 #define get_pcm_rec(spec, idx) \
303 ((struct hda_pcm *)snd_array_elem(&spec->pcm_rec, idx))
305 static int pin_nid_to_pin_index(struct hdmi_spec
*spec
, hda_nid_t pin_nid
)
309 for (pin_idx
= 0; pin_idx
< spec
->num_pins
; pin_idx
++)
310 if (get_pin(spec
, pin_idx
)->pin_nid
== pin_nid
)
313 snd_printk(KERN_WARNING
"HDMI: pin nid %d not registered\n", pin_nid
);
317 static int hinfo_to_pin_index(struct hdmi_spec
*spec
,
318 struct hda_pcm_stream
*hinfo
)
322 for (pin_idx
= 0; pin_idx
< spec
->num_pins
; pin_idx
++)
323 if (get_pcm_rec(spec
, pin_idx
)->stream
== hinfo
)
326 snd_printk(KERN_WARNING
"HDMI: hinfo %p not registered\n", hinfo
);
330 static int cvt_nid_to_cvt_index(struct hdmi_spec
*spec
, hda_nid_t cvt_nid
)
334 for (cvt_idx
= 0; cvt_idx
< spec
->num_cvts
; cvt_idx
++)
335 if (get_cvt(spec
, cvt_idx
)->cvt_nid
== cvt_nid
)
338 snd_printk(KERN_WARNING
"HDMI: cvt nid %d not registered\n", cvt_nid
);
342 static int hdmi_eld_ctl_info(struct snd_kcontrol
*kcontrol
,
343 struct snd_ctl_elem_info
*uinfo
)
345 struct hda_codec
*codec
= snd_kcontrol_chip(kcontrol
);
346 struct hdmi_spec
*spec
= codec
->spec
;
347 struct hdmi_eld
*eld
;
350 uinfo
->type
= SNDRV_CTL_ELEM_TYPE_BYTES
;
352 pin_idx
= kcontrol
->private_value
;
353 eld
= &get_pin(spec
, pin_idx
)->sink_eld
;
355 mutex_lock(&eld
->lock
);
356 uinfo
->count
= eld
->eld_valid
? eld
->eld_size
: 0;
357 mutex_unlock(&eld
->lock
);
362 static int hdmi_eld_ctl_get(struct snd_kcontrol
*kcontrol
,
363 struct snd_ctl_elem_value
*ucontrol
)
365 struct hda_codec
*codec
= snd_kcontrol_chip(kcontrol
);
366 struct hdmi_spec
*spec
= codec
->spec
;
367 struct hdmi_eld
*eld
;
370 pin_idx
= kcontrol
->private_value
;
371 eld
= &get_pin(spec
, pin_idx
)->sink_eld
;
373 mutex_lock(&eld
->lock
);
374 if (eld
->eld_size
> ARRAY_SIZE(ucontrol
->value
.bytes
.data
)) {
375 mutex_unlock(&eld
->lock
);
380 memset(ucontrol
->value
.bytes
.data
, 0,
381 ARRAY_SIZE(ucontrol
->value
.bytes
.data
));
383 memcpy(ucontrol
->value
.bytes
.data
, eld
->eld_buffer
,
385 mutex_unlock(&eld
->lock
);
390 static struct snd_kcontrol_new eld_bytes_ctl
= {
391 .access
= SNDRV_CTL_ELEM_ACCESS_READ
| SNDRV_CTL_ELEM_ACCESS_VOLATILE
,
392 .iface
= SNDRV_CTL_ELEM_IFACE_PCM
,
394 .info
= hdmi_eld_ctl_info
,
395 .get
= hdmi_eld_ctl_get
,
398 static int hdmi_create_eld_ctl(struct hda_codec
*codec
, int pin_idx
,
401 struct snd_kcontrol
*kctl
;
402 struct hdmi_spec
*spec
= codec
->spec
;
405 kctl
= snd_ctl_new1(&eld_bytes_ctl
, codec
);
408 kctl
->private_value
= pin_idx
;
409 kctl
->id
.device
= device
;
411 err
= snd_hda_ctl_add(codec
, get_pin(spec
, pin_idx
)->pin_nid
, kctl
);
415 get_pin(spec
, pin_idx
)->eld_ctl
= kctl
;
420 static void hdmi_get_dip_index(struct hda_codec
*codec
, hda_nid_t pin_nid
,
421 int *packet_index
, int *byte_index
)
425 val
= snd_hda_codec_read(codec
, pin_nid
, 0,
426 AC_VERB_GET_HDMI_DIP_INDEX
, 0);
428 *packet_index
= val
>> 5;
429 *byte_index
= val
& 0x1f;
433 static void hdmi_set_dip_index(struct hda_codec
*codec
, hda_nid_t pin_nid
,
434 int packet_index
, int byte_index
)
438 val
= (packet_index
<< 5) | (byte_index
& 0x1f);
440 snd_hda_codec_write(codec
, pin_nid
, 0, AC_VERB_SET_HDMI_DIP_INDEX
, val
);
443 static void hdmi_write_dip_byte(struct hda_codec
*codec
, hda_nid_t pin_nid
,
446 snd_hda_codec_write(codec
, pin_nid
, 0, AC_VERB_SET_HDMI_DIP_DATA
, val
);
449 static void hdmi_init_pin(struct hda_codec
*codec
, hda_nid_t pin_nid
)
452 if (get_wcaps(codec
, pin_nid
) & AC_WCAP_OUT_AMP
)
453 snd_hda_codec_write(codec
, pin_nid
, 0,
454 AC_VERB_SET_AMP_GAIN_MUTE
, AMP_OUT_UNMUTE
);
455 /* Enable pin out: some machines with GM965 gets broken output when
456 * the pin is disabled or changed while using with HDMI
458 snd_hda_codec_write(codec
, pin_nid
, 0,
459 AC_VERB_SET_PIN_WIDGET_CONTROL
, PIN_OUT
);
462 static int hdmi_get_channel_count(struct hda_codec
*codec
, hda_nid_t cvt_nid
)
464 return 1 + snd_hda_codec_read(codec
, cvt_nid
, 0,
465 AC_VERB_GET_CVT_CHAN_COUNT
, 0);
468 static void hdmi_set_channel_count(struct hda_codec
*codec
,
469 hda_nid_t cvt_nid
, int chs
)
471 if (chs
!= hdmi_get_channel_count(codec
, cvt_nid
))
472 snd_hda_codec_write(codec
, cvt_nid
, 0,
473 AC_VERB_SET_CVT_CHAN_COUNT
, chs
- 1);
478 * Channel mapping routines
482 * Compute derived values in channel_allocations[].
484 static void init_channel_allocations(void)
487 struct cea_channel_speaker_allocation
*p
;
489 for (i
= 0; i
< ARRAY_SIZE(channel_allocations
); i
++) {
490 p
= channel_allocations
+ i
;
493 for (j
= 0; j
< ARRAY_SIZE(p
->speakers
); j
++)
494 if (p
->speakers
[j
]) {
496 p
->spk_mask
|= p
->speakers
[j
];
501 static int get_channel_allocation_order(int ca
)
505 for (i
= 0; i
< ARRAY_SIZE(channel_allocations
); i
++) {
506 if (channel_allocations
[i
].ca_index
== ca
)
513 * The transformation takes two steps:
515 * eld->spk_alloc => (eld_speaker_allocation_bits[]) => spk_mask
516 * spk_mask => (channel_allocations[]) => ai->CA
518 * TODO: it could select the wrong CA from multiple candidates.
520 static int hdmi_channel_allocation(struct hdmi_eld
*eld
, int channels
)
525 char buf
[SND_PRINT_CHANNEL_ALLOCATION_ADVISED_BUFSIZE
];
528 * CA defaults to 0 for basic stereo audio
534 * expand ELD's speaker allocation mask
536 * ELD tells the speaker mask in a compact(paired) form,
537 * expand ELD's notions to match the ones used by Audio InfoFrame.
539 for (i
= 0; i
< ARRAY_SIZE(eld_speaker_allocation_bits
); i
++) {
540 if (eld
->info
.spk_alloc
& (1 << i
))
541 spk_mask
|= eld_speaker_allocation_bits
[i
];
544 /* search for the first working match in the CA table */
545 for (i
= 0; i
< ARRAY_SIZE(channel_allocations
); i
++) {
546 if (channels
== channel_allocations
[i
].channels
&&
547 (spk_mask
& channel_allocations
[i
].spk_mask
) ==
548 channel_allocations
[i
].spk_mask
) {
549 ca
= channel_allocations
[i
].ca_index
;
554 snd_print_channel_allocation(eld
->info
.spk_alloc
, buf
, sizeof(buf
));
555 snd_printdd("HDMI: select CA 0x%x for %d-channel allocation: %s\n",
561 static void hdmi_debug_channel_mapping(struct hda_codec
*codec
,
564 #ifdef CONFIG_SND_DEBUG_VERBOSE
568 for (i
= 0; i
< 8; i
++) {
569 slot
= snd_hda_codec_read(codec
, pin_nid
, 0,
570 AC_VERB_GET_HDMI_CHAN_SLOT
, i
);
571 printk(KERN_DEBUG
"HDMI: ASP channel %d => slot %d\n",
572 slot
>> 4, slot
& 0xf);
578 static void hdmi_std_setup_channel_mapping(struct hda_codec
*codec
,
586 int non_pcm_mapping
[8];
588 order
= get_channel_allocation_order(ca
);
590 if (hdmi_channel_mapping
[ca
][1] == 0) {
591 for (i
= 0; i
< channel_allocations
[order
].channels
; i
++)
592 hdmi_channel_mapping
[ca
][i
] = i
| (i
<< 4);
594 hdmi_channel_mapping
[ca
][i
] = 0xf | (i
<< 4);
598 for (i
= 0; i
< channel_allocations
[order
].channels
; i
++)
599 non_pcm_mapping
[i
] = i
| (i
<< 4);
601 non_pcm_mapping
[i
] = 0xf | (i
<< 4);
604 for (i
= 0; i
< 8; i
++) {
605 err
= snd_hda_codec_write(codec
, pin_nid
, 0,
606 AC_VERB_SET_HDMI_CHAN_SLOT
,
607 non_pcm
? non_pcm_mapping
[i
] : hdmi_channel_mapping
[ca
][i
]);
609 snd_printdd(KERN_NOTICE
610 "HDMI: channel mapping failed\n");
615 hdmi_debug_channel_mapping(codec
, pin_nid
);
618 struct channel_map_table
{
619 unsigned char map
; /* ALSA API channel map position */
620 unsigned char cea_slot
; /* CEA slot value */
621 int spk_mask
; /* speaker position bit mask */
624 static struct channel_map_table map_tables
[] = {
625 { SNDRV_CHMAP_FL
, 0x00, FL
},
626 { SNDRV_CHMAP_FR
, 0x01, FR
},
627 { SNDRV_CHMAP_RL
, 0x04, RL
},
628 { SNDRV_CHMAP_RR
, 0x05, RR
},
629 { SNDRV_CHMAP_LFE
, 0x02, LFE
},
630 { SNDRV_CHMAP_FC
, 0x03, FC
},
631 { SNDRV_CHMAP_RLC
, 0x06, RLC
},
632 { SNDRV_CHMAP_RRC
, 0x07, RRC
},
636 /* from ALSA API channel position to speaker bit mask */
637 static int to_spk_mask(unsigned char c
)
639 struct channel_map_table
*t
= map_tables
;
640 for (; t
->map
; t
++) {
647 /* from ALSA API channel position to CEA slot */
648 static int to_cea_slot(unsigned char c
)
650 struct channel_map_table
*t
= map_tables
;
651 for (; t
->map
; t
++) {
658 /* from CEA slot to ALSA API channel position */
659 static int from_cea_slot(unsigned char c
)
661 struct channel_map_table
*t
= map_tables
;
662 for (; t
->map
; t
++) {
663 if (t
->cea_slot
== c
)
669 /* from speaker bit mask to ALSA API channel position */
670 static int spk_to_chmap(int spk
)
672 struct channel_map_table
*t
= map_tables
;
673 for (; t
->map
; t
++) {
674 if (t
->spk_mask
== spk
)
680 /* get the CA index corresponding to the given ALSA API channel map */
681 static int hdmi_manual_channel_allocation(int chs
, unsigned char *map
)
683 int i
, spks
= 0, spk_mask
= 0;
685 for (i
= 0; i
< chs
; i
++) {
686 int mask
= to_spk_mask(map
[i
]);
693 for (i
= 0; i
< ARRAY_SIZE(channel_allocations
); i
++) {
694 if ((chs
== channel_allocations
[i
].channels
||
695 spks
== channel_allocations
[i
].channels
) &&
696 (spk_mask
& channel_allocations
[i
].spk_mask
) ==
697 channel_allocations
[i
].spk_mask
)
698 return channel_allocations
[i
].ca_index
;
703 /* set up the channel slots for the given ALSA API channel map */
704 static int hdmi_manual_setup_channel_mapping(struct hda_codec
*codec
,
706 int chs
, unsigned char *map
)
709 for (i
= 0; i
< 8; i
++) {
712 val
= to_cea_slot(map
[i
]);
716 err
= snd_hda_codec_write(codec
, pin_nid
, 0,
717 AC_VERB_SET_HDMI_CHAN_SLOT
, val
);
724 /* store ALSA API channel map from the current default map */
725 static void hdmi_setup_fake_chmap(unsigned char *map
, int ca
)
728 for (i
= 0; i
< 8; i
++) {
729 if (i
< channel_allocations
[ca
].channels
)
730 map
[i
] = from_cea_slot((hdmi_channel_mapping
[ca
][i
] >> 4) & 0x0f);
736 static void hdmi_setup_channel_mapping(struct hda_codec
*codec
,
737 hda_nid_t pin_nid
, bool non_pcm
, int ca
,
738 int channels
, unsigned char *map
,
741 if (!non_pcm
&& chmap_set
) {
742 hdmi_manual_setup_channel_mapping(codec
, pin_nid
,
745 hdmi_std_setup_channel_mapping(codec
, pin_nid
, non_pcm
, ca
);
746 hdmi_setup_fake_chmap(map
, ca
);
751 * Audio InfoFrame routines
755 * Enable Audio InfoFrame Transmission
757 static void hdmi_start_infoframe_trans(struct hda_codec
*codec
,
760 hdmi_set_dip_index(codec
, pin_nid
, 0x0, 0x0);
761 snd_hda_codec_write(codec
, pin_nid
, 0, AC_VERB_SET_HDMI_DIP_XMIT
,
766 * Disable Audio InfoFrame Transmission
768 static void hdmi_stop_infoframe_trans(struct hda_codec
*codec
,
771 hdmi_set_dip_index(codec
, pin_nid
, 0x0, 0x0);
772 snd_hda_codec_write(codec
, pin_nid
, 0, AC_VERB_SET_HDMI_DIP_XMIT
,
776 static void hdmi_debug_dip_size(struct hda_codec
*codec
, hda_nid_t pin_nid
)
778 #ifdef CONFIG_SND_DEBUG_VERBOSE
782 size
= snd_hdmi_get_eld_size(codec
, pin_nid
);
783 printk(KERN_DEBUG
"HDMI: ELD buf size is %d\n", size
);
785 for (i
= 0; i
< 8; i
++) {
786 size
= snd_hda_codec_read(codec
, pin_nid
, 0,
787 AC_VERB_GET_HDMI_DIP_SIZE
, i
);
788 printk(KERN_DEBUG
"HDMI: DIP GP[%d] buf size is %d\n", i
, size
);
793 static void hdmi_clear_dip_buffers(struct hda_codec
*codec
, hda_nid_t pin_nid
)
799 for (i
= 0; i
< 8; i
++) {
800 size
= snd_hda_codec_read(codec
, pin_nid
, 0,
801 AC_VERB_GET_HDMI_DIP_SIZE
, i
);
805 hdmi_set_dip_index(codec
, pin_nid
, i
, 0x0);
806 for (j
= 1; j
< 1000; j
++) {
807 hdmi_write_dip_byte(codec
, pin_nid
, 0x0);
808 hdmi_get_dip_index(codec
, pin_nid
, &pi
, &bi
);
810 snd_printd(KERN_INFO
"dip index %d: %d != %d\n",
812 if (bi
== 0) /* byte index wrapped around */
816 "HDMI: DIP GP[%d] buf reported size=%d, written=%d\n",
822 static void hdmi_checksum_audio_infoframe(struct hdmi_audio_infoframe
*hdmi_ai
)
824 u8
*bytes
= (u8
*)hdmi_ai
;
828 hdmi_ai
->checksum
= 0;
830 for (i
= 0; i
< sizeof(*hdmi_ai
); i
++)
833 hdmi_ai
->checksum
= -sum
;
836 static void hdmi_fill_audio_infoframe(struct hda_codec
*codec
,
842 hdmi_debug_dip_size(codec
, pin_nid
);
843 hdmi_clear_dip_buffers(codec
, pin_nid
); /* be paranoid */
845 hdmi_set_dip_index(codec
, pin_nid
, 0x0, 0x0);
846 for (i
= 0; i
< size
; i
++)
847 hdmi_write_dip_byte(codec
, pin_nid
, dip
[i
]);
850 static bool hdmi_infoframe_uptodate(struct hda_codec
*codec
, hda_nid_t pin_nid
,
856 if (snd_hda_codec_read(codec
, pin_nid
, 0, AC_VERB_GET_HDMI_DIP_XMIT
, 0)
860 hdmi_set_dip_index(codec
, pin_nid
, 0x0, 0x0);
861 for (i
= 0; i
< size
; i
++) {
862 val
= snd_hda_codec_read(codec
, pin_nid
, 0,
863 AC_VERB_GET_HDMI_DIP_DATA
, 0);
871 static void hdmi_setup_audio_infoframe(struct hda_codec
*codec
, int pin_idx
,
873 struct snd_pcm_substream
*substream
)
875 struct hdmi_spec
*spec
= codec
->spec
;
876 struct hdmi_spec_per_pin
*per_pin
= get_pin(spec
, pin_idx
);
877 hda_nid_t pin_nid
= per_pin
->pin_nid
;
878 int channels
= substream
->runtime
->channels
;
879 struct hdmi_eld
*eld
;
881 union audio_infoframe ai
;
883 eld
= &per_pin
->sink_eld
;
884 if (!eld
->monitor_present
)
887 if (!non_pcm
&& per_pin
->chmap_set
)
888 ca
= hdmi_manual_channel_allocation(channels
, per_pin
->chmap
);
890 ca
= hdmi_channel_allocation(eld
, channels
);
894 memset(&ai
, 0, sizeof(ai
));
895 if (eld
->info
.conn_type
== 0) { /* HDMI */
896 struct hdmi_audio_infoframe
*hdmi_ai
= &ai
.hdmi
;
898 hdmi_ai
->type
= 0x84;
901 hdmi_ai
->CC02_CT47
= channels
- 1;
903 hdmi_checksum_audio_infoframe(hdmi_ai
);
904 } else if (eld
->info
.conn_type
== 1) { /* DisplayPort */
905 struct dp_audio_infoframe
*dp_ai
= &ai
.dp
;
909 dp_ai
->ver
= 0x11 << 2;
910 dp_ai
->CC02_CT47
= channels
- 1;
913 snd_printd("HDMI: unknown connection type at pin %d\n",
919 * sizeof(ai) is used instead of sizeof(*hdmi_ai) or
920 * sizeof(*dp_ai) to avoid partial match/update problems when
921 * the user switches between HDMI/DP monitors.
923 if (!hdmi_infoframe_uptodate(codec
, pin_nid
, ai
.bytes
,
925 snd_printdd("hdmi_setup_audio_infoframe: "
926 "pin=%d channels=%d\n",
929 hdmi_setup_channel_mapping(codec
, pin_nid
, non_pcm
, ca
,
930 channels
, per_pin
->chmap
,
932 hdmi_stop_infoframe_trans(codec
, pin_nid
);
933 hdmi_fill_audio_infoframe(codec
, pin_nid
,
934 ai
.bytes
, sizeof(ai
));
935 hdmi_start_infoframe_trans(codec
, pin_nid
);
937 /* For non-pcm audio switch, setup new channel mapping
939 if (per_pin
->non_pcm
!= non_pcm
)
940 hdmi_setup_channel_mapping(codec
, pin_nid
, non_pcm
, ca
,
941 channels
, per_pin
->chmap
,
945 per_pin
->non_pcm
= non_pcm
;
953 static void hdmi_present_sense(struct hdmi_spec_per_pin
*per_pin
, int repoll
);
955 static void hdmi_intrinsic_event(struct hda_codec
*codec
, unsigned int res
)
957 struct hdmi_spec
*spec
= codec
->spec
;
958 int tag
= res
>> AC_UNSOL_RES_TAG_SHIFT
;
961 struct hda_jack_tbl
*jack
;
963 jack
= snd_hda_jack_tbl_get_from_tag(codec
, tag
);
967 jack
->jack_dirty
= 1;
969 _snd_printd(SND_PR_VERBOSE
,
970 "HDMI hot plug event: Codec=%d Pin=%d Presence_Detect=%d ELD_Valid=%d\n",
971 codec
->addr
, pin_nid
,
972 !!(res
& AC_UNSOL_RES_PD
), !!(res
& AC_UNSOL_RES_ELDV
));
974 pin_idx
= pin_nid_to_pin_index(spec
, pin_nid
);
978 hdmi_present_sense(get_pin(spec
, pin_idx
), 1);
979 snd_hda_jack_report_sync(codec
);
982 static void hdmi_non_intrinsic_event(struct hda_codec
*codec
, unsigned int res
)
984 int tag
= res
>> AC_UNSOL_RES_TAG_SHIFT
;
985 int subtag
= (res
& AC_UNSOL_RES_SUBTAG
) >> AC_UNSOL_RES_SUBTAG_SHIFT
;
986 int cp_state
= !!(res
& AC_UNSOL_RES_CP_STATE
);
987 int cp_ready
= !!(res
& AC_UNSOL_RES_CP_READY
);
990 "HDMI CP event: CODEC=%d TAG=%d SUBTAG=0x%x CP_STATE=%d CP_READY=%d\n",
1005 static void hdmi_unsol_event(struct hda_codec
*codec
, unsigned int res
)
1007 int tag
= res
>> AC_UNSOL_RES_TAG_SHIFT
;
1008 int subtag
= (res
& AC_UNSOL_RES_SUBTAG
) >> AC_UNSOL_RES_SUBTAG_SHIFT
;
1010 if (!snd_hda_jack_tbl_get_from_tag(codec
, tag
)) {
1011 snd_printd(KERN_INFO
"Unexpected HDMI event tag 0x%x\n", tag
);
1016 hdmi_intrinsic_event(codec
, res
);
1018 hdmi_non_intrinsic_event(codec
, res
);
1021 static void haswell_verify_pin_D0(struct hda_codec
*codec
,
1022 hda_nid_t cvt_nid
, hda_nid_t nid
)
1024 int pwr
, lamp
, ramp
;
1026 /* For Haswell, the converter 1/2 may keep in D3 state after bootup,
1027 * thus pins could only choose converter 0 for use. Make sure the
1028 * converters are in correct power state */
1029 if (!snd_hda_check_power_state(codec
, cvt_nid
, AC_PWRST_D0
))
1030 snd_hda_codec_write(codec
, cvt_nid
, 0, AC_VERB_SET_POWER_STATE
, AC_PWRST_D0
);
1032 if (!snd_hda_check_power_state(codec
, nid
, AC_PWRST_D0
)) {
1033 snd_hda_codec_write(codec
, nid
, 0, AC_VERB_SET_POWER_STATE
,
1036 pwr
= snd_hda_codec_read(codec
, nid
, 0, AC_VERB_GET_POWER_STATE
, 0);
1037 pwr
= (pwr
& AC_PWRST_ACTUAL
) >> AC_PWRST_ACTUAL_SHIFT
;
1038 snd_printd("Haswell HDMI audio: Power for pin 0x%x is now D%d\n", nid
, pwr
);
1041 lamp
= snd_hda_codec_read(codec
, nid
, 0,
1042 AC_VERB_GET_AMP_GAIN_MUTE
,
1043 AC_AMP_GET_LEFT
| AC_AMP_GET_OUTPUT
);
1044 ramp
= snd_hda_codec_read(codec
, nid
, 0,
1045 AC_VERB_GET_AMP_GAIN_MUTE
,
1046 AC_AMP_GET_RIGHT
| AC_AMP_GET_OUTPUT
);
1048 snd_hda_codec_write(codec
, nid
, 0, AC_VERB_SET_AMP_GAIN_MUTE
,
1049 AC_AMP_SET_RIGHT
| AC_AMP_SET_OUTPUT
| lamp
);
1051 lamp
= snd_hda_codec_read(codec
, nid
, 0,
1052 AC_VERB_GET_AMP_GAIN_MUTE
,
1053 AC_AMP_GET_LEFT
| AC_AMP_GET_OUTPUT
);
1054 ramp
= snd_hda_codec_read(codec
, nid
, 0,
1055 AC_VERB_GET_AMP_GAIN_MUTE
,
1056 AC_AMP_GET_RIGHT
| AC_AMP_GET_OUTPUT
);
1057 snd_printd("Haswell HDMI audio: Mute after set on pin 0x%x: [0x%x 0x%x]\n", nid
, lamp
, ramp
);
1065 /* HBR should be Non-PCM, 8 channels */
1066 #define is_hbr_format(format) \
1067 ((format & AC_FMT_TYPE_NON_PCM) && (format & AC_FMT_CHAN_MASK) == 7)
1069 static int hdmi_setup_stream(struct hda_codec
*codec
, hda_nid_t cvt_nid
,
1070 hda_nid_t pin_nid
, u32 stream_tag
, int format
)
1075 if (codec
->vendor_id
== 0x80862807)
1076 haswell_verify_pin_D0(codec
, cvt_nid
, pin_nid
);
1078 if (snd_hda_query_pin_caps(codec
, pin_nid
) & AC_PINCAP_HBR
) {
1079 pinctl
= snd_hda_codec_read(codec
, pin_nid
, 0,
1080 AC_VERB_GET_PIN_WIDGET_CONTROL
, 0);
1082 new_pinctl
= pinctl
& ~AC_PINCTL_EPT
;
1083 if (is_hbr_format(format
))
1084 new_pinctl
|= AC_PINCTL_EPT_HBR
;
1086 new_pinctl
|= AC_PINCTL_EPT_NATIVE
;
1088 snd_printdd("hdmi_setup_stream: "
1089 "NID=0x%x, %spinctl=0x%x\n",
1091 pinctl
== new_pinctl
? "" : "new-",
1094 if (pinctl
!= new_pinctl
)
1095 snd_hda_codec_write(codec
, pin_nid
, 0,
1096 AC_VERB_SET_PIN_WIDGET_CONTROL
,
1100 if (is_hbr_format(format
) && !new_pinctl
) {
1101 snd_printdd("hdmi_setup_stream: HBR is not supported\n");
1105 snd_hda_codec_setup_stream(codec
, cvt_nid
, stream_tag
, 0, format
);
1109 static int hdmi_choose_cvt(struct hda_codec
*codec
,
1110 int pin_idx
, int *cvt_id
, int *mux_id
)
1112 struct hdmi_spec
*spec
= codec
->spec
;
1113 struct hdmi_spec_per_pin
*per_pin
;
1114 struct hdmi_spec_per_cvt
*per_cvt
= NULL
;
1115 int cvt_idx
, mux_idx
= 0;
1117 per_pin
= get_pin(spec
, pin_idx
);
1119 /* Dynamically assign converter to stream */
1120 for (cvt_idx
= 0; cvt_idx
< spec
->num_cvts
; cvt_idx
++) {
1121 per_cvt
= get_cvt(spec
, cvt_idx
);
1123 /* Must not already be assigned */
1124 if (per_cvt
->assigned
)
1126 /* Must be in pin's mux's list of converters */
1127 for (mux_idx
= 0; mux_idx
< per_pin
->num_mux_nids
; mux_idx
++)
1128 if (per_pin
->mux_nids
[mux_idx
] == per_cvt
->cvt_nid
)
1130 /* Not in mux list */
1131 if (mux_idx
== per_pin
->num_mux_nids
)
1136 /* No free converters */
1137 if (cvt_idx
== spec
->num_cvts
)
1148 static void haswell_config_cvts(struct hda_codec
*codec
,
1149 int pin_id
, int mux_id
)
1151 struct hdmi_spec
*spec
= codec
->spec
;
1152 struct hdmi_spec_per_pin
*per_pin
;
1153 int pin_idx
, mux_idx
;
1157 for (pin_idx
= 0; pin_idx
< spec
->num_pins
; pin_idx
++) {
1158 per_pin
= get_pin(spec
, pin_idx
);
1160 if (pin_idx
== pin_id
)
1163 curr
= snd_hda_codec_read(codec
, per_pin
->pin_nid
, 0,
1164 AC_VERB_GET_CONNECT_SEL
, 0);
1166 /* Choose another unused converter */
1167 if (curr
== mux_id
) {
1168 err
= hdmi_choose_cvt(codec
, pin_idx
, NULL
, &mux_idx
);
1171 snd_printdd("HDMI: choose converter %d for pin %d\n", mux_idx
, pin_idx
);
1172 snd_hda_codec_write_cache(codec
, per_pin
->pin_nid
, 0,
1173 AC_VERB_SET_CONNECT_SEL
,
1182 static int hdmi_pcm_open(struct hda_pcm_stream
*hinfo
,
1183 struct hda_codec
*codec
,
1184 struct snd_pcm_substream
*substream
)
1186 struct hdmi_spec
*spec
= codec
->spec
;
1187 struct snd_pcm_runtime
*runtime
= substream
->runtime
;
1188 int pin_idx
, cvt_idx
, mux_idx
= 0;
1189 struct hdmi_spec_per_pin
*per_pin
;
1190 struct hdmi_eld
*eld
;
1191 struct hdmi_spec_per_cvt
*per_cvt
= NULL
;
1194 /* Validate hinfo */
1195 pin_idx
= hinfo_to_pin_index(spec
, hinfo
);
1196 if (snd_BUG_ON(pin_idx
< 0))
1198 per_pin
= get_pin(spec
, pin_idx
);
1199 eld
= &per_pin
->sink_eld
;
1201 err
= hdmi_choose_cvt(codec
, pin_idx
, &cvt_idx
, &mux_idx
);
1205 per_cvt
= get_cvt(spec
, cvt_idx
);
1206 /* Claim converter */
1207 per_cvt
->assigned
= 1;
1208 hinfo
->nid
= per_cvt
->cvt_nid
;
1210 snd_hda_codec_write_cache(codec
, per_pin
->pin_nid
, 0,
1211 AC_VERB_SET_CONNECT_SEL
,
1214 /* configure unused pins to choose other converters */
1215 if (codec
->vendor_id
== 0x80862807)
1216 haswell_config_cvts(codec
, pin_idx
, mux_idx
);
1218 snd_hda_spdif_ctls_assign(codec
, pin_idx
, per_cvt
->cvt_nid
);
1220 /* Initially set the converter's capabilities */
1221 hinfo
->channels_min
= per_cvt
->channels_min
;
1222 hinfo
->channels_max
= per_cvt
->channels_max
;
1223 hinfo
->rates
= per_cvt
->rates
;
1224 hinfo
->formats
= per_cvt
->formats
;
1225 hinfo
->maxbps
= per_cvt
->maxbps
;
1227 /* Restrict capabilities by ELD if this isn't disabled */
1228 if (!static_hdmi_pcm
&& eld
->eld_valid
) {
1229 snd_hdmi_eld_update_pcm_info(&eld
->info
, hinfo
);
1230 if (hinfo
->channels_min
> hinfo
->channels_max
||
1231 !hinfo
->rates
|| !hinfo
->formats
) {
1232 per_cvt
->assigned
= 0;
1234 snd_hda_spdif_ctls_unassign(codec
, pin_idx
);
1239 /* Store the updated parameters */
1240 runtime
->hw
.channels_min
= hinfo
->channels_min
;
1241 runtime
->hw
.channels_max
= hinfo
->channels_max
;
1242 runtime
->hw
.formats
= hinfo
->formats
;
1243 runtime
->hw
.rates
= hinfo
->rates
;
1245 snd_pcm_hw_constraint_step(substream
->runtime
, 0,
1246 SNDRV_PCM_HW_PARAM_CHANNELS
, 2);
1251 * HDA/HDMI auto parsing
1253 static int hdmi_read_pin_conn(struct hda_codec
*codec
, int pin_idx
)
1255 struct hdmi_spec
*spec
= codec
->spec
;
1256 struct hdmi_spec_per_pin
*per_pin
= get_pin(spec
, pin_idx
);
1257 hda_nid_t pin_nid
= per_pin
->pin_nid
;
1259 if (!(get_wcaps(codec
, pin_nid
) & AC_WCAP_CONN_LIST
)) {
1260 snd_printk(KERN_WARNING
1261 "HDMI: pin %d wcaps %#x "
1262 "does not support connection list\n",
1263 pin_nid
, get_wcaps(codec
, pin_nid
));
1267 per_pin
->num_mux_nids
= snd_hda_get_connections(codec
, pin_nid
,
1269 HDA_MAX_CONNECTIONS
);
1274 static void hdmi_present_sense(struct hdmi_spec_per_pin
*per_pin
, int repoll
)
1276 struct hda_codec
*codec
= per_pin
->codec
;
1277 struct hdmi_spec
*spec
= codec
->spec
;
1278 struct hdmi_eld
*eld
= &spec
->temp_eld
;
1279 struct hdmi_eld
*pin_eld
= &per_pin
->sink_eld
;
1280 hda_nid_t pin_nid
= per_pin
->pin_nid
;
1282 * Always execute a GetPinSense verb here, even when called from
1283 * hdmi_intrinsic_event; for some NVIDIA HW, the unsolicited
1284 * response's PD bit is not the real PD value, but indicates that
1285 * the real PD value changed. An older version of the HD-audio
1286 * specification worked this way. Hence, we just ignore the data in
1287 * the unsolicited response to avoid custom WARs.
1289 int present
= snd_hda_pin_sense(codec
, pin_nid
);
1290 bool update_eld
= false;
1291 bool eld_changed
= false;
1293 pin_eld
->monitor_present
= !!(present
& AC_PINSENSE_PRESENCE
);
1294 if (pin_eld
->monitor_present
)
1295 eld
->eld_valid
= !!(present
& AC_PINSENSE_ELDV
);
1297 eld
->eld_valid
= false;
1299 _snd_printd(SND_PR_VERBOSE
,
1300 "HDMI status: Codec=%d Pin=%d Presence_Detect=%d ELD_Valid=%d\n",
1301 codec
->addr
, pin_nid
, pin_eld
->monitor_present
, eld
->eld_valid
);
1303 if (eld
->eld_valid
) {
1304 if (snd_hdmi_get_eld(codec
, pin_nid
, eld
->eld_buffer
,
1305 &eld
->eld_size
) < 0)
1306 eld
->eld_valid
= false;
1308 memset(&eld
->info
, 0, sizeof(struct parsed_hdmi_eld
));
1309 if (snd_hdmi_parse_eld(&eld
->info
, eld
->eld_buffer
,
1311 eld
->eld_valid
= false;
1314 if (eld
->eld_valid
) {
1315 snd_hdmi_show_eld(&eld
->info
);
1319 queue_delayed_work(codec
->bus
->workq
,
1321 msecs_to_jiffies(300));
1326 mutex_lock(&pin_eld
->lock
);
1327 if (pin_eld
->eld_valid
&& !eld
->eld_valid
) {
1332 pin_eld
->eld_valid
= eld
->eld_valid
;
1333 eld_changed
= pin_eld
->eld_size
!= eld
->eld_size
||
1334 memcmp(pin_eld
->eld_buffer
, eld
->eld_buffer
,
1335 eld
->eld_size
) != 0;
1337 memcpy(pin_eld
->eld_buffer
, eld
->eld_buffer
,
1339 pin_eld
->eld_size
= eld
->eld_size
;
1340 pin_eld
->info
= eld
->info
;
1342 mutex_unlock(&pin_eld
->lock
);
1345 snd_ctl_notify(codec
->bus
->card
,
1346 SNDRV_CTL_EVENT_MASK_VALUE
| SNDRV_CTL_EVENT_MASK_INFO
,
1347 &per_pin
->eld_ctl
->id
);
1350 static void hdmi_repoll_eld(struct work_struct
*work
)
1352 struct hdmi_spec_per_pin
*per_pin
=
1353 container_of(to_delayed_work(work
), struct hdmi_spec_per_pin
, work
);
1355 if (per_pin
->repoll_count
++ > 6)
1356 per_pin
->repoll_count
= 0;
1358 hdmi_present_sense(per_pin
, per_pin
->repoll_count
);
1361 static void intel_haswell_fixup_connect_list(struct hda_codec
*codec
,
1364 static int hdmi_add_pin(struct hda_codec
*codec
, hda_nid_t pin_nid
)
1366 struct hdmi_spec
*spec
= codec
->spec
;
1367 unsigned int caps
, config
;
1369 struct hdmi_spec_per_pin
*per_pin
;
1372 caps
= snd_hda_query_pin_caps(codec
, pin_nid
);
1373 if (!(caps
& (AC_PINCAP_HDMI
| AC_PINCAP_DP
)))
1376 config
= snd_hda_codec_get_pincfg(codec
, pin_nid
);
1377 if (get_defcfg_connect(config
) == AC_JACK_PORT_NONE
)
1380 if (codec
->vendor_id
== 0x80862807)
1381 intel_haswell_fixup_connect_list(codec
, pin_nid
);
1383 pin_idx
= spec
->num_pins
;
1384 per_pin
= snd_array_new(&spec
->pins
);
1388 per_pin
->pin_nid
= pin_nid
;
1389 per_pin
->non_pcm
= false;
1391 err
= hdmi_read_pin_conn(codec
, pin_idx
);
1400 static int hdmi_add_cvt(struct hda_codec
*codec
, hda_nid_t cvt_nid
)
1402 struct hdmi_spec
*spec
= codec
->spec
;
1403 struct hdmi_spec_per_cvt
*per_cvt
;
1407 chans
= get_wcaps(codec
, cvt_nid
);
1408 chans
= get_wcaps_channels(chans
);
1410 per_cvt
= snd_array_new(&spec
->cvts
);
1414 per_cvt
->cvt_nid
= cvt_nid
;
1415 per_cvt
->channels_min
= 2;
1417 per_cvt
->channels_max
= chans
;
1418 if (chans
> spec
->channels_max
)
1419 spec
->channels_max
= chans
;
1422 err
= snd_hda_query_supported_pcm(codec
, cvt_nid
,
1429 if (spec
->num_cvts
< ARRAY_SIZE(spec
->cvt_nids
))
1430 spec
->cvt_nids
[spec
->num_cvts
] = cvt_nid
;
1436 static int hdmi_parse_codec(struct hda_codec
*codec
)
1441 nodes
= snd_hda_get_sub_nodes(codec
, codec
->afg
, &nid
);
1442 if (!nid
|| nodes
< 0) {
1443 snd_printk(KERN_WARNING
"HDMI: failed to get afg sub nodes\n");
1447 for (i
= 0; i
< nodes
; i
++, nid
++) {
1451 caps
= get_wcaps(codec
, nid
);
1452 type
= get_wcaps_type(caps
);
1454 if (!(caps
& AC_WCAP_DIGITAL
))
1458 case AC_WID_AUD_OUT
:
1459 hdmi_add_cvt(codec
, nid
);
1462 hdmi_add_pin(codec
, nid
);
1468 /* We're seeing some problems with unsolicited hot plug events on
1469 * PantherPoint after S3, if this is not enabled */
1470 if (codec
->vendor_id
== 0x80862806)
1471 codec
->bus
->power_keep_link_on
= 1;
1473 * G45/IbexPeak don't support EPSS: the unsolicited pin hot plug event
1474 * can be lost and presence sense verb will become inaccurate if the
1475 * HDA link is powered off at hot plug or hw initialization time.
1477 else if (!(snd_hda_param_read(codec
, codec
->afg
, AC_PAR_POWER_STATE
) &
1479 codec
->bus
->power_keep_link_on
= 1;
1487 static bool check_non_pcm_per_cvt(struct hda_codec
*codec
, hda_nid_t cvt_nid
)
1489 struct hda_spdif_out
*spdif
;
1492 mutex_lock(&codec
->spdif_mutex
);
1493 spdif
= snd_hda_spdif_out_of_nid(codec
, cvt_nid
);
1494 non_pcm
= !!(spdif
->status
& IEC958_AES0_NONAUDIO
);
1495 mutex_unlock(&codec
->spdif_mutex
);
1504 static int generic_hdmi_playback_pcm_prepare(struct hda_pcm_stream
*hinfo
,
1505 struct hda_codec
*codec
,
1506 unsigned int stream_tag
,
1507 unsigned int format
,
1508 struct snd_pcm_substream
*substream
)
1510 hda_nid_t cvt_nid
= hinfo
->nid
;
1511 struct hdmi_spec
*spec
= codec
->spec
;
1512 int pin_idx
= hinfo_to_pin_index(spec
, hinfo
);
1513 hda_nid_t pin_nid
= get_pin(spec
, pin_idx
)->pin_nid
;
1516 non_pcm
= check_non_pcm_per_cvt(codec
, cvt_nid
);
1518 hdmi_set_channel_count(codec
, cvt_nid
, substream
->runtime
->channels
);
1520 hdmi_setup_audio_infoframe(codec
, pin_idx
, non_pcm
, substream
);
1522 return hdmi_setup_stream(codec
, cvt_nid
, pin_nid
, stream_tag
, format
);
1525 static int generic_hdmi_playback_pcm_cleanup(struct hda_pcm_stream
*hinfo
,
1526 struct hda_codec
*codec
,
1527 struct snd_pcm_substream
*substream
)
1529 snd_hda_codec_cleanup_stream(codec
, hinfo
->nid
);
1533 static int hdmi_pcm_close(struct hda_pcm_stream
*hinfo
,
1534 struct hda_codec
*codec
,
1535 struct snd_pcm_substream
*substream
)
1537 struct hdmi_spec
*spec
= codec
->spec
;
1538 int cvt_idx
, pin_idx
;
1539 struct hdmi_spec_per_cvt
*per_cvt
;
1540 struct hdmi_spec_per_pin
*per_pin
;
1543 cvt_idx
= cvt_nid_to_cvt_index(spec
, hinfo
->nid
);
1544 if (snd_BUG_ON(cvt_idx
< 0))
1546 per_cvt
= get_cvt(spec
, cvt_idx
);
1548 snd_BUG_ON(!per_cvt
->assigned
);
1549 per_cvt
->assigned
= 0;
1552 pin_idx
= hinfo_to_pin_index(spec
, hinfo
);
1553 if (snd_BUG_ON(pin_idx
< 0))
1555 per_pin
= get_pin(spec
, pin_idx
);
1557 snd_hda_spdif_ctls_unassign(codec
, pin_idx
);
1558 per_pin
->chmap_set
= false;
1559 memset(per_pin
->chmap
, 0, sizeof(per_pin
->chmap
));
1565 static const struct hda_pcm_ops generic_ops
= {
1566 .open
= hdmi_pcm_open
,
1567 .close
= hdmi_pcm_close
,
1568 .prepare
= generic_hdmi_playback_pcm_prepare
,
1569 .cleanup
= generic_hdmi_playback_pcm_cleanup
,
1573 * ALSA API channel-map control callbacks
1575 static int hdmi_chmap_ctl_info(struct snd_kcontrol
*kcontrol
,
1576 struct snd_ctl_elem_info
*uinfo
)
1578 struct snd_pcm_chmap
*info
= snd_kcontrol_chip(kcontrol
);
1579 struct hda_codec
*codec
= info
->private_data
;
1580 struct hdmi_spec
*spec
= codec
->spec
;
1581 uinfo
->type
= SNDRV_CTL_ELEM_TYPE_INTEGER
;
1582 uinfo
->count
= spec
->channels_max
;
1583 uinfo
->value
.integer
.min
= 0;
1584 uinfo
->value
.integer
.max
= SNDRV_CHMAP_LAST
;
1588 static int hdmi_chmap_ctl_tlv(struct snd_kcontrol
*kcontrol
, int op_flag
,
1589 unsigned int size
, unsigned int __user
*tlv
)
1591 struct snd_pcm_chmap
*info
= snd_kcontrol_chip(kcontrol
);
1592 struct hda_codec
*codec
= info
->private_data
;
1593 struct hdmi_spec
*spec
= codec
->spec
;
1594 const unsigned int valid_mask
=
1595 FL
| FR
| RL
| RR
| LFE
| FC
| RLC
| RRC
;
1596 unsigned int __user
*dst
;
1601 if (put_user(SNDRV_CTL_TLVT_CONTAINER
, tlv
))
1605 for (chs
= 2; chs
<= spec
->channels_max
; chs
++) {
1607 struct cea_channel_speaker_allocation
*cap
;
1608 cap
= channel_allocations
;
1609 for (i
= 0; i
< ARRAY_SIZE(channel_allocations
); i
++, cap
++) {
1610 int chs_bytes
= chs
* 4;
1611 if (cap
->channels
!= chs
)
1613 if (cap
->spk_mask
& ~valid_mask
)
1617 if (put_user(SNDRV_CTL_TLVT_CHMAP_VAR
, dst
) ||
1618 put_user(chs_bytes
, dst
+ 1))
1623 if (size
< chs_bytes
)
1627 for (c
= 7; c
>= 0; c
--) {
1628 int spk
= cap
->speakers
[c
];
1631 if (put_user(spk_to_chmap(spk
), dst
))
1637 if (put_user(count
, tlv
+ 1))
1642 static int hdmi_chmap_ctl_get(struct snd_kcontrol
*kcontrol
,
1643 struct snd_ctl_elem_value
*ucontrol
)
1645 struct snd_pcm_chmap
*info
= snd_kcontrol_chip(kcontrol
);
1646 struct hda_codec
*codec
= info
->private_data
;
1647 struct hdmi_spec
*spec
= codec
->spec
;
1648 int pin_idx
= kcontrol
->private_value
;
1649 struct hdmi_spec_per_pin
*per_pin
= get_pin(spec
, pin_idx
);
1652 for (i
= 0; i
< ARRAY_SIZE(per_pin
->chmap
); i
++)
1653 ucontrol
->value
.integer
.value
[i
] = per_pin
->chmap
[i
];
1657 static int hdmi_chmap_ctl_put(struct snd_kcontrol
*kcontrol
,
1658 struct snd_ctl_elem_value
*ucontrol
)
1660 struct snd_pcm_chmap
*info
= snd_kcontrol_chip(kcontrol
);
1661 struct hda_codec
*codec
= info
->private_data
;
1662 struct hdmi_spec
*spec
= codec
->spec
;
1663 int pin_idx
= kcontrol
->private_value
;
1664 struct hdmi_spec_per_pin
*per_pin
= get_pin(spec
, pin_idx
);
1665 unsigned int ctl_idx
;
1666 struct snd_pcm_substream
*substream
;
1667 unsigned char chmap
[8];
1668 int i
, ca
, prepared
= 0;
1670 ctl_idx
= snd_ctl_get_ioffidx(kcontrol
, &ucontrol
->id
);
1671 substream
= snd_pcm_chmap_substream(info
, ctl_idx
);
1672 if (!substream
|| !substream
->runtime
)
1673 return 0; /* just for avoiding error from alsactl restore */
1674 switch (substream
->runtime
->status
->state
) {
1675 case SNDRV_PCM_STATE_OPEN
:
1676 case SNDRV_PCM_STATE_SETUP
:
1678 case SNDRV_PCM_STATE_PREPARED
:
1684 memset(chmap
, 0, sizeof(chmap
));
1685 for (i
= 0; i
< ARRAY_SIZE(chmap
); i
++)
1686 chmap
[i
] = ucontrol
->value
.integer
.value
[i
];
1687 if (!memcmp(chmap
, per_pin
->chmap
, sizeof(chmap
)))
1689 ca
= hdmi_manual_channel_allocation(ARRAY_SIZE(chmap
), chmap
);
1692 per_pin
->chmap_set
= true;
1693 memcpy(per_pin
->chmap
, chmap
, sizeof(chmap
));
1695 hdmi_setup_audio_infoframe(codec
, pin_idx
, per_pin
->non_pcm
,
1701 static int generic_hdmi_build_pcms(struct hda_codec
*codec
)
1703 struct hdmi_spec
*spec
= codec
->spec
;
1706 for (pin_idx
= 0; pin_idx
< spec
->num_pins
; pin_idx
++) {
1707 struct hda_pcm
*info
;
1708 struct hda_pcm_stream
*pstr
;
1709 struct hdmi_spec_per_pin
*per_pin
;
1711 per_pin
= get_pin(spec
, pin_idx
);
1712 sprintf(per_pin
->pcm_name
, "HDMI %d", pin_idx
);
1713 info
= snd_array_new(&spec
->pcm_rec
);
1716 info
->name
= per_pin
->pcm_name
;
1717 info
->pcm_type
= HDA_PCM_TYPE_HDMI
;
1718 info
->own_chmap
= true;
1720 pstr
= &info
->stream
[SNDRV_PCM_STREAM_PLAYBACK
];
1721 pstr
->substreams
= 1;
1722 pstr
->ops
= generic_ops
;
1723 /* other pstr fields are set in open */
1726 codec
->num_pcms
= spec
->num_pins
;
1727 codec
->pcm_info
= spec
->pcm_rec
.list
;
1732 static int generic_hdmi_build_jack(struct hda_codec
*codec
, int pin_idx
)
1734 char hdmi_str
[32] = "HDMI/DP";
1735 struct hdmi_spec
*spec
= codec
->spec
;
1736 struct hdmi_spec_per_pin
*per_pin
= get_pin(spec
, pin_idx
);
1737 int pcmdev
= get_pcm_rec(spec
, pin_idx
)->device
;
1740 sprintf(hdmi_str
+ strlen(hdmi_str
), ",pcm=%d", pcmdev
);
1741 if (!is_jack_detectable(codec
, per_pin
->pin_nid
))
1742 strncat(hdmi_str
, " Phantom",
1743 sizeof(hdmi_str
) - strlen(hdmi_str
) - 1);
1745 return snd_hda_jack_add_kctl(codec
, per_pin
->pin_nid
, hdmi_str
, 0);
1748 static int generic_hdmi_build_controls(struct hda_codec
*codec
)
1750 struct hdmi_spec
*spec
= codec
->spec
;
1754 for (pin_idx
= 0; pin_idx
< spec
->num_pins
; pin_idx
++) {
1755 struct hdmi_spec_per_pin
*per_pin
= get_pin(spec
, pin_idx
);
1757 err
= generic_hdmi_build_jack(codec
, pin_idx
);
1761 err
= snd_hda_create_dig_out_ctls(codec
,
1763 per_pin
->mux_nids
[0],
1767 snd_hda_spdif_ctls_unassign(codec
, pin_idx
);
1769 /* add control for ELD Bytes */
1770 err
= hdmi_create_eld_ctl(codec
, pin_idx
,
1771 get_pcm_rec(spec
, pin_idx
)->device
);
1776 hdmi_present_sense(per_pin
, 0);
1779 /* add channel maps */
1780 for (pin_idx
= 0; pin_idx
< spec
->num_pins
; pin_idx
++) {
1781 struct snd_pcm_chmap
*chmap
;
1782 struct snd_kcontrol
*kctl
;
1784 err
= snd_pcm_add_chmap_ctls(codec
->pcm_info
[pin_idx
].pcm
,
1785 SNDRV_PCM_STREAM_PLAYBACK
,
1786 NULL
, 0, pin_idx
, &chmap
);
1789 /* override handlers */
1790 chmap
->private_data
= codec
;
1792 for (i
= 0; i
< kctl
->count
; i
++)
1793 kctl
->vd
[i
].access
|= SNDRV_CTL_ELEM_ACCESS_WRITE
;
1794 kctl
->info
= hdmi_chmap_ctl_info
;
1795 kctl
->get
= hdmi_chmap_ctl_get
;
1796 kctl
->put
= hdmi_chmap_ctl_put
;
1797 kctl
->tlv
.c
= hdmi_chmap_ctl_tlv
;
1803 static int generic_hdmi_init_per_pins(struct hda_codec
*codec
)
1805 struct hdmi_spec
*spec
= codec
->spec
;
1808 for (pin_idx
= 0; pin_idx
< spec
->num_pins
; pin_idx
++) {
1809 struct hdmi_spec_per_pin
*per_pin
= get_pin(spec
, pin_idx
);
1810 struct hdmi_eld
*eld
= &per_pin
->sink_eld
;
1812 per_pin
->codec
= codec
;
1813 mutex_init(&eld
->lock
);
1814 INIT_DELAYED_WORK(&per_pin
->work
, hdmi_repoll_eld
);
1815 snd_hda_eld_proc_new(codec
, eld
, pin_idx
);
1820 static int generic_hdmi_init(struct hda_codec
*codec
)
1822 struct hdmi_spec
*spec
= codec
->spec
;
1825 for (pin_idx
= 0; pin_idx
< spec
->num_pins
; pin_idx
++) {
1826 struct hdmi_spec_per_pin
*per_pin
= get_pin(spec
, pin_idx
);
1827 hda_nid_t pin_nid
= per_pin
->pin_nid
;
1829 hdmi_init_pin(codec
, pin_nid
);
1830 snd_hda_jack_detect_enable(codec
, pin_nid
, pin_nid
);
1835 static void hdmi_array_init(struct hdmi_spec
*spec
, int nums
)
1837 snd_array_init(&spec
->pins
, sizeof(struct hdmi_spec_per_pin
), nums
);
1838 snd_array_init(&spec
->cvts
, sizeof(struct hdmi_spec_per_cvt
), nums
);
1839 snd_array_init(&spec
->pcm_rec
, sizeof(struct hda_pcm
), nums
);
1842 static void hdmi_array_free(struct hdmi_spec
*spec
)
1844 snd_array_free(&spec
->pins
);
1845 snd_array_free(&spec
->cvts
);
1846 snd_array_free(&spec
->pcm_rec
);
1849 static void generic_hdmi_free(struct hda_codec
*codec
)
1851 struct hdmi_spec
*spec
= codec
->spec
;
1854 for (pin_idx
= 0; pin_idx
< spec
->num_pins
; pin_idx
++) {
1855 struct hdmi_spec_per_pin
*per_pin
= get_pin(spec
, pin_idx
);
1856 struct hdmi_eld
*eld
= &per_pin
->sink_eld
;
1858 cancel_delayed_work(&per_pin
->work
);
1859 snd_hda_eld_proc_free(codec
, eld
);
1862 flush_workqueue(codec
->bus
->workq
);
1863 hdmi_array_free(spec
);
1868 static int generic_hdmi_resume(struct hda_codec
*codec
)
1870 struct hdmi_spec
*spec
= codec
->spec
;
1873 generic_hdmi_init(codec
);
1874 snd_hda_codec_resume_amp(codec
);
1875 snd_hda_codec_resume_cache(codec
);
1877 for (pin_idx
= 0; pin_idx
< spec
->num_pins
; pin_idx
++) {
1878 struct hdmi_spec_per_pin
*per_pin
= get_pin(spec
, pin_idx
);
1879 hdmi_present_sense(per_pin
, 1);
1885 static const struct hda_codec_ops generic_hdmi_patch_ops
= {
1886 .init
= generic_hdmi_init
,
1887 .free
= generic_hdmi_free
,
1888 .build_pcms
= generic_hdmi_build_pcms
,
1889 .build_controls
= generic_hdmi_build_controls
,
1890 .unsol_event
= hdmi_unsol_event
,
1892 .resume
= generic_hdmi_resume
,
1897 static void intel_haswell_fixup_connect_list(struct hda_codec
*codec
,
1900 struct hdmi_spec
*spec
= codec
->spec
;
1904 nconns
= snd_hda_get_connections(codec
, nid
, conns
, ARRAY_SIZE(conns
));
1905 if (nconns
== spec
->num_cvts
&&
1906 !memcmp(conns
, spec
->cvt_nids
, spec
->num_cvts
* sizeof(hda_nid_t
)))
1909 /* override pins connection list */
1910 snd_printdd("hdmi: haswell: override pin connection 0x%x\n", nid
);
1911 snd_hda_override_conn_list(codec
, nid
, spec
->num_cvts
, spec
->cvt_nids
);
1914 #define INTEL_VENDOR_NID 0x08
1915 #define INTEL_GET_VENDOR_VERB 0xf81
1916 #define INTEL_SET_VENDOR_VERB 0x781
1917 #define INTEL_EN_DP12 0x02 /* enable DP 1.2 features */
1918 #define INTEL_EN_ALL_PIN_CVTS 0x01 /* enable 2nd & 3rd pins and convertors */
1920 static void intel_haswell_enable_all_pins(struct hda_codec
*codec
,
1923 unsigned int vendor_param
;
1925 vendor_param
= snd_hda_codec_read(codec
, INTEL_VENDOR_NID
, 0,
1926 INTEL_GET_VENDOR_VERB
, 0);
1927 if (vendor_param
== -1 || vendor_param
& INTEL_EN_ALL_PIN_CVTS
)
1930 vendor_param
|= INTEL_EN_ALL_PIN_CVTS
;
1931 vendor_param
= snd_hda_codec_read(codec
, INTEL_VENDOR_NID
, 0,
1932 INTEL_SET_VENDOR_VERB
, vendor_param
);
1933 if (vendor_param
== -1)
1937 snd_hda_codec_update_widgets(codec
);
1940 static void intel_haswell_fixup_enable_dp12(struct hda_codec
*codec
)
1942 unsigned int vendor_param
;
1944 vendor_param
= snd_hda_codec_read(codec
, INTEL_VENDOR_NID
, 0,
1945 INTEL_GET_VENDOR_VERB
, 0);
1946 if (vendor_param
== -1 || vendor_param
& INTEL_EN_DP12
)
1949 /* enable DP1.2 mode */
1950 vendor_param
|= INTEL_EN_DP12
;
1951 snd_hda_codec_write_cache(codec
, INTEL_VENDOR_NID
, 0,
1952 INTEL_SET_VENDOR_VERB
, vendor_param
);
1955 /* Haswell needs to re-issue the vendor-specific verbs before turning to D0.
1956 * Otherwise you may get severe h/w communication errors.
1958 static void haswell_set_power_state(struct hda_codec
*codec
, hda_nid_t fg
,
1959 unsigned int power_state
)
1961 if (power_state
== AC_PWRST_D0
) {
1962 intel_haswell_enable_all_pins(codec
, false);
1963 intel_haswell_fixup_enable_dp12(codec
);
1966 snd_hda_codec_read(codec
, fg
, 0, AC_VERB_SET_POWER_STATE
, power_state
);
1967 snd_hda_codec_set_power_to_all(codec
, fg
, power_state
);
1970 static int patch_generic_hdmi(struct hda_codec
*codec
)
1972 struct hdmi_spec
*spec
;
1974 spec
= kzalloc(sizeof(*spec
), GFP_KERNEL
);
1979 hdmi_array_init(spec
, 4);
1981 if (codec
->vendor_id
== 0x80862807) {
1982 intel_haswell_enable_all_pins(codec
, true);
1983 intel_haswell_fixup_enable_dp12(codec
);
1986 if (hdmi_parse_codec(codec
) < 0) {
1991 codec
->patch_ops
= generic_hdmi_patch_ops
;
1992 if (codec
->vendor_id
== 0x80862807)
1993 codec
->patch_ops
.set_power_state
= haswell_set_power_state
;
1995 generic_hdmi_init_per_pins(codec
);
1997 init_channel_allocations();
2003 * Shared non-generic implementations
2006 static int simple_playback_build_pcms(struct hda_codec
*codec
)
2008 struct hdmi_spec
*spec
= codec
->spec
;
2009 struct hda_pcm
*info
;
2011 struct hda_pcm_stream
*pstr
;
2012 struct hdmi_spec_per_cvt
*per_cvt
;
2014 per_cvt
= get_cvt(spec
, 0);
2015 chans
= get_wcaps(codec
, per_cvt
->cvt_nid
);
2016 chans
= get_wcaps_channels(chans
);
2018 info
= snd_array_new(&spec
->pcm_rec
);
2021 info
->name
= get_pin(spec
, 0)->pcm_name
;
2022 sprintf(info
->name
, "HDMI 0");
2023 info
->pcm_type
= HDA_PCM_TYPE_HDMI
;
2024 pstr
= &info
->stream
[SNDRV_PCM_STREAM_PLAYBACK
];
2025 *pstr
= spec
->pcm_playback
;
2026 pstr
->nid
= per_cvt
->cvt_nid
;
2027 if (pstr
->channels_max
<= 2 && chans
&& chans
<= 16)
2028 pstr
->channels_max
= chans
;
2030 codec
->num_pcms
= 1;
2031 codec
->pcm_info
= info
;
2036 /* unsolicited event for jack sensing */
2037 static void simple_hdmi_unsol_event(struct hda_codec
*codec
,
2040 snd_hda_jack_set_dirty_all(codec
);
2041 snd_hda_jack_report_sync(codec
);
2044 /* generic_hdmi_build_jack can be used for simple_hdmi, too,
2045 * as long as spec->pins[] is set correctly
2047 #define simple_hdmi_build_jack generic_hdmi_build_jack
2049 static int simple_playback_build_controls(struct hda_codec
*codec
)
2051 struct hdmi_spec
*spec
= codec
->spec
;
2052 struct hdmi_spec_per_cvt
*per_cvt
;
2055 per_cvt
= get_cvt(spec
, 0);
2056 err
= snd_hda_create_spdif_out_ctls(codec
, per_cvt
->cvt_nid
,
2060 return simple_hdmi_build_jack(codec
, 0);
2063 static int simple_playback_init(struct hda_codec
*codec
)
2065 struct hdmi_spec
*spec
= codec
->spec
;
2066 struct hdmi_spec_per_pin
*per_pin
= get_pin(spec
, 0);
2067 hda_nid_t pin
= per_pin
->pin_nid
;
2069 snd_hda_codec_write(codec
, pin
, 0,
2070 AC_VERB_SET_PIN_WIDGET_CONTROL
, PIN_OUT
);
2071 /* some codecs require to unmute the pin */
2072 if (get_wcaps(codec
, pin
) & AC_WCAP_OUT_AMP
)
2073 snd_hda_codec_write(codec
, pin
, 0, AC_VERB_SET_AMP_GAIN_MUTE
,
2075 snd_hda_jack_detect_enable(codec
, pin
, pin
);
2079 static void simple_playback_free(struct hda_codec
*codec
)
2081 struct hdmi_spec
*spec
= codec
->spec
;
2083 hdmi_array_free(spec
);
2088 * Nvidia specific implementations
2091 #define Nv_VERB_SET_Channel_Allocation 0xF79
2092 #define Nv_VERB_SET_Info_Frame_Checksum 0xF7A
2093 #define Nv_VERB_SET_Audio_Protection_On 0xF98
2094 #define Nv_VERB_SET_Audio_Protection_Off 0xF99
2096 #define nvhdmi_master_con_nid_7x 0x04
2097 #define nvhdmi_master_pin_nid_7x 0x05
2099 static const hda_nid_t nvhdmi_con_nids_7x
[4] = {
2100 /*front, rear, clfe, rear_surr */
2104 static const struct hda_verb nvhdmi_basic_init_7x_2ch
[] = {
2105 /* set audio protect on */
2106 { 0x1, Nv_VERB_SET_Audio_Protection_On
, 0x1},
2107 /* enable digital output on pin widget */
2108 { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL
, PIN_OUT
| 0x5 },
2112 static const struct hda_verb nvhdmi_basic_init_7x_8ch
[] = {
2113 /* set audio protect on */
2114 { 0x1, Nv_VERB_SET_Audio_Protection_On
, 0x1},
2115 /* enable digital output on pin widget */
2116 { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL
, PIN_OUT
| 0x5 },
2117 { 0x7, AC_VERB_SET_PIN_WIDGET_CONTROL
, PIN_OUT
| 0x5 },
2118 { 0x9, AC_VERB_SET_PIN_WIDGET_CONTROL
, PIN_OUT
| 0x5 },
2119 { 0xb, AC_VERB_SET_PIN_WIDGET_CONTROL
, PIN_OUT
| 0x5 },
2120 { 0xd, AC_VERB_SET_PIN_WIDGET_CONTROL
, PIN_OUT
| 0x5 },
2124 #ifdef LIMITED_RATE_FMT_SUPPORT
2125 /* support only the safe format and rate */
2126 #define SUPPORTED_RATES SNDRV_PCM_RATE_48000
2127 #define SUPPORTED_MAXBPS 16
2128 #define SUPPORTED_FORMATS SNDRV_PCM_FMTBIT_S16_LE
2130 /* support all rates and formats */
2131 #define SUPPORTED_RATES \
2132 (SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |\
2133 SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 |\
2134 SNDRV_PCM_RATE_192000)
2135 #define SUPPORTED_MAXBPS 24
2136 #define SUPPORTED_FORMATS \
2137 (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE)
2140 static int nvhdmi_7x_init_2ch(struct hda_codec
*codec
)
2142 snd_hda_sequence_write(codec
, nvhdmi_basic_init_7x_2ch
);
2146 static int nvhdmi_7x_init_8ch(struct hda_codec
*codec
)
2148 snd_hda_sequence_write(codec
, nvhdmi_basic_init_7x_8ch
);
2152 static unsigned int channels_2_6_8
[] = {
2156 static unsigned int channels_2_8
[] = {
2160 static struct snd_pcm_hw_constraint_list hw_constraints_2_6_8_channels
= {
2161 .count
= ARRAY_SIZE(channels_2_6_8
),
2162 .list
= channels_2_6_8
,
2166 static struct snd_pcm_hw_constraint_list hw_constraints_2_8_channels
= {
2167 .count
= ARRAY_SIZE(channels_2_8
),
2168 .list
= channels_2_8
,
2172 static int simple_playback_pcm_open(struct hda_pcm_stream
*hinfo
,
2173 struct hda_codec
*codec
,
2174 struct snd_pcm_substream
*substream
)
2176 struct hdmi_spec
*spec
= codec
->spec
;
2177 struct snd_pcm_hw_constraint_list
*hw_constraints_channels
= NULL
;
2179 switch (codec
->preset
->id
) {
2184 hw_constraints_channels
= &hw_constraints_2_8_channels
;
2187 hw_constraints_channels
= &hw_constraints_2_6_8_channels
;
2193 if (hw_constraints_channels
!= NULL
) {
2194 snd_pcm_hw_constraint_list(substream
->runtime
, 0,
2195 SNDRV_PCM_HW_PARAM_CHANNELS
,
2196 hw_constraints_channels
);
2198 snd_pcm_hw_constraint_step(substream
->runtime
, 0,
2199 SNDRV_PCM_HW_PARAM_CHANNELS
, 2);
2202 return snd_hda_multi_out_dig_open(codec
, &spec
->multiout
);
2205 static int simple_playback_pcm_close(struct hda_pcm_stream
*hinfo
,
2206 struct hda_codec
*codec
,
2207 struct snd_pcm_substream
*substream
)
2209 struct hdmi_spec
*spec
= codec
->spec
;
2210 return snd_hda_multi_out_dig_close(codec
, &spec
->multiout
);
2213 static int simple_playback_pcm_prepare(struct hda_pcm_stream
*hinfo
,
2214 struct hda_codec
*codec
,
2215 unsigned int stream_tag
,
2216 unsigned int format
,
2217 struct snd_pcm_substream
*substream
)
2219 struct hdmi_spec
*spec
= codec
->spec
;
2220 return snd_hda_multi_out_dig_prepare(codec
, &spec
->multiout
,
2221 stream_tag
, format
, substream
);
2224 static const struct hda_pcm_stream simple_pcm_playback
= {
2229 .open
= simple_playback_pcm_open
,
2230 .close
= simple_playback_pcm_close
,
2231 .prepare
= simple_playback_pcm_prepare
2235 static const struct hda_codec_ops simple_hdmi_patch_ops
= {
2236 .build_controls
= simple_playback_build_controls
,
2237 .build_pcms
= simple_playback_build_pcms
,
2238 .init
= simple_playback_init
,
2239 .free
= simple_playback_free
,
2240 .unsol_event
= simple_hdmi_unsol_event
,
2243 static int patch_simple_hdmi(struct hda_codec
*codec
,
2244 hda_nid_t cvt_nid
, hda_nid_t pin_nid
)
2246 struct hdmi_spec
*spec
;
2247 struct hdmi_spec_per_cvt
*per_cvt
;
2248 struct hdmi_spec_per_pin
*per_pin
;
2250 spec
= kzalloc(sizeof(*spec
), GFP_KERNEL
);
2255 hdmi_array_init(spec
, 1);
2257 spec
->multiout
.num_dacs
= 0; /* no analog */
2258 spec
->multiout
.max_channels
= 2;
2259 spec
->multiout
.dig_out_nid
= cvt_nid
;
2262 per_pin
= snd_array_new(&spec
->pins
);
2263 per_cvt
= snd_array_new(&spec
->cvts
);
2264 if (!per_pin
|| !per_cvt
) {
2265 simple_playback_free(codec
);
2268 per_cvt
->cvt_nid
= cvt_nid
;
2269 per_pin
->pin_nid
= pin_nid
;
2270 spec
->pcm_playback
= simple_pcm_playback
;
2272 codec
->patch_ops
= simple_hdmi_patch_ops
;
2277 static void nvhdmi_8ch_7x_set_info_frame_parameters(struct hda_codec
*codec
,
2280 unsigned int chanmask
;
2281 int chan
= channels
? (channels
- 1) : 1;
2300 /* Set the audio infoframe channel allocation and checksum fields. The
2301 * channel count is computed implicitly by the hardware. */
2302 snd_hda_codec_write(codec
, 0x1, 0,
2303 Nv_VERB_SET_Channel_Allocation
, chanmask
);
2305 snd_hda_codec_write(codec
, 0x1, 0,
2306 Nv_VERB_SET_Info_Frame_Checksum
,
2307 (0x71 - chan
- chanmask
));
2310 static int nvhdmi_8ch_7x_pcm_close(struct hda_pcm_stream
*hinfo
,
2311 struct hda_codec
*codec
,
2312 struct snd_pcm_substream
*substream
)
2314 struct hdmi_spec
*spec
= codec
->spec
;
2317 snd_hda_codec_write(codec
, nvhdmi_master_con_nid_7x
,
2318 0, AC_VERB_SET_CHANNEL_STREAMID
, 0);
2319 for (i
= 0; i
< 4; i
++) {
2320 /* set the stream id */
2321 snd_hda_codec_write(codec
, nvhdmi_con_nids_7x
[i
], 0,
2322 AC_VERB_SET_CHANNEL_STREAMID
, 0);
2323 /* set the stream format */
2324 snd_hda_codec_write(codec
, nvhdmi_con_nids_7x
[i
], 0,
2325 AC_VERB_SET_STREAM_FORMAT
, 0);
2328 /* The audio hardware sends a channel count of 0x7 (8ch) when all the
2329 * streams are disabled. */
2330 nvhdmi_8ch_7x_set_info_frame_parameters(codec
, 8);
2332 return snd_hda_multi_out_dig_close(codec
, &spec
->multiout
);
2335 static int nvhdmi_8ch_7x_pcm_prepare(struct hda_pcm_stream
*hinfo
,
2336 struct hda_codec
*codec
,
2337 unsigned int stream_tag
,
2338 unsigned int format
,
2339 struct snd_pcm_substream
*substream
)
2342 unsigned int dataDCC2
, channel_id
;
2344 struct hdmi_spec
*spec
= codec
->spec
;
2345 struct hda_spdif_out
*spdif
;
2346 struct hdmi_spec_per_cvt
*per_cvt
;
2348 mutex_lock(&codec
->spdif_mutex
);
2349 per_cvt
= get_cvt(spec
, 0);
2350 spdif
= snd_hda_spdif_out_of_nid(codec
, per_cvt
->cvt_nid
);
2352 chs
= substream
->runtime
->channels
;
2356 /* turn off SPDIF once; otherwise the IEC958 bits won't be updated */
2357 if (codec
->spdif_status_reset
&& (spdif
->ctls
& AC_DIG1_ENABLE
))
2358 snd_hda_codec_write(codec
,
2359 nvhdmi_master_con_nid_7x
,
2361 AC_VERB_SET_DIGI_CONVERT_1
,
2362 spdif
->ctls
& ~AC_DIG1_ENABLE
& 0xff);
2364 /* set the stream id */
2365 snd_hda_codec_write(codec
, nvhdmi_master_con_nid_7x
, 0,
2366 AC_VERB_SET_CHANNEL_STREAMID
, (stream_tag
<< 4) | 0x0);
2368 /* set the stream format */
2369 snd_hda_codec_write(codec
, nvhdmi_master_con_nid_7x
, 0,
2370 AC_VERB_SET_STREAM_FORMAT
, format
);
2372 /* turn on again (if needed) */
2373 /* enable and set the channel status audio/data flag */
2374 if (codec
->spdif_status_reset
&& (spdif
->ctls
& AC_DIG1_ENABLE
)) {
2375 snd_hda_codec_write(codec
,
2376 nvhdmi_master_con_nid_7x
,
2378 AC_VERB_SET_DIGI_CONVERT_1
,
2379 spdif
->ctls
& 0xff);
2380 snd_hda_codec_write(codec
,
2381 nvhdmi_master_con_nid_7x
,
2383 AC_VERB_SET_DIGI_CONVERT_2
, dataDCC2
);
2386 for (i
= 0; i
< 4; i
++) {
2392 /* turn off SPDIF once;
2393 *otherwise the IEC958 bits won't be updated
2395 if (codec
->spdif_status_reset
&&
2396 (spdif
->ctls
& AC_DIG1_ENABLE
))
2397 snd_hda_codec_write(codec
,
2398 nvhdmi_con_nids_7x
[i
],
2400 AC_VERB_SET_DIGI_CONVERT_1
,
2401 spdif
->ctls
& ~AC_DIG1_ENABLE
& 0xff);
2402 /* set the stream id */
2403 snd_hda_codec_write(codec
,
2404 nvhdmi_con_nids_7x
[i
],
2406 AC_VERB_SET_CHANNEL_STREAMID
,
2407 (stream_tag
<< 4) | channel_id
);
2408 /* set the stream format */
2409 snd_hda_codec_write(codec
,
2410 nvhdmi_con_nids_7x
[i
],
2412 AC_VERB_SET_STREAM_FORMAT
,
2414 /* turn on again (if needed) */
2415 /* enable and set the channel status audio/data flag */
2416 if (codec
->spdif_status_reset
&&
2417 (spdif
->ctls
& AC_DIG1_ENABLE
)) {
2418 snd_hda_codec_write(codec
,
2419 nvhdmi_con_nids_7x
[i
],
2421 AC_VERB_SET_DIGI_CONVERT_1
,
2422 spdif
->ctls
& 0xff);
2423 snd_hda_codec_write(codec
,
2424 nvhdmi_con_nids_7x
[i
],
2426 AC_VERB_SET_DIGI_CONVERT_2
, dataDCC2
);
2430 nvhdmi_8ch_7x_set_info_frame_parameters(codec
, chs
);
2432 mutex_unlock(&codec
->spdif_mutex
);
2436 static const struct hda_pcm_stream nvhdmi_pcm_playback_8ch_7x
= {
2440 .nid
= nvhdmi_master_con_nid_7x
,
2441 .rates
= SUPPORTED_RATES
,
2442 .maxbps
= SUPPORTED_MAXBPS
,
2443 .formats
= SUPPORTED_FORMATS
,
2445 .open
= simple_playback_pcm_open
,
2446 .close
= nvhdmi_8ch_7x_pcm_close
,
2447 .prepare
= nvhdmi_8ch_7x_pcm_prepare
2451 static int patch_nvhdmi_2ch(struct hda_codec
*codec
)
2453 struct hdmi_spec
*spec
;
2454 int err
= patch_simple_hdmi(codec
, nvhdmi_master_con_nid_7x
,
2455 nvhdmi_master_pin_nid_7x
);
2459 codec
->patch_ops
.init
= nvhdmi_7x_init_2ch
;
2460 /* override the PCM rates, etc, as the codec doesn't give full list */
2462 spec
->pcm_playback
.rates
= SUPPORTED_RATES
;
2463 spec
->pcm_playback
.maxbps
= SUPPORTED_MAXBPS
;
2464 spec
->pcm_playback
.formats
= SUPPORTED_FORMATS
;
2468 static int nvhdmi_7x_8ch_build_pcms(struct hda_codec
*codec
)
2470 struct hdmi_spec
*spec
= codec
->spec
;
2471 int err
= simple_playback_build_pcms(codec
);
2473 struct hda_pcm
*info
= get_pcm_rec(spec
, 0);
2474 info
->own_chmap
= true;
2479 static int nvhdmi_7x_8ch_build_controls(struct hda_codec
*codec
)
2481 struct hdmi_spec
*spec
= codec
->spec
;
2482 struct hda_pcm
*info
;
2483 struct snd_pcm_chmap
*chmap
;
2486 err
= simple_playback_build_controls(codec
);
2490 /* add channel maps */
2491 info
= get_pcm_rec(spec
, 0);
2492 err
= snd_pcm_add_chmap_ctls(info
->pcm
,
2493 SNDRV_PCM_STREAM_PLAYBACK
,
2494 snd_pcm_alt_chmaps
, 8, 0, &chmap
);
2497 switch (codec
->preset
->id
) {
2502 chmap
->channel_mask
= (1U << 2) | (1U << 8);
2505 chmap
->channel_mask
= (1U << 2) | (1U << 6) | (1U << 8);
2510 static int patch_nvhdmi_8ch_7x(struct hda_codec
*codec
)
2512 struct hdmi_spec
*spec
;
2513 int err
= patch_nvhdmi_2ch(codec
);
2517 spec
->multiout
.max_channels
= 8;
2518 spec
->pcm_playback
= nvhdmi_pcm_playback_8ch_7x
;
2519 codec
->patch_ops
.init
= nvhdmi_7x_init_8ch
;
2520 codec
->patch_ops
.build_pcms
= nvhdmi_7x_8ch_build_pcms
;
2521 codec
->patch_ops
.build_controls
= nvhdmi_7x_8ch_build_controls
;
2523 /* Initialize the audio infoframe channel mask and checksum to something
2525 nvhdmi_8ch_7x_set_info_frame_parameters(codec
, 8);
2531 * ATI-specific implementations
2533 * FIXME: we may omit the whole this and use the generic code once after
2534 * it's confirmed to work.
2537 #define ATIHDMI_CVT_NID 0x02 /* audio converter */
2538 #define ATIHDMI_PIN_NID 0x03 /* HDMI output pin */
2540 static int atihdmi_playback_pcm_prepare(struct hda_pcm_stream
*hinfo
,
2541 struct hda_codec
*codec
,
2542 unsigned int stream_tag
,
2543 unsigned int format
,
2544 struct snd_pcm_substream
*substream
)
2546 struct hdmi_spec
*spec
= codec
->spec
;
2547 struct hdmi_spec_per_cvt
*per_cvt
= get_cvt(spec
, 0);
2548 int chans
= substream
->runtime
->channels
;
2551 err
= simple_playback_pcm_prepare(hinfo
, codec
, stream_tag
, format
,
2555 snd_hda_codec_write(codec
, per_cvt
->cvt_nid
, 0,
2556 AC_VERB_SET_CVT_CHAN_COUNT
, chans
- 1);
2558 for (i
= 0; i
< chans
; i
++) {
2559 snd_hda_codec_write(codec
, per_cvt
->cvt_nid
, 0,
2560 AC_VERB_SET_HDMI_CHAN_SLOT
,
2566 static int patch_atihdmi(struct hda_codec
*codec
)
2568 struct hdmi_spec
*spec
;
2569 int err
= patch_simple_hdmi(codec
, ATIHDMI_CVT_NID
, ATIHDMI_PIN_NID
);
2573 spec
->pcm_playback
.ops
.prepare
= atihdmi_playback_pcm_prepare
;
2577 /* VIA HDMI Implementation */
2578 #define VIAHDMI_CVT_NID 0x02 /* audio converter1 */
2579 #define VIAHDMI_PIN_NID 0x03 /* HDMI output pin1 */
2581 static int patch_via_hdmi(struct hda_codec
*codec
)
2583 return patch_simple_hdmi(codec
, VIAHDMI_CVT_NID
, VIAHDMI_PIN_NID
);
2589 static const struct hda_codec_preset snd_hda_preset_hdmi
[] = {
2590 { .id
= 0x1002793c, .name
= "RS600 HDMI", .patch
= patch_atihdmi
},
2591 { .id
= 0x10027919, .name
= "RS600 HDMI", .patch
= patch_atihdmi
},
2592 { .id
= 0x1002791a, .name
= "RS690/780 HDMI", .patch
= patch_atihdmi
},
2593 { .id
= 0x1002aa01, .name
= "R6xx HDMI", .patch
= patch_generic_hdmi
},
2594 { .id
= 0x10951390, .name
= "SiI1390 HDMI", .patch
= patch_generic_hdmi
},
2595 { .id
= 0x10951392, .name
= "SiI1392 HDMI", .patch
= patch_generic_hdmi
},
2596 { .id
= 0x17e80047, .name
= "Chrontel HDMI", .patch
= patch_generic_hdmi
},
2597 { .id
= 0x10de0002, .name
= "MCP77/78 HDMI", .patch
= patch_nvhdmi_8ch_7x
},
2598 { .id
= 0x10de0003, .name
= "MCP77/78 HDMI", .patch
= patch_nvhdmi_8ch_7x
},
2599 { .id
= 0x10de0005, .name
= "MCP77/78 HDMI", .patch
= patch_nvhdmi_8ch_7x
},
2600 { .id
= 0x10de0006, .name
= "MCP77/78 HDMI", .patch
= patch_nvhdmi_8ch_7x
},
2601 { .id
= 0x10de0007, .name
= "MCP79/7A HDMI", .patch
= patch_nvhdmi_8ch_7x
},
2602 { .id
= 0x10de000a, .name
= "GPU 0a HDMI/DP", .patch
= patch_generic_hdmi
},
2603 { .id
= 0x10de000b, .name
= "GPU 0b HDMI/DP", .patch
= patch_generic_hdmi
},
2604 { .id
= 0x10de000c, .name
= "MCP89 HDMI", .patch
= patch_generic_hdmi
},
2605 { .id
= 0x10de000d, .name
= "GPU 0d HDMI/DP", .patch
= patch_generic_hdmi
},
2606 { .id
= 0x10de0010, .name
= "GPU 10 HDMI/DP", .patch
= patch_generic_hdmi
},
2607 { .id
= 0x10de0011, .name
= "GPU 11 HDMI/DP", .patch
= patch_generic_hdmi
},
2608 { .id
= 0x10de0012, .name
= "GPU 12 HDMI/DP", .patch
= patch_generic_hdmi
},
2609 { .id
= 0x10de0013, .name
= "GPU 13 HDMI/DP", .patch
= patch_generic_hdmi
},
2610 { .id
= 0x10de0014, .name
= "GPU 14 HDMI/DP", .patch
= patch_generic_hdmi
},
2611 { .id
= 0x10de0015, .name
= "GPU 15 HDMI/DP", .patch
= patch_generic_hdmi
},
2612 { .id
= 0x10de0016, .name
= "GPU 16 HDMI/DP", .patch
= patch_generic_hdmi
},
2613 /* 17 is known to be absent */
2614 { .id
= 0x10de0018, .name
= "GPU 18 HDMI/DP", .patch
= patch_generic_hdmi
},
2615 { .id
= 0x10de0019, .name
= "GPU 19 HDMI/DP", .patch
= patch_generic_hdmi
},
2616 { .id
= 0x10de001a, .name
= "GPU 1a HDMI/DP", .patch
= patch_generic_hdmi
},
2617 { .id
= 0x10de001b, .name
= "GPU 1b HDMI/DP", .patch
= patch_generic_hdmi
},
2618 { .id
= 0x10de001c, .name
= "GPU 1c HDMI/DP", .patch
= patch_generic_hdmi
},
2619 { .id
= 0x10de0040, .name
= "GPU 40 HDMI/DP", .patch
= patch_generic_hdmi
},
2620 { .id
= 0x10de0041, .name
= "GPU 41 HDMI/DP", .patch
= patch_generic_hdmi
},
2621 { .id
= 0x10de0042, .name
= "GPU 42 HDMI/DP", .patch
= patch_generic_hdmi
},
2622 { .id
= 0x10de0043, .name
= "GPU 43 HDMI/DP", .patch
= patch_generic_hdmi
},
2623 { .id
= 0x10de0044, .name
= "GPU 44 HDMI/DP", .patch
= patch_generic_hdmi
},
2624 { .id
= 0x10de0051, .name
= "GPU 51 HDMI/DP", .patch
= patch_generic_hdmi
},
2625 { .id
= 0x10de0060, .name
= "GPU 60 HDMI/DP", .patch
= patch_generic_hdmi
},
2626 { .id
= 0x10de0067, .name
= "MCP67 HDMI", .patch
= patch_nvhdmi_2ch
},
2627 { .id
= 0x10de8001, .name
= "MCP73 HDMI", .patch
= patch_nvhdmi_2ch
},
2628 { .id
= 0x11069f80, .name
= "VX900 HDMI/DP", .patch
= patch_via_hdmi
},
2629 { .id
= 0x11069f81, .name
= "VX900 HDMI/DP", .patch
= patch_via_hdmi
},
2630 { .id
= 0x11069f84, .name
= "VX11 HDMI/DP", .patch
= patch_generic_hdmi
},
2631 { .id
= 0x11069f85, .name
= "VX11 HDMI/DP", .patch
= patch_generic_hdmi
},
2632 { .id
= 0x80860054, .name
= "IbexPeak HDMI", .patch
= patch_generic_hdmi
},
2633 { .id
= 0x80862801, .name
= "Bearlake HDMI", .patch
= patch_generic_hdmi
},
2634 { .id
= 0x80862802, .name
= "Cantiga HDMI", .patch
= patch_generic_hdmi
},
2635 { .id
= 0x80862803, .name
= "Eaglelake HDMI", .patch
= patch_generic_hdmi
},
2636 { .id
= 0x80862804, .name
= "IbexPeak HDMI", .patch
= patch_generic_hdmi
},
2637 { .id
= 0x80862805, .name
= "CougarPoint HDMI", .patch
= patch_generic_hdmi
},
2638 { .id
= 0x80862806, .name
= "PantherPoint HDMI", .patch
= patch_generic_hdmi
},
2639 { .id
= 0x80862807, .name
= "Haswell HDMI", .patch
= patch_generic_hdmi
},
2640 { .id
= 0x80862880, .name
= "CedarTrail HDMI", .patch
= patch_generic_hdmi
},
2641 { .id
= 0x808629fb, .name
= "Crestline HDMI", .patch
= patch_generic_hdmi
},
2645 MODULE_ALIAS("snd-hda-codec-id:1002793c");
2646 MODULE_ALIAS("snd-hda-codec-id:10027919");
2647 MODULE_ALIAS("snd-hda-codec-id:1002791a");
2648 MODULE_ALIAS("snd-hda-codec-id:1002aa01");
2649 MODULE_ALIAS("snd-hda-codec-id:10951390");
2650 MODULE_ALIAS("snd-hda-codec-id:10951392");
2651 MODULE_ALIAS("snd-hda-codec-id:10de0002");
2652 MODULE_ALIAS("snd-hda-codec-id:10de0003");
2653 MODULE_ALIAS("snd-hda-codec-id:10de0005");
2654 MODULE_ALIAS("snd-hda-codec-id:10de0006");
2655 MODULE_ALIAS("snd-hda-codec-id:10de0007");
2656 MODULE_ALIAS("snd-hda-codec-id:10de000a");
2657 MODULE_ALIAS("snd-hda-codec-id:10de000b");
2658 MODULE_ALIAS("snd-hda-codec-id:10de000c");
2659 MODULE_ALIAS("snd-hda-codec-id:10de000d");
2660 MODULE_ALIAS("snd-hda-codec-id:10de0010");
2661 MODULE_ALIAS("snd-hda-codec-id:10de0011");
2662 MODULE_ALIAS("snd-hda-codec-id:10de0012");
2663 MODULE_ALIAS("snd-hda-codec-id:10de0013");
2664 MODULE_ALIAS("snd-hda-codec-id:10de0014");
2665 MODULE_ALIAS("snd-hda-codec-id:10de0015");
2666 MODULE_ALIAS("snd-hda-codec-id:10de0016");
2667 MODULE_ALIAS("snd-hda-codec-id:10de0018");
2668 MODULE_ALIAS("snd-hda-codec-id:10de0019");
2669 MODULE_ALIAS("snd-hda-codec-id:10de001a");
2670 MODULE_ALIAS("snd-hda-codec-id:10de001b");
2671 MODULE_ALIAS("snd-hda-codec-id:10de001c");
2672 MODULE_ALIAS("snd-hda-codec-id:10de0040");
2673 MODULE_ALIAS("snd-hda-codec-id:10de0041");
2674 MODULE_ALIAS("snd-hda-codec-id:10de0042");
2675 MODULE_ALIAS("snd-hda-codec-id:10de0043");
2676 MODULE_ALIAS("snd-hda-codec-id:10de0044");
2677 MODULE_ALIAS("snd-hda-codec-id:10de0051");
2678 MODULE_ALIAS("snd-hda-codec-id:10de0060");
2679 MODULE_ALIAS("snd-hda-codec-id:10de0067");
2680 MODULE_ALIAS("snd-hda-codec-id:10de8001");
2681 MODULE_ALIAS("snd-hda-codec-id:11069f80");
2682 MODULE_ALIAS("snd-hda-codec-id:11069f81");
2683 MODULE_ALIAS("snd-hda-codec-id:11069f84");
2684 MODULE_ALIAS("snd-hda-codec-id:11069f85");
2685 MODULE_ALIAS("snd-hda-codec-id:17e80047");
2686 MODULE_ALIAS("snd-hda-codec-id:80860054");
2687 MODULE_ALIAS("snd-hda-codec-id:80862801");
2688 MODULE_ALIAS("snd-hda-codec-id:80862802");
2689 MODULE_ALIAS("snd-hda-codec-id:80862803");
2690 MODULE_ALIAS("snd-hda-codec-id:80862804");
2691 MODULE_ALIAS("snd-hda-codec-id:80862805");
2692 MODULE_ALIAS("snd-hda-codec-id:80862806");
2693 MODULE_ALIAS("snd-hda-codec-id:80862807");
2694 MODULE_ALIAS("snd-hda-codec-id:80862880");
2695 MODULE_ALIAS("snd-hda-codec-id:808629fb");
2697 MODULE_LICENSE("GPL");
2698 MODULE_DESCRIPTION("HDMI HD-audio codec");
2699 MODULE_ALIAS("snd-hda-codec-intelhdmi");
2700 MODULE_ALIAS("snd-hda-codec-nvhdmi");
2701 MODULE_ALIAS("snd-hda-codec-atihdmi");
2703 static struct hda_codec_preset_list intel_list
= {
2704 .preset
= snd_hda_preset_hdmi
,
2705 .owner
= THIS_MODULE
,
2708 static int __init
patch_hdmi_init(void)
2710 return snd_hda_add_codec_preset(&intel_list
);
2713 static void __exit
patch_hdmi_exit(void)
2715 snd_hda_delete_codec_preset(&intel_list
);
2718 module_init(patch_hdmi_init
)
2719 module_exit(patch_hdmi_exit
)