3 * patch_hdmi.c - routines for HDMI/DisplayPort codecs
5 * Copyright(c) 2008-2010 Intel Corporation. All rights reserved.
6 * Copyright (c) 2006 ATI Technologies Inc.
7 * Copyright (c) 2008 NVIDIA Corp. All rights reserved.
8 * Copyright (c) 2008 Wei Ni <wni@nvidia.com>
11 * Wu Fengguang <wfg@linux.intel.com>
14 * Wu Fengguang <wfg@linux.intel.com>
16 * This program is free software; you can redistribute it and/or modify it
17 * under the terms of the GNU General Public License as published by the Free
18 * Software Foundation; either version 2 of the License, or (at your option)
21 * This program is distributed in the hope that it will be useful, but
22 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
23 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
26 * You should have received a copy of the GNU General Public License
27 * along with this program; if not, write to the Free Software Foundation,
28 * Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
31 #include <linux/init.h>
32 #include <linux/delay.h>
33 #include <linux/slab.h>
34 #include <linux/module.h>
35 #include <sound/core.h>
36 #include <sound/jack.h>
37 #include "hda_codec.h"
38 #include "hda_local.h"
41 static bool static_hdmi_pcm
;
42 module_param(static_hdmi_pcm
, bool, 0644);
43 MODULE_PARM_DESC(static_hdmi_pcm
, "Don't restrict PCM parameters per ELD info");
46 * The HDMI/DisplayPort configuration can be highly dynamic. A graphics device
47 * could support N independent pipes, each of them can be connected to one or
48 * more ports (DVI, HDMI or DisplayPort).
50 * The HDA correspondence of pipes/ports are converter/pin nodes.
52 #define MAX_HDMI_CVTS 8
53 #define MAX_HDMI_PINS 8
55 struct hdmi_spec_per_cvt
{
58 unsigned int channels_min
;
59 unsigned int channels_max
;
65 struct hdmi_spec_per_pin
{
68 hda_nid_t mux_nids
[HDA_MAX_CONNECTIONS
];
70 struct hda_codec
*codec
;
71 struct hdmi_eld sink_eld
;
72 struct delayed_work work
;
78 struct hdmi_spec_per_cvt cvts
[MAX_HDMI_CVTS
];
81 struct hdmi_spec_per_pin pins
[MAX_HDMI_PINS
];
82 struct hda_pcm pcm_rec
[MAX_HDMI_PINS
];
85 * Non-generic ATI/NVIDIA specific
87 struct hda_multi_out multiout
;
88 const struct hda_pcm_stream
*pcm_playback
;
92 struct hdmi_audio_infoframe
{
99 u8 CC02_CT47
; /* CC in bits 0:2, CT in 4:7 */
103 u8 LFEPBL01_LSV36_DM_INH7
;
106 struct dp_audio_infoframe
{
109 u8 ver
; /* 0x11 << 2 */
111 u8 CC02_CT47
; /* match with HDMI infoframe from this on */
115 u8 LFEPBL01_LSV36_DM_INH7
;
118 union audio_infoframe
{
119 struct hdmi_audio_infoframe hdmi
;
120 struct dp_audio_infoframe dp
;
125 * CEA speaker placement:
128 * FLW FL FLC FC FRC FR FRW
135 * The Left/Right Surround channel _notions_ LS/RS in SMPTE 320M corresponds to
136 * CEA RL/RR; The SMPTE channel _assignment_ C/LFE is swapped to CEA LFE/FC.
138 enum cea_speaker_placement
{
139 FL
= (1 << 0), /* Front Left */
140 FC
= (1 << 1), /* Front Center */
141 FR
= (1 << 2), /* Front Right */
142 FLC
= (1 << 3), /* Front Left Center */
143 FRC
= (1 << 4), /* Front Right Center */
144 RL
= (1 << 5), /* Rear Left */
145 RC
= (1 << 6), /* Rear Center */
146 RR
= (1 << 7), /* Rear Right */
147 RLC
= (1 << 8), /* Rear Left Center */
148 RRC
= (1 << 9), /* Rear Right Center */
149 LFE
= (1 << 10), /* Low Frequency Effect */
150 FLW
= (1 << 11), /* Front Left Wide */
151 FRW
= (1 << 12), /* Front Right Wide */
152 FLH
= (1 << 13), /* Front Left High */
153 FCH
= (1 << 14), /* Front Center High */
154 FRH
= (1 << 15), /* Front Right High */
155 TC
= (1 << 16), /* Top Center */
159 * ELD SA bits in the CEA Speaker Allocation data block
161 static int eld_speaker_allocation_bits
[] = {
169 /* the following are not defined in ELD yet */
176 struct cea_channel_speaker_allocation
{
180 /* derived values, just for convenience */
188 * surround40 surround41 surround50 surround51 surround71
189 * ch0 front left = = = =
190 * ch1 front right = = = =
191 * ch2 rear left = = = =
192 * ch3 rear right = = = =
193 * ch4 LFE center center center
198 * surround71 = {FL, FR, RLC, RRC, FC, LFE, RL, RR}
200 static int hdmi_channel_mapping
[0x32][8] = {
202 [0x00] = { 0x00, 0x11, 0xf2, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 },
204 [0x01] = { 0x00, 0x11, 0x22, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 },
206 [0x02] = { 0x00, 0x11, 0x23, 0xf2, 0xf4, 0xf5, 0xf6, 0xf7 },
208 [0x08] = { 0x00, 0x11, 0x24, 0x35, 0xf3, 0xf2, 0xf6, 0xf7 },
210 [0x03] = { 0x00, 0x11, 0x23, 0x32, 0x44, 0xf5, 0xf6, 0xf7 },
212 [0x09] = { 0x00, 0x11, 0x24, 0x35, 0x42, 0xf3, 0xf6, 0xf7 },
214 [0x0a] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0xf2, 0xf6, 0xf7 },
216 [0x0b] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0x52, 0xf6, 0xf7 },
218 [0x13] = { 0x00, 0x11, 0x26, 0x37, 0x43, 0x52, 0x64, 0x75 },
222 * This is an ordered list!
224 * The preceding ones have better chances to be selected by
225 * hdmi_channel_allocation().
227 static struct cea_channel_speaker_allocation channel_allocations
[] = {
228 /* channel: 7 6 5 4 3 2 1 0 */
229 { .ca_index
= 0x00, .speakers
= { 0, 0, 0, 0, 0, 0, FR
, FL
} },
231 { .ca_index
= 0x01, .speakers
= { 0, 0, 0, 0, 0, LFE
, FR
, FL
} },
233 { .ca_index
= 0x02, .speakers
= { 0, 0, 0, 0, FC
, 0, FR
, FL
} },
235 { .ca_index
= 0x08, .speakers
= { 0, 0, RR
, RL
, 0, 0, FR
, FL
} },
237 { .ca_index
= 0x09, .speakers
= { 0, 0, RR
, RL
, 0, LFE
, FR
, FL
} },
239 { .ca_index
= 0x0a, .speakers
= { 0, 0, RR
, RL
, FC
, 0, FR
, FL
} },
241 { .ca_index
= 0x0b, .speakers
= { 0, 0, RR
, RL
, FC
, LFE
, FR
, FL
} },
243 { .ca_index
= 0x0f, .speakers
= { 0, RC
, RR
, RL
, FC
, LFE
, FR
, FL
} },
245 { .ca_index
= 0x13, .speakers
= { RRC
, RLC
, RR
, RL
, FC
, LFE
, FR
, FL
} },
247 { .ca_index
= 0x03, .speakers
= { 0, 0, 0, 0, FC
, LFE
, FR
, FL
} },
248 { .ca_index
= 0x04, .speakers
= { 0, 0, 0, RC
, 0, 0, FR
, FL
} },
249 { .ca_index
= 0x05, .speakers
= { 0, 0, 0, RC
, 0, LFE
, FR
, FL
} },
250 { .ca_index
= 0x06, .speakers
= { 0, 0, 0, RC
, FC
, 0, FR
, FL
} },
251 { .ca_index
= 0x07, .speakers
= { 0, 0, 0, RC
, FC
, LFE
, FR
, FL
} },
252 { .ca_index
= 0x0c, .speakers
= { 0, RC
, RR
, RL
, 0, 0, FR
, FL
} },
253 { .ca_index
= 0x0d, .speakers
= { 0, RC
, RR
, RL
, 0, LFE
, FR
, FL
} },
254 { .ca_index
= 0x0e, .speakers
= { 0, RC
, RR
, RL
, FC
, 0, FR
, FL
} },
255 { .ca_index
= 0x10, .speakers
= { RRC
, RLC
, RR
, RL
, 0, 0, FR
, FL
} },
256 { .ca_index
= 0x11, .speakers
= { RRC
, RLC
, RR
, RL
, 0, LFE
, FR
, FL
} },
257 { .ca_index
= 0x12, .speakers
= { RRC
, RLC
, RR
, RL
, FC
, 0, FR
, FL
} },
258 { .ca_index
= 0x14, .speakers
= { FRC
, FLC
, 0, 0, 0, 0, FR
, FL
} },
259 { .ca_index
= 0x15, .speakers
= { FRC
, FLC
, 0, 0, 0, LFE
, FR
, FL
} },
260 { .ca_index
= 0x16, .speakers
= { FRC
, FLC
, 0, 0, FC
, 0, FR
, FL
} },
261 { .ca_index
= 0x17, .speakers
= { FRC
, FLC
, 0, 0, FC
, LFE
, FR
, FL
} },
262 { .ca_index
= 0x18, .speakers
= { FRC
, FLC
, 0, RC
, 0, 0, FR
, FL
} },
263 { .ca_index
= 0x19, .speakers
= { FRC
, FLC
, 0, RC
, 0, LFE
, FR
, FL
} },
264 { .ca_index
= 0x1a, .speakers
= { FRC
, FLC
, 0, RC
, FC
, 0, FR
, FL
} },
265 { .ca_index
= 0x1b, .speakers
= { FRC
, FLC
, 0, RC
, FC
, LFE
, FR
, FL
} },
266 { .ca_index
= 0x1c, .speakers
= { FRC
, FLC
, RR
, RL
, 0, 0, FR
, FL
} },
267 { .ca_index
= 0x1d, .speakers
= { FRC
, FLC
, RR
, RL
, 0, LFE
, FR
, FL
} },
268 { .ca_index
= 0x1e, .speakers
= { FRC
, FLC
, RR
, RL
, FC
, 0, FR
, FL
} },
269 { .ca_index
= 0x1f, .speakers
= { FRC
, FLC
, RR
, RL
, FC
, LFE
, FR
, FL
} },
270 { .ca_index
= 0x20, .speakers
= { 0, FCH
, RR
, RL
, FC
, 0, FR
, FL
} },
271 { .ca_index
= 0x21, .speakers
= { 0, FCH
, RR
, RL
, FC
, LFE
, FR
, FL
} },
272 { .ca_index
= 0x22, .speakers
= { TC
, 0, RR
, RL
, FC
, 0, FR
, FL
} },
273 { .ca_index
= 0x23, .speakers
= { TC
, 0, RR
, RL
, FC
, LFE
, FR
, FL
} },
274 { .ca_index
= 0x24, .speakers
= { FRH
, FLH
, RR
, RL
, 0, 0, FR
, FL
} },
275 { .ca_index
= 0x25, .speakers
= { FRH
, FLH
, RR
, RL
, 0, LFE
, FR
, FL
} },
276 { .ca_index
= 0x26, .speakers
= { FRW
, FLW
, RR
, RL
, 0, 0, FR
, FL
} },
277 { .ca_index
= 0x27, .speakers
= { FRW
, FLW
, RR
, RL
, 0, LFE
, FR
, FL
} },
278 { .ca_index
= 0x28, .speakers
= { TC
, RC
, RR
, RL
, FC
, 0, FR
, FL
} },
279 { .ca_index
= 0x29, .speakers
= { TC
, RC
, RR
, RL
, FC
, LFE
, FR
, FL
} },
280 { .ca_index
= 0x2a, .speakers
= { FCH
, RC
, RR
, RL
, FC
, 0, FR
, FL
} },
281 { .ca_index
= 0x2b, .speakers
= { FCH
, RC
, RR
, RL
, FC
, LFE
, FR
, FL
} },
282 { .ca_index
= 0x2c, .speakers
= { TC
, FCH
, RR
, RL
, FC
, 0, FR
, FL
} },
283 { .ca_index
= 0x2d, .speakers
= { TC
, FCH
, RR
, RL
, FC
, LFE
, FR
, FL
} },
284 { .ca_index
= 0x2e, .speakers
= { FRH
, FLH
, RR
, RL
, FC
, 0, FR
, FL
} },
285 { .ca_index
= 0x2f, .speakers
= { FRH
, FLH
, RR
, RL
, FC
, LFE
, FR
, FL
} },
286 { .ca_index
= 0x30, .speakers
= { FRW
, FLW
, RR
, RL
, FC
, 0, FR
, FL
} },
287 { .ca_index
= 0x31, .speakers
= { FRW
, FLW
, RR
, RL
, FC
, LFE
, FR
, FL
} },
295 static int pin_nid_to_pin_index(struct hdmi_spec
*spec
, hda_nid_t pin_nid
)
299 for (pin_idx
= 0; pin_idx
< spec
->num_pins
; pin_idx
++)
300 if (spec
->pins
[pin_idx
].pin_nid
== pin_nid
)
303 snd_printk(KERN_WARNING
"HDMI: pin nid %d not registered\n", pin_nid
);
307 static int hinfo_to_pin_index(struct hdmi_spec
*spec
,
308 struct hda_pcm_stream
*hinfo
)
312 for (pin_idx
= 0; pin_idx
< spec
->num_pins
; pin_idx
++)
313 if (&spec
->pcm_rec
[pin_idx
].stream
[0] == hinfo
)
316 snd_printk(KERN_WARNING
"HDMI: hinfo %p not registered\n", hinfo
);
320 static int cvt_nid_to_cvt_index(struct hdmi_spec
*spec
, hda_nid_t cvt_nid
)
324 for (cvt_idx
= 0; cvt_idx
< spec
->num_cvts
; cvt_idx
++)
325 if (spec
->cvts
[cvt_idx
].cvt_nid
== cvt_nid
)
328 snd_printk(KERN_WARNING
"HDMI: cvt nid %d not registered\n", cvt_nid
);
332 static int hdmi_eld_ctl_info(struct snd_kcontrol
*kcontrol
,
333 struct snd_ctl_elem_info
*uinfo
)
335 struct hda_codec
*codec
= snd_kcontrol_chip(kcontrol
);
336 struct hdmi_spec
*spec
;
340 uinfo
->type
= SNDRV_CTL_ELEM_TYPE_BYTES
;
342 pin_idx
= kcontrol
->private_value
;
343 uinfo
->count
= spec
->pins
[pin_idx
].sink_eld
.eld_size
;
348 static int hdmi_eld_ctl_get(struct snd_kcontrol
*kcontrol
,
349 struct snd_ctl_elem_value
*ucontrol
)
351 struct hda_codec
*codec
= snd_kcontrol_chip(kcontrol
);
352 struct hdmi_spec
*spec
;
356 pin_idx
= kcontrol
->private_value
;
358 memcpy(ucontrol
->value
.bytes
.data
,
359 spec
->pins
[pin_idx
].sink_eld
.eld_buffer
, ELD_MAX_SIZE
);
364 static struct snd_kcontrol_new eld_bytes_ctl
= {
365 .access
= SNDRV_CTL_ELEM_ACCESS_READ
| SNDRV_CTL_ELEM_ACCESS_VOLATILE
,
366 .iface
= SNDRV_CTL_ELEM_IFACE_PCM
,
368 .info
= hdmi_eld_ctl_info
,
369 .get
= hdmi_eld_ctl_get
,
372 static int hdmi_create_eld_ctl(struct hda_codec
*codec
, int pin_idx
,
375 struct snd_kcontrol
*kctl
;
376 struct hdmi_spec
*spec
= codec
->spec
;
379 kctl
= snd_ctl_new1(&eld_bytes_ctl
, codec
);
382 kctl
->private_value
= pin_idx
;
383 kctl
->id
.device
= device
;
385 err
= snd_hda_ctl_add(codec
, spec
->pins
[pin_idx
].pin_nid
, kctl
);
393 static void hdmi_get_dip_index(struct hda_codec
*codec
, hda_nid_t pin_nid
,
394 int *packet_index
, int *byte_index
)
398 val
= snd_hda_codec_read(codec
, pin_nid
, 0,
399 AC_VERB_GET_HDMI_DIP_INDEX
, 0);
401 *packet_index
= val
>> 5;
402 *byte_index
= val
& 0x1f;
406 static void hdmi_set_dip_index(struct hda_codec
*codec
, hda_nid_t pin_nid
,
407 int packet_index
, int byte_index
)
411 val
= (packet_index
<< 5) | (byte_index
& 0x1f);
413 snd_hda_codec_write(codec
, pin_nid
, 0, AC_VERB_SET_HDMI_DIP_INDEX
, val
);
416 static void hdmi_write_dip_byte(struct hda_codec
*codec
, hda_nid_t pin_nid
,
419 snd_hda_codec_write(codec
, pin_nid
, 0, AC_VERB_SET_HDMI_DIP_DATA
, val
);
422 static void hdmi_init_pin(struct hda_codec
*codec
, hda_nid_t pin_nid
)
425 if (get_wcaps(codec
, pin_nid
) & AC_WCAP_OUT_AMP
)
426 snd_hda_codec_write(codec
, pin_nid
, 0,
427 AC_VERB_SET_AMP_GAIN_MUTE
, AMP_OUT_UNMUTE
);
428 /* Disable pin out until stream is active*/
429 snd_hda_codec_write(codec
, pin_nid
, 0,
430 AC_VERB_SET_PIN_WIDGET_CONTROL
, 0);
433 static int hdmi_get_channel_count(struct hda_codec
*codec
, hda_nid_t cvt_nid
)
435 return 1 + snd_hda_codec_read(codec
, cvt_nid
, 0,
436 AC_VERB_GET_CVT_CHAN_COUNT
, 0);
439 static void hdmi_set_channel_count(struct hda_codec
*codec
,
440 hda_nid_t cvt_nid
, int chs
)
442 if (chs
!= hdmi_get_channel_count(codec
, cvt_nid
))
443 snd_hda_codec_write(codec
, cvt_nid
, 0,
444 AC_VERB_SET_CVT_CHAN_COUNT
, chs
- 1);
449 * Channel mapping routines
453 * Compute derived values in channel_allocations[].
455 static void init_channel_allocations(void)
458 struct cea_channel_speaker_allocation
*p
;
460 for (i
= 0; i
< ARRAY_SIZE(channel_allocations
); i
++) {
461 p
= channel_allocations
+ i
;
464 for (j
= 0; j
< ARRAY_SIZE(p
->speakers
); j
++)
465 if (p
->speakers
[j
]) {
467 p
->spk_mask
|= p
->speakers
[j
];
473 * The transformation takes two steps:
475 * eld->spk_alloc => (eld_speaker_allocation_bits[]) => spk_mask
476 * spk_mask => (channel_allocations[]) => ai->CA
478 * TODO: it could select the wrong CA from multiple candidates.
480 static int hdmi_channel_allocation(struct hdmi_eld
*eld
, int channels
)
485 char buf
[SND_PRINT_CHANNEL_ALLOCATION_ADVISED_BUFSIZE
];
488 * CA defaults to 0 for basic stereo audio
494 * expand ELD's speaker allocation mask
496 * ELD tells the speaker mask in a compact(paired) form,
497 * expand ELD's notions to match the ones used by Audio InfoFrame.
499 for (i
= 0; i
< ARRAY_SIZE(eld_speaker_allocation_bits
); i
++) {
500 if (eld
->spk_alloc
& (1 << i
))
501 spk_mask
|= eld_speaker_allocation_bits
[i
];
504 /* search for the first working match in the CA table */
505 for (i
= 0; i
< ARRAY_SIZE(channel_allocations
); i
++) {
506 if (channels
== channel_allocations
[i
].channels
&&
507 (spk_mask
& channel_allocations
[i
].spk_mask
) ==
508 channel_allocations
[i
].spk_mask
) {
509 ca
= channel_allocations
[i
].ca_index
;
514 snd_print_channel_allocation(eld
->spk_alloc
, buf
, sizeof(buf
));
515 snd_printdd("HDMI: select CA 0x%x for %d-channel allocation: %s\n",
521 static void hdmi_debug_channel_mapping(struct hda_codec
*codec
,
524 #ifdef CONFIG_SND_DEBUG_VERBOSE
528 for (i
= 0; i
< 8; i
++) {
529 slot
= snd_hda_codec_read(codec
, pin_nid
, 0,
530 AC_VERB_GET_HDMI_CHAN_SLOT
, i
);
531 printk(KERN_DEBUG
"HDMI: ASP channel %d => slot %d\n",
532 slot
>> 4, slot
& 0xf);
538 static void hdmi_setup_channel_mapping(struct hda_codec
*codec
,
545 if (hdmi_channel_mapping
[ca
][1] == 0) {
546 for (i
= 0; i
< channel_allocations
[ca
].channels
; i
++)
547 hdmi_channel_mapping
[ca
][i
] = i
| (i
<< 4);
549 hdmi_channel_mapping
[ca
][i
] = 0xf | (i
<< 4);
552 for (i
= 0; i
< 8; i
++) {
553 err
= snd_hda_codec_write(codec
, pin_nid
, 0,
554 AC_VERB_SET_HDMI_CHAN_SLOT
,
555 hdmi_channel_mapping
[ca
][i
]);
557 snd_printdd(KERN_NOTICE
558 "HDMI: channel mapping failed\n");
563 hdmi_debug_channel_mapping(codec
, pin_nid
);
568 * Audio InfoFrame routines
572 * Enable Audio InfoFrame Transmission
574 static void hdmi_start_infoframe_trans(struct hda_codec
*codec
,
577 hdmi_set_dip_index(codec
, pin_nid
, 0x0, 0x0);
578 snd_hda_codec_write(codec
, pin_nid
, 0, AC_VERB_SET_HDMI_DIP_XMIT
,
583 * Disable Audio InfoFrame Transmission
585 static void hdmi_stop_infoframe_trans(struct hda_codec
*codec
,
588 hdmi_set_dip_index(codec
, pin_nid
, 0x0, 0x0);
589 snd_hda_codec_write(codec
, pin_nid
, 0, AC_VERB_SET_HDMI_DIP_XMIT
,
593 static void hdmi_debug_dip_size(struct hda_codec
*codec
, hda_nid_t pin_nid
)
595 #ifdef CONFIG_SND_DEBUG_VERBOSE
599 size
= snd_hdmi_get_eld_size(codec
, pin_nid
);
600 printk(KERN_DEBUG
"HDMI: ELD buf size is %d\n", size
);
602 for (i
= 0; i
< 8; i
++) {
603 size
= snd_hda_codec_read(codec
, pin_nid
, 0,
604 AC_VERB_GET_HDMI_DIP_SIZE
, i
);
605 printk(KERN_DEBUG
"HDMI: DIP GP[%d] buf size is %d\n", i
, size
);
610 static void hdmi_clear_dip_buffers(struct hda_codec
*codec
, hda_nid_t pin_nid
)
616 for (i
= 0; i
< 8; i
++) {
617 size
= snd_hda_codec_read(codec
, pin_nid
, 0,
618 AC_VERB_GET_HDMI_DIP_SIZE
, i
);
622 hdmi_set_dip_index(codec
, pin_nid
, i
, 0x0);
623 for (j
= 1; j
< 1000; j
++) {
624 hdmi_write_dip_byte(codec
, pin_nid
, 0x0);
625 hdmi_get_dip_index(codec
, pin_nid
, &pi
, &bi
);
627 snd_printd(KERN_INFO
"dip index %d: %d != %d\n",
629 if (bi
== 0) /* byte index wrapped around */
633 "HDMI: DIP GP[%d] buf reported size=%d, written=%d\n",
639 static void hdmi_checksum_audio_infoframe(struct hdmi_audio_infoframe
*hdmi_ai
)
641 u8
*bytes
= (u8
*)hdmi_ai
;
645 hdmi_ai
->checksum
= 0;
647 for (i
= 0; i
< sizeof(*hdmi_ai
); i
++)
650 hdmi_ai
->checksum
= -sum
;
653 static void hdmi_fill_audio_infoframe(struct hda_codec
*codec
,
659 hdmi_debug_dip_size(codec
, pin_nid
);
660 hdmi_clear_dip_buffers(codec
, pin_nid
); /* be paranoid */
662 hdmi_set_dip_index(codec
, pin_nid
, 0x0, 0x0);
663 for (i
= 0; i
< size
; i
++)
664 hdmi_write_dip_byte(codec
, pin_nid
, dip
[i
]);
667 static bool hdmi_infoframe_uptodate(struct hda_codec
*codec
, hda_nid_t pin_nid
,
673 if (snd_hda_codec_read(codec
, pin_nid
, 0, AC_VERB_GET_HDMI_DIP_XMIT
, 0)
677 hdmi_set_dip_index(codec
, pin_nid
, 0x0, 0x0);
678 for (i
= 0; i
< size
; i
++) {
679 val
= snd_hda_codec_read(codec
, pin_nid
, 0,
680 AC_VERB_GET_HDMI_DIP_DATA
, 0);
688 static void hdmi_setup_audio_infoframe(struct hda_codec
*codec
, int pin_idx
,
689 struct snd_pcm_substream
*substream
)
691 struct hdmi_spec
*spec
= codec
->spec
;
692 struct hdmi_spec_per_pin
*per_pin
= &spec
->pins
[pin_idx
];
693 hda_nid_t pin_nid
= per_pin
->pin_nid
;
694 int channels
= substream
->runtime
->channels
;
695 struct hdmi_eld
*eld
;
697 union audio_infoframe ai
;
699 eld
= &spec
->pins
[pin_idx
].sink_eld
;
700 if (!eld
->monitor_present
)
703 ca
= hdmi_channel_allocation(eld
, channels
);
705 memset(&ai
, 0, sizeof(ai
));
706 if (eld
->conn_type
== 0) { /* HDMI */
707 struct hdmi_audio_infoframe
*hdmi_ai
= &ai
.hdmi
;
709 hdmi_ai
->type
= 0x84;
712 hdmi_ai
->CC02_CT47
= channels
- 1;
714 hdmi_checksum_audio_infoframe(hdmi_ai
);
715 } else if (eld
->conn_type
== 1) { /* DisplayPort */
716 struct dp_audio_infoframe
*dp_ai
= &ai
.dp
;
720 dp_ai
->ver
= 0x11 << 2;
721 dp_ai
->CC02_CT47
= channels
- 1;
724 snd_printd("HDMI: unknown connection type at pin %d\n",
730 * sizeof(ai) is used instead of sizeof(*hdmi_ai) or
731 * sizeof(*dp_ai) to avoid partial match/update problems when
732 * the user switches between HDMI/DP monitors.
734 if (!hdmi_infoframe_uptodate(codec
, pin_nid
, ai
.bytes
,
736 snd_printdd("hdmi_setup_audio_infoframe: "
737 "pin=%d channels=%d\n",
740 hdmi_setup_channel_mapping(codec
, pin_nid
, ca
);
741 hdmi_stop_infoframe_trans(codec
, pin_nid
);
742 hdmi_fill_audio_infoframe(codec
, pin_nid
,
743 ai
.bytes
, sizeof(ai
));
744 hdmi_start_infoframe_trans(codec
, pin_nid
);
753 static void hdmi_present_sense(struct hdmi_spec_per_pin
*per_pin
, int repoll
);
755 static void hdmi_intrinsic_event(struct hda_codec
*codec
, unsigned int res
)
757 struct hdmi_spec
*spec
= codec
->spec
;
758 int tag
= res
>> AC_UNSOL_RES_TAG_SHIFT
;
761 struct hda_jack_tbl
*jack
;
763 jack
= snd_hda_jack_tbl_get_from_tag(codec
, tag
);
767 jack
->jack_dirty
= 1;
769 _snd_printd(SND_PR_VERBOSE
,
770 "HDMI hot plug event: Codec=%d Pin=%d Presence_Detect=%d ELD_Valid=%d\n",
771 codec
->addr
, pin_nid
,
772 !!(res
& AC_UNSOL_RES_PD
), !!(res
& AC_UNSOL_RES_ELDV
));
774 pin_idx
= pin_nid_to_pin_index(spec
, pin_nid
);
778 hdmi_present_sense(&spec
->pins
[pin_idx
], 1);
779 snd_hda_jack_report_sync(codec
);
782 static void hdmi_non_intrinsic_event(struct hda_codec
*codec
, unsigned int res
)
784 int tag
= res
>> AC_UNSOL_RES_TAG_SHIFT
;
785 int subtag
= (res
& AC_UNSOL_RES_SUBTAG
) >> AC_UNSOL_RES_SUBTAG_SHIFT
;
786 int cp_state
= !!(res
& AC_UNSOL_RES_CP_STATE
);
787 int cp_ready
= !!(res
& AC_UNSOL_RES_CP_READY
);
790 "HDMI CP event: CODEC=%d PIN=%d SUBTAG=0x%x CP_STATE=%d CP_READY=%d\n",
805 static void hdmi_unsol_event(struct hda_codec
*codec
, unsigned int res
)
807 int tag
= res
>> AC_UNSOL_RES_TAG_SHIFT
;
808 int subtag
= (res
& AC_UNSOL_RES_SUBTAG
) >> AC_UNSOL_RES_SUBTAG_SHIFT
;
810 if (!snd_hda_jack_tbl_get_from_tag(codec
, tag
)) {
811 snd_printd(KERN_INFO
"Unexpected HDMI event tag 0x%x\n", tag
);
816 hdmi_intrinsic_event(codec
, res
);
818 hdmi_non_intrinsic_event(codec
, res
);
825 /* HBR should be Non-PCM, 8 channels */
826 #define is_hbr_format(format) \
827 ((format & AC_FMT_TYPE_NON_PCM) && (format & AC_FMT_CHAN_MASK) == 7)
829 static int hdmi_setup_stream(struct hda_codec
*codec
, hda_nid_t cvt_nid
,
830 hda_nid_t pin_nid
, u32 stream_tag
, int format
)
835 if (snd_hda_query_pin_caps(codec
, pin_nid
) & AC_PINCAP_HBR
) {
836 pinctl
= snd_hda_codec_read(codec
, pin_nid
, 0,
837 AC_VERB_GET_PIN_WIDGET_CONTROL
, 0);
839 new_pinctl
= pinctl
& ~AC_PINCTL_EPT
;
840 if (is_hbr_format(format
))
841 new_pinctl
|= AC_PINCTL_EPT_HBR
;
843 new_pinctl
|= AC_PINCTL_EPT_NATIVE
;
845 snd_printdd("hdmi_setup_stream: "
846 "NID=0x%x, %spinctl=0x%x\n",
848 pinctl
== new_pinctl
? "" : "new-",
851 if (pinctl
!= new_pinctl
)
852 snd_hda_codec_write(codec
, pin_nid
, 0,
853 AC_VERB_SET_PIN_WIDGET_CONTROL
,
857 if (is_hbr_format(format
) && !new_pinctl
) {
858 snd_printdd("hdmi_setup_stream: HBR is not supported\n");
862 snd_hda_codec_setup_stream(codec
, cvt_nid
, stream_tag
, 0, format
);
869 static int hdmi_pcm_open(struct hda_pcm_stream
*hinfo
,
870 struct hda_codec
*codec
,
871 struct snd_pcm_substream
*substream
)
873 struct hdmi_spec
*spec
= codec
->spec
;
874 struct snd_pcm_runtime
*runtime
= substream
->runtime
;
875 int pin_idx
, cvt_idx
, mux_idx
= 0;
876 struct hdmi_spec_per_pin
*per_pin
;
877 struct hdmi_eld
*eld
;
878 struct hdmi_spec_per_cvt
*per_cvt
= NULL
;
882 pin_idx
= hinfo_to_pin_index(spec
, hinfo
);
883 if (snd_BUG_ON(pin_idx
< 0))
885 per_pin
= &spec
->pins
[pin_idx
];
886 eld
= &per_pin
->sink_eld
;
888 /* Dynamically assign converter to stream */
889 for (cvt_idx
= 0; cvt_idx
< spec
->num_cvts
; cvt_idx
++) {
890 per_cvt
= &spec
->cvts
[cvt_idx
];
892 /* Must not already be assigned */
893 if (per_cvt
->assigned
)
895 /* Must be in pin's mux's list of converters */
896 for (mux_idx
= 0; mux_idx
< per_pin
->num_mux_nids
; mux_idx
++)
897 if (per_pin
->mux_nids
[mux_idx
] == per_cvt
->cvt_nid
)
899 /* Not in mux list */
900 if (mux_idx
== per_pin
->num_mux_nids
)
904 /* No free converters */
905 if (cvt_idx
== spec
->num_cvts
)
908 /* Claim converter */
909 per_cvt
->assigned
= 1;
910 hinfo
->nid
= per_cvt
->cvt_nid
;
912 snd_hda_codec_write(codec
, per_pin
->pin_nid
, 0,
913 AC_VERB_SET_CONNECT_SEL
,
915 pinctl
= snd_hda_codec_read(codec
, per_pin
->pin_nid
, 0,
916 AC_VERB_GET_PIN_WIDGET_CONTROL
, 0);
917 snd_hda_codec_write(codec
, per_pin
->pin_nid
, 0,
918 AC_VERB_SET_PIN_WIDGET_CONTROL
,
920 snd_hda_spdif_ctls_assign(codec
, pin_idx
, per_cvt
->cvt_nid
);
922 /* Initially set the converter's capabilities */
923 hinfo
->channels_min
= per_cvt
->channels_min
;
924 hinfo
->channels_max
= per_cvt
->channels_max
;
925 hinfo
->rates
= per_cvt
->rates
;
926 hinfo
->formats
= per_cvt
->formats
;
927 hinfo
->maxbps
= per_cvt
->maxbps
;
929 /* Restrict capabilities by ELD if this isn't disabled */
930 if (!static_hdmi_pcm
&& eld
->eld_valid
) {
931 snd_hdmi_eld_update_pcm_info(eld
, hinfo
);
932 if (hinfo
->channels_min
> hinfo
->channels_max
||
933 !hinfo
->rates
|| !hinfo
->formats
)
937 /* Store the updated parameters */
938 runtime
->hw
.channels_min
= hinfo
->channels_min
;
939 runtime
->hw
.channels_max
= hinfo
->channels_max
;
940 runtime
->hw
.formats
= hinfo
->formats
;
941 runtime
->hw
.rates
= hinfo
->rates
;
943 snd_pcm_hw_constraint_step(substream
->runtime
, 0,
944 SNDRV_PCM_HW_PARAM_CHANNELS
, 2);
949 * HDA/HDMI auto parsing
951 static int hdmi_read_pin_conn(struct hda_codec
*codec
, int pin_idx
)
953 struct hdmi_spec
*spec
= codec
->spec
;
954 struct hdmi_spec_per_pin
*per_pin
= &spec
->pins
[pin_idx
];
955 hda_nid_t pin_nid
= per_pin
->pin_nid
;
957 if (!(get_wcaps(codec
, pin_nid
) & AC_WCAP_CONN_LIST
)) {
958 snd_printk(KERN_WARNING
959 "HDMI: pin %d wcaps %#x "
960 "does not support connection list\n",
961 pin_nid
, get_wcaps(codec
, pin_nid
));
965 per_pin
->num_mux_nids
= snd_hda_get_connections(codec
, pin_nid
,
967 HDA_MAX_CONNECTIONS
);
972 static void hdmi_present_sense(struct hdmi_spec_per_pin
*per_pin
, int repoll
)
974 struct hda_codec
*codec
= per_pin
->codec
;
975 struct hdmi_eld
*eld
= &per_pin
->sink_eld
;
976 hda_nid_t pin_nid
= per_pin
->pin_nid
;
978 * Always execute a GetPinSense verb here, even when called from
979 * hdmi_intrinsic_event; for some NVIDIA HW, the unsolicited
980 * response's PD bit is not the real PD value, but indicates that
981 * the real PD value changed. An older version of the HD-audio
982 * specification worked this way. Hence, we just ignore the data in
983 * the unsolicited response to avoid custom WARs.
985 int present
= snd_hda_pin_sense(codec
, pin_nid
);
986 bool eld_valid
= false;
988 memset(eld
, 0, offsetof(struct hdmi_eld
, eld_buffer
));
990 eld
->monitor_present
= !!(present
& AC_PINSENSE_PRESENCE
);
991 if (eld
->monitor_present
)
992 eld_valid
= !!(present
& AC_PINSENSE_ELDV
);
994 _snd_printd(SND_PR_VERBOSE
,
995 "HDMI status: Codec=%d Pin=%d Presence_Detect=%d ELD_Valid=%d\n",
996 codec
->addr
, pin_nid
, eld
->monitor_present
, eld_valid
);
999 if (!snd_hdmi_get_eld(eld
, codec
, pin_nid
))
1000 snd_hdmi_show_eld(eld
);
1002 queue_delayed_work(codec
->bus
->workq
,
1004 msecs_to_jiffies(300));
1009 static void hdmi_repoll_eld(struct work_struct
*work
)
1011 struct hdmi_spec_per_pin
*per_pin
=
1012 container_of(to_delayed_work(work
), struct hdmi_spec_per_pin
, work
);
1014 if (per_pin
->repoll_count
++ > 6)
1015 per_pin
->repoll_count
= 0;
1017 hdmi_present_sense(per_pin
, per_pin
->repoll_count
);
1020 static int hdmi_add_pin(struct hda_codec
*codec
, hda_nid_t pin_nid
)
1022 struct hdmi_spec
*spec
= codec
->spec
;
1023 unsigned int caps
, config
;
1025 struct hdmi_spec_per_pin
*per_pin
;
1028 caps
= snd_hda_param_read(codec
, pin_nid
, AC_PAR_PIN_CAP
);
1029 if (!(caps
& (AC_PINCAP_HDMI
| AC_PINCAP_DP
)))
1032 config
= snd_hda_codec_read(codec
, pin_nid
, 0,
1033 AC_VERB_GET_CONFIG_DEFAULT
, 0);
1034 if (get_defcfg_connect(config
) == AC_JACK_PORT_NONE
)
1037 if (snd_BUG_ON(spec
->num_pins
>= MAX_HDMI_PINS
))
1040 pin_idx
= spec
->num_pins
;
1041 per_pin
= &spec
->pins
[pin_idx
];
1043 per_pin
->pin_nid
= pin_nid
;
1045 err
= hdmi_read_pin_conn(codec
, pin_idx
);
1054 static int hdmi_add_cvt(struct hda_codec
*codec
, hda_nid_t cvt_nid
)
1056 struct hdmi_spec
*spec
= codec
->spec
;
1058 struct hdmi_spec_per_cvt
*per_cvt
;
1062 if (snd_BUG_ON(spec
->num_cvts
>= MAX_HDMI_CVTS
))
1065 chans
= get_wcaps(codec
, cvt_nid
);
1066 chans
= get_wcaps_channels(chans
);
1068 cvt_idx
= spec
->num_cvts
;
1069 per_cvt
= &spec
->cvts
[cvt_idx
];
1071 per_cvt
->cvt_nid
= cvt_nid
;
1072 per_cvt
->channels_min
= 2;
1074 per_cvt
->channels_max
= chans
;
1076 err
= snd_hda_query_supported_pcm(codec
, cvt_nid
,
1088 static int hdmi_parse_codec(struct hda_codec
*codec
)
1093 nodes
= snd_hda_get_sub_nodes(codec
, codec
->afg
, &nid
);
1094 if (!nid
|| nodes
< 0) {
1095 snd_printk(KERN_WARNING
"HDMI: failed to get afg sub nodes\n");
1099 for (i
= 0; i
< nodes
; i
++, nid
++) {
1103 caps
= snd_hda_param_read(codec
, nid
, AC_PAR_AUDIO_WIDGET_CAP
);
1104 type
= get_wcaps_type(caps
);
1106 if (!(caps
& AC_WCAP_DIGITAL
))
1110 case AC_WID_AUD_OUT
:
1111 hdmi_add_cvt(codec
, nid
);
1114 hdmi_add_pin(codec
, nid
);
1120 * G45/IbexPeak don't support EPSS: the unsolicited pin hot plug event
1121 * can be lost and presence sense verb will become inaccurate if the
1122 * HDA link is powered off at hot plug or hw initialization time.
1124 #ifdef CONFIG_SND_HDA_POWER_SAVE
1125 if (!(snd_hda_param_read(codec
, codec
->afg
, AC_PAR_POWER_STATE
) &
1127 codec
->bus
->power_keep_link_on
= 1;
1135 static char *get_hdmi_pcm_name(int idx
)
1137 static char names
[MAX_HDMI_PINS
][8];
1138 sprintf(&names
[idx
][0], "HDMI %d", idx
);
1139 return &names
[idx
][0];
1146 static int generic_hdmi_playback_pcm_prepare(struct hda_pcm_stream
*hinfo
,
1147 struct hda_codec
*codec
,
1148 unsigned int stream_tag
,
1149 unsigned int format
,
1150 struct snd_pcm_substream
*substream
)
1152 hda_nid_t cvt_nid
= hinfo
->nid
;
1153 struct hdmi_spec
*spec
= codec
->spec
;
1154 int pin_idx
= hinfo_to_pin_index(spec
, hinfo
);
1155 hda_nid_t pin_nid
= spec
->pins
[pin_idx
].pin_nid
;
1157 hdmi_set_channel_count(codec
, cvt_nid
, substream
->runtime
->channels
);
1159 hdmi_setup_audio_infoframe(codec
, pin_idx
, substream
);
1161 return hdmi_setup_stream(codec
, cvt_nid
, pin_nid
, stream_tag
, format
);
1164 static int generic_hdmi_playback_pcm_cleanup(struct hda_pcm_stream
*hinfo
,
1165 struct hda_codec
*codec
,
1166 struct snd_pcm_substream
*substream
)
1168 struct hdmi_spec
*spec
= codec
->spec
;
1169 int cvt_idx
, pin_idx
;
1170 struct hdmi_spec_per_cvt
*per_cvt
;
1171 struct hdmi_spec_per_pin
*per_pin
;
1174 snd_hda_codec_cleanup_stream(codec
, hinfo
->nid
);
1177 cvt_idx
= cvt_nid_to_cvt_index(spec
, hinfo
->nid
);
1178 if (snd_BUG_ON(cvt_idx
< 0))
1180 per_cvt
= &spec
->cvts
[cvt_idx
];
1182 snd_BUG_ON(!per_cvt
->assigned
);
1183 per_cvt
->assigned
= 0;
1186 pin_idx
= hinfo_to_pin_index(spec
, hinfo
);
1187 if (snd_BUG_ON(pin_idx
< 0))
1189 per_pin
= &spec
->pins
[pin_idx
];
1191 pinctl
= snd_hda_codec_read(codec
, per_pin
->pin_nid
, 0,
1192 AC_VERB_GET_PIN_WIDGET_CONTROL
, 0);
1193 snd_hda_codec_write(codec
, per_pin
->pin_nid
, 0,
1194 AC_VERB_SET_PIN_WIDGET_CONTROL
,
1196 snd_hda_spdif_ctls_unassign(codec
, pin_idx
);
1202 static const struct hda_pcm_ops generic_ops
= {
1203 .open
= hdmi_pcm_open
,
1204 .prepare
= generic_hdmi_playback_pcm_prepare
,
1205 .cleanup
= generic_hdmi_playback_pcm_cleanup
,
1208 static int generic_hdmi_build_pcms(struct hda_codec
*codec
)
1210 struct hdmi_spec
*spec
= codec
->spec
;
1213 for (pin_idx
= 0; pin_idx
< spec
->num_pins
; pin_idx
++) {
1214 struct hda_pcm
*info
;
1215 struct hda_pcm_stream
*pstr
;
1217 info
= &spec
->pcm_rec
[pin_idx
];
1218 info
->name
= get_hdmi_pcm_name(pin_idx
);
1219 info
->pcm_type
= HDA_PCM_TYPE_HDMI
;
1221 pstr
= &info
->stream
[SNDRV_PCM_STREAM_PLAYBACK
];
1222 pstr
->substreams
= 1;
1223 pstr
->ops
= generic_ops
;
1224 /* other pstr fields are set in open */
1227 codec
->num_pcms
= spec
->num_pins
;
1228 codec
->pcm_info
= spec
->pcm_rec
;
1233 static int generic_hdmi_build_jack(struct hda_codec
*codec
, int pin_idx
)
1235 char hdmi_str
[32] = "HDMI/DP";
1236 struct hdmi_spec
*spec
= codec
->spec
;
1237 struct hdmi_spec_per_pin
*per_pin
= &spec
->pins
[pin_idx
];
1238 int pcmdev
= spec
->pcm_rec
[pin_idx
].device
;
1241 sprintf(hdmi_str
+ strlen(hdmi_str
), ",pcm=%d", pcmdev
);
1243 return snd_hda_jack_add_kctl(codec
, per_pin
->pin_nid
, hdmi_str
, 0);
1246 static int generic_hdmi_build_controls(struct hda_codec
*codec
)
1248 struct hdmi_spec
*spec
= codec
->spec
;
1252 for (pin_idx
= 0; pin_idx
< spec
->num_pins
; pin_idx
++) {
1253 struct hdmi_spec_per_pin
*per_pin
= &spec
->pins
[pin_idx
];
1255 err
= generic_hdmi_build_jack(codec
, pin_idx
);
1259 err
= snd_hda_create_spdif_out_ctls(codec
,
1261 per_pin
->mux_nids
[0]);
1264 snd_hda_spdif_ctls_unassign(codec
, pin_idx
);
1266 /* add control for ELD Bytes */
1267 err
= hdmi_create_eld_ctl(codec
,
1269 spec
->pcm_rec
[pin_idx
].device
);
1274 hdmi_present_sense(per_pin
, 0);
1280 static int generic_hdmi_init(struct hda_codec
*codec
)
1282 struct hdmi_spec
*spec
= codec
->spec
;
1285 for (pin_idx
= 0; pin_idx
< spec
->num_pins
; pin_idx
++) {
1286 struct hdmi_spec_per_pin
*per_pin
= &spec
->pins
[pin_idx
];
1287 hda_nid_t pin_nid
= per_pin
->pin_nid
;
1288 struct hdmi_eld
*eld
= &per_pin
->sink_eld
;
1290 hdmi_init_pin(codec
, pin_nid
);
1291 snd_hda_jack_detect_enable(codec
, pin_nid
, pin_nid
);
1293 per_pin
->codec
= codec
;
1294 INIT_DELAYED_WORK(&per_pin
->work
, hdmi_repoll_eld
);
1295 snd_hda_eld_proc_new(codec
, eld
, pin_idx
);
1297 snd_hda_jack_report_sync(codec
);
1301 static void generic_hdmi_free(struct hda_codec
*codec
)
1303 struct hdmi_spec
*spec
= codec
->spec
;
1306 for (pin_idx
= 0; pin_idx
< spec
->num_pins
; pin_idx
++) {
1307 struct hdmi_spec_per_pin
*per_pin
= &spec
->pins
[pin_idx
];
1308 struct hdmi_eld
*eld
= &per_pin
->sink_eld
;
1310 cancel_delayed_work(&per_pin
->work
);
1311 snd_hda_eld_proc_free(codec
, eld
);
1314 flush_workqueue(codec
->bus
->workq
);
1318 static const struct hda_codec_ops generic_hdmi_patch_ops
= {
1319 .init
= generic_hdmi_init
,
1320 .free
= generic_hdmi_free
,
1321 .build_pcms
= generic_hdmi_build_pcms
,
1322 .build_controls
= generic_hdmi_build_controls
,
1323 .unsol_event
= hdmi_unsol_event
,
1326 static int patch_generic_hdmi(struct hda_codec
*codec
)
1328 struct hdmi_spec
*spec
;
1330 spec
= kzalloc(sizeof(*spec
), GFP_KERNEL
);
1335 if (hdmi_parse_codec(codec
) < 0) {
1340 codec
->patch_ops
= generic_hdmi_patch_ops
;
1342 init_channel_allocations();
1348 * Shared non-generic implementations
1351 static int simple_playback_build_pcms(struct hda_codec
*codec
)
1353 struct hdmi_spec
*spec
= codec
->spec
;
1354 struct hda_pcm
*info
= spec
->pcm_rec
;
1357 codec
->num_pcms
= spec
->num_cvts
;
1358 codec
->pcm_info
= info
;
1360 for (i
= 0; i
< codec
->num_pcms
; i
++, info
++) {
1362 struct hda_pcm_stream
*pstr
;
1364 chans
= get_wcaps(codec
, spec
->cvts
[i
].cvt_nid
);
1365 chans
= get_wcaps_channels(chans
);
1367 info
->name
= get_hdmi_pcm_name(i
);
1368 info
->pcm_type
= HDA_PCM_TYPE_HDMI
;
1369 pstr
= &info
->stream
[SNDRV_PCM_STREAM_PLAYBACK
];
1370 snd_BUG_ON(!spec
->pcm_playback
);
1371 *pstr
= *spec
->pcm_playback
;
1372 pstr
->nid
= spec
->cvts
[i
].cvt_nid
;
1373 if (pstr
->channels_max
<= 2 && chans
&& chans
<= 16)
1374 pstr
->channels_max
= chans
;
1380 /* unsolicited event for jack sensing */
1381 static void simple_hdmi_unsol_event(struct hda_codec
*codec
,
1384 snd_hda_jack_get_action(codec
, res
>> AC_UNSOL_RES_TAG_SHIFT
);
1385 snd_hda_jack_report_sync(codec
);
1388 /* generic_hdmi_build_jack can be used for simple_hdmi, too,
1389 * as long as spec->pins[] is set correctly
1391 #define simple_hdmi_build_jack generic_hdmi_build_jack
1393 static int simple_playback_build_controls(struct hda_codec
*codec
)
1395 struct hdmi_spec
*spec
= codec
->spec
;
1399 for (i
= 0; i
< codec
->num_pcms
; i
++) {
1400 err
= snd_hda_create_spdif_out_ctls(codec
,
1401 spec
->cvts
[i
].cvt_nid
,
1402 spec
->cvts
[i
].cvt_nid
);
1405 if (codec
->patch_ops
.unsol_event
) {
1406 err
= simple_hdmi_build_jack(codec
, i
);
1415 static int simple_playback_init(struct hda_codec
*codec
)
1417 struct hdmi_spec
*spec
= codec
->spec
;
1420 for (i
= 0; i
< spec
->num_pins
; i
++) {
1421 snd_hda_codec_write(codec
, spec
->pins
[i
].pin_nid
, 0,
1422 AC_VERB_SET_PIN_WIDGET_CONTROL
, PIN_OUT
);
1423 /* some codecs require to unmute the pin */
1424 if (get_wcaps(codec
, spec
->pins
[i
].pin_nid
) & AC_WCAP_OUT_AMP
)
1425 snd_hda_codec_write(codec
, spec
->pins
[i
].pin_nid
, 0,
1426 AC_VERB_SET_AMP_GAIN_MUTE
,
1429 snd_hda_jack_report_sync(codec
);
1433 static void simple_playback_free(struct hda_codec
*codec
)
1435 struct hdmi_spec
*spec
= codec
->spec
;
1441 * Nvidia specific implementations
1444 #define Nv_VERB_SET_Channel_Allocation 0xF79
1445 #define Nv_VERB_SET_Info_Frame_Checksum 0xF7A
1446 #define Nv_VERB_SET_Audio_Protection_On 0xF98
1447 #define Nv_VERB_SET_Audio_Protection_Off 0xF99
1449 #define nvhdmi_master_con_nid_7x 0x04
1450 #define nvhdmi_master_pin_nid_7x 0x05
1452 static const hda_nid_t nvhdmi_con_nids_7x
[4] = {
1453 /*front, rear, clfe, rear_surr */
1457 static const struct hda_verb nvhdmi_basic_init_7x
[] = {
1458 /* set audio protect on */
1459 { 0x1, Nv_VERB_SET_Audio_Protection_On
, 0x1},
1460 /* enable digital output on pin widget */
1461 { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL
, PIN_OUT
| 0x5 },
1462 { 0x7, AC_VERB_SET_PIN_WIDGET_CONTROL
, PIN_OUT
| 0x5 },
1463 { 0x9, AC_VERB_SET_PIN_WIDGET_CONTROL
, PIN_OUT
| 0x5 },
1464 { 0xb, AC_VERB_SET_PIN_WIDGET_CONTROL
, PIN_OUT
| 0x5 },
1465 { 0xd, AC_VERB_SET_PIN_WIDGET_CONTROL
, PIN_OUT
| 0x5 },
1469 #ifdef LIMITED_RATE_FMT_SUPPORT
1470 /* support only the safe format and rate */
1471 #define SUPPORTED_RATES SNDRV_PCM_RATE_48000
1472 #define SUPPORTED_MAXBPS 16
1473 #define SUPPORTED_FORMATS SNDRV_PCM_FMTBIT_S16_LE
1475 /* support all rates and formats */
1476 #define SUPPORTED_RATES \
1477 (SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |\
1478 SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 |\
1479 SNDRV_PCM_RATE_192000)
1480 #define SUPPORTED_MAXBPS 24
1481 #define SUPPORTED_FORMATS \
1482 (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE)
1485 static int nvhdmi_7x_init(struct hda_codec
*codec
)
1487 snd_hda_sequence_write(codec
, nvhdmi_basic_init_7x
);
1491 static unsigned int channels_2_6_8
[] = {
1495 static unsigned int channels_2_8
[] = {
1499 static struct snd_pcm_hw_constraint_list hw_constraints_2_6_8_channels
= {
1500 .count
= ARRAY_SIZE(channels_2_6_8
),
1501 .list
= channels_2_6_8
,
1505 static struct snd_pcm_hw_constraint_list hw_constraints_2_8_channels
= {
1506 .count
= ARRAY_SIZE(channels_2_8
),
1507 .list
= channels_2_8
,
1511 static int simple_playback_pcm_open(struct hda_pcm_stream
*hinfo
,
1512 struct hda_codec
*codec
,
1513 struct snd_pcm_substream
*substream
)
1515 struct hdmi_spec
*spec
= codec
->spec
;
1516 struct snd_pcm_hw_constraint_list
*hw_constraints_channels
= NULL
;
1518 switch (codec
->preset
->id
) {
1523 hw_constraints_channels
= &hw_constraints_2_8_channels
;
1526 hw_constraints_channels
= &hw_constraints_2_6_8_channels
;
1532 if (hw_constraints_channels
!= NULL
) {
1533 snd_pcm_hw_constraint_list(substream
->runtime
, 0,
1534 SNDRV_PCM_HW_PARAM_CHANNELS
,
1535 hw_constraints_channels
);
1537 snd_pcm_hw_constraint_step(substream
->runtime
, 0,
1538 SNDRV_PCM_HW_PARAM_CHANNELS
, 2);
1541 return snd_hda_multi_out_dig_open(codec
, &spec
->multiout
);
1544 static int simple_playback_pcm_close(struct hda_pcm_stream
*hinfo
,
1545 struct hda_codec
*codec
,
1546 struct snd_pcm_substream
*substream
)
1548 struct hdmi_spec
*spec
= codec
->spec
;
1549 return snd_hda_multi_out_dig_close(codec
, &spec
->multiout
);
1552 static int simple_playback_pcm_prepare(struct hda_pcm_stream
*hinfo
,
1553 struct hda_codec
*codec
,
1554 unsigned int stream_tag
,
1555 unsigned int format
,
1556 struct snd_pcm_substream
*substream
)
1558 struct hdmi_spec
*spec
= codec
->spec
;
1559 return snd_hda_multi_out_dig_prepare(codec
, &spec
->multiout
,
1560 stream_tag
, format
, substream
);
1563 static void nvhdmi_8ch_7x_set_info_frame_parameters(struct hda_codec
*codec
,
1566 unsigned int chanmask
;
1567 int chan
= channels
? (channels
- 1) : 1;
1586 /* Set the audio infoframe channel allocation and checksum fields. The
1587 * channel count is computed implicitly by the hardware. */
1588 snd_hda_codec_write(codec
, 0x1, 0,
1589 Nv_VERB_SET_Channel_Allocation
, chanmask
);
1591 snd_hda_codec_write(codec
, 0x1, 0,
1592 Nv_VERB_SET_Info_Frame_Checksum
,
1593 (0x71 - chan
- chanmask
));
1596 static int nvhdmi_8ch_7x_pcm_close(struct hda_pcm_stream
*hinfo
,
1597 struct hda_codec
*codec
,
1598 struct snd_pcm_substream
*substream
)
1600 struct hdmi_spec
*spec
= codec
->spec
;
1603 snd_hda_codec_write(codec
, nvhdmi_master_con_nid_7x
,
1604 0, AC_VERB_SET_CHANNEL_STREAMID
, 0);
1605 for (i
= 0; i
< 4; i
++) {
1606 /* set the stream id */
1607 snd_hda_codec_write(codec
, nvhdmi_con_nids_7x
[i
], 0,
1608 AC_VERB_SET_CHANNEL_STREAMID
, 0);
1609 /* set the stream format */
1610 snd_hda_codec_write(codec
, nvhdmi_con_nids_7x
[i
], 0,
1611 AC_VERB_SET_STREAM_FORMAT
, 0);
1614 /* The audio hardware sends a channel count of 0x7 (8ch) when all the
1615 * streams are disabled. */
1616 nvhdmi_8ch_7x_set_info_frame_parameters(codec
, 8);
1618 return snd_hda_multi_out_dig_close(codec
, &spec
->multiout
);
1621 static int nvhdmi_8ch_7x_pcm_prepare(struct hda_pcm_stream
*hinfo
,
1622 struct hda_codec
*codec
,
1623 unsigned int stream_tag
,
1624 unsigned int format
,
1625 struct snd_pcm_substream
*substream
)
1628 unsigned int dataDCC2
, channel_id
;
1630 struct hdmi_spec
*spec
= codec
->spec
;
1631 struct hda_spdif_out
*spdif
;
1633 mutex_lock(&codec
->spdif_mutex
);
1634 spdif
= snd_hda_spdif_out_of_nid(codec
, spec
->cvts
[0].cvt_nid
);
1636 chs
= substream
->runtime
->channels
;
1640 /* turn off SPDIF once; otherwise the IEC958 bits won't be updated */
1641 if (codec
->spdif_status_reset
&& (spdif
->ctls
& AC_DIG1_ENABLE
))
1642 snd_hda_codec_write(codec
,
1643 nvhdmi_master_con_nid_7x
,
1645 AC_VERB_SET_DIGI_CONVERT_1
,
1646 spdif
->ctls
& ~AC_DIG1_ENABLE
& 0xff);
1648 /* set the stream id */
1649 snd_hda_codec_write(codec
, nvhdmi_master_con_nid_7x
, 0,
1650 AC_VERB_SET_CHANNEL_STREAMID
, (stream_tag
<< 4) | 0x0);
1652 /* set the stream format */
1653 snd_hda_codec_write(codec
, nvhdmi_master_con_nid_7x
, 0,
1654 AC_VERB_SET_STREAM_FORMAT
, format
);
1656 /* turn on again (if needed) */
1657 /* enable and set the channel status audio/data flag */
1658 if (codec
->spdif_status_reset
&& (spdif
->ctls
& AC_DIG1_ENABLE
)) {
1659 snd_hda_codec_write(codec
,
1660 nvhdmi_master_con_nid_7x
,
1662 AC_VERB_SET_DIGI_CONVERT_1
,
1663 spdif
->ctls
& 0xff);
1664 snd_hda_codec_write(codec
,
1665 nvhdmi_master_con_nid_7x
,
1667 AC_VERB_SET_DIGI_CONVERT_2
, dataDCC2
);
1670 for (i
= 0; i
< 4; i
++) {
1676 /* turn off SPDIF once;
1677 *otherwise the IEC958 bits won't be updated
1679 if (codec
->spdif_status_reset
&&
1680 (spdif
->ctls
& AC_DIG1_ENABLE
))
1681 snd_hda_codec_write(codec
,
1682 nvhdmi_con_nids_7x
[i
],
1684 AC_VERB_SET_DIGI_CONVERT_1
,
1685 spdif
->ctls
& ~AC_DIG1_ENABLE
& 0xff);
1686 /* set the stream id */
1687 snd_hda_codec_write(codec
,
1688 nvhdmi_con_nids_7x
[i
],
1690 AC_VERB_SET_CHANNEL_STREAMID
,
1691 (stream_tag
<< 4) | channel_id
);
1692 /* set the stream format */
1693 snd_hda_codec_write(codec
,
1694 nvhdmi_con_nids_7x
[i
],
1696 AC_VERB_SET_STREAM_FORMAT
,
1698 /* turn on again (if needed) */
1699 /* enable and set the channel status audio/data flag */
1700 if (codec
->spdif_status_reset
&&
1701 (spdif
->ctls
& AC_DIG1_ENABLE
)) {
1702 snd_hda_codec_write(codec
,
1703 nvhdmi_con_nids_7x
[i
],
1705 AC_VERB_SET_DIGI_CONVERT_1
,
1706 spdif
->ctls
& 0xff);
1707 snd_hda_codec_write(codec
,
1708 nvhdmi_con_nids_7x
[i
],
1710 AC_VERB_SET_DIGI_CONVERT_2
, dataDCC2
);
1714 nvhdmi_8ch_7x_set_info_frame_parameters(codec
, chs
);
1716 mutex_unlock(&codec
->spdif_mutex
);
1720 static const struct hda_pcm_stream nvhdmi_pcm_playback_8ch_7x
= {
1724 .nid
= nvhdmi_master_con_nid_7x
,
1725 .rates
= SUPPORTED_RATES
,
1726 .maxbps
= SUPPORTED_MAXBPS
,
1727 .formats
= SUPPORTED_FORMATS
,
1729 .open
= simple_playback_pcm_open
,
1730 .close
= nvhdmi_8ch_7x_pcm_close
,
1731 .prepare
= nvhdmi_8ch_7x_pcm_prepare
1735 static const struct hda_pcm_stream nvhdmi_pcm_playback_2ch
= {
1739 .nid
= nvhdmi_master_con_nid_7x
,
1740 .rates
= SUPPORTED_RATES
,
1741 .maxbps
= SUPPORTED_MAXBPS
,
1742 .formats
= SUPPORTED_FORMATS
,
1744 .open
= simple_playback_pcm_open
,
1745 .close
= simple_playback_pcm_close
,
1746 .prepare
= simple_playback_pcm_prepare
1750 static const struct hda_codec_ops nvhdmi_patch_ops_8ch_7x
= {
1751 .build_controls
= simple_playback_build_controls
,
1752 .build_pcms
= simple_playback_build_pcms
,
1753 .init
= nvhdmi_7x_init
,
1754 .free
= simple_playback_free
,
1757 static const struct hda_codec_ops nvhdmi_patch_ops_2ch
= {
1758 .build_controls
= simple_playback_build_controls
,
1759 .build_pcms
= simple_playback_build_pcms
,
1760 .init
= nvhdmi_7x_init
,
1761 .free
= simple_playback_free
,
1764 static int patch_nvhdmi_2ch(struct hda_codec
*codec
)
1766 struct hdmi_spec
*spec
;
1768 spec
= kzalloc(sizeof(*spec
), GFP_KERNEL
);
1774 spec
->multiout
.num_dacs
= 0; /* no analog */
1775 spec
->multiout
.max_channels
= 2;
1776 spec
->multiout
.dig_out_nid
= nvhdmi_master_con_nid_7x
;
1778 spec
->cvts
[0].cvt_nid
= nvhdmi_master_con_nid_7x
;
1779 spec
->pcm_playback
= &nvhdmi_pcm_playback_2ch
;
1781 codec
->patch_ops
= nvhdmi_patch_ops_2ch
;
1786 static int patch_nvhdmi_8ch_7x(struct hda_codec
*codec
)
1788 struct hdmi_spec
*spec
;
1789 int err
= patch_nvhdmi_2ch(codec
);
1794 spec
->multiout
.max_channels
= 8;
1795 spec
->pcm_playback
= &nvhdmi_pcm_playback_8ch_7x
;
1796 codec
->patch_ops
= nvhdmi_patch_ops_8ch_7x
;
1798 /* Initialize the audio infoframe channel mask and checksum to something
1800 nvhdmi_8ch_7x_set_info_frame_parameters(codec
, 8);
1806 * ATI-specific implementations
1808 * FIXME: we may omit the whole this and use the generic code once after
1809 * it's confirmed to work.
1812 #define ATIHDMI_CVT_NID 0x02 /* audio converter */
1813 #define ATIHDMI_PIN_NID 0x03 /* HDMI output pin */
1815 static int atihdmi_playback_pcm_prepare(struct hda_pcm_stream
*hinfo
,
1816 struct hda_codec
*codec
,
1817 unsigned int stream_tag
,
1818 unsigned int format
,
1819 struct snd_pcm_substream
*substream
)
1821 struct hdmi_spec
*spec
= codec
->spec
;
1822 int chans
= substream
->runtime
->channels
;
1825 err
= simple_playback_pcm_prepare(hinfo
, codec
, stream_tag
, format
,
1829 snd_hda_codec_write(codec
, spec
->cvts
[0].cvt_nid
, 0,
1830 AC_VERB_SET_CVT_CHAN_COUNT
, chans
- 1);
1832 for (i
= 0; i
< chans
; i
++) {
1833 snd_hda_codec_write(codec
, spec
->cvts
[0].cvt_nid
, 0,
1834 AC_VERB_SET_HDMI_CHAN_SLOT
,
1840 static const struct hda_pcm_stream atihdmi_pcm_digital_playback
= {
1844 .nid
= ATIHDMI_CVT_NID
,
1846 .open
= simple_playback_pcm_open
,
1847 .close
= simple_playback_pcm_close
,
1848 .prepare
= atihdmi_playback_pcm_prepare
1852 static const struct hda_codec_ops atihdmi_patch_ops
= {
1853 .build_controls
= simple_playback_build_controls
,
1854 .build_pcms
= simple_playback_build_pcms
,
1855 .init
= simple_playback_init
,
1856 .free
= simple_playback_free
,
1860 static int patch_atihdmi(struct hda_codec
*codec
)
1862 struct hdmi_spec
*spec
;
1864 spec
= kzalloc(sizeof(*spec
), GFP_KERNEL
);
1870 spec
->multiout
.num_dacs
= 0; /* no analog */
1871 spec
->multiout
.max_channels
= 2;
1872 spec
->multiout
.dig_out_nid
= ATIHDMI_CVT_NID
;
1875 spec
->cvts
[0].cvt_nid
= ATIHDMI_CVT_NID
;
1876 spec
->pins
[0].pin_nid
= ATIHDMI_PIN_NID
;
1877 spec
->pcm_playback
= &atihdmi_pcm_digital_playback
;
1879 codec
->patch_ops
= atihdmi_patch_ops
;
1884 /* VIA HDMI Implementation */
1885 #define VIAHDMI_CVT_NID 0x02 /* audio converter1 */
1886 #define VIAHDMI_PIN_NID 0x03 /* HDMI output pin1 */
1888 static const struct hda_codec_ops via_hdmi_patch_ops
= {
1889 .build_controls
= simple_playback_build_controls
,
1890 .build_pcms
= simple_playback_build_pcms
,
1891 .init
= simple_playback_init
,
1892 .free
= simple_playback_free
,
1893 .unsol_event
= simple_hdmi_unsol_event
,
1896 static struct hda_pcm_stream via_hdmi_digital_playback
= {
1900 .nid
= VIAHDMI_CVT_NID
, /* NID to query formats and rates*/
1902 .open
= simple_playback_pcm_open
,
1903 .close
= simple_playback_pcm_close
,
1904 .prepare
= simple_playback_pcm_prepare
1908 static int patch_via_hdmi(struct hda_codec
*codec
)
1910 struct hdmi_spec
*spec
;
1912 spec
= kzalloc(sizeof(*spec
), GFP_KERNEL
);
1916 spec
->multiout
.num_dacs
= 0; /* no analog */
1917 spec
->multiout
.max_channels
= 2;
1918 spec
->multiout
.dig_out_nid
= VIAHDMI_CVT_NID
; /* pure-digital case */
1921 spec
->cvts
[0].cvt_nid
= VIAHDMI_CVT_NID
;
1922 spec
->pins
[0].pin_nid
= VIAHDMI_PIN_NID
;
1923 spec
->pcm_playback
= &via_hdmi_digital_playback
;
1926 codec
->patch_ops
= via_hdmi_patch_ops
;
1934 static const struct hda_codec_preset snd_hda_preset_hdmi
[] = {
1935 { .id
= 0x1002793c, .name
= "RS600 HDMI", .patch
= patch_atihdmi
},
1936 { .id
= 0x10027919, .name
= "RS600 HDMI", .patch
= patch_atihdmi
},
1937 { .id
= 0x1002791a, .name
= "RS690/780 HDMI", .patch
= patch_atihdmi
},
1938 { .id
= 0x1002aa01, .name
= "R6xx HDMI", .patch
= patch_generic_hdmi
},
1939 { .id
= 0x10951390, .name
= "SiI1390 HDMI", .patch
= patch_generic_hdmi
},
1940 { .id
= 0x10951392, .name
= "SiI1392 HDMI", .patch
= patch_generic_hdmi
},
1941 { .id
= 0x17e80047, .name
= "Chrontel HDMI", .patch
= patch_generic_hdmi
},
1942 { .id
= 0x10de0002, .name
= "MCP77/78 HDMI", .patch
= patch_nvhdmi_8ch_7x
},
1943 { .id
= 0x10de0003, .name
= "MCP77/78 HDMI", .patch
= patch_nvhdmi_8ch_7x
},
1944 { .id
= 0x10de0005, .name
= "MCP77/78 HDMI", .patch
= patch_nvhdmi_8ch_7x
},
1945 { .id
= 0x10de0006, .name
= "MCP77/78 HDMI", .patch
= patch_nvhdmi_8ch_7x
},
1946 { .id
= 0x10de0007, .name
= "MCP79/7A HDMI", .patch
= patch_nvhdmi_8ch_7x
},
1947 { .id
= 0x10de000a, .name
= "GPU 0a HDMI/DP", .patch
= patch_generic_hdmi
},
1948 { .id
= 0x10de000b, .name
= "GPU 0b HDMI/DP", .patch
= patch_generic_hdmi
},
1949 { .id
= 0x10de000c, .name
= "MCP89 HDMI", .patch
= patch_generic_hdmi
},
1950 { .id
= 0x10de000d, .name
= "GPU 0d HDMI/DP", .patch
= patch_generic_hdmi
},
1951 { .id
= 0x10de0010, .name
= "GPU 10 HDMI/DP", .patch
= patch_generic_hdmi
},
1952 { .id
= 0x10de0011, .name
= "GPU 11 HDMI/DP", .patch
= patch_generic_hdmi
},
1953 { .id
= 0x10de0012, .name
= "GPU 12 HDMI/DP", .patch
= patch_generic_hdmi
},
1954 { .id
= 0x10de0013, .name
= "GPU 13 HDMI/DP", .patch
= patch_generic_hdmi
},
1955 { .id
= 0x10de0014, .name
= "GPU 14 HDMI/DP", .patch
= patch_generic_hdmi
},
1956 { .id
= 0x10de0015, .name
= "GPU 15 HDMI/DP", .patch
= patch_generic_hdmi
},
1957 { .id
= 0x10de0016, .name
= "GPU 16 HDMI/DP", .patch
= patch_generic_hdmi
},
1958 /* 17 is known to be absent */
1959 { .id
= 0x10de0018, .name
= "GPU 18 HDMI/DP", .patch
= patch_generic_hdmi
},
1960 { .id
= 0x10de0019, .name
= "GPU 19 HDMI/DP", .patch
= patch_generic_hdmi
},
1961 { .id
= 0x10de001a, .name
= "GPU 1a HDMI/DP", .patch
= patch_generic_hdmi
},
1962 { .id
= 0x10de001b, .name
= "GPU 1b HDMI/DP", .patch
= patch_generic_hdmi
},
1963 { .id
= 0x10de001c, .name
= "GPU 1c HDMI/DP", .patch
= patch_generic_hdmi
},
1964 { .id
= 0x10de0040, .name
= "GPU 40 HDMI/DP", .patch
= patch_generic_hdmi
},
1965 { .id
= 0x10de0041, .name
= "GPU 41 HDMI/DP", .patch
= patch_generic_hdmi
},
1966 { .id
= 0x10de0042, .name
= "GPU 42 HDMI/DP", .patch
= patch_generic_hdmi
},
1967 { .id
= 0x10de0043, .name
= "GPU 43 HDMI/DP", .patch
= patch_generic_hdmi
},
1968 { .id
= 0x10de0044, .name
= "GPU 44 HDMI/DP", .patch
= patch_generic_hdmi
},
1969 { .id
= 0x10de0067, .name
= "MCP67 HDMI", .patch
= patch_nvhdmi_2ch
},
1970 { .id
= 0x10de8001, .name
= "MCP73 HDMI", .patch
= patch_nvhdmi_2ch
},
1971 { .id
= 0x11069f80, .name
= "VX900 HDMI/DP", .patch
= patch_via_hdmi
},
1972 { .id
= 0x11069f81, .name
= "VX900 HDMI/DP", .patch
= patch_via_hdmi
},
1973 { .id
= 0x11069f84, .name
= "VX11 HDMI/DP", .patch
= patch_generic_hdmi
},
1974 { .id
= 0x11069f85, .name
= "VX11 HDMI/DP", .patch
= patch_generic_hdmi
},
1975 { .id
= 0x80860054, .name
= "IbexPeak HDMI", .patch
= patch_generic_hdmi
},
1976 { .id
= 0x80862801, .name
= "Bearlake HDMI", .patch
= patch_generic_hdmi
},
1977 { .id
= 0x80862802, .name
= "Cantiga HDMI", .patch
= patch_generic_hdmi
},
1978 { .id
= 0x80862803, .name
= "Eaglelake HDMI", .patch
= patch_generic_hdmi
},
1979 { .id
= 0x80862804, .name
= "IbexPeak HDMI", .patch
= patch_generic_hdmi
},
1980 { .id
= 0x80862805, .name
= "CougarPoint HDMI", .patch
= patch_generic_hdmi
},
1981 { .id
= 0x80862806, .name
= "PantherPoint HDMI", .patch
= patch_generic_hdmi
},
1982 { .id
= 0x80862880, .name
= "CedarTrail HDMI", .patch
= patch_generic_hdmi
},
1983 { .id
= 0x808629fb, .name
= "Crestline HDMI", .patch
= patch_generic_hdmi
},
1987 MODULE_ALIAS("snd-hda-codec-id:1002793c");
1988 MODULE_ALIAS("snd-hda-codec-id:10027919");
1989 MODULE_ALIAS("snd-hda-codec-id:1002791a");
1990 MODULE_ALIAS("snd-hda-codec-id:1002aa01");
1991 MODULE_ALIAS("snd-hda-codec-id:10951390");
1992 MODULE_ALIAS("snd-hda-codec-id:10951392");
1993 MODULE_ALIAS("snd-hda-codec-id:10de0002");
1994 MODULE_ALIAS("snd-hda-codec-id:10de0003");
1995 MODULE_ALIAS("snd-hda-codec-id:10de0005");
1996 MODULE_ALIAS("snd-hda-codec-id:10de0006");
1997 MODULE_ALIAS("snd-hda-codec-id:10de0007");
1998 MODULE_ALIAS("snd-hda-codec-id:10de000a");
1999 MODULE_ALIAS("snd-hda-codec-id:10de000b");
2000 MODULE_ALIAS("snd-hda-codec-id:10de000c");
2001 MODULE_ALIAS("snd-hda-codec-id:10de000d");
2002 MODULE_ALIAS("snd-hda-codec-id:10de0010");
2003 MODULE_ALIAS("snd-hda-codec-id:10de0011");
2004 MODULE_ALIAS("snd-hda-codec-id:10de0012");
2005 MODULE_ALIAS("snd-hda-codec-id:10de0013");
2006 MODULE_ALIAS("snd-hda-codec-id:10de0014");
2007 MODULE_ALIAS("snd-hda-codec-id:10de0015");
2008 MODULE_ALIAS("snd-hda-codec-id:10de0016");
2009 MODULE_ALIAS("snd-hda-codec-id:10de0018");
2010 MODULE_ALIAS("snd-hda-codec-id:10de0019");
2011 MODULE_ALIAS("snd-hda-codec-id:10de001a");
2012 MODULE_ALIAS("snd-hda-codec-id:10de001b");
2013 MODULE_ALIAS("snd-hda-codec-id:10de001c");
2014 MODULE_ALIAS("snd-hda-codec-id:10de0040");
2015 MODULE_ALIAS("snd-hda-codec-id:10de0041");
2016 MODULE_ALIAS("snd-hda-codec-id:10de0042");
2017 MODULE_ALIAS("snd-hda-codec-id:10de0043");
2018 MODULE_ALIAS("snd-hda-codec-id:10de0044");
2019 MODULE_ALIAS("snd-hda-codec-id:10de0067");
2020 MODULE_ALIAS("snd-hda-codec-id:10de8001");
2021 MODULE_ALIAS("snd-hda-codec-id:11069f80");
2022 MODULE_ALIAS("snd-hda-codec-id:11069f81");
2023 MODULE_ALIAS("snd-hda-codec-id:11069f84");
2024 MODULE_ALIAS("snd-hda-codec-id:11069f85");
2025 MODULE_ALIAS("snd-hda-codec-id:17e80047");
2026 MODULE_ALIAS("snd-hda-codec-id:80860054");
2027 MODULE_ALIAS("snd-hda-codec-id:80862801");
2028 MODULE_ALIAS("snd-hda-codec-id:80862802");
2029 MODULE_ALIAS("snd-hda-codec-id:80862803");
2030 MODULE_ALIAS("snd-hda-codec-id:80862804");
2031 MODULE_ALIAS("snd-hda-codec-id:80862805");
2032 MODULE_ALIAS("snd-hda-codec-id:80862806");
2033 MODULE_ALIAS("snd-hda-codec-id:80862880");
2034 MODULE_ALIAS("snd-hda-codec-id:808629fb");
2036 MODULE_LICENSE("GPL");
2037 MODULE_DESCRIPTION("HDMI HD-audio codec");
2038 MODULE_ALIAS("snd-hda-codec-intelhdmi");
2039 MODULE_ALIAS("snd-hda-codec-nvhdmi");
2040 MODULE_ALIAS("snd-hda-codec-atihdmi");
2042 static struct hda_codec_preset_list intel_list
= {
2043 .preset
= snd_hda_preset_hdmi
,
2044 .owner
= THIS_MODULE
,
2047 static int __init
patch_hdmi_init(void)
2049 return snd_hda_add_codec_preset(&intel_list
);
2052 static void __exit
patch_hdmi_exit(void)
2054 snd_hda_delete_codec_preset(&intel_list
);
2057 module_init(patch_hdmi_init
)
2058 module_exit(patch_hdmi_exit
)