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[ALSA] Fix section mismatch errors in ALSA PCI drivers
[deliverable/linux.git] / sound / pci / ice1712 / ice1712.c
1 /*
2 * ALSA driver for ICEnsemble ICE1712 (Envy24)
3 *
4 * Copyright (c) 2000 Jaroslav Kysela <perex@suse.cz>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 *
20 */
21
22 /*
23 NOTES:
24 - spdif nonaudio consumer mode does not work (at least with my
25 Sony STR-DB830)
26 */
27
28 /*
29 * Changes:
30 *
31 * 2002.09.09 Takashi Iwai <tiwai@suse.de>
32 * split the code to several files. each low-level routine
33 * is stored in the local file and called from registration
34 * function from card_info struct.
35 *
36 * 2002.11.26 James Stafford <jstafford@ampltd.com>
37 * Added support for VT1724 (Envy24HT)
38 * I have left out support for 176.4 and 192 KHz for the moment.
39 * I also haven't done anything with the internal S/PDIF transmitter or the MPU-401
40 *
41 * 2003.02.20 Taksahi Iwai <tiwai@suse.de>
42 * Split vt1724 part to an independent driver.
43 * The GPIO is accessed through the callback functions now.
44 *
45 * 2004.03.31 Doug McLain <nostar@comcast.net>
46 * Added support for Event Electronics EZ8 card to hoontech.c.
47 */
48
49
50 #include <sound/driver.h>
51 #include <asm/io.h>
52 #include <linux/delay.h>
53 #include <linux/interrupt.h>
54 #include <linux/init.h>
55 #include <linux/pci.h>
56 #include <linux/dma-mapping.h>
57 #include <linux/slab.h>
58 #include <linux/moduleparam.h>
59 #include <linux/mutex.h>
60
61 #include <sound/core.h>
62 #include <sound/cs8427.h>
63 #include <sound/info.h>
64 #include <sound/initval.h>
65
66 #include <sound/asoundef.h>
67
68 #include "ice1712.h"
69
70 /* lowlevel routines */
71 #include "delta.h"
72 #include "ews.h"
73 #include "hoontech.h"
74
75 MODULE_AUTHOR("Jaroslav Kysela <perex@suse.cz>");
76 MODULE_DESCRIPTION("ICEnsemble ICE1712 (Envy24)");
77 MODULE_LICENSE("GPL");
78 MODULE_SUPPORTED_DEVICE("{"
79 HOONTECH_DEVICE_DESC
80 DELTA_DEVICE_DESC
81 EWS_DEVICE_DESC
82 "{ICEnsemble,Generic ICE1712},"
83 "{ICEnsemble,Generic Envy24}}");
84
85 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
86 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
87 static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;/* Enable this card */
88 static char *model[SNDRV_CARDS];
89 static int omni[SNDRV_CARDS]; /* Delta44 & 66 Omni I/O support */
90 static int cs8427_timeout[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS-1)] = 500}; /* CS8427 S/PDIF transciever reset timeout value in msec */
91 static int dxr_enable[SNDRV_CARDS]; /* DXR enable for DMX6FIRE */
92
93 module_param_array(index, int, NULL, 0444);
94 MODULE_PARM_DESC(index, "Index value for ICE1712 soundcard.");
95 module_param_array(id, charp, NULL, 0444);
96 MODULE_PARM_DESC(id, "ID string for ICE1712 soundcard.");
97 module_param_array(enable, bool, NULL, 0444);
98 MODULE_PARM_DESC(enable, "Enable ICE1712 soundcard.");
99 module_param_array(omni, bool, NULL, 0444);
100 MODULE_PARM_DESC(omni, "Enable Midiman M-Audio Delta Omni I/O support.");
101 module_param_array(cs8427_timeout, int, NULL, 0444);
102 MODULE_PARM_DESC(cs8427_timeout, "Define reset timeout for cs8427 chip in msec resolution.");
103 module_param_array(model, charp, NULL, 0444);
104 MODULE_PARM_DESC(model, "Use the given board model.");
105 module_param_array(dxr_enable, int, NULL, 0444);
106 MODULE_PARM_DESC(dxr_enable, "Enable DXR support for Terratec DMX6FIRE.");
107
108
109 static struct pci_device_id snd_ice1712_ids[] = {
110 { PCI_VENDOR_ID_ICE, PCI_DEVICE_ID_ICE_1712, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, /* ICE1712 */
111 { 0, }
112 };
113
114 MODULE_DEVICE_TABLE(pci, snd_ice1712_ids);
115
116 static int snd_ice1712_build_pro_mixer(struct snd_ice1712 *ice);
117 static int snd_ice1712_build_controls(struct snd_ice1712 *ice);
118
119 static int PRO_RATE_LOCKED;
120 static int PRO_RATE_RESET = 1;
121 static unsigned int PRO_RATE_DEFAULT = 44100;
122
123 /*
124 * Basic I/O
125 */
126
127 /* check whether the clock mode is spdif-in */
128 static inline int is_spdif_master(struct snd_ice1712 *ice)
129 {
130 return (inb(ICEMT(ice, RATE)) & ICE1712_SPDIF_MASTER) ? 1 : 0;
131 }
132
133 static inline int is_pro_rate_locked(struct snd_ice1712 *ice)
134 {
135 return is_spdif_master(ice) || PRO_RATE_LOCKED;
136 }
137
138 static inline void snd_ice1712_ds_write(struct snd_ice1712 * ice, u8 channel, u8 addr, u32 data)
139 {
140 outb((channel << 4) | addr, ICEDS(ice, INDEX));
141 outl(data, ICEDS(ice, DATA));
142 }
143
144 static inline u32 snd_ice1712_ds_read(struct snd_ice1712 * ice, u8 channel, u8 addr)
145 {
146 outb((channel << 4) | addr, ICEDS(ice, INDEX));
147 return inl(ICEDS(ice, DATA));
148 }
149
150 static void snd_ice1712_ac97_write(struct snd_ac97 *ac97,
151 unsigned short reg,
152 unsigned short val)
153 {
154 struct snd_ice1712 *ice = ac97->private_data;
155 int tm;
156 unsigned char old_cmd = 0;
157
158 for (tm = 0; tm < 0x10000; tm++) {
159 old_cmd = inb(ICEREG(ice, AC97_CMD));
160 if (old_cmd & (ICE1712_AC97_WRITE | ICE1712_AC97_READ))
161 continue;
162 if (!(old_cmd & ICE1712_AC97_READY))
163 continue;
164 break;
165 }
166 outb(reg, ICEREG(ice, AC97_INDEX));
167 outw(val, ICEREG(ice, AC97_DATA));
168 old_cmd &= ~(ICE1712_AC97_PBK_VSR | ICE1712_AC97_CAP_VSR);
169 outb(old_cmd | ICE1712_AC97_WRITE, ICEREG(ice, AC97_CMD));
170 for (tm = 0; tm < 0x10000; tm++)
171 if ((inb(ICEREG(ice, AC97_CMD)) & ICE1712_AC97_WRITE) == 0)
172 break;
173 }
174
175 static unsigned short snd_ice1712_ac97_read(struct snd_ac97 *ac97,
176 unsigned short reg)
177 {
178 struct snd_ice1712 *ice = ac97->private_data;
179 int tm;
180 unsigned char old_cmd = 0;
181
182 for (tm = 0; tm < 0x10000; tm++) {
183 old_cmd = inb(ICEREG(ice, AC97_CMD));
184 if (old_cmd & (ICE1712_AC97_WRITE | ICE1712_AC97_READ))
185 continue;
186 if (!(old_cmd & ICE1712_AC97_READY))
187 continue;
188 break;
189 }
190 outb(reg, ICEREG(ice, AC97_INDEX));
191 outb(old_cmd | ICE1712_AC97_READ, ICEREG(ice, AC97_CMD));
192 for (tm = 0; tm < 0x10000; tm++)
193 if ((inb(ICEREG(ice, AC97_CMD)) & ICE1712_AC97_READ) == 0)
194 break;
195 if (tm >= 0x10000) /* timeout */
196 return ~0;
197 return inw(ICEREG(ice, AC97_DATA));
198 }
199
200 /*
201 * pro ac97 section
202 */
203
204 static void snd_ice1712_pro_ac97_write(struct snd_ac97 *ac97,
205 unsigned short reg,
206 unsigned short val)
207 {
208 struct snd_ice1712 *ice = ac97->private_data;
209 int tm;
210 unsigned char old_cmd = 0;
211
212 for (tm = 0; tm < 0x10000; tm++) {
213 old_cmd = inb(ICEMT(ice, AC97_CMD));
214 if (old_cmd & (ICE1712_AC97_WRITE | ICE1712_AC97_READ))
215 continue;
216 if (!(old_cmd & ICE1712_AC97_READY))
217 continue;
218 break;
219 }
220 outb(reg, ICEMT(ice, AC97_INDEX));
221 outw(val, ICEMT(ice, AC97_DATA));
222 old_cmd &= ~(ICE1712_AC97_PBK_VSR | ICE1712_AC97_CAP_VSR);
223 outb(old_cmd | ICE1712_AC97_WRITE, ICEMT(ice, AC97_CMD));
224 for (tm = 0; tm < 0x10000; tm++)
225 if ((inb(ICEMT(ice, AC97_CMD)) & ICE1712_AC97_WRITE) == 0)
226 break;
227 }
228
229
230 static unsigned short snd_ice1712_pro_ac97_read(struct snd_ac97 *ac97,
231 unsigned short reg)
232 {
233 struct snd_ice1712 *ice = ac97->private_data;
234 int tm;
235 unsigned char old_cmd = 0;
236
237 for (tm = 0; tm < 0x10000; tm++) {
238 old_cmd = inb(ICEMT(ice, AC97_CMD));
239 if (old_cmd & (ICE1712_AC97_WRITE | ICE1712_AC97_READ))
240 continue;
241 if (!(old_cmd & ICE1712_AC97_READY))
242 continue;
243 break;
244 }
245 outb(reg, ICEMT(ice, AC97_INDEX));
246 outb(old_cmd | ICE1712_AC97_READ, ICEMT(ice, AC97_CMD));
247 for (tm = 0; tm < 0x10000; tm++)
248 if ((inb(ICEMT(ice, AC97_CMD)) & ICE1712_AC97_READ) == 0)
249 break;
250 if (tm >= 0x10000) /* timeout */
251 return ~0;
252 return inw(ICEMT(ice, AC97_DATA));
253 }
254
255 /*
256 * consumer ac97 digital mix
257 */
258 static int snd_ice1712_digmix_route_ac97_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
259 {
260 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
261 uinfo->count = 1;
262 uinfo->value.integer.min = 0;
263 uinfo->value.integer.max = 1;
264 return 0;
265 }
266
267 static int snd_ice1712_digmix_route_ac97_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
268 {
269 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
270
271 ucontrol->value.integer.value[0] = inb(ICEMT(ice, MONITOR_ROUTECTRL)) & ICE1712_ROUTE_AC97 ? 1 : 0;
272 return 0;
273 }
274
275 static int snd_ice1712_digmix_route_ac97_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
276 {
277 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
278 unsigned char val, nval;
279
280 spin_lock_irq(&ice->reg_lock);
281 val = inb(ICEMT(ice, MONITOR_ROUTECTRL));
282 nval = val & ~ICE1712_ROUTE_AC97;
283 if (ucontrol->value.integer.value[0]) nval |= ICE1712_ROUTE_AC97;
284 outb(nval, ICEMT(ice, MONITOR_ROUTECTRL));
285 spin_unlock_irq(&ice->reg_lock);
286 return val != nval;
287 }
288
289 static struct snd_kcontrol_new snd_ice1712_mixer_digmix_route_ac97 __devinitdata = {
290 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
291 .name = "Digital Mixer To AC97",
292 .info = snd_ice1712_digmix_route_ac97_info,
293 .get = snd_ice1712_digmix_route_ac97_get,
294 .put = snd_ice1712_digmix_route_ac97_put,
295 };
296
297
298 /*
299 * gpio operations
300 */
301 static void snd_ice1712_set_gpio_dir(struct snd_ice1712 *ice, unsigned int data)
302 {
303 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DIRECTION, data);
304 inb(ICEREG(ice, DATA)); /* dummy read for pci-posting */
305 }
306
307 static void snd_ice1712_set_gpio_mask(struct snd_ice1712 *ice, unsigned int data)
308 {
309 snd_ice1712_write(ice, ICE1712_IREG_GPIO_WRITE_MASK, data);
310 inb(ICEREG(ice, DATA)); /* dummy read for pci-posting */
311 }
312
313 static unsigned int snd_ice1712_get_gpio_data(struct snd_ice1712 *ice)
314 {
315 return snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA);
316 }
317
318 static void snd_ice1712_set_gpio_data(struct snd_ice1712 *ice, unsigned int val)
319 {
320 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, val);
321 inb(ICEREG(ice, DATA)); /* dummy read for pci-posting */
322 }
323
324 /*
325 *
326 * CS8427 interface
327 *
328 */
329
330 /*
331 * change the input clock selection
332 * spdif_clock = 1 - IEC958 input, 0 - Envy24
333 */
334 static int snd_ice1712_cs8427_set_input_clock(struct snd_ice1712 *ice, int spdif_clock)
335 {
336 unsigned char reg[2] = { 0x80 | 4, 0 }; /* CS8427 auto increment | register number 4 + data */
337 unsigned char val, nval;
338 int res = 0;
339
340 snd_i2c_lock(ice->i2c);
341 if (snd_i2c_sendbytes(ice->cs8427, reg, 1) != 1) {
342 snd_i2c_unlock(ice->i2c);
343 return -EIO;
344 }
345 if (snd_i2c_readbytes(ice->cs8427, &val, 1) != 1) {
346 snd_i2c_unlock(ice->i2c);
347 return -EIO;
348 }
349 nval = val & 0xf0;
350 if (spdif_clock)
351 nval |= 0x01;
352 else
353 nval |= 0x04;
354 if (val != nval) {
355 reg[1] = nval;
356 if (snd_i2c_sendbytes(ice->cs8427, reg, 2) != 2) {
357 res = -EIO;
358 } else {
359 res++;
360 }
361 }
362 snd_i2c_unlock(ice->i2c);
363 return res;
364 }
365
366 /*
367 * spdif callbacks
368 */
369 static void open_cs8427(struct snd_ice1712 *ice, struct snd_pcm_substream *substream)
370 {
371 snd_cs8427_iec958_active(ice->cs8427, 1);
372 }
373
374 static void close_cs8427(struct snd_ice1712 *ice, struct snd_pcm_substream *substream)
375 {
376 snd_cs8427_iec958_active(ice->cs8427, 0);
377 }
378
379 static void setup_cs8427(struct snd_ice1712 *ice, int rate)
380 {
381 snd_cs8427_iec958_pcm(ice->cs8427, rate);
382 }
383
384 /*
385 * create and initialize callbacks for cs8427 interface
386 */
387 int __devinit snd_ice1712_init_cs8427(struct snd_ice1712 *ice, int addr)
388 {
389 int err;
390
391 if ((err = snd_cs8427_create(ice->i2c, addr,
392 (ice->cs8427_timeout * HZ) / 1000,
393 &ice->cs8427)) < 0) {
394 snd_printk(KERN_ERR "CS8427 initialization failed\n");
395 return err;
396 }
397 ice->spdif.ops.open = open_cs8427;
398 ice->spdif.ops.close = close_cs8427;
399 ice->spdif.ops.setup_rate = setup_cs8427;
400 return 0;
401 }
402
403 static void snd_ice1712_set_input_clock_source(struct snd_ice1712 *ice, int spdif_is_master)
404 {
405 /* change CS8427 clock source too */
406 if (ice->cs8427)
407 snd_ice1712_cs8427_set_input_clock(ice, spdif_is_master);
408 /* notify ak4524 chip as well */
409 if (spdif_is_master) {
410 unsigned int i;
411 for (i = 0; i < ice->akm_codecs; i++) {
412 if (ice->akm[i].ops.set_rate_val)
413 ice->akm[i].ops.set_rate_val(&ice->akm[i], 0);
414 }
415 }
416 }
417
418 /*
419 * Interrupt handler
420 */
421
422 static irqreturn_t snd_ice1712_interrupt(int irq, void *dev_id, struct pt_regs *regs)
423 {
424 struct snd_ice1712 *ice = dev_id;
425 unsigned char status;
426 int handled = 0;
427
428 while (1) {
429 status = inb(ICEREG(ice, IRQSTAT));
430 if (status == 0)
431 break;
432 handled = 1;
433 if (status & ICE1712_IRQ_MPU1) {
434 if (ice->rmidi[0])
435 snd_mpu401_uart_interrupt(irq, ice->rmidi[0]->private_data, regs);
436 outb(ICE1712_IRQ_MPU1, ICEREG(ice, IRQSTAT));
437 status &= ~ICE1712_IRQ_MPU1;
438 }
439 if (status & ICE1712_IRQ_TIMER)
440 outb(ICE1712_IRQ_TIMER, ICEREG(ice, IRQSTAT));
441 if (status & ICE1712_IRQ_MPU2) {
442 if (ice->rmidi[1])
443 snd_mpu401_uart_interrupt(irq, ice->rmidi[1]->private_data, regs);
444 outb(ICE1712_IRQ_MPU2, ICEREG(ice, IRQSTAT));
445 status &= ~ICE1712_IRQ_MPU2;
446 }
447 if (status & ICE1712_IRQ_PROPCM) {
448 unsigned char mtstat = inb(ICEMT(ice, IRQ));
449 if (mtstat & ICE1712_MULTI_PBKSTATUS) {
450 if (ice->playback_pro_substream)
451 snd_pcm_period_elapsed(ice->playback_pro_substream);
452 outb(ICE1712_MULTI_PBKSTATUS, ICEMT(ice, IRQ));
453 }
454 if (mtstat & ICE1712_MULTI_CAPSTATUS) {
455 if (ice->capture_pro_substream)
456 snd_pcm_period_elapsed(ice->capture_pro_substream);
457 outb(ICE1712_MULTI_CAPSTATUS, ICEMT(ice, IRQ));
458 }
459 }
460 if (status & ICE1712_IRQ_FM)
461 outb(ICE1712_IRQ_FM, ICEREG(ice, IRQSTAT));
462 if (status & ICE1712_IRQ_PBKDS) {
463 u32 idx;
464 u16 pbkstatus;
465 struct snd_pcm_substream *substream;
466 pbkstatus = inw(ICEDS(ice, INTSTAT));
467 //printk("pbkstatus = 0x%x\n", pbkstatus);
468 for (idx = 0; idx < 6; idx++) {
469 if ((pbkstatus & (3 << (idx * 2))) == 0)
470 continue;
471 if ((substream = ice->playback_con_substream_ds[idx]) != NULL)
472 snd_pcm_period_elapsed(substream);
473 outw(3 << (idx * 2), ICEDS(ice, INTSTAT));
474 }
475 outb(ICE1712_IRQ_PBKDS, ICEREG(ice, IRQSTAT));
476 }
477 if (status & ICE1712_IRQ_CONCAP) {
478 if (ice->capture_con_substream)
479 snd_pcm_period_elapsed(ice->capture_con_substream);
480 outb(ICE1712_IRQ_CONCAP, ICEREG(ice, IRQSTAT));
481 }
482 if (status & ICE1712_IRQ_CONPBK) {
483 if (ice->playback_con_substream)
484 snd_pcm_period_elapsed(ice->playback_con_substream);
485 outb(ICE1712_IRQ_CONPBK, ICEREG(ice, IRQSTAT));
486 }
487 }
488 return IRQ_RETVAL(handled);
489 }
490
491
492 /*
493 * PCM part - misc
494 */
495
496 static int snd_ice1712_hw_params(struct snd_pcm_substream *substream,
497 struct snd_pcm_hw_params *hw_params)
498 {
499 return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
500 }
501
502 static int snd_ice1712_hw_free(struct snd_pcm_substream *substream)
503 {
504 return snd_pcm_lib_free_pages(substream);
505 }
506
507 /*
508 * PCM part - consumer I/O
509 */
510
511 static int snd_ice1712_playback_trigger(struct snd_pcm_substream *substream,
512 int cmd)
513 {
514 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
515 int result = 0;
516 u32 tmp;
517
518 spin_lock(&ice->reg_lock);
519 tmp = snd_ice1712_read(ice, ICE1712_IREG_PBK_CTRL);
520 if (cmd == SNDRV_PCM_TRIGGER_START) {
521 tmp |= 1;
522 } else if (cmd == SNDRV_PCM_TRIGGER_STOP) {
523 tmp &= ~1;
524 } else if (cmd == SNDRV_PCM_TRIGGER_PAUSE_PUSH) {
525 tmp |= 2;
526 } else if (cmd == SNDRV_PCM_TRIGGER_PAUSE_RELEASE) {
527 tmp &= ~2;
528 } else {
529 result = -EINVAL;
530 }
531 snd_ice1712_write(ice, ICE1712_IREG_PBK_CTRL, tmp);
532 spin_unlock(&ice->reg_lock);
533 return result;
534 }
535
536 static int snd_ice1712_playback_ds_trigger(struct snd_pcm_substream *substream,
537 int cmd)
538 {
539 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
540 int result = 0;
541 u32 tmp;
542
543 spin_lock(&ice->reg_lock);
544 tmp = snd_ice1712_ds_read(ice, substream->number * 2, ICE1712_DSC_CONTROL);
545 if (cmd == SNDRV_PCM_TRIGGER_START) {
546 tmp |= 1;
547 } else if (cmd == SNDRV_PCM_TRIGGER_STOP) {
548 tmp &= ~1;
549 } else if (cmd == SNDRV_PCM_TRIGGER_PAUSE_PUSH) {
550 tmp |= 2;
551 } else if (cmd == SNDRV_PCM_TRIGGER_PAUSE_RELEASE) {
552 tmp &= ~2;
553 } else {
554 result = -EINVAL;
555 }
556 snd_ice1712_ds_write(ice, substream->number * 2, ICE1712_DSC_CONTROL, tmp);
557 spin_unlock(&ice->reg_lock);
558 return result;
559 }
560
561 static int snd_ice1712_capture_trigger(struct snd_pcm_substream *substream,
562 int cmd)
563 {
564 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
565 int result = 0;
566 u8 tmp;
567
568 spin_lock(&ice->reg_lock);
569 tmp = snd_ice1712_read(ice, ICE1712_IREG_CAP_CTRL);
570 if (cmd == SNDRV_PCM_TRIGGER_START) {
571 tmp |= 1;
572 } else if (cmd == SNDRV_PCM_TRIGGER_STOP) {
573 tmp &= ~1;
574 } else {
575 result = -EINVAL;
576 }
577 snd_ice1712_write(ice, ICE1712_IREG_CAP_CTRL, tmp);
578 spin_unlock(&ice->reg_lock);
579 return result;
580 }
581
582 static int snd_ice1712_playback_prepare(struct snd_pcm_substream *substream)
583 {
584 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
585 struct snd_pcm_runtime *runtime = substream->runtime;
586 u32 period_size, buf_size, rate, tmp;
587
588 period_size = (snd_pcm_lib_period_bytes(substream) >> 2) - 1;
589 buf_size = snd_pcm_lib_buffer_bytes(substream) - 1;
590 tmp = 0x0000;
591 if (snd_pcm_format_width(runtime->format) == 16)
592 tmp |= 0x10;
593 if (runtime->channels == 2)
594 tmp |= 0x08;
595 rate = (runtime->rate * 8192) / 375;
596 if (rate > 0x000fffff)
597 rate = 0x000fffff;
598 spin_lock_irq(&ice->reg_lock);
599 outb(0, ice->ddma_port + 15);
600 outb(ICE1712_DMA_MODE_WRITE | ICE1712_DMA_AUTOINIT, ice->ddma_port + 0x0b);
601 outl(runtime->dma_addr, ice->ddma_port + 0);
602 outw(buf_size, ice->ddma_port + 4);
603 snd_ice1712_write(ice, ICE1712_IREG_PBK_RATE_LO, rate & 0xff);
604 snd_ice1712_write(ice, ICE1712_IREG_PBK_RATE_MID, (rate >> 8) & 0xff);
605 snd_ice1712_write(ice, ICE1712_IREG_PBK_RATE_HI, (rate >> 16) & 0xff);
606 snd_ice1712_write(ice, ICE1712_IREG_PBK_CTRL, tmp);
607 snd_ice1712_write(ice, ICE1712_IREG_PBK_COUNT_LO, period_size & 0xff);
608 snd_ice1712_write(ice, ICE1712_IREG_PBK_COUNT_HI, period_size >> 8);
609 snd_ice1712_write(ice, ICE1712_IREG_PBK_LEFT, 0);
610 snd_ice1712_write(ice, ICE1712_IREG_PBK_RIGHT, 0);
611 spin_unlock_irq(&ice->reg_lock);
612 return 0;
613 }
614
615 static int snd_ice1712_playback_ds_prepare(struct snd_pcm_substream *substream)
616 {
617 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
618 struct snd_pcm_runtime *runtime = substream->runtime;
619 u32 period_size, buf_size, rate, tmp, chn;
620
621 period_size = snd_pcm_lib_period_bytes(substream) - 1;
622 buf_size = snd_pcm_lib_buffer_bytes(substream) - 1;
623 tmp = 0x0064;
624 if (snd_pcm_format_width(runtime->format) == 16)
625 tmp &= ~0x04;
626 if (runtime->channels == 2)
627 tmp |= 0x08;
628 rate = (runtime->rate * 8192) / 375;
629 if (rate > 0x000fffff)
630 rate = 0x000fffff;
631 ice->playback_con_active_buf[substream->number] = 0;
632 ice->playback_con_virt_addr[substream->number] = runtime->dma_addr;
633 chn = substream->number * 2;
634 spin_lock_irq(&ice->reg_lock);
635 snd_ice1712_ds_write(ice, chn, ICE1712_DSC_ADDR0, runtime->dma_addr);
636 snd_ice1712_ds_write(ice, chn, ICE1712_DSC_COUNT0, period_size);
637 snd_ice1712_ds_write(ice, chn, ICE1712_DSC_ADDR1, runtime->dma_addr + (runtime->periods > 1 ? period_size + 1 : 0));
638 snd_ice1712_ds_write(ice, chn, ICE1712_DSC_COUNT1, period_size);
639 snd_ice1712_ds_write(ice, chn, ICE1712_DSC_RATE, rate);
640 snd_ice1712_ds_write(ice, chn, ICE1712_DSC_VOLUME, 0);
641 snd_ice1712_ds_write(ice, chn, ICE1712_DSC_CONTROL, tmp);
642 if (runtime->channels == 2) {
643 snd_ice1712_ds_write(ice, chn + 1, ICE1712_DSC_RATE, rate);
644 snd_ice1712_ds_write(ice, chn + 1, ICE1712_DSC_VOLUME, 0);
645 }
646 spin_unlock_irq(&ice->reg_lock);
647 return 0;
648 }
649
650 static int snd_ice1712_capture_prepare(struct snd_pcm_substream *substream)
651 {
652 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
653 struct snd_pcm_runtime *runtime = substream->runtime;
654 u32 period_size, buf_size;
655 u8 tmp;
656
657 period_size = (snd_pcm_lib_period_bytes(substream) >> 2) - 1;
658 buf_size = snd_pcm_lib_buffer_bytes(substream) - 1;
659 tmp = 0x06;
660 if (snd_pcm_format_width(runtime->format) == 16)
661 tmp &= ~0x04;
662 if (runtime->channels == 2)
663 tmp &= ~0x02;
664 spin_lock_irq(&ice->reg_lock);
665 outl(ice->capture_con_virt_addr = runtime->dma_addr, ICEREG(ice, CONCAP_ADDR));
666 outw(buf_size, ICEREG(ice, CONCAP_COUNT));
667 snd_ice1712_write(ice, ICE1712_IREG_CAP_COUNT_HI, period_size >> 8);
668 snd_ice1712_write(ice, ICE1712_IREG_CAP_COUNT_LO, period_size & 0xff);
669 snd_ice1712_write(ice, ICE1712_IREG_CAP_CTRL, tmp);
670 spin_unlock_irq(&ice->reg_lock);
671 snd_ac97_set_rate(ice->ac97, AC97_PCM_LR_ADC_RATE, runtime->rate);
672 return 0;
673 }
674
675 static snd_pcm_uframes_t snd_ice1712_playback_pointer(struct snd_pcm_substream *substream)
676 {
677 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
678 struct snd_pcm_runtime *runtime = substream->runtime;
679 size_t ptr;
680
681 if (!(snd_ice1712_read(ice, ICE1712_IREG_PBK_CTRL) & 1))
682 return 0;
683 ptr = runtime->buffer_size - inw(ice->ddma_port + 4);
684 if (ptr == runtime->buffer_size)
685 ptr = 0;
686 return bytes_to_frames(substream->runtime, ptr);
687 }
688
689 static snd_pcm_uframes_t snd_ice1712_playback_ds_pointer(struct snd_pcm_substream *substream)
690 {
691 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
692 u8 addr;
693 size_t ptr;
694
695 if (!(snd_ice1712_ds_read(ice, substream->number * 2, ICE1712_DSC_CONTROL) & 1))
696 return 0;
697 if (ice->playback_con_active_buf[substream->number])
698 addr = ICE1712_DSC_ADDR1;
699 else
700 addr = ICE1712_DSC_ADDR0;
701 ptr = snd_ice1712_ds_read(ice, substream->number * 2, addr) -
702 ice->playback_con_virt_addr[substream->number];
703 if (ptr == substream->runtime->buffer_size)
704 ptr = 0;
705 return bytes_to_frames(substream->runtime, ptr);
706 }
707
708 static snd_pcm_uframes_t snd_ice1712_capture_pointer(struct snd_pcm_substream *substream)
709 {
710 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
711 size_t ptr;
712
713 if (!(snd_ice1712_read(ice, ICE1712_IREG_CAP_CTRL) & 1))
714 return 0;
715 ptr = inl(ICEREG(ice, CONCAP_ADDR)) - ice->capture_con_virt_addr;
716 if (ptr == substream->runtime->buffer_size)
717 ptr = 0;
718 return bytes_to_frames(substream->runtime, ptr);
719 }
720
721 static struct snd_pcm_hardware snd_ice1712_playback =
722 {
723 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
724 SNDRV_PCM_INFO_BLOCK_TRANSFER |
725 SNDRV_PCM_INFO_MMAP_VALID |
726 SNDRV_PCM_INFO_PAUSE),
727 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
728 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
729 .rate_min = 4000,
730 .rate_max = 48000,
731 .channels_min = 1,
732 .channels_max = 2,
733 .buffer_bytes_max = (64*1024),
734 .period_bytes_min = 64,
735 .period_bytes_max = (64*1024),
736 .periods_min = 1,
737 .periods_max = 1024,
738 .fifo_size = 0,
739 };
740
741 static struct snd_pcm_hardware snd_ice1712_playback_ds =
742 {
743 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
744 SNDRV_PCM_INFO_BLOCK_TRANSFER |
745 SNDRV_PCM_INFO_MMAP_VALID |
746 SNDRV_PCM_INFO_PAUSE),
747 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
748 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
749 .rate_min = 4000,
750 .rate_max = 48000,
751 .channels_min = 1,
752 .channels_max = 2,
753 .buffer_bytes_max = (128*1024),
754 .period_bytes_min = 64,
755 .period_bytes_max = (128*1024),
756 .periods_min = 2,
757 .periods_max = 2,
758 .fifo_size = 0,
759 };
760
761 static struct snd_pcm_hardware snd_ice1712_capture =
762 {
763 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
764 SNDRV_PCM_INFO_BLOCK_TRANSFER |
765 SNDRV_PCM_INFO_MMAP_VALID),
766 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
767 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
768 .rate_min = 4000,
769 .rate_max = 48000,
770 .channels_min = 1,
771 .channels_max = 2,
772 .buffer_bytes_max = (64*1024),
773 .period_bytes_min = 64,
774 .period_bytes_max = (64*1024),
775 .periods_min = 1,
776 .periods_max = 1024,
777 .fifo_size = 0,
778 };
779
780 static int snd_ice1712_playback_open(struct snd_pcm_substream *substream)
781 {
782 struct snd_pcm_runtime *runtime = substream->runtime;
783 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
784
785 ice->playback_con_substream = substream;
786 runtime->hw = snd_ice1712_playback;
787 return 0;
788 }
789
790 static int snd_ice1712_playback_ds_open(struct snd_pcm_substream *substream)
791 {
792 struct snd_pcm_runtime *runtime = substream->runtime;
793 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
794 u32 tmp;
795
796 ice->playback_con_substream_ds[substream->number] = substream;
797 runtime->hw = snd_ice1712_playback_ds;
798 spin_lock_irq(&ice->reg_lock);
799 tmp = inw(ICEDS(ice, INTMASK)) & ~(1 << (substream->number * 2));
800 outw(tmp, ICEDS(ice, INTMASK));
801 spin_unlock_irq(&ice->reg_lock);
802 return 0;
803 }
804
805 static int snd_ice1712_capture_open(struct snd_pcm_substream *substream)
806 {
807 struct snd_pcm_runtime *runtime = substream->runtime;
808 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
809
810 ice->capture_con_substream = substream;
811 runtime->hw = snd_ice1712_capture;
812 runtime->hw.rates = ice->ac97->rates[AC97_RATES_ADC];
813 if (!(runtime->hw.rates & SNDRV_PCM_RATE_8000))
814 runtime->hw.rate_min = 48000;
815 return 0;
816 }
817
818 static int snd_ice1712_playback_close(struct snd_pcm_substream *substream)
819 {
820 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
821
822 ice->playback_con_substream = NULL;
823 return 0;
824 }
825
826 static int snd_ice1712_playback_ds_close(struct snd_pcm_substream *substream)
827 {
828 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
829 u32 tmp;
830
831 spin_lock_irq(&ice->reg_lock);
832 tmp = inw(ICEDS(ice, INTMASK)) | (3 << (substream->number * 2));
833 outw(tmp, ICEDS(ice, INTMASK));
834 spin_unlock_irq(&ice->reg_lock);
835 ice->playback_con_substream_ds[substream->number] = NULL;
836 return 0;
837 }
838
839 static int snd_ice1712_capture_close(struct snd_pcm_substream *substream)
840 {
841 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
842
843 ice->capture_con_substream = NULL;
844 return 0;
845 }
846
847 static struct snd_pcm_ops snd_ice1712_playback_ops = {
848 .open = snd_ice1712_playback_open,
849 .close = snd_ice1712_playback_close,
850 .ioctl = snd_pcm_lib_ioctl,
851 .hw_params = snd_ice1712_hw_params,
852 .hw_free = snd_ice1712_hw_free,
853 .prepare = snd_ice1712_playback_prepare,
854 .trigger = snd_ice1712_playback_trigger,
855 .pointer = snd_ice1712_playback_pointer,
856 };
857
858 static struct snd_pcm_ops snd_ice1712_playback_ds_ops = {
859 .open = snd_ice1712_playback_ds_open,
860 .close = snd_ice1712_playback_ds_close,
861 .ioctl = snd_pcm_lib_ioctl,
862 .hw_params = snd_ice1712_hw_params,
863 .hw_free = snd_ice1712_hw_free,
864 .prepare = snd_ice1712_playback_ds_prepare,
865 .trigger = snd_ice1712_playback_ds_trigger,
866 .pointer = snd_ice1712_playback_ds_pointer,
867 };
868
869 static struct snd_pcm_ops snd_ice1712_capture_ops = {
870 .open = snd_ice1712_capture_open,
871 .close = snd_ice1712_capture_close,
872 .ioctl = snd_pcm_lib_ioctl,
873 .hw_params = snd_ice1712_hw_params,
874 .hw_free = snd_ice1712_hw_free,
875 .prepare = snd_ice1712_capture_prepare,
876 .trigger = snd_ice1712_capture_trigger,
877 .pointer = snd_ice1712_capture_pointer,
878 };
879
880 static int __devinit snd_ice1712_pcm(struct snd_ice1712 * ice, int device, struct snd_pcm ** rpcm)
881 {
882 struct snd_pcm *pcm;
883 int err;
884
885 if (rpcm)
886 *rpcm = NULL;
887 err = snd_pcm_new(ice->card, "ICE1712 consumer", device, 1, 1, &pcm);
888 if (err < 0)
889 return err;
890
891 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ice1712_playback_ops);
892 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ice1712_capture_ops);
893
894 pcm->private_data = ice;
895 pcm->info_flags = 0;
896 strcpy(pcm->name, "ICE1712 consumer");
897 ice->pcm = pcm;
898
899 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
900 snd_dma_pci_data(ice->pci), 64*1024, 64*1024);
901
902 if (rpcm)
903 *rpcm = pcm;
904
905 printk(KERN_WARNING "Consumer PCM code does not work well at the moment --jk\n");
906
907 return 0;
908 }
909
910 static int __devinit snd_ice1712_pcm_ds(struct snd_ice1712 * ice, int device, struct snd_pcm ** rpcm)
911 {
912 struct snd_pcm *pcm;
913 int err;
914
915 if (rpcm)
916 *rpcm = NULL;
917 err = snd_pcm_new(ice->card, "ICE1712 consumer (DS)", device, 6, 0, &pcm);
918 if (err < 0)
919 return err;
920
921 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ice1712_playback_ds_ops);
922
923 pcm->private_data = ice;
924 pcm->info_flags = 0;
925 strcpy(pcm->name, "ICE1712 consumer (DS)");
926 ice->pcm_ds = pcm;
927
928 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
929 snd_dma_pci_data(ice->pci), 64*1024, 128*1024);
930
931 if (rpcm)
932 *rpcm = pcm;
933
934 return 0;
935 }
936
937 /*
938 * PCM code - professional part (multitrack)
939 */
940
941 static unsigned int rates[] = { 8000, 9600, 11025, 12000, 16000, 22050, 24000,
942 32000, 44100, 48000, 64000, 88200, 96000 };
943
944 static struct snd_pcm_hw_constraint_list hw_constraints_rates = {
945 .count = ARRAY_SIZE(rates),
946 .list = rates,
947 .mask = 0,
948 };
949
950 static int snd_ice1712_pro_trigger(struct snd_pcm_substream *substream,
951 int cmd)
952 {
953 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
954 switch (cmd) {
955 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
956 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
957 {
958 unsigned int what;
959 unsigned int old;
960 if (substream->stream != SNDRV_PCM_STREAM_PLAYBACK)
961 return -EINVAL;
962 what = ICE1712_PLAYBACK_PAUSE;
963 snd_pcm_trigger_done(substream, substream);
964 spin_lock(&ice->reg_lock);
965 old = inl(ICEMT(ice, PLAYBACK_CONTROL));
966 if (cmd == SNDRV_PCM_TRIGGER_PAUSE_PUSH)
967 old |= what;
968 else
969 old &= ~what;
970 outl(old, ICEMT(ice, PLAYBACK_CONTROL));
971 spin_unlock(&ice->reg_lock);
972 break;
973 }
974 case SNDRV_PCM_TRIGGER_START:
975 case SNDRV_PCM_TRIGGER_STOP:
976 {
977 unsigned int what = 0;
978 unsigned int old;
979 struct list_head *pos;
980 struct snd_pcm_substream *s;
981
982 snd_pcm_group_for_each(pos, substream) {
983 s = snd_pcm_group_substream_entry(pos);
984 if (s == ice->playback_pro_substream) {
985 what |= ICE1712_PLAYBACK_START;
986 snd_pcm_trigger_done(s, substream);
987 } else if (s == ice->capture_pro_substream) {
988 what |= ICE1712_CAPTURE_START_SHADOW;
989 snd_pcm_trigger_done(s, substream);
990 }
991 }
992 spin_lock(&ice->reg_lock);
993 old = inl(ICEMT(ice, PLAYBACK_CONTROL));
994 if (cmd == SNDRV_PCM_TRIGGER_START)
995 old |= what;
996 else
997 old &= ~what;
998 outl(old, ICEMT(ice, PLAYBACK_CONTROL));
999 spin_unlock(&ice->reg_lock);
1000 break;
1001 }
1002 default:
1003 return -EINVAL;
1004 }
1005 return 0;
1006 }
1007
1008 /*
1009 */
1010 static void snd_ice1712_set_pro_rate(struct snd_ice1712 *ice, unsigned int rate, int force)
1011 {
1012 unsigned long flags;
1013 unsigned char val, old;
1014 unsigned int i;
1015
1016 switch (rate) {
1017 case 8000: val = 6; break;
1018 case 9600: val = 3; break;
1019 case 11025: val = 10; break;
1020 case 12000: val = 2; break;
1021 case 16000: val = 5; break;
1022 case 22050: val = 9; break;
1023 case 24000: val = 1; break;
1024 case 32000: val = 4; break;
1025 case 44100: val = 8; break;
1026 case 48000: val = 0; break;
1027 case 64000: val = 15; break;
1028 case 88200: val = 11; break;
1029 case 96000: val = 7; break;
1030 default:
1031 snd_BUG();
1032 val = 0;
1033 rate = 48000;
1034 break;
1035 }
1036
1037 spin_lock_irqsave(&ice->reg_lock, flags);
1038 if (inb(ICEMT(ice, PLAYBACK_CONTROL)) & (ICE1712_CAPTURE_START_SHADOW|
1039 ICE1712_PLAYBACK_PAUSE|
1040 ICE1712_PLAYBACK_START)) {
1041 __out:
1042 spin_unlock_irqrestore(&ice->reg_lock, flags);
1043 return;
1044 }
1045 if (!force && is_pro_rate_locked(ice))
1046 goto __out;
1047
1048 old = inb(ICEMT(ice, RATE));
1049 if (!force && old == val)
1050 goto __out;
1051 outb(val, ICEMT(ice, RATE));
1052 spin_unlock_irqrestore(&ice->reg_lock, flags);
1053
1054 if (ice->gpio.set_pro_rate)
1055 ice->gpio.set_pro_rate(ice, rate);
1056 for (i = 0; i < ice->akm_codecs; i++) {
1057 if (ice->akm[i].ops.set_rate_val)
1058 ice->akm[i].ops.set_rate_val(&ice->akm[i], rate);
1059 }
1060 if (ice->spdif.ops.setup_rate)
1061 ice->spdif.ops.setup_rate(ice, rate);
1062 }
1063
1064 static int snd_ice1712_playback_pro_prepare(struct snd_pcm_substream *substream)
1065 {
1066 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1067
1068 ice->playback_pro_size = snd_pcm_lib_buffer_bytes(substream);
1069 spin_lock_irq(&ice->reg_lock);
1070 outl(substream->runtime->dma_addr, ICEMT(ice, PLAYBACK_ADDR));
1071 outw((ice->playback_pro_size >> 2) - 1, ICEMT(ice, PLAYBACK_SIZE));
1072 outw((snd_pcm_lib_period_bytes(substream) >> 2) - 1, ICEMT(ice, PLAYBACK_COUNT));
1073 spin_unlock_irq(&ice->reg_lock);
1074
1075 return 0;
1076 }
1077
1078 static int snd_ice1712_playback_pro_hw_params(struct snd_pcm_substream *substream,
1079 struct snd_pcm_hw_params *hw_params)
1080 {
1081 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1082
1083 snd_ice1712_set_pro_rate(ice, params_rate(hw_params), 0);
1084 return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
1085 }
1086
1087 static int snd_ice1712_capture_pro_prepare(struct snd_pcm_substream *substream)
1088 {
1089 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1090
1091 ice->capture_pro_size = snd_pcm_lib_buffer_bytes(substream);
1092 spin_lock_irq(&ice->reg_lock);
1093 outl(substream->runtime->dma_addr, ICEMT(ice, CAPTURE_ADDR));
1094 outw((ice->capture_pro_size >> 2) - 1, ICEMT(ice, CAPTURE_SIZE));
1095 outw((snd_pcm_lib_period_bytes(substream) >> 2) - 1, ICEMT(ice, CAPTURE_COUNT));
1096 spin_unlock_irq(&ice->reg_lock);
1097 return 0;
1098 }
1099
1100 static int snd_ice1712_capture_pro_hw_params(struct snd_pcm_substream *substream,
1101 struct snd_pcm_hw_params *hw_params)
1102 {
1103 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1104
1105 snd_ice1712_set_pro_rate(ice, params_rate(hw_params), 0);
1106 return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
1107 }
1108
1109 static snd_pcm_uframes_t snd_ice1712_playback_pro_pointer(struct snd_pcm_substream *substream)
1110 {
1111 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1112 size_t ptr;
1113
1114 if (!(inl(ICEMT(ice, PLAYBACK_CONTROL)) & ICE1712_PLAYBACK_START))
1115 return 0;
1116 ptr = ice->playback_pro_size - (inw(ICEMT(ice, PLAYBACK_SIZE)) << 2);
1117 if (ptr == substream->runtime->buffer_size)
1118 ptr = 0;
1119 return bytes_to_frames(substream->runtime, ptr);
1120 }
1121
1122 static snd_pcm_uframes_t snd_ice1712_capture_pro_pointer(struct snd_pcm_substream *substream)
1123 {
1124 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1125 size_t ptr;
1126
1127 if (!(inl(ICEMT(ice, PLAYBACK_CONTROL)) & ICE1712_CAPTURE_START_SHADOW))
1128 return 0;
1129 ptr = ice->capture_pro_size - (inw(ICEMT(ice, CAPTURE_SIZE)) << 2);
1130 if (ptr == substream->runtime->buffer_size)
1131 ptr = 0;
1132 return bytes_to_frames(substream->runtime, ptr);
1133 }
1134
1135 static struct snd_pcm_hardware snd_ice1712_playback_pro =
1136 {
1137 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
1138 SNDRV_PCM_INFO_BLOCK_TRANSFER |
1139 SNDRV_PCM_INFO_MMAP_VALID |
1140 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START),
1141 .formats = SNDRV_PCM_FMTBIT_S32_LE,
1142 .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_96000,
1143 .rate_min = 4000,
1144 .rate_max = 96000,
1145 .channels_min = 10,
1146 .channels_max = 10,
1147 .buffer_bytes_max = (256*1024),
1148 .period_bytes_min = 10 * 4 * 2,
1149 .period_bytes_max = 131040,
1150 .periods_min = 1,
1151 .periods_max = 1024,
1152 .fifo_size = 0,
1153 };
1154
1155 static struct snd_pcm_hardware snd_ice1712_capture_pro =
1156 {
1157 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
1158 SNDRV_PCM_INFO_BLOCK_TRANSFER |
1159 SNDRV_PCM_INFO_MMAP_VALID |
1160 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START),
1161 .formats = SNDRV_PCM_FMTBIT_S32_LE,
1162 .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_96000,
1163 .rate_min = 4000,
1164 .rate_max = 96000,
1165 .channels_min = 12,
1166 .channels_max = 12,
1167 .buffer_bytes_max = (256*1024),
1168 .period_bytes_min = 12 * 4 * 2,
1169 .period_bytes_max = 131040,
1170 .periods_min = 1,
1171 .periods_max = 1024,
1172 .fifo_size = 0,
1173 };
1174
1175 static int snd_ice1712_playback_pro_open(struct snd_pcm_substream *substream)
1176 {
1177 struct snd_pcm_runtime *runtime = substream->runtime;
1178 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1179
1180 ice->playback_pro_substream = substream;
1181 runtime->hw = snd_ice1712_playback_pro;
1182 snd_pcm_set_sync(substream);
1183 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
1184 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hw_constraints_rates);
1185
1186 if (ice->spdif.ops.open)
1187 ice->spdif.ops.open(ice, substream);
1188
1189 return 0;
1190 }
1191
1192 static int snd_ice1712_capture_pro_open(struct snd_pcm_substream *substream)
1193 {
1194 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1195 struct snd_pcm_runtime *runtime = substream->runtime;
1196
1197 ice->capture_pro_substream = substream;
1198 runtime->hw = snd_ice1712_capture_pro;
1199 snd_pcm_set_sync(substream);
1200 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
1201 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hw_constraints_rates);
1202 return 0;
1203 }
1204
1205 static int snd_ice1712_playback_pro_close(struct snd_pcm_substream *substream)
1206 {
1207 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1208
1209 if (PRO_RATE_RESET)
1210 snd_ice1712_set_pro_rate(ice, PRO_RATE_DEFAULT, 0);
1211 ice->playback_pro_substream = NULL;
1212 if (ice->spdif.ops.close)
1213 ice->spdif.ops.close(ice, substream);
1214
1215 return 0;
1216 }
1217
1218 static int snd_ice1712_capture_pro_close(struct snd_pcm_substream *substream)
1219 {
1220 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1221
1222 if (PRO_RATE_RESET)
1223 snd_ice1712_set_pro_rate(ice, PRO_RATE_DEFAULT, 0);
1224 ice->capture_pro_substream = NULL;
1225 return 0;
1226 }
1227
1228 static struct snd_pcm_ops snd_ice1712_playback_pro_ops = {
1229 .open = snd_ice1712_playback_pro_open,
1230 .close = snd_ice1712_playback_pro_close,
1231 .ioctl = snd_pcm_lib_ioctl,
1232 .hw_params = snd_ice1712_playback_pro_hw_params,
1233 .hw_free = snd_ice1712_hw_free,
1234 .prepare = snd_ice1712_playback_pro_prepare,
1235 .trigger = snd_ice1712_pro_trigger,
1236 .pointer = snd_ice1712_playback_pro_pointer,
1237 };
1238
1239 static struct snd_pcm_ops snd_ice1712_capture_pro_ops = {
1240 .open = snd_ice1712_capture_pro_open,
1241 .close = snd_ice1712_capture_pro_close,
1242 .ioctl = snd_pcm_lib_ioctl,
1243 .hw_params = snd_ice1712_capture_pro_hw_params,
1244 .hw_free = snd_ice1712_hw_free,
1245 .prepare = snd_ice1712_capture_pro_prepare,
1246 .trigger = snd_ice1712_pro_trigger,
1247 .pointer = snd_ice1712_capture_pro_pointer,
1248 };
1249
1250 static int __devinit snd_ice1712_pcm_profi(struct snd_ice1712 * ice, int device, struct snd_pcm ** rpcm)
1251 {
1252 struct snd_pcm *pcm;
1253 int err;
1254
1255 if (rpcm)
1256 *rpcm = NULL;
1257 err = snd_pcm_new(ice->card, "ICE1712 multi", device, 1, 1, &pcm);
1258 if (err < 0)
1259 return err;
1260
1261 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ice1712_playback_pro_ops);
1262 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ice1712_capture_pro_ops);
1263
1264 pcm->private_data = ice;
1265 pcm->info_flags = 0;
1266 strcpy(pcm->name, "ICE1712 multi");
1267
1268 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1269 snd_dma_pci_data(ice->pci), 256*1024, 256*1024);
1270
1271 ice->pcm_pro = pcm;
1272 if (rpcm)
1273 *rpcm = pcm;
1274
1275 if (ice->cs8427) {
1276 /* assign channels to iec958 */
1277 err = snd_cs8427_iec958_build(ice->cs8427,
1278 pcm->streams[0].substream,
1279 pcm->streams[1].substream);
1280 if (err < 0)
1281 return err;
1282 }
1283
1284 if ((err = snd_ice1712_build_pro_mixer(ice)) < 0)
1285 return err;
1286 return 0;
1287 }
1288
1289 /*
1290 * Mixer section
1291 */
1292
1293 static void snd_ice1712_update_volume(struct snd_ice1712 *ice, int index)
1294 {
1295 unsigned int vol = ice->pro_volumes[index];
1296 unsigned short val = 0;
1297
1298 val |= (vol & 0x8000) == 0 ? (96 - (vol & 0x7f)) : 0x7f;
1299 val |= ((vol & 0x80000000) == 0 ? (96 - ((vol >> 16) & 0x7f)) : 0x7f) << 8;
1300 outb(index, ICEMT(ice, MONITOR_INDEX));
1301 outw(val, ICEMT(ice, MONITOR_VOLUME));
1302 }
1303
1304 static int snd_ice1712_pro_mixer_switch_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1305 {
1306 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
1307 uinfo->count = 2;
1308 uinfo->value.integer.min = 0;
1309 uinfo->value.integer.max = 1;
1310 return 0;
1311 }
1312
1313 static int snd_ice1712_pro_mixer_switch_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1314 {
1315 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1316 int index = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id) + kcontrol->private_value;
1317
1318 spin_lock_irq(&ice->reg_lock);
1319 ucontrol->value.integer.value[0] = !((ice->pro_volumes[index] >> 15) & 1);
1320 ucontrol->value.integer.value[1] = !((ice->pro_volumes[index] >> 31) & 1);
1321 spin_unlock_irq(&ice->reg_lock);
1322 return 0;
1323 }
1324
1325 static int snd_ice1712_pro_mixer_switch_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1326 {
1327 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1328 int index = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id) + kcontrol->private_value;
1329 unsigned int nval, change;
1330
1331 nval = (ucontrol->value.integer.value[0] ? 0 : 0x00008000) |
1332 (ucontrol->value.integer.value[1] ? 0 : 0x80000000);
1333 spin_lock_irq(&ice->reg_lock);
1334 nval |= ice->pro_volumes[index] & ~0x80008000;
1335 change = nval != ice->pro_volumes[index];
1336 ice->pro_volumes[index] = nval;
1337 snd_ice1712_update_volume(ice, index);
1338 spin_unlock_irq(&ice->reg_lock);
1339 return change;
1340 }
1341
1342 static int snd_ice1712_pro_mixer_volume_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1343 {
1344 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
1345 uinfo->count = 2;
1346 uinfo->value.integer.min = 0;
1347 uinfo->value.integer.max = 96;
1348 return 0;
1349 }
1350
1351 static int snd_ice1712_pro_mixer_volume_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1352 {
1353 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1354 int index = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id) + kcontrol->private_value;
1355
1356 spin_lock_irq(&ice->reg_lock);
1357 ucontrol->value.integer.value[0] = (ice->pro_volumes[index] >> 0) & 127;
1358 ucontrol->value.integer.value[1] = (ice->pro_volumes[index] >> 16) & 127;
1359 spin_unlock_irq(&ice->reg_lock);
1360 return 0;
1361 }
1362
1363 static int snd_ice1712_pro_mixer_volume_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1364 {
1365 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1366 int index = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id) + kcontrol->private_value;
1367 unsigned int nval, change;
1368
1369 nval = (ucontrol->value.integer.value[0] & 127) |
1370 ((ucontrol->value.integer.value[1] & 127) << 16);
1371 spin_lock_irq(&ice->reg_lock);
1372 nval |= ice->pro_volumes[index] & ~0x007f007f;
1373 change = nval != ice->pro_volumes[index];
1374 ice->pro_volumes[index] = nval;
1375 snd_ice1712_update_volume(ice, index);
1376 spin_unlock_irq(&ice->reg_lock);
1377 return change;
1378 }
1379
1380
1381 static struct snd_kcontrol_new snd_ice1712_multi_playback_ctrls[] __devinitdata = {
1382 {
1383 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1384 .name = "Multi Playback Switch",
1385 .info = snd_ice1712_pro_mixer_switch_info,
1386 .get = snd_ice1712_pro_mixer_switch_get,
1387 .put = snd_ice1712_pro_mixer_switch_put,
1388 .private_value = 0,
1389 .count = 10,
1390 },
1391 {
1392 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1393 .name = "Multi Playback Volume",
1394 .info = snd_ice1712_pro_mixer_volume_info,
1395 .get = snd_ice1712_pro_mixer_volume_get,
1396 .put = snd_ice1712_pro_mixer_volume_put,
1397 .private_value = 0,
1398 .count = 10,
1399 },
1400 };
1401
1402 static struct snd_kcontrol_new snd_ice1712_multi_capture_analog_switch __devinitdata = {
1403 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1404 .name = "H/W Multi Capture Switch",
1405 .info = snd_ice1712_pro_mixer_switch_info,
1406 .get = snd_ice1712_pro_mixer_switch_get,
1407 .put = snd_ice1712_pro_mixer_switch_put,
1408 .private_value = 10,
1409 };
1410
1411 static struct snd_kcontrol_new snd_ice1712_multi_capture_spdif_switch __devinitdata = {
1412 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1413 .name = SNDRV_CTL_NAME_IEC958("Multi ",CAPTURE,SWITCH),
1414 .info = snd_ice1712_pro_mixer_switch_info,
1415 .get = snd_ice1712_pro_mixer_switch_get,
1416 .put = snd_ice1712_pro_mixer_switch_put,
1417 .private_value = 18,
1418 .count = 2,
1419 };
1420
1421 static struct snd_kcontrol_new snd_ice1712_multi_capture_analog_volume __devinitdata = {
1422 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1423 .name = "H/W Multi Capture Volume",
1424 .info = snd_ice1712_pro_mixer_volume_info,
1425 .get = snd_ice1712_pro_mixer_volume_get,
1426 .put = snd_ice1712_pro_mixer_volume_put,
1427 .private_value = 10,
1428 };
1429
1430 static struct snd_kcontrol_new snd_ice1712_multi_capture_spdif_volume __devinitdata = {
1431 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1432 .name = SNDRV_CTL_NAME_IEC958("Multi ",CAPTURE,VOLUME),
1433 .info = snd_ice1712_pro_mixer_volume_info,
1434 .get = snd_ice1712_pro_mixer_volume_get,
1435 .put = snd_ice1712_pro_mixer_volume_put,
1436 .private_value = 18,
1437 .count = 2,
1438 };
1439
1440 static int __devinit snd_ice1712_build_pro_mixer(struct snd_ice1712 *ice)
1441 {
1442 struct snd_card *card = ice->card;
1443 unsigned int idx;
1444 int err;
1445
1446 /* multi-channel mixer */
1447 for (idx = 0; idx < ARRAY_SIZE(snd_ice1712_multi_playback_ctrls); idx++) {
1448 err = snd_ctl_add(card, snd_ctl_new1(&snd_ice1712_multi_playback_ctrls[idx], ice));
1449 if (err < 0)
1450 return err;
1451 }
1452
1453 if (ice->num_total_adcs > 0) {
1454 struct snd_kcontrol_new tmp = snd_ice1712_multi_capture_analog_switch;
1455 tmp.count = ice->num_total_adcs;
1456 err = snd_ctl_add(card, snd_ctl_new1(&tmp, ice));
1457 if (err < 0)
1458 return err;
1459 }
1460
1461 err = snd_ctl_add(card, snd_ctl_new1(&snd_ice1712_multi_capture_spdif_switch, ice));
1462 if (err < 0)
1463 return err;
1464
1465 if (ice->num_total_adcs > 0) {
1466 struct snd_kcontrol_new tmp = snd_ice1712_multi_capture_analog_volume;
1467 tmp.count = ice->num_total_adcs;
1468 err = snd_ctl_add(card, snd_ctl_new1(&tmp, ice));
1469 if (err < 0)
1470 return err;
1471 }
1472
1473 err = snd_ctl_add(card, snd_ctl_new1(&snd_ice1712_multi_capture_spdif_volume, ice));
1474 if (err < 0)
1475 return err;
1476
1477 /* initialize volumes */
1478 for (idx = 0; idx < 10; idx++) {
1479 ice->pro_volumes[idx] = 0x80008000; /* mute */
1480 snd_ice1712_update_volume(ice, idx);
1481 }
1482 for (idx = 10; idx < 10 + ice->num_total_adcs; idx++) {
1483 ice->pro_volumes[idx] = 0x80008000; /* mute */
1484 snd_ice1712_update_volume(ice, idx);
1485 }
1486 for (idx = 18; idx < 20; idx++) {
1487 ice->pro_volumes[idx] = 0x80008000; /* mute */
1488 snd_ice1712_update_volume(ice, idx);
1489 }
1490 return 0;
1491 }
1492
1493 static void snd_ice1712_mixer_free_ac97(struct snd_ac97 *ac97)
1494 {
1495 struct snd_ice1712 *ice = ac97->private_data;
1496 ice->ac97 = NULL;
1497 }
1498
1499 static int __devinit snd_ice1712_ac97_mixer(struct snd_ice1712 * ice)
1500 {
1501 int err, bus_num = 0;
1502 struct snd_ac97_template ac97;
1503 struct snd_ac97_bus *pbus;
1504 static struct snd_ac97_bus_ops con_ops = {
1505 .write = snd_ice1712_ac97_write,
1506 .read = snd_ice1712_ac97_read,
1507 };
1508 static struct snd_ac97_bus_ops pro_ops = {
1509 .write = snd_ice1712_pro_ac97_write,
1510 .read = snd_ice1712_pro_ac97_read,
1511 };
1512
1513 if (ice_has_con_ac97(ice)) {
1514 if ((err = snd_ac97_bus(ice->card, bus_num++, &con_ops, NULL, &pbus)) < 0)
1515 return err;
1516 memset(&ac97, 0, sizeof(ac97));
1517 ac97.private_data = ice;
1518 ac97.private_free = snd_ice1712_mixer_free_ac97;
1519 if ((err = snd_ac97_mixer(pbus, &ac97, &ice->ac97)) < 0)
1520 printk(KERN_WARNING "ice1712: cannot initialize ac97 for consumer, skipped\n");
1521 else {
1522 if ((err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_mixer_digmix_route_ac97, ice))) < 0)
1523 return err;
1524 return 0;
1525 }
1526 }
1527
1528 if (! (ice->eeprom.data[ICE_EEP1_ACLINK] & ICE1712_CFG_PRO_I2S)) {
1529 if ((err = snd_ac97_bus(ice->card, bus_num, &pro_ops, NULL, &pbus)) < 0)
1530 return err;
1531 memset(&ac97, 0, sizeof(ac97));
1532 ac97.private_data = ice;
1533 ac97.private_free = snd_ice1712_mixer_free_ac97;
1534 if ((err = snd_ac97_mixer(pbus, &ac97, &ice->ac97)) < 0)
1535 printk(KERN_WARNING "ice1712: cannot initialize pro ac97, skipped\n");
1536 else
1537 return 0;
1538 }
1539 /* I2S mixer only */
1540 strcat(ice->card->mixername, "ICE1712 - multitrack");
1541 return 0;
1542 }
1543
1544 /*
1545 *
1546 */
1547
1548 static inline unsigned int eeprom_double(struct snd_ice1712 *ice, int idx)
1549 {
1550 return (unsigned int)ice->eeprom.data[idx] | ((unsigned int)ice->eeprom.data[idx + 1] << 8);
1551 }
1552
1553 static void snd_ice1712_proc_read(struct snd_info_entry *entry,
1554 struct snd_info_buffer *buffer)
1555 {
1556 struct snd_ice1712 *ice = entry->private_data;
1557 unsigned int idx;
1558
1559 snd_iprintf(buffer, "%s\n\n", ice->card->longname);
1560 snd_iprintf(buffer, "EEPROM:\n");
1561
1562 snd_iprintf(buffer, " Subvendor : 0x%x\n", ice->eeprom.subvendor);
1563 snd_iprintf(buffer, " Size : %i bytes\n", ice->eeprom.size);
1564 snd_iprintf(buffer, " Version : %i\n", ice->eeprom.version);
1565 snd_iprintf(buffer, " Codec : 0x%x\n", ice->eeprom.data[ICE_EEP1_CODEC]);
1566 snd_iprintf(buffer, " ACLink : 0x%x\n", ice->eeprom.data[ICE_EEP1_ACLINK]);
1567 snd_iprintf(buffer, " I2S ID : 0x%x\n", ice->eeprom.data[ICE_EEP1_I2SID]);
1568 snd_iprintf(buffer, " S/PDIF : 0x%x\n", ice->eeprom.data[ICE_EEP1_SPDIF]);
1569 snd_iprintf(buffer, " GPIO mask : 0x%x\n", ice->eeprom.gpiomask);
1570 snd_iprintf(buffer, " GPIO state : 0x%x\n", ice->eeprom.gpiostate);
1571 snd_iprintf(buffer, " GPIO direction : 0x%x\n", ice->eeprom.gpiodir);
1572 snd_iprintf(buffer, " AC'97 main : 0x%x\n", eeprom_double(ice, ICE_EEP1_AC97_MAIN_LO));
1573 snd_iprintf(buffer, " AC'97 pcm : 0x%x\n", eeprom_double(ice, ICE_EEP1_AC97_PCM_LO));
1574 snd_iprintf(buffer, " AC'97 record : 0x%x\n", eeprom_double(ice, ICE_EEP1_AC97_REC_LO));
1575 snd_iprintf(buffer, " AC'97 record src : 0x%x\n", ice->eeprom.data[ICE_EEP1_AC97_RECSRC]);
1576 for (idx = 0; idx < 4; idx++)
1577 snd_iprintf(buffer, " DAC ID #%i : 0x%x\n", idx, ice->eeprom.data[ICE_EEP1_DAC_ID + idx]);
1578 for (idx = 0; idx < 4; idx++)
1579 snd_iprintf(buffer, " ADC ID #%i : 0x%x\n", idx, ice->eeprom.data[ICE_EEP1_ADC_ID + idx]);
1580 for (idx = 0x1c; idx < ice->eeprom.size; idx++)
1581 snd_iprintf(buffer, " Extra #%02i : 0x%x\n", idx, ice->eeprom.data[idx]);
1582
1583 snd_iprintf(buffer, "\nRegisters:\n");
1584 snd_iprintf(buffer, " PSDOUT03 : 0x%04x\n", (unsigned)inw(ICEMT(ice, ROUTE_PSDOUT03)));
1585 snd_iprintf(buffer, " CAPTURE : 0x%08x\n", inl(ICEMT(ice, ROUTE_CAPTURE)));
1586 snd_iprintf(buffer, " SPDOUT : 0x%04x\n", (unsigned)inw(ICEMT(ice, ROUTE_SPDOUT)));
1587 snd_iprintf(buffer, " RATE : 0x%02x\n", (unsigned)inb(ICEMT(ice, RATE)));
1588 snd_iprintf(buffer, " GPIO_DATA : 0x%02x\n", (unsigned)snd_ice1712_get_gpio_data(ice));
1589 snd_iprintf(buffer, " GPIO_WRITE_MASK : 0x%02x\n", (unsigned)snd_ice1712_read(ice, ICE1712_IREG_GPIO_WRITE_MASK));
1590 snd_iprintf(buffer, " GPIO_DIRECTION : 0x%02x\n", (unsigned)snd_ice1712_read(ice, ICE1712_IREG_GPIO_DIRECTION));
1591 }
1592
1593 static void __devinit snd_ice1712_proc_init(struct snd_ice1712 * ice)
1594 {
1595 struct snd_info_entry *entry;
1596
1597 if (! snd_card_proc_new(ice->card, "ice1712", &entry))
1598 snd_info_set_text_ops(entry, ice, snd_ice1712_proc_read);
1599 }
1600
1601 /*
1602 *
1603 */
1604
1605 static int snd_ice1712_eeprom_info(struct snd_kcontrol *kcontrol,
1606 struct snd_ctl_elem_info *uinfo)
1607 {
1608 uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
1609 uinfo->count = sizeof(struct snd_ice1712_eeprom);
1610 return 0;
1611 }
1612
1613 static int snd_ice1712_eeprom_get(struct snd_kcontrol *kcontrol,
1614 struct snd_ctl_elem_value *ucontrol)
1615 {
1616 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1617
1618 memcpy(ucontrol->value.bytes.data, &ice->eeprom, sizeof(ice->eeprom));
1619 return 0;
1620 }
1621
1622 static struct snd_kcontrol_new snd_ice1712_eeprom __devinitdata = {
1623 .iface = SNDRV_CTL_ELEM_IFACE_CARD,
1624 .name = "ICE1712 EEPROM",
1625 .access = SNDRV_CTL_ELEM_ACCESS_READ,
1626 .info = snd_ice1712_eeprom_info,
1627 .get = snd_ice1712_eeprom_get
1628 };
1629
1630 /*
1631 */
1632 static int snd_ice1712_spdif_info(struct snd_kcontrol *kcontrol,
1633 struct snd_ctl_elem_info *uinfo)
1634 {
1635 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1636 uinfo->count = 1;
1637 return 0;
1638 }
1639
1640 static int snd_ice1712_spdif_default_get(struct snd_kcontrol *kcontrol,
1641 struct snd_ctl_elem_value *ucontrol)
1642 {
1643 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1644 if (ice->spdif.ops.default_get)
1645 ice->spdif.ops.default_get(ice, ucontrol);
1646 return 0;
1647 }
1648
1649 static int snd_ice1712_spdif_default_put(struct snd_kcontrol *kcontrol,
1650 struct snd_ctl_elem_value *ucontrol)
1651 {
1652 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1653 if (ice->spdif.ops.default_put)
1654 return ice->spdif.ops.default_put(ice, ucontrol);
1655 return 0;
1656 }
1657
1658 static struct snd_kcontrol_new snd_ice1712_spdif_default __devinitdata =
1659 {
1660 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1661 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT),
1662 .info = snd_ice1712_spdif_info,
1663 .get = snd_ice1712_spdif_default_get,
1664 .put = snd_ice1712_spdif_default_put
1665 };
1666
1667 static int snd_ice1712_spdif_maskc_get(struct snd_kcontrol *kcontrol,
1668 struct snd_ctl_elem_value *ucontrol)
1669 {
1670 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1671 if (ice->spdif.ops.default_get) {
1672 ucontrol->value.iec958.status[0] = IEC958_AES0_NONAUDIO |
1673 IEC958_AES0_PROFESSIONAL |
1674 IEC958_AES0_CON_NOT_COPYRIGHT |
1675 IEC958_AES0_CON_EMPHASIS;
1676 ucontrol->value.iec958.status[1] = IEC958_AES1_CON_ORIGINAL |
1677 IEC958_AES1_CON_CATEGORY;
1678 ucontrol->value.iec958.status[3] = IEC958_AES3_CON_FS;
1679 } else {
1680 ucontrol->value.iec958.status[0] = 0xff;
1681 ucontrol->value.iec958.status[1] = 0xff;
1682 ucontrol->value.iec958.status[2] = 0xff;
1683 ucontrol->value.iec958.status[3] = 0xff;
1684 ucontrol->value.iec958.status[4] = 0xff;
1685 }
1686 return 0;
1687 }
1688
1689 static int snd_ice1712_spdif_maskp_get(struct snd_kcontrol *kcontrol,
1690 struct snd_ctl_elem_value *ucontrol)
1691 {
1692 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1693 if (ice->spdif.ops.default_get) {
1694 ucontrol->value.iec958.status[0] = IEC958_AES0_NONAUDIO |
1695 IEC958_AES0_PROFESSIONAL |
1696 IEC958_AES0_PRO_FS |
1697 IEC958_AES0_PRO_EMPHASIS;
1698 ucontrol->value.iec958.status[1] = IEC958_AES1_PRO_MODE;
1699 } else {
1700 ucontrol->value.iec958.status[0] = 0xff;
1701 ucontrol->value.iec958.status[1] = 0xff;
1702 ucontrol->value.iec958.status[2] = 0xff;
1703 ucontrol->value.iec958.status[3] = 0xff;
1704 ucontrol->value.iec958.status[4] = 0xff;
1705 }
1706 return 0;
1707 }
1708
1709 static struct snd_kcontrol_new snd_ice1712_spdif_maskc __devinitdata =
1710 {
1711 .access = SNDRV_CTL_ELEM_ACCESS_READ,
1712 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1713 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,CON_MASK),
1714 .info = snd_ice1712_spdif_info,
1715 .get = snd_ice1712_spdif_maskc_get,
1716 };
1717
1718 static struct snd_kcontrol_new snd_ice1712_spdif_maskp __devinitdata =
1719 {
1720 .access = SNDRV_CTL_ELEM_ACCESS_READ,
1721 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1722 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,PRO_MASK),
1723 .info = snd_ice1712_spdif_info,
1724 .get = snd_ice1712_spdif_maskp_get,
1725 };
1726
1727 static int snd_ice1712_spdif_stream_get(struct snd_kcontrol *kcontrol,
1728 struct snd_ctl_elem_value *ucontrol)
1729 {
1730 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1731 if (ice->spdif.ops.stream_get)
1732 ice->spdif.ops.stream_get(ice, ucontrol);
1733 return 0;
1734 }
1735
1736 static int snd_ice1712_spdif_stream_put(struct snd_kcontrol *kcontrol,
1737 struct snd_ctl_elem_value *ucontrol)
1738 {
1739 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1740 if (ice->spdif.ops.stream_put)
1741 return ice->spdif.ops.stream_put(ice, ucontrol);
1742 return 0;
1743 }
1744
1745 static struct snd_kcontrol_new snd_ice1712_spdif_stream __devinitdata =
1746 {
1747 .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
1748 SNDRV_CTL_ELEM_ACCESS_INACTIVE),
1749 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1750 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,PCM_STREAM),
1751 .info = snd_ice1712_spdif_info,
1752 .get = snd_ice1712_spdif_stream_get,
1753 .put = snd_ice1712_spdif_stream_put
1754 };
1755
1756 int snd_ice1712_gpio_info(struct snd_kcontrol *kcontrol,
1757 struct snd_ctl_elem_info *uinfo)
1758 {
1759 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
1760 uinfo->count = 1;
1761 uinfo->value.integer.min = 0;
1762 uinfo->value.integer.max = 1;
1763 return 0;
1764 }
1765
1766 int snd_ice1712_gpio_get(struct snd_kcontrol *kcontrol,
1767 struct snd_ctl_elem_value *ucontrol)
1768 {
1769 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1770 unsigned char mask = kcontrol->private_value & 0xff;
1771 int invert = (kcontrol->private_value & (1<<24)) ? 1 : 0;
1772
1773 snd_ice1712_save_gpio_status(ice);
1774 ucontrol->value.integer.value[0] =
1775 (snd_ice1712_gpio_read(ice) & mask ? 1 : 0) ^ invert;
1776 snd_ice1712_restore_gpio_status(ice);
1777 return 0;
1778 }
1779
1780 int snd_ice1712_gpio_put(struct snd_kcontrol *kcontrol,
1781 struct snd_ctl_elem_value *ucontrol)
1782 {
1783 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1784 unsigned char mask = kcontrol->private_value & 0xff;
1785 int invert = (kcontrol->private_value & (1<<24)) ? mask : 0;
1786 unsigned int val, nval;
1787
1788 if (kcontrol->private_value & (1 << 31))
1789 return -EPERM;
1790 nval = (ucontrol->value.integer.value[0] ? mask : 0) ^ invert;
1791 snd_ice1712_save_gpio_status(ice);
1792 val = snd_ice1712_gpio_read(ice);
1793 nval |= val & ~mask;
1794 if (val != nval)
1795 snd_ice1712_gpio_write(ice, nval);
1796 snd_ice1712_restore_gpio_status(ice);
1797 return val != nval;
1798 }
1799
1800 /*
1801 * rate
1802 */
1803 static int snd_ice1712_pro_internal_clock_info(struct snd_kcontrol *kcontrol,
1804 struct snd_ctl_elem_info *uinfo)
1805 {
1806 static char *texts[] = {
1807 "8000", /* 0: 6 */
1808 "9600", /* 1: 3 */
1809 "11025", /* 2: 10 */
1810 "12000", /* 3: 2 */
1811 "16000", /* 4: 5 */
1812 "22050", /* 5: 9 */
1813 "24000", /* 6: 1 */
1814 "32000", /* 7: 4 */
1815 "44100", /* 8: 8 */
1816 "48000", /* 9: 0 */
1817 "64000", /* 10: 15 */
1818 "88200", /* 11: 11 */
1819 "96000", /* 12: 7 */
1820 "IEC958 Input", /* 13: -- */
1821 };
1822 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1823 uinfo->count = 1;
1824 uinfo->value.enumerated.items = 14;
1825 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
1826 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
1827 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
1828 return 0;
1829 }
1830
1831 static int snd_ice1712_pro_internal_clock_get(struct snd_kcontrol *kcontrol,
1832 struct snd_ctl_elem_value *ucontrol)
1833 {
1834 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1835 static unsigned char xlate[16] = {
1836 9, 6, 3, 1, 7, 4, 0, 12, 8, 5, 2, 11, 255, 255, 255, 10
1837 };
1838 unsigned char val;
1839
1840 spin_lock_irq(&ice->reg_lock);
1841 if (is_spdif_master(ice)) {
1842 ucontrol->value.enumerated.item[0] = 13;
1843 } else {
1844 val = xlate[inb(ICEMT(ice, RATE)) & 15];
1845 if (val == 255) {
1846 snd_BUG();
1847 val = 0;
1848 }
1849 ucontrol->value.enumerated.item[0] = val;
1850 }
1851 spin_unlock_irq(&ice->reg_lock);
1852 return 0;
1853 }
1854
1855 static int snd_ice1712_pro_internal_clock_put(struct snd_kcontrol *kcontrol,
1856 struct snd_ctl_elem_value *ucontrol)
1857 {
1858 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1859 static unsigned int xrate[13] = {
1860 8000, 9600, 11025, 12000, 1600, 22050, 24000,
1861 32000, 44100, 48000, 64000, 88200, 96000
1862 };
1863 unsigned char oval;
1864 int change = 0;
1865
1866 spin_lock_irq(&ice->reg_lock);
1867 oval = inb(ICEMT(ice, RATE));
1868 if (ucontrol->value.enumerated.item[0] == 13) {
1869 outb(oval | ICE1712_SPDIF_MASTER, ICEMT(ice, RATE));
1870 } else {
1871 PRO_RATE_DEFAULT = xrate[ucontrol->value.integer.value[0] % 13];
1872 spin_unlock_irq(&ice->reg_lock);
1873 snd_ice1712_set_pro_rate(ice, PRO_RATE_DEFAULT, 1);
1874 spin_lock_irq(&ice->reg_lock);
1875 }
1876 change = inb(ICEMT(ice, RATE)) != oval;
1877 spin_unlock_irq(&ice->reg_lock);
1878
1879 if ((oval & ICE1712_SPDIF_MASTER) !=
1880 (inb(ICEMT(ice, RATE)) & ICE1712_SPDIF_MASTER))
1881 snd_ice1712_set_input_clock_source(ice, is_spdif_master(ice));
1882
1883 return change;
1884 }
1885
1886 static struct snd_kcontrol_new snd_ice1712_pro_internal_clock __devinitdata = {
1887 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1888 .name = "Multi Track Internal Clock",
1889 .info = snd_ice1712_pro_internal_clock_info,
1890 .get = snd_ice1712_pro_internal_clock_get,
1891 .put = snd_ice1712_pro_internal_clock_put
1892 };
1893
1894 static int snd_ice1712_pro_internal_clock_default_info(struct snd_kcontrol *kcontrol,
1895 struct snd_ctl_elem_info *uinfo)
1896 {
1897 static char *texts[] = {
1898 "8000", /* 0: 6 */
1899 "9600", /* 1: 3 */
1900 "11025", /* 2: 10 */
1901 "12000", /* 3: 2 */
1902 "16000", /* 4: 5 */
1903 "22050", /* 5: 9 */
1904 "24000", /* 6: 1 */
1905 "32000", /* 7: 4 */
1906 "44100", /* 8: 8 */
1907 "48000", /* 9: 0 */
1908 "64000", /* 10: 15 */
1909 "88200", /* 11: 11 */
1910 "96000", /* 12: 7 */
1911 // "IEC958 Input", /* 13: -- */
1912 };
1913 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1914 uinfo->count = 1;
1915 uinfo->value.enumerated.items = 13;
1916 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
1917 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
1918 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
1919 return 0;
1920 }
1921
1922 static int snd_ice1712_pro_internal_clock_default_get(struct snd_kcontrol *kcontrol,
1923 struct snd_ctl_elem_value *ucontrol)
1924 {
1925 int val;
1926 static unsigned int xrate[13] = {
1927 8000, 9600, 11025, 12000, 1600, 22050, 24000,
1928 32000, 44100, 48000, 64000, 88200, 96000
1929 };
1930
1931 for (val = 0; val < 13; val++) {
1932 if (xrate[val] == PRO_RATE_DEFAULT)
1933 break;
1934 }
1935
1936 ucontrol->value.enumerated.item[0] = val;
1937 return 0;
1938 }
1939
1940 static int snd_ice1712_pro_internal_clock_default_put(struct snd_kcontrol *kcontrol,
1941 struct snd_ctl_elem_value *ucontrol)
1942 {
1943 static unsigned int xrate[13] = {
1944 8000, 9600, 11025, 12000, 1600, 22050, 24000,
1945 32000, 44100, 48000, 64000, 88200, 96000
1946 };
1947 unsigned char oval;
1948 int change = 0;
1949
1950 oval = PRO_RATE_DEFAULT;
1951 PRO_RATE_DEFAULT = xrate[ucontrol->value.integer.value[0] % 13];
1952 change = PRO_RATE_DEFAULT != oval;
1953
1954 return change;
1955 }
1956
1957 static struct snd_kcontrol_new snd_ice1712_pro_internal_clock_default __devinitdata = {
1958 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1959 .name = "Multi Track Internal Clock Default",
1960 .info = snd_ice1712_pro_internal_clock_default_info,
1961 .get = snd_ice1712_pro_internal_clock_default_get,
1962 .put = snd_ice1712_pro_internal_clock_default_put
1963 };
1964
1965 static int snd_ice1712_pro_rate_locking_info(struct snd_kcontrol *kcontrol,
1966 struct snd_ctl_elem_info *uinfo)
1967 {
1968 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
1969 uinfo->count = 1;
1970 uinfo->value.integer.min = 0;
1971 uinfo->value.integer.max = 1;
1972 return 0;
1973 }
1974
1975 static int snd_ice1712_pro_rate_locking_get(struct snd_kcontrol *kcontrol,
1976 struct snd_ctl_elem_value *ucontrol)
1977 {
1978 ucontrol->value.integer.value[0] = PRO_RATE_LOCKED;
1979 return 0;
1980 }
1981
1982 static int snd_ice1712_pro_rate_locking_put(struct snd_kcontrol *kcontrol,
1983 struct snd_ctl_elem_value *ucontrol)
1984 {
1985 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1986 int change = 0, nval;
1987
1988 nval = ucontrol->value.integer.value[0] ? 1 : 0;
1989 spin_lock_irq(&ice->reg_lock);
1990 change = PRO_RATE_LOCKED != nval;
1991 PRO_RATE_LOCKED = nval;
1992 spin_unlock_irq(&ice->reg_lock);
1993 return change;
1994 }
1995
1996 static struct snd_kcontrol_new snd_ice1712_pro_rate_locking __devinitdata = {
1997 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1998 .name = "Multi Track Rate Locking",
1999 .info = snd_ice1712_pro_rate_locking_info,
2000 .get = snd_ice1712_pro_rate_locking_get,
2001 .put = snd_ice1712_pro_rate_locking_put
2002 };
2003
2004 static int snd_ice1712_pro_rate_reset_info(struct snd_kcontrol *kcontrol,
2005 struct snd_ctl_elem_info *uinfo)
2006 {
2007 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
2008 uinfo->count = 1;
2009 uinfo->value.integer.min = 0;
2010 uinfo->value.integer.max = 1;
2011 return 0;
2012 }
2013
2014 static int snd_ice1712_pro_rate_reset_get(struct snd_kcontrol *kcontrol,
2015 struct snd_ctl_elem_value *ucontrol)
2016 {
2017 ucontrol->value.integer.value[0] = PRO_RATE_RESET;
2018 return 0;
2019 }
2020
2021 static int snd_ice1712_pro_rate_reset_put(struct snd_kcontrol *kcontrol,
2022 struct snd_ctl_elem_value *ucontrol)
2023 {
2024 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
2025 int change = 0, nval;
2026
2027 nval = ucontrol->value.integer.value[0] ? 1 : 0;
2028 spin_lock_irq(&ice->reg_lock);
2029 change = PRO_RATE_RESET != nval;
2030 PRO_RATE_RESET = nval;
2031 spin_unlock_irq(&ice->reg_lock);
2032 return change;
2033 }
2034
2035 static struct snd_kcontrol_new snd_ice1712_pro_rate_reset __devinitdata = {
2036 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2037 .name = "Multi Track Rate Reset",
2038 .info = snd_ice1712_pro_rate_reset_info,
2039 .get = snd_ice1712_pro_rate_reset_get,
2040 .put = snd_ice1712_pro_rate_reset_put
2041 };
2042
2043 /*
2044 * routing
2045 */
2046 static int snd_ice1712_pro_route_info(struct snd_kcontrol *kcontrol,
2047 struct snd_ctl_elem_info *uinfo)
2048 {
2049 static char *texts[] = {
2050 "PCM Out", /* 0 */
2051 "H/W In 0", "H/W In 1", "H/W In 2", "H/W In 3", /* 1-4 */
2052 "H/W In 4", "H/W In 5", "H/W In 6", "H/W In 7", /* 5-8 */
2053 "IEC958 In L", "IEC958 In R", /* 9-10 */
2054 "Digital Mixer", /* 11 - optional */
2055 };
2056
2057 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
2058 uinfo->count = 1;
2059 uinfo->value.enumerated.items =
2060 snd_ctl_get_ioffidx(kcontrol, &uinfo->id) < 2 ? 12 : 11;
2061 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
2062 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
2063 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
2064 return 0;
2065 }
2066
2067 static int snd_ice1712_pro_route_analog_get(struct snd_kcontrol *kcontrol,
2068 struct snd_ctl_elem_value *ucontrol)
2069 {
2070 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
2071 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
2072 unsigned int val, cval;
2073
2074 spin_lock_irq(&ice->reg_lock);
2075 val = inw(ICEMT(ice, ROUTE_PSDOUT03));
2076 cval = inl(ICEMT(ice, ROUTE_CAPTURE));
2077 spin_unlock_irq(&ice->reg_lock);
2078
2079 val >>= ((idx % 2) * 8) + ((idx / 2) * 2);
2080 val &= 3;
2081 cval >>= ((idx / 2) * 8) + ((idx % 2) * 4);
2082 if (val == 1 && idx < 2)
2083 ucontrol->value.enumerated.item[0] = 11;
2084 else if (val == 2)
2085 ucontrol->value.enumerated.item[0] = (cval & 7) + 1;
2086 else if (val == 3)
2087 ucontrol->value.enumerated.item[0] = ((cval >> 3) & 1) + 9;
2088 else
2089 ucontrol->value.enumerated.item[0] = 0;
2090 return 0;
2091 }
2092
2093 static int snd_ice1712_pro_route_analog_put(struct snd_kcontrol *kcontrol,
2094 struct snd_ctl_elem_value *ucontrol)
2095 {
2096 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
2097 int change, shift;
2098 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
2099 unsigned int val, old_val, nval;
2100
2101 /* update PSDOUT */
2102 if (ucontrol->value.enumerated.item[0] >= 11)
2103 nval = idx < 2 ? 1 : 0; /* dig mixer (or pcm) */
2104 else if (ucontrol->value.enumerated.item[0] >= 9)
2105 nval = 3; /* spdif in */
2106 else if (ucontrol->value.enumerated.item[0] >= 1)
2107 nval = 2; /* analog in */
2108 else
2109 nval = 0; /* pcm */
2110 shift = ((idx % 2) * 8) + ((idx / 2) * 2);
2111 spin_lock_irq(&ice->reg_lock);
2112 val = old_val = inw(ICEMT(ice, ROUTE_PSDOUT03));
2113 val &= ~(0x03 << shift);
2114 val |= nval << shift;
2115 change = val != old_val;
2116 if (change)
2117 outw(val, ICEMT(ice, ROUTE_PSDOUT03));
2118 spin_unlock_irq(&ice->reg_lock);
2119 if (nval < 2) /* dig mixer of pcm */
2120 return change;
2121
2122 /* update CAPTURE */
2123 spin_lock_irq(&ice->reg_lock);
2124 val = old_val = inl(ICEMT(ice, ROUTE_CAPTURE));
2125 shift = ((idx / 2) * 8) + ((idx % 2) * 4);
2126 if (nval == 2) { /* analog in */
2127 nval = ucontrol->value.enumerated.item[0] - 1;
2128 val &= ~(0x07 << shift);
2129 val |= nval << shift;
2130 } else { /* spdif in */
2131 nval = (ucontrol->value.enumerated.item[0] - 9) << 3;
2132 val &= ~(0x08 << shift);
2133 val |= nval << shift;
2134 }
2135 if (val != old_val) {
2136 change = 1;
2137 outl(val, ICEMT(ice, ROUTE_CAPTURE));
2138 }
2139 spin_unlock_irq(&ice->reg_lock);
2140 return change;
2141 }
2142
2143 static int snd_ice1712_pro_route_spdif_get(struct snd_kcontrol *kcontrol,
2144 struct snd_ctl_elem_value *ucontrol)
2145 {
2146 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
2147 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
2148 unsigned int val, cval;
2149 val = inw(ICEMT(ice, ROUTE_SPDOUT));
2150 cval = (val >> (idx * 4 + 8)) & 0x0f;
2151 val = (val >> (idx * 2)) & 0x03;
2152 if (val == 1)
2153 ucontrol->value.enumerated.item[0] = 11;
2154 else if (val == 2)
2155 ucontrol->value.enumerated.item[0] = (cval & 7) + 1;
2156 else if (val == 3)
2157 ucontrol->value.enumerated.item[0] = ((cval >> 3) & 1) + 9;
2158 else
2159 ucontrol->value.enumerated.item[0] = 0;
2160 return 0;
2161 }
2162
2163 static int snd_ice1712_pro_route_spdif_put(struct snd_kcontrol *kcontrol,
2164 struct snd_ctl_elem_value *ucontrol)
2165 {
2166 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
2167 int change, shift;
2168 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
2169 unsigned int val, old_val, nval;
2170
2171 /* update SPDOUT */
2172 spin_lock_irq(&ice->reg_lock);
2173 val = old_val = inw(ICEMT(ice, ROUTE_SPDOUT));
2174 if (ucontrol->value.enumerated.item[0] >= 11)
2175 nval = 1;
2176 else if (ucontrol->value.enumerated.item[0] >= 9)
2177 nval = 3;
2178 else if (ucontrol->value.enumerated.item[0] >= 1)
2179 nval = 2;
2180 else
2181 nval = 0;
2182 shift = idx * 2;
2183 val &= ~(0x03 << shift);
2184 val |= nval << shift;
2185 shift = idx * 4 + 8;
2186 if (nval == 2) {
2187 nval = ucontrol->value.enumerated.item[0] - 1;
2188 val &= ~(0x07 << shift);
2189 val |= nval << shift;
2190 } else if (nval == 3) {
2191 nval = (ucontrol->value.enumerated.item[0] - 9) << 3;
2192 val &= ~(0x08 << shift);
2193 val |= nval << shift;
2194 }
2195 change = val != old_val;
2196 if (change)
2197 outw(val, ICEMT(ice, ROUTE_SPDOUT));
2198 spin_unlock_irq(&ice->reg_lock);
2199 return change;
2200 }
2201
2202 static struct snd_kcontrol_new snd_ice1712_mixer_pro_analog_route __devinitdata = {
2203 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2204 .name = "H/W Playback Route",
2205 .info = snd_ice1712_pro_route_info,
2206 .get = snd_ice1712_pro_route_analog_get,
2207 .put = snd_ice1712_pro_route_analog_put,
2208 };
2209
2210 static struct snd_kcontrol_new snd_ice1712_mixer_pro_spdif_route __devinitdata = {
2211 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2212 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,NONE) "Route",
2213 .info = snd_ice1712_pro_route_info,
2214 .get = snd_ice1712_pro_route_spdif_get,
2215 .put = snd_ice1712_pro_route_spdif_put,
2216 .count = 2,
2217 };
2218
2219
2220 static int snd_ice1712_pro_volume_rate_info(struct snd_kcontrol *kcontrol,
2221 struct snd_ctl_elem_info *uinfo)
2222 {
2223 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
2224 uinfo->count = 1;
2225 uinfo->value.integer.min = 0;
2226 uinfo->value.integer.max = 255;
2227 return 0;
2228 }
2229
2230 static int snd_ice1712_pro_volume_rate_get(struct snd_kcontrol *kcontrol,
2231 struct snd_ctl_elem_value *ucontrol)
2232 {
2233 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
2234
2235 ucontrol->value.integer.value[0] = inb(ICEMT(ice, MONITOR_RATE));
2236 return 0;
2237 }
2238
2239 static int snd_ice1712_pro_volume_rate_put(struct snd_kcontrol *kcontrol,
2240 struct snd_ctl_elem_value *ucontrol)
2241 {
2242 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
2243 int change;
2244
2245 spin_lock_irq(&ice->reg_lock);
2246 change = inb(ICEMT(ice, MONITOR_RATE)) != ucontrol->value.integer.value[0];
2247 outb(ucontrol->value.integer.value[0], ICEMT(ice, MONITOR_RATE));
2248 spin_unlock_irq(&ice->reg_lock);
2249 return change;
2250 }
2251
2252 static struct snd_kcontrol_new snd_ice1712_mixer_pro_volume_rate __devinitdata = {
2253 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2254 .name = "Multi Track Volume Rate",
2255 .info = snd_ice1712_pro_volume_rate_info,
2256 .get = snd_ice1712_pro_volume_rate_get,
2257 .put = snd_ice1712_pro_volume_rate_put
2258 };
2259
2260 static int snd_ice1712_pro_peak_info(struct snd_kcontrol *kcontrol,
2261 struct snd_ctl_elem_info *uinfo)
2262 {
2263 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
2264 uinfo->count = 22;
2265 uinfo->value.integer.min = 0;
2266 uinfo->value.integer.max = 255;
2267 return 0;
2268 }
2269
2270 static int snd_ice1712_pro_peak_get(struct snd_kcontrol *kcontrol,
2271 struct snd_ctl_elem_value *ucontrol)
2272 {
2273 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
2274 int idx;
2275
2276 spin_lock_irq(&ice->reg_lock);
2277 for (idx = 0; idx < 22; idx++) {
2278 outb(idx, ICEMT(ice, MONITOR_PEAKINDEX));
2279 ucontrol->value.integer.value[idx] = inb(ICEMT(ice, MONITOR_PEAKDATA));
2280 }
2281 spin_unlock_irq(&ice->reg_lock);
2282 return 0;
2283 }
2284
2285 static struct snd_kcontrol_new snd_ice1712_mixer_pro_peak __devinitdata = {
2286 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2287 .name = "Multi Track Peak",
2288 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
2289 .info = snd_ice1712_pro_peak_info,
2290 .get = snd_ice1712_pro_peak_get
2291 };
2292
2293 /*
2294 *
2295 */
2296
2297 /*
2298 * list of available boards
2299 */
2300 static struct snd_ice1712_card_info *card_tables[] __devinitdata = {
2301 snd_ice1712_hoontech_cards,
2302 snd_ice1712_delta_cards,
2303 snd_ice1712_ews_cards,
2304 NULL,
2305 };
2306
2307 static unsigned char __devinit snd_ice1712_read_i2c(struct snd_ice1712 *ice,
2308 unsigned char dev,
2309 unsigned char addr)
2310 {
2311 long t = 0x10000;
2312
2313 outb(addr, ICEREG(ice, I2C_BYTE_ADDR));
2314 outb(dev & ~ICE1712_I2C_WRITE, ICEREG(ice, I2C_DEV_ADDR));
2315 while (t-- > 0 && (inb(ICEREG(ice, I2C_CTRL)) & ICE1712_I2C_BUSY)) ;
2316 return inb(ICEREG(ice, I2C_DATA));
2317 }
2318
2319 static int __devinit snd_ice1712_read_eeprom(struct snd_ice1712 *ice,
2320 const char *modelname)
2321 {
2322 int dev = 0xa0; /* EEPROM device address */
2323 unsigned int i, size;
2324 struct snd_ice1712_card_info **tbl, *c;
2325
2326 if (! modelname || ! *modelname) {
2327 ice->eeprom.subvendor = 0;
2328 if ((inb(ICEREG(ice, I2C_CTRL)) & ICE1712_I2C_EEPROM) != 0)
2329 ice->eeprom.subvendor = (snd_ice1712_read_i2c(ice, dev, 0x00) << 0) |
2330 (snd_ice1712_read_i2c(ice, dev, 0x01) << 8) |
2331 (snd_ice1712_read_i2c(ice, dev, 0x02) << 16) |
2332 (snd_ice1712_read_i2c(ice, dev, 0x03) << 24);
2333 if (ice->eeprom.subvendor == 0 ||
2334 ice->eeprom.subvendor == (unsigned int)-1) {
2335 /* invalid subvendor from EEPROM, try the PCI subststem ID instead */
2336 u16 vendor, device;
2337 pci_read_config_word(ice->pci, PCI_SUBSYSTEM_VENDOR_ID, &vendor);
2338 pci_read_config_word(ice->pci, PCI_SUBSYSTEM_ID, &device);
2339 ice->eeprom.subvendor = ((unsigned int)swab16(vendor) << 16) | swab16(device);
2340 if (ice->eeprom.subvendor == 0 || ice->eeprom.subvendor == (unsigned int)-1) {
2341 printk(KERN_ERR "ice1712: No valid ID is found\n");
2342 return -ENXIO;
2343 }
2344 }
2345 }
2346 for (tbl = card_tables; *tbl; tbl++) {
2347 for (c = *tbl; c->subvendor; c++) {
2348 if (modelname && c->model && ! strcmp(modelname, c->model)) {
2349 printk(KERN_INFO "ice1712: Using board model %s\n", c->name);
2350 ice->eeprom.subvendor = c->subvendor;
2351 } else if (c->subvendor != ice->eeprom.subvendor)
2352 continue;
2353 if (! c->eeprom_size || ! c->eeprom_data)
2354 goto found;
2355 /* if the EEPROM is given by the driver, use it */
2356 snd_printdd("using the defined eeprom..\n");
2357 ice->eeprom.version = 1;
2358 ice->eeprom.size = c->eeprom_size + 6;
2359 memcpy(ice->eeprom.data, c->eeprom_data, c->eeprom_size);
2360 goto read_skipped;
2361 }
2362 }
2363 printk(KERN_WARNING "ice1712: No matching model found for ID 0x%x\n",
2364 ice->eeprom.subvendor);
2365
2366 found:
2367 ice->eeprom.size = snd_ice1712_read_i2c(ice, dev, 0x04);
2368 if (ice->eeprom.size < 6)
2369 ice->eeprom.size = 32; /* FIXME: any cards without the correct size? */
2370 else if (ice->eeprom.size > 32) {
2371 snd_printk(KERN_ERR "invalid EEPROM (size = %i)\n", ice->eeprom.size);
2372 return -EIO;
2373 }
2374 ice->eeprom.version = snd_ice1712_read_i2c(ice, dev, 0x05);
2375 if (ice->eeprom.version != 1) {
2376 snd_printk(KERN_ERR "invalid EEPROM version %i\n",
2377 ice->eeprom.version);
2378 /* return -EIO; */
2379 }
2380 size = ice->eeprom.size - 6;
2381 for (i = 0; i < size; i++)
2382 ice->eeprom.data[i] = snd_ice1712_read_i2c(ice, dev, i + 6);
2383
2384 read_skipped:
2385 ice->eeprom.gpiomask = ice->eeprom.data[ICE_EEP1_GPIO_MASK];
2386 ice->eeprom.gpiostate = ice->eeprom.data[ICE_EEP1_GPIO_STATE];
2387 ice->eeprom.gpiodir = ice->eeprom.data[ICE_EEP1_GPIO_DIR];
2388
2389 return 0;
2390 }
2391
2392
2393
2394 static int __devinit snd_ice1712_chip_init(struct snd_ice1712 *ice)
2395 {
2396 outb(ICE1712_RESET | ICE1712_NATIVE, ICEREG(ice, CONTROL));
2397 udelay(200);
2398 outb(ICE1712_NATIVE, ICEREG(ice, CONTROL));
2399 udelay(200);
2400 if (ice->eeprom.subvendor == ICE1712_SUBDEVICE_DMX6FIRE &&
2401 !ice->dxr_enable)
2402 /* Set eeprom value to limit active ADCs and DACs to 6;
2403 * Also disable AC97 as no hardware in standard 6fire card/box
2404 * Note: DXR extensions are not currently supported
2405 */
2406 ice->eeprom.data[ICE_EEP1_CODEC] = 0x3a;
2407 pci_write_config_byte(ice->pci, 0x60, ice->eeprom.data[ICE_EEP1_CODEC]);
2408 pci_write_config_byte(ice->pci, 0x61, ice->eeprom.data[ICE_EEP1_ACLINK]);
2409 pci_write_config_byte(ice->pci, 0x62, ice->eeprom.data[ICE_EEP1_I2SID]);
2410 pci_write_config_byte(ice->pci, 0x63, ice->eeprom.data[ICE_EEP1_SPDIF]);
2411 if (ice->eeprom.subvendor != ICE1712_SUBDEVICE_STDSP24) {
2412 ice->gpio.write_mask = ice->eeprom.gpiomask;
2413 ice->gpio.direction = ice->eeprom.gpiodir;
2414 snd_ice1712_write(ice, ICE1712_IREG_GPIO_WRITE_MASK,
2415 ice->eeprom.gpiomask);
2416 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DIRECTION,
2417 ice->eeprom.gpiodir);
2418 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA,
2419 ice->eeprom.gpiostate);
2420 } else {
2421 ice->gpio.write_mask = 0xc0;
2422 ice->gpio.direction = 0xff;
2423 snd_ice1712_write(ice, ICE1712_IREG_GPIO_WRITE_MASK, 0xc0);
2424 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DIRECTION, 0xff);
2425 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA,
2426 ICE1712_STDSP24_CLOCK_BIT);
2427 }
2428 snd_ice1712_write(ice, ICE1712_IREG_PRO_POWERDOWN, 0);
2429 if (!(ice->eeprom.data[ICE_EEP1_CODEC] & ICE1712_CFG_NO_CON_AC97)) {
2430 outb(ICE1712_AC97_WARM, ICEREG(ice, AC97_CMD));
2431 udelay(100);
2432 outb(0, ICEREG(ice, AC97_CMD));
2433 udelay(200);
2434 snd_ice1712_write(ice, ICE1712_IREG_CONSUMER_POWERDOWN, 0);
2435 }
2436 snd_ice1712_set_pro_rate(ice, 48000, 1);
2437
2438 return 0;
2439 }
2440
2441 int __devinit snd_ice1712_spdif_build_controls(struct snd_ice1712 *ice)
2442 {
2443 int err;
2444 struct snd_kcontrol *kctl;
2445
2446 snd_assert(ice->pcm_pro != NULL, return -EIO);
2447 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_ice1712_spdif_default, ice));
2448 if (err < 0)
2449 return err;
2450 kctl->id.device = ice->pcm_pro->device;
2451 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_ice1712_spdif_maskc, ice));
2452 if (err < 0)
2453 return err;
2454 kctl->id.device = ice->pcm_pro->device;
2455 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_ice1712_spdif_maskp, ice));
2456 if (err < 0)
2457 return err;
2458 kctl->id.device = ice->pcm_pro->device;
2459 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_ice1712_spdif_stream, ice));
2460 if (err < 0)
2461 return err;
2462 kctl->id.device = ice->pcm_pro->device;
2463 ice->spdif.stream_ctl = kctl;
2464 return 0;
2465 }
2466
2467
2468 static int __devinit snd_ice1712_build_controls(struct snd_ice1712 *ice)
2469 {
2470 int err;
2471
2472 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_eeprom, ice));
2473 if (err < 0)
2474 return err;
2475 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_pro_internal_clock, ice));
2476 if (err < 0)
2477 return err;
2478 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_pro_internal_clock_default, ice));
2479 if (err < 0)
2480 return err;
2481
2482 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_pro_rate_locking, ice));
2483 if (err < 0)
2484 return err;
2485 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_pro_rate_reset, ice));
2486 if (err < 0)
2487 return err;
2488
2489 if (ice->num_total_dacs > 0) {
2490 struct snd_kcontrol_new tmp = snd_ice1712_mixer_pro_analog_route;
2491 tmp.count = ice->num_total_dacs;
2492 err = snd_ctl_add(ice->card, snd_ctl_new1(&tmp, ice));
2493 if (err < 0)
2494 return err;
2495 }
2496
2497 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_mixer_pro_spdif_route, ice));
2498 if (err < 0)
2499 return err;
2500
2501 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_mixer_pro_volume_rate, ice));
2502 if (err < 0)
2503 return err;
2504 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_mixer_pro_peak, ice));
2505 if (err < 0)
2506 return err;
2507
2508 return 0;
2509 }
2510
2511 static int snd_ice1712_free(struct snd_ice1712 *ice)
2512 {
2513 if (! ice->port)
2514 goto __hw_end;
2515 /* mask all interrupts */
2516 outb(0xc0, ICEMT(ice, IRQ));
2517 outb(0xff, ICEREG(ice, IRQMASK));
2518 /* --- */
2519 __hw_end:
2520 if (ice->irq >= 0) {
2521 synchronize_irq(ice->irq);
2522 free_irq(ice->irq, ice);
2523 }
2524 if (ice->port)
2525 pci_release_regions(ice->pci);
2526 snd_ice1712_akm4xxx_free(ice);
2527 pci_disable_device(ice->pci);
2528 kfree(ice);
2529 return 0;
2530 }
2531
2532 static int snd_ice1712_dev_free(struct snd_device *device)
2533 {
2534 struct snd_ice1712 *ice = device->device_data;
2535 return snd_ice1712_free(ice);
2536 }
2537
2538 static int __devinit snd_ice1712_create(struct snd_card *card,
2539 struct pci_dev *pci,
2540 const char *modelname,
2541 int omni,
2542 int cs8427_timeout,
2543 int dxr_enable,
2544 struct snd_ice1712 ** r_ice1712)
2545 {
2546 struct snd_ice1712 *ice;
2547 int err;
2548 static struct snd_device_ops ops = {
2549 .dev_free = snd_ice1712_dev_free,
2550 };
2551
2552 *r_ice1712 = NULL;
2553
2554 /* enable PCI device */
2555 if ((err = pci_enable_device(pci)) < 0)
2556 return err;
2557 /* check, if we can restrict PCI DMA transfers to 28 bits */
2558 if (pci_set_dma_mask(pci, DMA_28BIT_MASK) < 0 ||
2559 pci_set_consistent_dma_mask(pci, DMA_28BIT_MASK) < 0) {
2560 snd_printk(KERN_ERR "architecture does not support 28bit PCI busmaster DMA\n");
2561 pci_disable_device(pci);
2562 return -ENXIO;
2563 }
2564
2565 ice = kzalloc(sizeof(*ice), GFP_KERNEL);
2566 if (ice == NULL) {
2567 pci_disable_device(pci);
2568 return -ENOMEM;
2569 }
2570 ice->omni = omni ? 1 : 0;
2571 if (cs8427_timeout < 1)
2572 cs8427_timeout = 1;
2573 else if (cs8427_timeout > 1000)
2574 cs8427_timeout = 1000;
2575 ice->cs8427_timeout = cs8427_timeout;
2576 ice->dxr_enable = dxr_enable;
2577 spin_lock_init(&ice->reg_lock);
2578 mutex_init(&ice->gpio_mutex);
2579 mutex_init(&ice->i2c_mutex);
2580 mutex_init(&ice->open_mutex);
2581 ice->gpio.set_mask = snd_ice1712_set_gpio_mask;
2582 ice->gpio.set_dir = snd_ice1712_set_gpio_dir;
2583 ice->gpio.set_data = snd_ice1712_set_gpio_data;
2584 ice->gpio.get_data = snd_ice1712_get_gpio_data;
2585
2586 ice->spdif.cs8403_bits =
2587 ice->spdif.cs8403_stream_bits = (0x01 | /* consumer format */
2588 0x10 | /* no emphasis */
2589 0x20); /* PCM encoder/decoder */
2590 ice->card = card;
2591 ice->pci = pci;
2592 ice->irq = -1;
2593 pci_set_master(pci);
2594 pci_write_config_word(ice->pci, 0x40, 0x807f);
2595 pci_write_config_word(ice->pci, 0x42, 0x0006);
2596 snd_ice1712_proc_init(ice);
2597 synchronize_irq(pci->irq);
2598
2599 if ((err = pci_request_regions(pci, "ICE1712")) < 0) {
2600 kfree(ice);
2601 pci_disable_device(pci);
2602 return err;
2603 }
2604 ice->port = pci_resource_start(pci, 0);
2605 ice->ddma_port = pci_resource_start(pci, 1);
2606 ice->dmapath_port = pci_resource_start(pci, 2);
2607 ice->profi_port = pci_resource_start(pci, 3);
2608
2609 if (request_irq(pci->irq, snd_ice1712_interrupt, IRQF_DISABLED|IRQF_SHARED,
2610 "ICE1712", ice)) {
2611 snd_printk(KERN_ERR "unable to grab IRQ %d\n", pci->irq);
2612 snd_ice1712_free(ice);
2613 return -EIO;
2614 }
2615
2616 ice->irq = pci->irq;
2617
2618 if (snd_ice1712_read_eeprom(ice, modelname) < 0) {
2619 snd_ice1712_free(ice);
2620 return -EIO;
2621 }
2622 if (snd_ice1712_chip_init(ice) < 0) {
2623 snd_ice1712_free(ice);
2624 return -EIO;
2625 }
2626
2627 /* unmask used interrupts */
2628 outb(((ice->eeprom.data[ICE_EEP1_CODEC] & ICE1712_CFG_2xMPU401) == 0 ?
2629 ICE1712_IRQ_MPU2 : 0) |
2630 ((ice->eeprom.data[ICE_EEP1_CODEC] & ICE1712_CFG_NO_CON_AC97) ?
2631 ICE1712_IRQ_PBKDS | ICE1712_IRQ_CONCAP | ICE1712_IRQ_CONPBK : 0),
2632 ICEREG(ice, IRQMASK));
2633 outb(0x00, ICEMT(ice, IRQ));
2634
2635 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, ice, &ops)) < 0) {
2636 snd_ice1712_free(ice);
2637 return err;
2638 }
2639
2640 snd_card_set_dev(card, &pci->dev);
2641
2642 *r_ice1712 = ice;
2643 return 0;
2644 }
2645
2646
2647 /*
2648 *
2649 * Registration
2650 *
2651 */
2652
2653 static struct snd_ice1712_card_info no_matched __devinitdata;
2654
2655 static int __devinit snd_ice1712_probe(struct pci_dev *pci,
2656 const struct pci_device_id *pci_id)
2657 {
2658 static int dev;
2659 struct snd_card *card;
2660 struct snd_ice1712 *ice;
2661 int pcm_dev = 0, err;
2662 struct snd_ice1712_card_info **tbl, *c;
2663
2664 if (dev >= SNDRV_CARDS)
2665 return -ENODEV;
2666 if (!enable[dev]) {
2667 dev++;
2668 return -ENOENT;
2669 }
2670
2671 card = snd_card_new(index[dev], id[dev], THIS_MODULE, 0);
2672 if (card == NULL)
2673 return -ENOMEM;
2674
2675 strcpy(card->driver, "ICE1712");
2676 strcpy(card->shortname, "ICEnsemble ICE1712");
2677
2678 if ((err = snd_ice1712_create(card, pci, model[dev], omni[dev],
2679 cs8427_timeout[dev], dxr_enable[dev],
2680 &ice)) < 0) {
2681 snd_card_free(card);
2682 return err;
2683 }
2684
2685 for (tbl = card_tables; *tbl; tbl++) {
2686 for (c = *tbl; c->subvendor; c++) {
2687 if (c->subvendor == ice->eeprom.subvendor) {
2688 strcpy(card->shortname, c->name);
2689 if (c->driver) /* specific driver? */
2690 strcpy(card->driver, c->driver);
2691 if (c->chip_init) {
2692 if ((err = c->chip_init(ice)) < 0) {
2693 snd_card_free(card);
2694 return err;
2695 }
2696 }
2697 goto __found;
2698 }
2699 }
2700 }
2701 c = &no_matched;
2702 __found:
2703
2704 if ((err = snd_ice1712_pcm_profi(ice, pcm_dev++, NULL)) < 0) {
2705 snd_card_free(card);
2706 return err;
2707 }
2708
2709 if (ice_has_con_ac97(ice))
2710 if ((err = snd_ice1712_pcm(ice, pcm_dev++, NULL)) < 0) {
2711 snd_card_free(card);
2712 return err;
2713 }
2714
2715 if ((err = snd_ice1712_ac97_mixer(ice)) < 0) {
2716 snd_card_free(card);
2717 return err;
2718 }
2719
2720 if ((err = snd_ice1712_build_controls(ice)) < 0) {
2721 snd_card_free(card);
2722 return err;
2723 }
2724
2725 if (c->build_controls) {
2726 if ((err = c->build_controls(ice)) < 0) {
2727 snd_card_free(card);
2728 return err;
2729 }
2730 }
2731
2732 if (ice_has_con_ac97(ice))
2733 if ((err = snd_ice1712_pcm_ds(ice, pcm_dev++, NULL)) < 0) {
2734 snd_card_free(card);
2735 return err;
2736 }
2737
2738 if (! c->no_mpu401) {
2739 if ((err = snd_mpu401_uart_new(card, 0, MPU401_HW_ICE1712,
2740 ICEREG(ice, MPU1_CTRL),
2741 (c->mpu401_1_info_flags |
2742 MPU401_INFO_INTEGRATED),
2743 ice->irq, 0,
2744 &ice->rmidi[0])) < 0) {
2745 snd_card_free(card);
2746 return err;
2747 }
2748 if (c->mpu401_1_name)
2749 /* Prefered name available in card_info */
2750 snprintf(ice->rmidi[0]->name,
2751 sizeof(ice->rmidi[0]->name),
2752 "%s %d", c->mpu401_1_name, card->number);
2753
2754 if (ice->eeprom.data[ICE_EEP1_CODEC] & ICE1712_CFG_2xMPU401) {
2755 /* 2nd port used */
2756 if ((err = snd_mpu401_uart_new(card, 1, MPU401_HW_ICE1712,
2757 ICEREG(ice, MPU2_CTRL),
2758 (c->mpu401_2_info_flags |
2759 MPU401_INFO_INTEGRATED),
2760 ice->irq, 0,
2761 &ice->rmidi[1])) < 0) {
2762 snd_card_free(card);
2763 return err;
2764 }
2765 if (c->mpu401_2_name)
2766 /* Prefered name available in card_info */
2767 snprintf(ice->rmidi[1]->name,
2768 sizeof(ice->rmidi[1]->name),
2769 "%s %d", c->mpu401_2_name,
2770 card->number);
2771 }
2772 }
2773
2774 snd_ice1712_set_input_clock_source(ice, 0);
2775
2776 sprintf(card->longname, "%s at 0x%lx, irq %i",
2777 card->shortname, ice->port, ice->irq);
2778
2779 if ((err = snd_card_register(card)) < 0) {
2780 snd_card_free(card);
2781 return err;
2782 }
2783 pci_set_drvdata(pci, card);
2784 dev++;
2785 return 0;
2786 }
2787
2788 static void __devexit snd_ice1712_remove(struct pci_dev *pci)
2789 {
2790 snd_card_free(pci_get_drvdata(pci));
2791 pci_set_drvdata(pci, NULL);
2792 }
2793
2794 static struct pci_driver driver = {
2795 .name = "ICE1712",
2796 .id_table = snd_ice1712_ids,
2797 .probe = snd_ice1712_probe,
2798 .remove = __devexit_p(snd_ice1712_remove),
2799 };
2800
2801 static int __init alsa_card_ice1712_init(void)
2802 {
2803 return pci_register_driver(&driver);
2804 }
2805
2806 static void __exit alsa_card_ice1712_exit(void)
2807 {
2808 pci_unregister_driver(&driver);
2809 }
2810
2811 module_init(alsa_card_ice1712_init)
2812 module_exit(alsa_card_ice1712_exit)
Linux kernel - Deliverables
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