2 * arizona.c - Wolfson Arizona class device shared support
4 * Copyright 2012 Wolfson Microelectronics plc
6 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
13 #include <linux/gcd.h>
14 #include <linux/module.h>
15 #include <linux/pm_runtime.h>
16 #include <sound/pcm.h>
17 #include <sound/pcm_params.h>
18 #include <sound/tlv.h>
20 #include <linux/mfd/arizona/core.h>
21 #include <linux/mfd/arizona/registers.h>
25 #define ARIZONA_AIF_BCLK_CTRL 0x00
26 #define ARIZONA_AIF_TX_PIN_CTRL 0x01
27 #define ARIZONA_AIF_RX_PIN_CTRL 0x02
28 #define ARIZONA_AIF_RATE_CTRL 0x03
29 #define ARIZONA_AIF_FORMAT 0x04
30 #define ARIZONA_AIF_TX_BCLK_RATE 0x05
31 #define ARIZONA_AIF_RX_BCLK_RATE 0x06
32 #define ARIZONA_AIF_FRAME_CTRL_1 0x07
33 #define ARIZONA_AIF_FRAME_CTRL_2 0x08
34 #define ARIZONA_AIF_FRAME_CTRL_3 0x09
35 #define ARIZONA_AIF_FRAME_CTRL_4 0x0A
36 #define ARIZONA_AIF_FRAME_CTRL_5 0x0B
37 #define ARIZONA_AIF_FRAME_CTRL_6 0x0C
38 #define ARIZONA_AIF_FRAME_CTRL_7 0x0D
39 #define ARIZONA_AIF_FRAME_CTRL_8 0x0E
40 #define ARIZONA_AIF_FRAME_CTRL_9 0x0F
41 #define ARIZONA_AIF_FRAME_CTRL_10 0x10
42 #define ARIZONA_AIF_FRAME_CTRL_11 0x11
43 #define ARIZONA_AIF_FRAME_CTRL_12 0x12
44 #define ARIZONA_AIF_FRAME_CTRL_13 0x13
45 #define ARIZONA_AIF_FRAME_CTRL_14 0x14
46 #define ARIZONA_AIF_FRAME_CTRL_15 0x15
47 #define ARIZONA_AIF_FRAME_CTRL_16 0x16
48 #define ARIZONA_AIF_FRAME_CTRL_17 0x17
49 #define ARIZONA_AIF_FRAME_CTRL_18 0x18
50 #define ARIZONA_AIF_TX_ENABLES 0x19
51 #define ARIZONA_AIF_RX_ENABLES 0x1A
52 #define ARIZONA_AIF_FORCE_WRITE 0x1B
54 #define arizona_fll_err(_fll, fmt, ...) \
55 dev_err(_fll->arizona->dev, "FLL%d: " fmt, _fll->id, ##__VA_ARGS__)
56 #define arizona_fll_warn(_fll, fmt, ...) \
57 dev_warn(_fll->arizona->dev, "FLL%d: " fmt, _fll->id, ##__VA_ARGS__)
58 #define arizona_fll_dbg(_fll, fmt, ...) \
59 dev_err(_fll->arizona->dev, "FLL%d: " fmt, _fll->id, ##__VA_ARGS__)
61 #define arizona_aif_err(_dai, fmt, ...) \
62 dev_err(_dai->dev, "AIF%d: " fmt, _dai->id, ##__VA_ARGS__)
63 #define arizona_aif_warn(_dai, fmt, ...) \
64 dev_warn(_dai->dev, "AIF%d: " fmt, _dai->id, ##__VA_ARGS__)
65 #define arizona_aif_dbg(_dai, fmt, ...) \
66 dev_err(_dai->dev, "AIF%d: " fmt, _dai->id, ##__VA_ARGS__)
68 const char *arizona_mixer_texts
[ARIZONA_NUM_MIXER_INPUTS
] = {
145 EXPORT_SYMBOL_GPL(arizona_mixer_texts
);
147 int arizona_mixer_values
[ARIZONA_NUM_MIXER_INPUTS
] = {
153 0x0c, /* Noise mixer */
154 0x0d, /* Comfort noise */
224 EXPORT_SYMBOL_GPL(arizona_mixer_values
);
226 const DECLARE_TLV_DB_SCALE(arizona_mixer_tlv
, -3200, 100, 0);
227 EXPORT_SYMBOL_GPL(arizona_mixer_tlv
);
229 static const char *arizona_lhpf_mode_text
[] = {
230 "Low-pass", "High-pass"
233 const struct soc_enum arizona_lhpf1_mode
=
234 SOC_ENUM_SINGLE(ARIZONA_HPLPF1_1
, ARIZONA_LHPF1_MODE_SHIFT
, 2,
235 arizona_lhpf_mode_text
);
236 EXPORT_SYMBOL_GPL(arizona_lhpf1_mode
);
238 const struct soc_enum arizona_lhpf2_mode
=
239 SOC_ENUM_SINGLE(ARIZONA_HPLPF2_1
, ARIZONA_LHPF2_MODE_SHIFT
, 2,
240 arizona_lhpf_mode_text
);
241 EXPORT_SYMBOL_GPL(arizona_lhpf2_mode
);
243 const struct soc_enum arizona_lhpf3_mode
=
244 SOC_ENUM_SINGLE(ARIZONA_HPLPF3_1
, ARIZONA_LHPF3_MODE_SHIFT
, 2,
245 arizona_lhpf_mode_text
);
246 EXPORT_SYMBOL_GPL(arizona_lhpf3_mode
);
248 const struct soc_enum arizona_lhpf4_mode
=
249 SOC_ENUM_SINGLE(ARIZONA_HPLPF4_1
, ARIZONA_LHPF4_MODE_SHIFT
, 2,
250 arizona_lhpf_mode_text
);
251 EXPORT_SYMBOL_GPL(arizona_lhpf4_mode
);
253 int arizona_in_ev(struct snd_soc_dapm_widget
*w
, struct snd_kcontrol
*kcontrol
,
258 EXPORT_SYMBOL_GPL(arizona_in_ev
);
260 int arizona_out_ev(struct snd_soc_dapm_widget
*w
,
261 struct snd_kcontrol
*kcontrol
,
266 EXPORT_SYMBOL_GPL(arizona_out_ev
);
268 static unsigned int arizona_sysclk_48k_rates
[] = {
278 static unsigned int arizona_sysclk_44k1_rates
[] = {
288 static int arizona_set_opclk(struct snd_soc_codec
*codec
, unsigned int clk
,
291 struct arizona_priv
*priv
= snd_soc_codec_get_drvdata(codec
);
294 int ref
, div
, refclk
;
297 case ARIZONA_CLK_OPCLK
:
298 reg
= ARIZONA_OUTPUT_SYSTEM_CLOCK
;
299 refclk
= priv
->sysclk
;
301 case ARIZONA_CLK_ASYNC_OPCLK
:
302 reg
= ARIZONA_OUTPUT_ASYNC_CLOCK
;
303 refclk
= priv
->asyncclk
;
310 rates
= arizona_sysclk_44k1_rates
;
312 rates
= arizona_sysclk_48k_rates
;
314 for (ref
= 0; ref
< ARRAY_SIZE(arizona_sysclk_48k_rates
) &&
315 rates
[ref
] <= refclk
; ref
++) {
317 while (rates
[ref
] / div
>= freq
&& div
< 32) {
318 if (rates
[ref
] / div
== freq
) {
319 dev_dbg(codec
->dev
, "Configured %dHz OPCLK\n",
321 snd_soc_update_bits(codec
, reg
,
322 ARIZONA_OPCLK_DIV_MASK
|
323 ARIZONA_OPCLK_SEL_MASK
,
325 ARIZONA_OPCLK_DIV_SHIFT
) |
333 dev_err(codec
->dev
, "Unable to generate %dHz OPCLK\n", freq
);
337 int arizona_set_sysclk(struct snd_soc_codec
*codec
, int clk_id
,
338 int source
, unsigned int freq
, int dir
)
340 struct arizona_priv
*priv
= snd_soc_codec_get_drvdata(codec
);
341 struct arizona
*arizona
= priv
->arizona
;
344 unsigned int mask
= ARIZONA_SYSCLK_FREQ_MASK
| ARIZONA_SYSCLK_SRC_MASK
;
345 unsigned int val
= source
<< ARIZONA_SYSCLK_SRC_SHIFT
;
349 case ARIZONA_CLK_SYSCLK
:
351 reg
= ARIZONA_SYSTEM_CLOCK_1
;
353 mask
|= ARIZONA_SYSCLK_FRAC
;
355 case ARIZONA_CLK_ASYNCCLK
:
357 reg
= ARIZONA_ASYNC_CLOCK_1
;
358 clk
= &priv
->asyncclk
;
360 case ARIZONA_CLK_OPCLK
:
361 case ARIZONA_CLK_ASYNC_OPCLK
:
362 return arizona_set_opclk(codec
, clk_id
, freq
);
373 val
|= 1 << ARIZONA_SYSCLK_FREQ_SHIFT
;
377 val
|= 2 << ARIZONA_SYSCLK_FREQ_SHIFT
;
381 val
|= 3 << ARIZONA_SYSCLK_FREQ_SHIFT
;
385 val
|= 4 << ARIZONA_SYSCLK_FREQ_SHIFT
;
389 val
|= 5 << ARIZONA_SYSCLK_FREQ_SHIFT
;
393 val
|= 6 << ARIZONA_SYSCLK_FREQ_SHIFT
;
402 val
|= ARIZONA_SYSCLK_FRAC
;
404 dev_dbg(arizona
->dev
, "%s set to %uHz", name
, freq
);
406 return regmap_update_bits(arizona
->regmap
, reg
, mask
, val
);
408 EXPORT_SYMBOL_GPL(arizona_set_sysclk
);
410 static int arizona_set_fmt(struct snd_soc_dai
*dai
, unsigned int fmt
)
412 struct snd_soc_codec
*codec
= dai
->codec
;
413 int lrclk
, bclk
, mode
, base
;
415 base
= dai
->driver
->base
;
420 switch (fmt
& SND_SOC_DAIFMT_FORMAT_MASK
) {
421 case SND_SOC_DAIFMT_DSP_A
:
424 case SND_SOC_DAIFMT_DSP_B
:
427 case SND_SOC_DAIFMT_I2S
:
430 case SND_SOC_DAIFMT_LEFT_J
:
434 arizona_aif_err(dai
, "Unsupported DAI format %d\n",
435 fmt
& SND_SOC_DAIFMT_FORMAT_MASK
);
439 switch (fmt
& SND_SOC_DAIFMT_MASTER_MASK
) {
440 case SND_SOC_DAIFMT_CBS_CFS
:
442 case SND_SOC_DAIFMT_CBS_CFM
:
443 lrclk
|= ARIZONA_AIF1TX_LRCLK_MSTR
;
445 case SND_SOC_DAIFMT_CBM_CFS
:
446 bclk
|= ARIZONA_AIF1_BCLK_MSTR
;
448 case SND_SOC_DAIFMT_CBM_CFM
:
449 bclk
|= ARIZONA_AIF1_BCLK_MSTR
;
450 lrclk
|= ARIZONA_AIF1TX_LRCLK_MSTR
;
453 arizona_aif_err(dai
, "Unsupported master mode %d\n",
454 fmt
& SND_SOC_DAIFMT_MASTER_MASK
);
458 switch (fmt
& SND_SOC_DAIFMT_INV_MASK
) {
459 case SND_SOC_DAIFMT_NB_NF
:
461 case SND_SOC_DAIFMT_IB_IF
:
462 bclk
|= ARIZONA_AIF1_BCLK_INV
;
463 lrclk
|= ARIZONA_AIF1TX_LRCLK_INV
;
465 case SND_SOC_DAIFMT_IB_NF
:
466 bclk
|= ARIZONA_AIF1_BCLK_INV
;
468 case SND_SOC_DAIFMT_NB_IF
:
469 lrclk
|= ARIZONA_AIF1TX_LRCLK_INV
;
475 snd_soc_update_bits(codec
, base
+ ARIZONA_AIF_BCLK_CTRL
,
476 ARIZONA_AIF1_BCLK_INV
| ARIZONA_AIF1_BCLK_MSTR
,
478 snd_soc_update_bits(codec
, base
+ ARIZONA_AIF_TX_PIN_CTRL
,
479 ARIZONA_AIF1TX_LRCLK_INV
|
480 ARIZONA_AIF1TX_LRCLK_MSTR
, lrclk
);
481 snd_soc_update_bits(codec
, base
+ ARIZONA_AIF_RX_PIN_CTRL
,
482 ARIZONA_AIF1RX_LRCLK_INV
|
483 ARIZONA_AIF1RX_LRCLK_MSTR
, lrclk
);
484 snd_soc_update_bits(codec
, base
+ ARIZONA_AIF_FORMAT
,
485 ARIZONA_AIF1_FMT_MASK
, mode
);
490 static const int arizona_48k_bclk_rates
[] = {
512 static const unsigned int arizona_48k_rates
[] = {
530 static const struct snd_pcm_hw_constraint_list arizona_48k_constraint
= {
531 .count
= ARRAY_SIZE(arizona_48k_rates
),
532 .list
= arizona_48k_rates
,
535 static const int arizona_44k1_bclk_rates
[] = {
557 static const unsigned int arizona_44k1_rates
[] = {
567 static const struct snd_pcm_hw_constraint_list arizona_44k1_constraint
= {
568 .count
= ARRAY_SIZE(arizona_44k1_rates
),
569 .list
= arizona_44k1_rates
,
572 static int arizona_sr_vals
[] = {
599 static int arizona_startup(struct snd_pcm_substream
*substream
,
600 struct snd_soc_dai
*dai
)
602 struct snd_soc_codec
*codec
= dai
->codec
;
603 struct arizona_priv
*priv
= snd_soc_codec_get_drvdata(codec
);
604 struct arizona_dai_priv
*dai_priv
= &priv
->dai
[dai
->id
- 1];
605 const struct snd_pcm_hw_constraint_list
*constraint
;
606 unsigned int base_rate
;
608 switch (dai_priv
->clk
) {
609 case ARIZONA_CLK_SYSCLK
:
610 base_rate
= priv
->sysclk
;
612 case ARIZONA_CLK_ASYNCCLK
:
613 base_rate
= priv
->asyncclk
;
619 if (base_rate
% 8000)
620 constraint
= &arizona_44k1_constraint
;
622 constraint
= &arizona_48k_constraint
;
624 return snd_pcm_hw_constraint_list(substream
->runtime
, 0,
625 SNDRV_PCM_HW_PARAM_RATE
,
629 static int arizona_hw_params(struct snd_pcm_substream
*substream
,
630 struct snd_pcm_hw_params
*params
,
631 struct snd_soc_dai
*dai
)
633 struct snd_soc_codec
*codec
= dai
->codec
;
634 struct arizona_priv
*priv
= snd_soc_codec_get_drvdata(codec
);
635 struct arizona_dai_priv
*dai_priv
= &priv
->dai
[dai
->id
- 1];
636 int base
= dai
->driver
->base
;
639 int bclk
, lrclk
, wl
, frame
, sr_val
;
641 if (params_rate(params
) % 8000)
642 rates
= &arizona_44k1_bclk_rates
[0];
644 rates
= &arizona_48k_bclk_rates
[0];
646 for (i
= 0; i
< ARRAY_SIZE(arizona_44k1_bclk_rates
); i
++) {
647 if (rates
[i
] >= snd_soc_params_to_bclk(params
) &&
648 rates
[i
] % params_rate(params
) == 0) {
653 if (i
== ARRAY_SIZE(arizona_44k1_bclk_rates
)) {
654 arizona_aif_err(dai
, "Unsupported sample rate %dHz\n",
655 params_rate(params
));
659 for (i
= 0; i
< ARRAY_SIZE(arizona_sr_vals
); i
++)
660 if (arizona_sr_vals
[i
] == params_rate(params
))
662 if (i
== ARRAY_SIZE(arizona_sr_vals
)) {
663 arizona_aif_err(dai
, "Unsupported sample rate %dHz\n",
664 params_rate(params
));
669 lrclk
= snd_soc_params_to_bclk(params
) / params_rate(params
);
671 arizona_aif_dbg(dai
, "BCLK %dHz LRCLK %dHz\n",
672 rates
[bclk
], rates
[bclk
] / lrclk
);
674 wl
= snd_pcm_format_width(params_format(params
));
675 frame
= wl
<< ARIZONA_AIF1TX_WL_SHIFT
| wl
;
678 * We will need to be more flexible than this in future,
679 * currently we use a single sample rate for SYSCLK.
681 switch (dai_priv
->clk
) {
682 case ARIZONA_CLK_SYSCLK
:
683 snd_soc_update_bits(codec
, ARIZONA_SAMPLE_RATE_1
,
684 ARIZONA_SAMPLE_RATE_1_MASK
, sr_val
);
685 snd_soc_update_bits(codec
, base
+ ARIZONA_AIF_RATE_CTRL
,
686 ARIZONA_AIF1_RATE_MASK
, 0);
688 case ARIZONA_CLK_ASYNCCLK
:
689 snd_soc_update_bits(codec
, ARIZONA_ASYNC_SAMPLE_RATE_1
,
690 ARIZONA_ASYNC_SAMPLE_RATE_MASK
, sr_val
);
691 snd_soc_update_bits(codec
, base
+ ARIZONA_AIF_RATE_CTRL
,
692 ARIZONA_AIF1_RATE_MASK
, 8);
695 arizona_aif_err(dai
, "Invalid clock %d\n", dai_priv
->clk
);
699 snd_soc_update_bits(codec
, base
+ ARIZONA_AIF_BCLK_CTRL
,
700 ARIZONA_AIF1_BCLK_FREQ_MASK
, bclk
);
701 snd_soc_update_bits(codec
, base
+ ARIZONA_AIF_TX_BCLK_RATE
,
702 ARIZONA_AIF1TX_BCPF_MASK
, lrclk
);
703 snd_soc_update_bits(codec
, base
+ ARIZONA_AIF_RX_BCLK_RATE
,
704 ARIZONA_AIF1RX_BCPF_MASK
, lrclk
);
705 snd_soc_update_bits(codec
, base
+ ARIZONA_AIF_FRAME_CTRL_1
,
706 ARIZONA_AIF1TX_WL_MASK
|
707 ARIZONA_AIF1TX_SLOT_LEN_MASK
, frame
);
708 snd_soc_update_bits(codec
, base
+ ARIZONA_AIF_FRAME_CTRL_2
,
709 ARIZONA_AIF1RX_WL_MASK
|
710 ARIZONA_AIF1RX_SLOT_LEN_MASK
, frame
);
715 static const char *arizona_dai_clk_str(int clk_id
)
718 case ARIZONA_CLK_SYSCLK
:
720 case ARIZONA_CLK_ASYNCCLK
:
723 return "Unknown clock";
727 static int arizona_dai_set_sysclk(struct snd_soc_dai
*dai
,
728 int clk_id
, unsigned int freq
, int dir
)
730 struct snd_soc_codec
*codec
= dai
->codec
;
731 struct arizona_priv
*priv
= snd_soc_codec_get_drvdata(codec
);
732 struct arizona_dai_priv
*dai_priv
= &priv
->dai
[dai
->id
- 1];
733 struct snd_soc_dapm_route routes
[2];
736 case ARIZONA_CLK_SYSCLK
:
737 case ARIZONA_CLK_ASYNCCLK
:
743 if (clk_id
== dai_priv
->clk
)
747 dev_err(codec
->dev
, "Can't change clock on active DAI %d\n",
752 memset(&routes
, 0, sizeof(routes
));
753 routes
[0].sink
= dai
->driver
->capture
.stream_name
;
754 routes
[1].sink
= dai
->driver
->playback
.stream_name
;
756 routes
[0].source
= arizona_dai_clk_str(dai_priv
->clk
);
757 routes
[1].source
= arizona_dai_clk_str(dai_priv
->clk
);
758 snd_soc_dapm_del_routes(&codec
->dapm
, routes
, ARRAY_SIZE(routes
));
760 routes
[0].source
= arizona_dai_clk_str(clk_id
);
761 routes
[1].source
= arizona_dai_clk_str(clk_id
);
762 snd_soc_dapm_add_routes(&codec
->dapm
, routes
, ARRAY_SIZE(routes
));
764 return snd_soc_dapm_sync(&codec
->dapm
);
767 const struct snd_soc_dai_ops arizona_dai_ops
= {
768 .startup
= arizona_startup
,
769 .set_fmt
= arizona_set_fmt
,
770 .hw_params
= arizona_hw_params
,
771 .set_sysclk
= arizona_dai_set_sysclk
,
773 EXPORT_SYMBOL_GPL(arizona_dai_ops
);
775 int arizona_init_dai(struct arizona_priv
*priv
, int id
)
777 struct arizona_dai_priv
*dai_priv
= &priv
->dai
[id
];
779 dai_priv
->clk
= ARIZONA_CLK_SYSCLK
;
783 EXPORT_SYMBOL_GPL(arizona_init_dai
);
785 static irqreturn_t
arizona_fll_lock(int irq
, void *data
)
787 struct arizona_fll
*fll
= data
;
789 arizona_fll_dbg(fll
, "Lock status changed\n");
791 complete(&fll
->lock
);
796 static irqreturn_t
arizona_fll_clock_ok(int irq
, void *data
)
798 struct arizona_fll
*fll
= data
;
800 arizona_fll_dbg(fll
, "clock OK\n");
814 { 64000, 128000, 3, 8 },
815 { 128000, 256000, 2, 4 },
816 { 256000, 1000000, 1, 2 },
817 { 1000000, 13500000, 0, 1 },
820 struct arizona_fll_cfg
{
829 static int arizona_calc_fll(struct arizona_fll
*fll
,
830 struct arizona_fll_cfg
*cfg
,
834 unsigned int target
, div
, gcd_fll
;
837 arizona_fll_dbg(fll
, "Fref=%u Fout=%u\n", Fref
, Fout
);
839 /* Fref must be <=13.5MHz */
842 while ((Fref
/ div
) > 13500000) {
848 "Can't scale %dMHz in to <=13.5MHz\n",
854 /* Apply the division for our remaining calculations */
857 /* Fvco should be over the targt; don't check the upper bound */
859 while (Fout
* div
< 90000000 * fll
->vco_mult
) {
862 arizona_fll_err(fll
, "No FLL_OUTDIV for Fout=%uHz\n",
867 target
= Fout
* div
/ fll
->vco_mult
;
870 arizona_fll_dbg(fll
, "Fvco=%dHz\n", target
);
872 /* Find an appropraite FLL_FRATIO and factor it out of the target */
873 for (i
= 0; i
< ARRAY_SIZE(fll_fratios
); i
++) {
874 if (fll_fratios
[i
].min
<= Fref
&& Fref
<= fll_fratios
[i
].max
) {
875 cfg
->fratio
= fll_fratios
[i
].fratio
;
876 ratio
= fll_fratios
[i
].ratio
;
880 if (i
== ARRAY_SIZE(fll_fratios
)) {
881 arizona_fll_err(fll
, "Unable to find FRATIO for Fref=%uHz\n",
886 cfg
->n
= target
/ (ratio
* Fref
);
889 gcd_fll
= gcd(target
, ratio
* Fref
);
890 arizona_fll_dbg(fll
, "GCD=%u\n", gcd_fll
);
892 cfg
->theta
= (target
- (cfg
->n
* ratio
* Fref
))
894 cfg
->lambda
= (ratio
* Fref
) / gcd_fll
;
900 arizona_fll_dbg(fll
, "N=%x THETA=%x LAMBDA=%x\n",
901 cfg
->n
, cfg
->theta
, cfg
->lambda
);
902 arizona_fll_dbg(fll
, "FRATIO=%x(%d) OUTDIV=%x REFCLK_DIV=%x\n",
903 cfg
->fratio
, cfg
->fratio
, cfg
->outdiv
, cfg
->refdiv
);
909 static void arizona_apply_fll(struct arizona
*arizona
, unsigned int base
,
910 struct arizona_fll_cfg
*cfg
, int source
)
912 regmap_update_bits(arizona
->regmap
, base
+ 3,
913 ARIZONA_FLL1_THETA_MASK
, cfg
->theta
);
914 regmap_update_bits(arizona
->regmap
, base
+ 4,
915 ARIZONA_FLL1_LAMBDA_MASK
, cfg
->lambda
);
916 regmap_update_bits(arizona
->regmap
, base
+ 5,
917 ARIZONA_FLL1_FRATIO_MASK
,
918 cfg
->fratio
<< ARIZONA_FLL1_FRATIO_SHIFT
);
919 regmap_update_bits(arizona
->regmap
, base
+ 6,
920 ARIZONA_FLL1_CLK_REF_DIV_MASK
|
921 ARIZONA_FLL1_CLK_REF_SRC_MASK
,
922 cfg
->refdiv
<< ARIZONA_FLL1_CLK_REF_DIV_SHIFT
|
923 source
<< ARIZONA_FLL1_CLK_REF_SRC_SHIFT
);
925 regmap_update_bits(arizona
->regmap
, base
+ 2,
926 ARIZONA_FLL1_CTRL_UPD
| ARIZONA_FLL1_N_MASK
,
927 ARIZONA_FLL1_CTRL_UPD
| cfg
->n
);
930 int arizona_set_fll(struct arizona_fll
*fll
, int source
,
931 unsigned int Fref
, unsigned int Fout
)
933 struct arizona
*arizona
= fll
->arizona
;
934 struct arizona_fll_cfg cfg
, sync
;
935 unsigned int reg
, val
;
940 if (fll
->fref
== Fref
&& fll
->fout
== Fout
)
943 ret
= regmap_read(arizona
->regmap
, fll
->base
+ 1, ®
);
945 arizona_fll_err(fll
, "Failed to read current state: %d\n",
949 ena
= reg
& ARIZONA_FLL1_ENA
;
952 /* Do we have a 32kHz reference? */
953 regmap_read(arizona
->regmap
, ARIZONA_CLOCK_32K_1
, &val
);
954 switch (val
& ARIZONA_CLK_32K_SRC_MASK
) {
955 case ARIZONA_CLK_SRC_MCLK1
:
956 case ARIZONA_CLK_SRC_MCLK2
:
957 syncsrc
= val
& ARIZONA_CLK_32K_SRC_MASK
;
963 if (source
== syncsrc
)
967 ret
= arizona_calc_fll(fll
, &sync
, Fref
, Fout
);
971 ret
= arizona_calc_fll(fll
, &cfg
, 32768, Fout
);
975 ret
= arizona_calc_fll(fll
, &cfg
, Fref
, Fout
);
980 regmap_update_bits(arizona
->regmap
, fll
->base
+ 1,
981 ARIZONA_FLL1_ENA
, 0);
982 regmap_update_bits(arizona
->regmap
, fll
->base
+ 0x11,
983 ARIZONA_FLL1_SYNC_ENA
, 0);
986 pm_runtime_put_autosuspend(arizona
->dev
);
994 regmap_update_bits(arizona
->regmap
, fll
->base
+ 5,
995 ARIZONA_FLL1_OUTDIV_MASK
,
996 cfg
.outdiv
<< ARIZONA_FLL1_OUTDIV_SHIFT
);
999 arizona_apply_fll(arizona
, fll
->base
, &cfg
, syncsrc
);
1000 arizona_apply_fll(arizona
, fll
->base
+ 0x10, &sync
, source
);
1002 arizona_apply_fll(arizona
, fll
->base
, &cfg
, source
);
1006 pm_runtime_get(arizona
->dev
);
1008 /* Clear any pending completions */
1009 try_wait_for_completion(&fll
->ok
);
1011 regmap_update_bits(arizona
->regmap
, fll
->base
+ 1,
1012 ARIZONA_FLL1_ENA
, ARIZONA_FLL1_ENA
);
1014 regmap_update_bits(arizona
->regmap
, fll
->base
+ 0x11,
1015 ARIZONA_FLL1_SYNC_ENA
,
1016 ARIZONA_FLL1_SYNC_ENA
);
1018 ret
= wait_for_completion_timeout(&fll
->ok
,
1019 msecs_to_jiffies(25));
1021 arizona_fll_warn(fll
, "Timed out waiting for lock\n");
1028 EXPORT_SYMBOL_GPL(arizona_set_fll
);
1030 int arizona_init_fll(struct arizona
*arizona
, int id
, int base
, int lock_irq
,
1031 int ok_irq
, struct arizona_fll
*fll
)
1035 init_completion(&fll
->lock
);
1036 init_completion(&fll
->ok
);
1040 fll
->arizona
= arizona
;
1042 snprintf(fll
->lock_name
, sizeof(fll
->lock_name
), "FLL%d lock", id
);
1043 snprintf(fll
->clock_ok_name
, sizeof(fll
->clock_ok_name
),
1044 "FLL%d clock OK", id
);
1046 ret
= arizona_request_irq(arizona
, lock_irq
, fll
->lock_name
,
1047 arizona_fll_lock
, fll
);
1049 dev_err(arizona
->dev
, "Failed to get FLL%d lock IRQ: %d\n",
1053 ret
= arizona_request_irq(arizona
, ok_irq
, fll
->clock_ok_name
,
1054 arizona_fll_clock_ok
, fll
);
1056 dev_err(arizona
->dev
, "Failed to get FLL%d clock OK IRQ: %d\n",
1062 EXPORT_SYMBOL_GPL(arizona_init_fll
);
1064 MODULE_DESCRIPTION("ASoC Wolfson Arizona class device support");
1065 MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>");
1066 MODULE_LICENSE("GPL");