sound/soc/codecs/rt286.c

   1 /*
   2  * rt286.c  --  RT286 ALSA SoC audio codec driver
   3  *
   4  * Copyright 2013 Realtek Semiconductor Corp.
   5  * Author: Bard Liao <bardliao@realtek.com>
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License version 2 as
   9  * published by the Free Software Foundation.
  10  */
  11
  12 #include <linux/module.h>
  13 #include <linux/moduleparam.h>
  14 #include <linux/init.h>
  15 #include <linux/delay.h>
  16 #include <linux/pm.h>
  17 #include <linux/i2c.h>
  18 #include <linux/platform_device.h>
  19 #include <linux/spi/spi.h>
  20 #include <linux/dmi.h>
  21 #include <linux/acpi.h>
  22 #include <sound/core.h>
  23 #include <sound/pcm.h>
  24 #include <sound/pcm_params.h>
  25 #include <sound/soc.h>
  26 #include <sound/soc-dapm.h>
  27 #include <sound/initval.h>
  28 #include <sound/tlv.h>
  29 #include <sound/jack.h>
  30 #include <linux/workqueue.h>
  31 #include <sound/rt286.h>
  32 #include <sound/hda_verbs.h>
  33
  34 #include "rl6347a.h"
  35 #include "rt286.h"
  36
  37 #define RT286_VENDOR_ID 0x10ec0286
  38 #define RT288_VENDOR_ID 0x10ec0288
  39
  40 struct rt286_priv {
  41         struct reg_default *index_cache;
  42         int index_cache_size;
  43         struct regmap *regmap;
  44         struct snd_soc_codec *codec;
  45         struct rt286_platform_data pdata;
  46         struct i2c_client *i2c;
  47         struct snd_soc_jack *jack;
  48         struct delayed_work jack_detect_work;
  49         int sys_clk;
  50         int clk_id;
  51 };
  52
  53 static struct reg_default rt286_index_def[] = {
  54         { 0x01, 0xaaaa },
  55         { 0x02, 0x8aaa },
  56         { 0x03, 0x0002 },
  57         { 0x04, 0xaf01 },
  58         { 0x08, 0x000d },
  59         { 0x09, 0xd810 },
  60         { 0x0a, 0x0120 },
  61         { 0x0b, 0x0000 },
  62         { 0x0d, 0x2800 },
  63         { 0x0f, 0x0000 },
  64         { 0x19, 0x0a17 },
  65         { 0x20, 0x0020 },
  66         { 0x33, 0x0208 },
  67         { 0x49, 0x0004 },
  68         { 0x4f, 0x50e9 },
  69         { 0x50, 0x2000 },
  70         { 0x63, 0x2902 },
  71         { 0x67, 0x1111 },
  72         { 0x68, 0x1016 },
  73         { 0x69, 0x273f },
  74 };
  75 #define INDEX_CACHE_SIZE ARRAY_SIZE(rt286_index_def)
  76
  77 static const struct reg_default rt286_reg[] = {
  78         { 0x00170500, 0x00000400 },
  79         { 0x00220000, 0x00000031 },
  80         { 0x00239000, 0x0000007f },
  81         { 0x0023a000, 0x0000007f },
  82         { 0x00270500, 0x00000400 },
  83         { 0x00370500, 0x00000400 },
  84         { 0x00870500, 0x00000400 },
  85         { 0x00920000, 0x00000031 },
  86         { 0x00935000, 0x000000c3 },
  87         { 0x00936000, 0x000000c3 },
  88         { 0x00970500, 0x00000400 },
  89         { 0x00b37000, 0x00000097 },
  90         { 0x00b37200, 0x00000097 },
  91         { 0x00b37300, 0x00000097 },
  92         { 0x00c37000, 0x00000000 },
  93         { 0x00c37100, 0x00000080 },
  94         { 0x01270500, 0x00000400 },
  95         { 0x01370500, 0x00000400 },
  96         { 0x01371f00, 0x411111f0 },
  97         { 0x01439000, 0x00000080 },
  98         { 0x0143a000, 0x00000080 },
  99         { 0x01470700, 0x00000000 },
 100         { 0x01470500, 0x00000400 },
 101         { 0x01470c00, 0x00000000 },
 102         { 0x01470100, 0x00000000 },
 103         { 0x01837000, 0x00000000 },
 104         { 0x01870500, 0x00000400 },
 105         { 0x02050000, 0x00000000 },
 106         { 0x02139000, 0x00000080 },
 107         { 0x0213a000, 0x00000080 },
 108         { 0x02170100, 0x00000000 },
 109         { 0x02170500, 0x00000400 },
 110         { 0x02170700, 0x00000000 },
 111         { 0x02270100, 0x00000000 },
 112         { 0x02370100, 0x00000000 },
 113         { 0x01870700, 0x00000020 },
 114         { 0x00830000, 0x000000c3 },
 115         { 0x00930000, 0x000000c3 },
 116         { 0x01270700, 0x00000000 },
 117 };
 118
 119 static bool rt286_volatile_register(struct device *dev, unsigned int reg)
 120 {
 121         switch (reg) {
 122         case 0 ... 0xff:
 123         case RT286_GET_PARAM(AC_NODE_ROOT, AC_PAR_VENDOR_ID):
 124         case RT286_GET_HP_SENSE:
 125         case RT286_GET_MIC1_SENSE:
 126         case RT286_PROC_COEF:
 127                 return true;
 128         default:
 129                 return false;
 130         }
 131
 132
 133 }
 134
 135 static bool rt286_readable_register(struct device *dev, unsigned int reg)
 136 {
 137         switch (reg) {
 138         case 0 ... 0xff:
 139         case RT286_GET_PARAM(AC_NODE_ROOT, AC_PAR_VENDOR_ID):
 140         case RT286_GET_HP_SENSE:
 141         case RT286_GET_MIC1_SENSE:
 142         case RT286_SET_AUDIO_POWER:
 143         case RT286_SET_HPO_POWER:
 144         case RT286_SET_SPK_POWER:
 145         case RT286_SET_DMIC1_POWER:
 146         case RT286_SPK_MUX:
 147         case RT286_HPO_MUX:
 148         case RT286_ADC0_MUX:
 149         case RT286_ADC1_MUX:
 150         case RT286_SET_MIC1:
 151         case RT286_SET_PIN_HPO:
 152         case RT286_SET_PIN_SPK:
 153         case RT286_SET_PIN_DMIC1:
 154         case RT286_SPK_EAPD:
 155         case RT286_SET_AMP_GAIN_HPO:
 156         case RT286_SET_DMIC2_DEFAULT:
 157         case RT286_DACL_GAIN:
 158         case RT286_DACR_GAIN:
 159         case RT286_ADCL_GAIN:
 160         case RT286_ADCR_GAIN:
 161         case RT286_MIC_GAIN:
 162         case RT286_SPOL_GAIN:
 163         case RT286_SPOR_GAIN:
 164         case RT286_HPOL_GAIN:
 165         case RT286_HPOR_GAIN:
 166         case RT286_F_DAC_SWITCH:
 167         case RT286_F_RECMIX_SWITCH:
 168         case RT286_REC_MIC_SWITCH:
 169         case RT286_REC_I2S_SWITCH:
 170         case RT286_REC_LINE_SWITCH:
 171         case RT286_REC_BEEP_SWITCH:
 172         case RT286_DAC_FORMAT:
 173         case RT286_ADC_FORMAT:
 174         case RT286_COEF_INDEX:
 175         case RT286_PROC_COEF:
 176         case RT286_SET_AMP_GAIN_ADC_IN1:
 177         case RT286_SET_AMP_GAIN_ADC_IN2:
 178         case RT286_SET_POWER(RT286_DAC_OUT1):
 179         case RT286_SET_POWER(RT286_DAC_OUT2):
 180         case RT286_SET_POWER(RT286_ADC_IN1):
 181         case RT286_SET_POWER(RT286_ADC_IN2):
 182         case RT286_SET_POWER(RT286_DMIC2):
 183         case RT286_SET_POWER(RT286_MIC1):
 184                 return true;
 185         default:
 186                 return false;
 187         }
 188 }
 189
 190 #ifdef CONFIG_PM
 191 static void rt286_index_sync(struct snd_soc_codec *codec)
 192 {
 193         struct rt286_priv *rt286 = snd_soc_codec_get_drvdata(codec);
 194         int i;
 195
 196         for (i = 0; i < INDEX_CACHE_SIZE; i++) {
 197                 snd_soc_write(codec, rt286->index_cache[i].reg,
 198                                   rt286->index_cache[i].def);
 199         }
 200 }
 201 #endif
 202
 203 static int rt286_support_power_controls[] = {
 204         RT286_DAC_OUT1,
 205         RT286_DAC_OUT2,
 206         RT286_ADC_IN1,
 207         RT286_ADC_IN2,
 208         RT286_MIC1,
 209         RT286_DMIC1,
 210         RT286_DMIC2,
 211         RT286_SPK_OUT,
 212         RT286_HP_OUT,
 213 };
 214 #define RT286_POWER_REG_LEN ARRAY_SIZE(rt286_support_power_controls)
 215
 216 static int rt286_jack_detect(struct rt286_priv *rt286, bool *hp, bool *mic)
 217 {
 218         struct snd_soc_dapm_context *dapm;
 219         unsigned int val, buf;
 220
 221         *hp = false;
 222         *mic = false;
 223
 224         if (!rt286->codec)
 225                 return -EINVAL;
 226
 227         dapm = snd_soc_codec_get_dapm(rt286->codec);
 228
 229         if (rt286->pdata.cbj_en) {
 230                 regmap_read(rt286->regmap, RT286_GET_HP_SENSE, &buf);
 231                 *hp = buf & 0x80000000;
 232                 if (*hp) {
 233                         /* power on HV,VERF */
 234                         regmap_update_bits(rt286->regmap,
 235                                 RT286_DC_GAIN, 0x200, 0x200);
 236
 237                         snd_soc_dapm_force_enable_pin(dapm, "HV");
 238                         snd_soc_dapm_force_enable_pin(dapm, "VREF");
 239                         /* power LDO1 */
 240                         snd_soc_dapm_force_enable_pin(dapm, "LDO1");
 241                         snd_soc_dapm_sync(dapm);
 242
 243                         regmap_write(rt286->regmap, RT286_SET_MIC1, 0x24);
 244                         msleep(50);
 245
 246                         regmap_update_bits(rt286->regmap,
 247                                 RT286_CBJ_CTRL1, 0xfcc0, 0xd400);
 248                         msleep(300);
 249                         regmap_read(rt286->regmap, RT286_CBJ_CTRL2, &val);
 250
 251                         if (0x0070 == (val & 0x0070)) {
 252                                 *mic = true;
 253                         } else {
 254                                 regmap_update_bits(rt286->regmap,
 255                                         RT286_CBJ_CTRL1, 0xfcc0, 0xe400);
 256                                 msleep(300);
 257                                 regmap_read(rt286->regmap,
 258                                         RT286_CBJ_CTRL2, &val);
 259                                 if (0x0070 == (val & 0x0070))
 260                                         *mic = true;
 261                                 else
 262                                         *mic = false;
 263                         }
 264                         regmap_update_bits(rt286->regmap,
 265                                 RT286_DC_GAIN, 0x200, 0x0);
 266
 267                 } else {
 268                         *mic = false;
 269                         regmap_write(rt286->regmap, RT286_SET_MIC1, 0x20);
 270                 }
 271         } else {
 272                 regmap_read(rt286->regmap, RT286_GET_HP_SENSE, &buf);
 273                 *hp = buf & 0x80000000;
 274                 regmap_read(rt286->regmap, RT286_GET_MIC1_SENSE, &buf);
 275                 *mic = buf & 0x80000000;
 276         }
 277
 278         snd_soc_dapm_disable_pin(dapm, "HV");
 279         snd_soc_dapm_disable_pin(dapm, "VREF");
 280         if (!*hp)
 281                 snd_soc_dapm_disable_pin(dapm, "LDO1");
 282         snd_soc_dapm_sync(dapm);
 283
 284         return 0;
 285 }
 286
 287 static void rt286_jack_detect_work(struct work_struct *work)
 288 {
 289         struct rt286_priv *rt286 =
 290                 container_of(work, struct rt286_priv, jack_detect_work.work);
 291         int status = 0;
 292         bool hp = false;
 293         bool mic = false;
 294
 295         rt286_jack_detect(rt286, &hp, &mic);
 296
 297         if (hp == true)
 298                 status |= SND_JACK_HEADPHONE;
 299
 300         if (mic == true)
 301                 status |= SND_JACK_MICROPHONE;
 302
 303         snd_soc_jack_report(rt286->jack, status,
 304                 SND_JACK_MICROPHONE | SND_JACK_HEADPHONE);
 305 }
 306
 307 int rt286_mic_detect(struct snd_soc_codec *codec, struct snd_soc_jack *jack)
 308 {
 309         struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
 310         struct rt286_priv *rt286 = snd_soc_codec_get_drvdata(codec);
 311
 312         rt286->jack = jack;
 313
 314         if (jack) {
 315                 /* enable IRQ */
 316                 if (rt286->jack->status & SND_JACK_HEADPHONE)
 317                         snd_soc_dapm_force_enable_pin(dapm, "LDO1");
 318                 regmap_update_bits(rt286->regmap, RT286_IRQ_CTRL, 0x2, 0x2);
 319                 /* Send an initial empty report */
 320                 snd_soc_jack_report(rt286->jack, rt286->jack->status,
 321                         SND_JACK_MICROPHONE | SND_JACK_HEADPHONE);
 322         } else {
 323                 /* disable IRQ */
 324                 regmap_update_bits(rt286->regmap, RT286_IRQ_CTRL, 0x2, 0x0);
 325                 snd_soc_dapm_disable_pin(dapm, "LDO1");
 326         }
 327         snd_soc_dapm_sync(dapm);
 328
 329         return 0;
 330 }
 331 EXPORT_SYMBOL_GPL(rt286_mic_detect);
 332
 333 static int is_mclk_mode(struct snd_soc_dapm_widget *source,
 334                          struct snd_soc_dapm_widget *sink)
 335 {
 336         struct snd_soc_codec *codec = snd_soc_dapm_to_codec(source->dapm);
 337         struct rt286_priv *rt286 = snd_soc_codec_get_drvdata(codec);
 338
 339         if (rt286->clk_id == RT286_SCLK_S_MCLK)
 340                 return 1;
 341         else
 342                 return 0;
 343 }
 344
 345 static const DECLARE_TLV_DB_SCALE(out_vol_tlv, -6350, 50, 0);
 346 static const DECLARE_TLV_DB_SCALE(mic_vol_tlv, 0, 1000, 0);
 347
 348 static const struct snd_kcontrol_new rt286_snd_controls[] = {
 349         SOC_DOUBLE_R_TLV("DAC0 Playback Volume", RT286_DACL_GAIN,
 350                             RT286_DACR_GAIN, 0, 0x7f, 0, out_vol_tlv),
 351         SOC_DOUBLE_R("ADC0 Capture Switch", RT286_ADCL_GAIN,
 352                             RT286_ADCR_GAIN, 7, 1, 1),
 353         SOC_DOUBLE_R_TLV("ADC0 Capture Volume", RT286_ADCL_GAIN,
 354                             RT286_ADCR_GAIN, 0, 0x7f, 0, out_vol_tlv),
 355         SOC_SINGLE_TLV("AMIC Volume", RT286_MIC_GAIN,
 356                             0, 0x3, 0, mic_vol_tlv),
 357         SOC_DOUBLE_R("Speaker Playback Switch", RT286_SPOL_GAIN,
 358                             RT286_SPOR_GAIN, RT286_MUTE_SFT, 1, 1),
 359 };
 360
 361 /* Digital Mixer */
 362 static const struct snd_kcontrol_new rt286_front_mix[] = {
 363         SOC_DAPM_SINGLE("DAC Switch",  RT286_F_DAC_SWITCH,
 364                         RT286_MUTE_SFT, 1, 1),
 365         SOC_DAPM_SINGLE("RECMIX Switch", RT286_F_RECMIX_SWITCH,
 366                         RT286_MUTE_SFT, 1, 1),
 367 };
 368
 369 /* Analog Input Mixer */
 370 static const struct snd_kcontrol_new rt286_rec_mix[] = {
 371         SOC_DAPM_SINGLE("Mic1 Switch", RT286_REC_MIC_SWITCH,
 372                         RT286_MUTE_SFT, 1, 1),
 373         SOC_DAPM_SINGLE("I2S Switch", RT286_REC_I2S_SWITCH,
 374                         RT286_MUTE_SFT, 1, 1),
 375         SOC_DAPM_SINGLE("Line1 Switch", RT286_REC_LINE_SWITCH,
 376                         RT286_MUTE_SFT, 1, 1),
 377         SOC_DAPM_SINGLE("Beep Switch", RT286_REC_BEEP_SWITCH,
 378                         RT286_MUTE_SFT, 1, 1),
 379 };
 380
 381 static const struct snd_kcontrol_new spo_enable_control =
 382         SOC_DAPM_SINGLE("Switch", RT286_SET_PIN_SPK,
 383                         RT286_SET_PIN_SFT, 1, 0);
 384
 385 static const struct snd_kcontrol_new hpol_enable_control =
 386         SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT286_HPOL_GAIN,
 387                         RT286_MUTE_SFT, 1, 1);
 388
 389 static const struct snd_kcontrol_new hpor_enable_control =
 390         SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT286_HPOR_GAIN,
 391                         RT286_MUTE_SFT, 1, 1);
 392
 393 /* ADC0 source */
 394 static const char * const rt286_adc_src[] = {
 395         "Mic", "RECMIX", "Dmic"
 396 };
 397
 398 static const int rt286_adc_values[] = {
 399         0, 4, 5,
 400 };
 401
 402 static SOC_VALUE_ENUM_SINGLE_DECL(
 403         rt286_adc0_enum, RT286_ADC0_MUX, RT286_ADC_SEL_SFT,
 404         RT286_ADC_SEL_MASK, rt286_adc_src, rt286_adc_values);
 405
 406 static const struct snd_kcontrol_new rt286_adc0_mux =
 407         SOC_DAPM_ENUM("ADC 0 source", rt286_adc0_enum);
 408
 409 static SOC_VALUE_ENUM_SINGLE_DECL(
 410         rt286_adc1_enum, RT286_ADC1_MUX, RT286_ADC_SEL_SFT,
 411         RT286_ADC_SEL_MASK, rt286_adc_src, rt286_adc_values);
 412
 413 static const struct snd_kcontrol_new rt286_adc1_mux =
 414         SOC_DAPM_ENUM("ADC 1 source", rt286_adc1_enum);
 415
 416 static const char * const rt286_dac_src[] = {
 417         "Front", "Surround"
 418 };
 419 /* HP-OUT source */
 420 static SOC_ENUM_SINGLE_DECL(rt286_hpo_enum, RT286_HPO_MUX,
 421                                 0, rt286_dac_src);
 422
 423 static const struct snd_kcontrol_new rt286_hpo_mux =
 424 SOC_DAPM_ENUM("HPO source", rt286_hpo_enum);
 425
 426 /* SPK-OUT source */
 427 static SOC_ENUM_SINGLE_DECL(rt286_spo_enum, RT286_SPK_MUX,
 428                                 0, rt286_dac_src);
 429
 430 static const struct snd_kcontrol_new rt286_spo_mux =
 431 SOC_DAPM_ENUM("SPO source", rt286_spo_enum);
 432
 433 static int rt286_spk_event(struct snd_soc_dapm_widget *w,
 434                             struct snd_kcontrol *kcontrol, int event)
 435 {
 436         struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
 437
 438         switch (event) {
 439         case SND_SOC_DAPM_POST_PMU:
 440                 snd_soc_write(codec,
 441                         RT286_SPK_EAPD, RT286_SET_EAPD_HIGH);
 442                 break;
 443         case SND_SOC_DAPM_PRE_PMD:
 444                 snd_soc_write(codec,
 445                         RT286_SPK_EAPD, RT286_SET_EAPD_LOW);
 446                 break;
 447
 448         default:
 449                 return 0;
 450         }
 451
 452         return 0;
 453 }
 454
 455 static int rt286_set_dmic1_event(struct snd_soc_dapm_widget *w,
 456                                   struct snd_kcontrol *kcontrol, int event)
 457 {
 458         struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
 459
 460         switch (event) {
 461         case SND_SOC_DAPM_POST_PMU:
 462                 snd_soc_write(codec, RT286_SET_PIN_DMIC1, 0x20);
 463                 break;
 464         case SND_SOC_DAPM_PRE_PMD:
 465                 snd_soc_write(codec, RT286_SET_PIN_DMIC1, 0);
 466                 break;
 467         default:
 468                 return 0;
 469         }
 470
 471         return 0;
 472 }
 473
 474 static int rt286_vref_event(struct snd_soc_dapm_widget *w,
 475                              struct snd_kcontrol *kcontrol, int event)
 476 {
 477         struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
 478
 479         switch (event) {
 480         case SND_SOC_DAPM_PRE_PMU:
 481                 snd_soc_update_bits(codec,
 482                         RT286_CBJ_CTRL1, 0x0400, 0x0000);
 483                 mdelay(50);
 484                 break;
 485         default:
 486                 return 0;
 487         }
 488
 489         return 0;
 490 }
 491
 492 static int rt286_ldo2_event(struct snd_soc_dapm_widget *w,
 493                              struct snd_kcontrol *kcontrol, int event)
 494 {
 495         struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
 496
 497         switch (event) {
 498         case SND_SOC_DAPM_POST_PMU:
 499                 snd_soc_update_bits(codec, RT286_POWER_CTRL2, 0x38, 0x08);
 500                 break;
 501         case SND_SOC_DAPM_PRE_PMD:
 502                 snd_soc_update_bits(codec, RT286_POWER_CTRL2, 0x38, 0x30);
 503                 break;
 504         default:
 505                 return 0;
 506         }
 507
 508         return 0;
 509 }
 510
 511 static int rt286_mic1_event(struct snd_soc_dapm_widget *w,
 512                              struct snd_kcontrol *kcontrol, int event)
 513 {
 514         struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
 515
 516         switch (event) {
 517         case SND_SOC_DAPM_PRE_PMU:
 518                 snd_soc_update_bits(codec,
 519                         RT286_A_BIAS_CTRL3, 0xc000, 0x8000);
 520                 snd_soc_update_bits(codec,
 521                         RT286_A_BIAS_CTRL2, 0xc000, 0x8000);
 522                 break;
 523         case SND_SOC_DAPM_POST_PMD:
 524                 snd_soc_update_bits(codec,
 525                         RT286_A_BIAS_CTRL3, 0xc000, 0x0000);
 526                 snd_soc_update_bits(codec,
 527                         RT286_A_BIAS_CTRL2, 0xc000, 0x0000);
 528                 break;
 529         default:
 530                 return 0;
 531         }
 532
 533         return 0;
 534 }
 535
 536 static const struct snd_soc_dapm_widget rt286_dapm_widgets[] = {
 537         SND_SOC_DAPM_SUPPLY_S("HV", 1, RT286_POWER_CTRL1,
 538                 12, 1, NULL, 0),
 539         SND_SOC_DAPM_SUPPLY("VREF", RT286_POWER_CTRL1,
 540                 0, 1, rt286_vref_event, SND_SOC_DAPM_PRE_PMU),
 541         SND_SOC_DAPM_SUPPLY_S("LDO1", 1, RT286_POWER_CTRL2,
 542                 2, 0, NULL, 0),
 543         SND_SOC_DAPM_SUPPLY_S("LDO2", 2, RT286_POWER_CTRL1,
 544                 13, 1, rt286_ldo2_event, SND_SOC_DAPM_PRE_PMD |
 545                 SND_SOC_DAPM_POST_PMU),
 546         SND_SOC_DAPM_SUPPLY("MCLK MODE", RT286_PLL_CTRL1,
 547                 5, 0, NULL, 0),
 548         SND_SOC_DAPM_SUPPLY("MIC1 Input Buffer", SND_SOC_NOPM,
 549                 0, 0, rt286_mic1_event, SND_SOC_DAPM_PRE_PMU |
 550                 SND_SOC_DAPM_POST_PMD),
 551
 552         /* Input Lines */
 553         SND_SOC_DAPM_INPUT("DMIC1 Pin"),
 554         SND_SOC_DAPM_INPUT("DMIC2 Pin"),
 555         SND_SOC_DAPM_INPUT("MIC1"),
 556         SND_SOC_DAPM_INPUT("LINE1"),
 557         SND_SOC_DAPM_INPUT("Beep"),
 558
 559         /* DMIC */
 560         SND_SOC_DAPM_PGA_E("DMIC1", RT286_SET_POWER(RT286_DMIC1), 0, 1,
 561                 NULL, 0, rt286_set_dmic1_event,
 562                 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
 563         SND_SOC_DAPM_PGA("DMIC2", RT286_SET_POWER(RT286_DMIC2), 0, 1,
 564                 NULL, 0),
 565         SND_SOC_DAPM_SUPPLY("DMIC Receiver", SND_SOC_NOPM,
 566                 0, 0, NULL, 0),
 567
 568         /* REC Mixer */
 569         SND_SOC_DAPM_MIXER("RECMIX", SND_SOC_NOPM, 0, 0,
 570                 rt286_rec_mix, ARRAY_SIZE(rt286_rec_mix)),
 571
 572         /* ADCs */
 573         SND_SOC_DAPM_ADC("ADC 0", NULL, SND_SOC_NOPM, 0, 0),
 574         SND_SOC_DAPM_ADC("ADC 1", NULL, SND_SOC_NOPM, 0, 0),
 575
 576         /* ADC Mux */
 577         SND_SOC_DAPM_MUX("ADC 0 Mux", RT286_SET_POWER(RT286_ADC_IN1), 0, 1,
 578                 &rt286_adc0_mux),
 579         SND_SOC_DAPM_MUX("ADC 1 Mux", RT286_SET_POWER(RT286_ADC_IN2), 0, 1,
 580                 &rt286_adc1_mux),
 581
 582         /* Audio Interface */
 583         SND_SOC_DAPM_AIF_IN("AIF1RX", "AIF1 Playback", 0, SND_SOC_NOPM, 0, 0),
 584         SND_SOC_DAPM_AIF_OUT("AIF1TX", "AIF1 Capture", 0, SND_SOC_NOPM, 0, 0),
 585         SND_SOC_DAPM_AIF_IN("AIF2RX", "AIF2 Playback", 0, SND_SOC_NOPM, 0, 0),
 586         SND_SOC_DAPM_AIF_OUT("AIF2TX", "AIF2 Capture", 0, SND_SOC_NOPM, 0, 0),
 587
 588         /* Output Side */
 589         /* DACs */
 590         SND_SOC_DAPM_DAC("DAC 0", NULL, SND_SOC_NOPM, 0, 0),
 591         SND_SOC_DAPM_DAC("DAC 1", NULL, SND_SOC_NOPM, 0, 0),
 592
 593         /* Output Mux */
 594         SND_SOC_DAPM_MUX("SPK Mux", SND_SOC_NOPM, 0, 0, &rt286_spo_mux),
 595         SND_SOC_DAPM_MUX("HPO Mux", SND_SOC_NOPM, 0, 0, &rt286_hpo_mux),
 596
 597         SND_SOC_DAPM_SUPPLY("HP Power", RT286_SET_PIN_HPO,
 598                 RT286_SET_PIN_SFT, 0, NULL, 0),
 599
 600         /* Output Mixer */
 601         SND_SOC_DAPM_MIXER("Front", RT286_SET_POWER(RT286_DAC_OUT1), 0, 1,
 602                         rt286_front_mix, ARRAY_SIZE(rt286_front_mix)),
 603         SND_SOC_DAPM_PGA("Surround", RT286_SET_POWER(RT286_DAC_OUT2), 0, 1,
 604                         NULL, 0),
 605
 606         /* Output Pga */
 607         SND_SOC_DAPM_SWITCH_E("SPO", SND_SOC_NOPM, 0, 0,
 608                 &spo_enable_control, rt286_spk_event,
 609                 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
 610         SND_SOC_DAPM_SWITCH("HPO L", SND_SOC_NOPM, 0, 0,
 611                 &hpol_enable_control),
 612         SND_SOC_DAPM_SWITCH("HPO R", SND_SOC_NOPM, 0, 0,
 613                 &hpor_enable_control),
 614
 615         /* Output Lines */
 616         SND_SOC_DAPM_OUTPUT("SPOL"),
 617         SND_SOC_DAPM_OUTPUT("SPOR"),
 618         SND_SOC_DAPM_OUTPUT("HPO Pin"),
 619         SND_SOC_DAPM_OUTPUT("SPDIF"),
 620 };
 621
 622 static const struct snd_soc_dapm_route rt286_dapm_routes[] = {
 623         {"ADC 0", NULL, "MCLK MODE", is_mclk_mode},
 624         {"ADC 1", NULL, "MCLK MODE", is_mclk_mode},
 625         {"Front", NULL, "MCLK MODE", is_mclk_mode},
 626         {"Surround", NULL, "MCLK MODE", is_mclk_mode},
 627
 628         {"HP Power", NULL, "LDO1"},
 629         {"HP Power", NULL, "LDO2"},
 630
 631         {"MIC1", NULL, "LDO1"},
 632         {"MIC1", NULL, "LDO2"},
 633         {"MIC1", NULL, "HV"},
 634         {"MIC1", NULL, "VREF"},
 635         {"MIC1", NULL, "MIC1 Input Buffer"},
 636
 637         {"SPO", NULL, "LDO1"},
 638         {"SPO", NULL, "LDO2"},
 639         {"SPO", NULL, "HV"},
 640         {"SPO", NULL, "VREF"},
 641
 642         {"DMIC1", NULL, "DMIC1 Pin"},
 643         {"DMIC2", NULL, "DMIC2 Pin"},
 644         {"DMIC1", NULL, "DMIC Receiver"},
 645         {"DMIC2", NULL, "DMIC Receiver"},
 646
 647         {"RECMIX", "Beep Switch", "Beep"},
 648         {"RECMIX", "Line1 Switch", "LINE1"},
 649         {"RECMIX", "Mic1 Switch", "MIC1"},
 650
 651         {"ADC 0 Mux", "Dmic", "DMIC1"},
 652         {"ADC 0 Mux", "RECMIX", "RECMIX"},
 653         {"ADC 0 Mux", "Mic", "MIC1"},
 654         {"ADC 1 Mux", "Dmic", "DMIC2"},
 655         {"ADC 1 Mux", "RECMIX", "RECMIX"},
 656         {"ADC 1 Mux", "Mic", "MIC1"},
 657
 658         {"ADC 0", NULL, "ADC 0 Mux"},
 659         {"ADC 1", NULL, "ADC 1 Mux"},
 660
 661         {"AIF1TX", NULL, "ADC 0"},
 662         {"AIF2TX", NULL, "ADC 1"},
 663
 664         {"DAC 0", NULL, "AIF1RX"},
 665         {"DAC 1", NULL, "AIF2RX"},
 666
 667         {"Front", "DAC Switch", "DAC 0"},
 668         {"Front", "RECMIX Switch", "RECMIX"},
 669
 670         {"Surround", NULL, "DAC 1"},
 671
 672         {"SPK Mux", "Front", "Front"},
 673         {"SPK Mux", "Surround", "Surround"},
 674
 675         {"HPO Mux", "Front", "Front"},
 676         {"HPO Mux", "Surround", "Surround"},
 677
 678         {"SPO", "Switch", "SPK Mux"},
 679         {"HPO L", "Switch", "HPO Mux"},
 680         {"HPO R", "Switch", "HPO Mux"},
 681         {"HPO L", NULL, "HP Power"},
 682         {"HPO R", NULL, "HP Power"},
 683
 684         {"SPOL", NULL, "SPO"},
 685         {"SPOR", NULL, "SPO"},
 686         {"HPO Pin", NULL, "HPO L"},
 687         {"HPO Pin", NULL, "HPO R"},
 688 };
 689
 690 static int rt286_hw_params(struct snd_pcm_substream *substream,
 691                             struct snd_pcm_hw_params *params,
 692                             struct snd_soc_dai *dai)
 693 {
 694         struct snd_soc_codec *codec = dai->codec;
 695         struct rt286_priv *rt286 = snd_soc_codec_get_drvdata(codec);
 696         unsigned int val = 0;
 697         int d_len_code;
 698
 699         switch (params_rate(params)) {
 700         /* bit 14 0:48K 1:44.1K */
 701         case 44100:
 702                 val |= 0x4000;
 703                 break;
 704         case 48000:
 705                 break;
 706         default:
 707                 dev_err(codec->dev, "Unsupported sample rate %d\n",
 708                                         params_rate(params));
 709                 return -EINVAL;
 710         }
 711         switch (rt286->sys_clk) {
 712         case 12288000:
 713         case 24576000:
 714                 if (params_rate(params) != 48000) {
 715                         dev_err(codec->dev, "Sys_clk is not matched (%d %d)\n",
 716                                         params_rate(params), rt286->sys_clk);
 717                         return -EINVAL;
 718                 }
 719                 break;
 720         case 11289600:
 721         case 22579200:
 722                 if (params_rate(params) != 44100) {
 723                         dev_err(codec->dev, "Sys_clk is not matched (%d %d)\n",
 724                                         params_rate(params), rt286->sys_clk);
 725                         return -EINVAL;
 726                 }
 727                 break;
 728         }
 729
 730         if (params_channels(params) <= 16) {
 731                 /* bit 3:0 Number of Channel */
 732                 val |= (params_channels(params) - 1);
 733         } else {
 734                 dev_err(codec->dev, "Unsupported channels %d\n",
 735                                         params_channels(params));
 736                 return -EINVAL;
 737         }
 738
 739         d_len_code = 0;
 740         switch (params_width(params)) {
 741         /* bit 6:4 Bits per Sample */
 742         case 16:
 743                 d_len_code = 0;
 744                 val |= (0x1 << 4);
 745                 break;
 746         case 32:
 747                 d_len_code = 2;
 748                 val |= (0x4 << 4);
 749                 break;
 750         case 20:
 751                 d_len_code = 1;
 752                 val |= (0x2 << 4);
 753                 break;
 754         case 24:
 755                 d_len_code = 2;
 756                 val |= (0x3 << 4);
 757                 break;
 758         case 8:
 759                 d_len_code = 3;
 760                 break;
 761         default:
 762                 return -EINVAL;
 763         }
 764
 765         snd_soc_update_bits(codec,
 766                 RT286_I2S_CTRL1, 0x0018, d_len_code << 3);
 767         dev_dbg(codec->dev, "format val = 0x%x\n", val);
 768
 769         snd_soc_update_bits(codec, RT286_DAC_FORMAT, 0x407f, val);
 770         snd_soc_update_bits(codec, RT286_ADC_FORMAT, 0x407f, val);
 771
 772         return 0;
 773 }
 774
 775 static int rt286_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt)
 776 {
 777         struct snd_soc_codec *codec = dai->codec;
 778
 779         switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
 780         case SND_SOC_DAIFMT_CBM_CFM:
 781                 snd_soc_update_bits(codec,
 782                         RT286_I2S_CTRL1, 0x800, 0x800);
 783                 break;
 784         case SND_SOC_DAIFMT_CBS_CFS:
 785                 snd_soc_update_bits(codec,
 786                         RT286_I2S_CTRL1, 0x800, 0x0);
 787                 break;
 788         default:
 789                 return -EINVAL;
 790         }
 791
 792         switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
 793         case SND_SOC_DAIFMT_I2S:
 794                 snd_soc_update_bits(codec,
 795                         RT286_I2S_CTRL1, 0x300, 0x0);
 796                 break;
 797         case SND_SOC_DAIFMT_LEFT_J:
 798                 snd_soc_update_bits(codec,
 799                         RT286_I2S_CTRL1, 0x300, 0x1 << 8);
 800                 break;
 801         case SND_SOC_DAIFMT_DSP_A:
 802                 snd_soc_update_bits(codec,
 803                         RT286_I2S_CTRL1, 0x300, 0x2 << 8);
 804                 break;
 805         case SND_SOC_DAIFMT_DSP_B:
 806                 snd_soc_update_bits(codec,
 807                         RT286_I2S_CTRL1, 0x300, 0x3 << 8);
 808                 break;
 809         default:
 810                 return -EINVAL;
 811         }
 812         /* bit 15 Stream Type 0:PCM 1:Non-PCM */
 813         snd_soc_update_bits(codec, RT286_DAC_FORMAT, 0x8000, 0);
 814         snd_soc_update_bits(codec, RT286_ADC_FORMAT, 0x8000, 0);
 815
 816         return 0;
 817 }
 818
 819 static int rt286_set_dai_sysclk(struct snd_soc_dai *dai,
 820                                 int clk_id, unsigned int freq, int dir)
 821 {
 822         struct snd_soc_codec *codec = dai->codec;
 823         struct rt286_priv *rt286 = snd_soc_codec_get_drvdata(codec);
 824
 825         dev_dbg(codec->dev, "%s freq=%d\n", __func__, freq);
 826
 827         if (RT286_SCLK_S_MCLK == clk_id) {
 828                 snd_soc_update_bits(codec,
 829                         RT286_I2S_CTRL2, 0x0100, 0x0);
 830                 snd_soc_update_bits(codec,
 831                         RT286_PLL_CTRL1, 0x20, 0x20);
 832         } else {
 833                 snd_soc_update_bits(codec,
 834                         RT286_I2S_CTRL2, 0x0100, 0x0100);
 835                 snd_soc_update_bits(codec,
 836                         RT286_PLL_CTRL, 0x4, 0x4);
 837                 snd_soc_update_bits(codec,
 838                         RT286_PLL_CTRL1, 0x20, 0x0);
 839         }
 840
 841         switch (freq) {
 842         case 19200000:
 843                 if (RT286_SCLK_S_MCLK == clk_id) {
 844                         dev_err(codec->dev, "Should not use MCLK\n");
 845                         return -EINVAL;
 846                 }
 847                 snd_soc_update_bits(codec,
 848                         RT286_I2S_CTRL2, 0x40, 0x40);
 849                 break;
 850         case 24000000:
 851                 if (RT286_SCLK_S_MCLK == clk_id) {
 852                         dev_err(codec->dev, "Should not use MCLK\n");
 853                         return -EINVAL;
 854                 }
 855                 snd_soc_update_bits(codec,
 856                         RT286_I2S_CTRL2, 0x40, 0x0);
 857                 break;
 858         case 12288000:
 859         case 11289600:
 860                 snd_soc_update_bits(codec,
 861                         RT286_I2S_CTRL2, 0x8, 0x0);
 862                 snd_soc_update_bits(codec,
 863                         RT286_CLK_DIV, 0xfc1e, 0x0004);
 864                 break;
 865         case 24576000:
 866         case 22579200:
 867                 snd_soc_update_bits(codec,
 868                         RT286_I2S_CTRL2, 0x8, 0x8);
 869                 snd_soc_update_bits(codec,
 870                         RT286_CLK_DIV, 0xfc1e, 0x5406);
 871                 break;
 872         default:
 873                 dev_err(codec->dev, "Unsupported system clock\n");
 874                 return -EINVAL;
 875         }
 876
 877         rt286->sys_clk = freq;
 878         rt286->clk_id = clk_id;
 879
 880         return 0;
 881 }
 882
 883 static int rt286_set_bclk_ratio(struct snd_soc_dai *dai, unsigned int ratio)
 884 {
 885         struct snd_soc_codec *codec = dai->codec;
 886
 887         dev_dbg(codec->dev, "%s ratio=%d\n", __func__, ratio);
 888         if (50 == ratio)
 889                 snd_soc_update_bits(codec,
 890                         RT286_I2S_CTRL1, 0x1000, 0x1000);
 891         else
 892                 snd_soc_update_bits(codec,
 893                         RT286_I2S_CTRL1, 0x1000, 0x0);
 894
 895
 896         return 0;
 897 }
 898
 899 static int rt286_set_bias_level(struct snd_soc_codec *codec,
 900                                  enum snd_soc_bias_level level)
 901 {
 902         switch (level) {
 903         case SND_SOC_BIAS_PREPARE:
 904                 if (SND_SOC_BIAS_STANDBY == snd_soc_codec_get_bias_level(codec)) {
 905                         snd_soc_write(codec,
 906                                 RT286_SET_AUDIO_POWER, AC_PWRST_D0);
 907                         snd_soc_update_bits(codec,
 908                                 RT286_DC_GAIN, 0x200, 0x200);
 909                 }
 910                 break;
 911
 912         case SND_SOC_BIAS_ON:
 913                 mdelay(10);
 914                 snd_soc_update_bits(codec,
 915                         RT286_CBJ_CTRL1, 0x0400, 0x0400);
 916                 snd_soc_update_bits(codec,
 917                         RT286_DC_GAIN, 0x200, 0x0);
 918
 919                 break;
 920
 921         case SND_SOC_BIAS_STANDBY:
 922                 snd_soc_write(codec,
 923                         RT286_SET_AUDIO_POWER, AC_PWRST_D3);
 924                 snd_soc_update_bits(codec,
 925                         RT286_CBJ_CTRL1, 0x0400, 0x0000);
 926                 break;
 927
 928         default:
 929                 break;
 930         }
 931
 932         return 0;
 933 }
 934
 935 static irqreturn_t rt286_irq(int irq, void *data)
 936 {
 937         struct rt286_priv *rt286 = data;
 938         bool hp = false;
 939         bool mic = false;
 940         int status = 0;
 941
 942         rt286_jack_detect(rt286, &hp, &mic);
 943
 944         /* Clear IRQ */
 945         regmap_update_bits(rt286->regmap, RT286_IRQ_CTRL, 0x1, 0x1);
 946
 947         if (hp == true)
 948                 status |= SND_JACK_HEADPHONE;
 949
 950         if (mic == true)
 951                 status |= SND_JACK_MICROPHONE;
 952
 953         snd_soc_jack_report(rt286->jack, status,
 954                 SND_JACK_MICROPHONE | SND_JACK_HEADPHONE);
 955
 956         pm_wakeup_event(&rt286->i2c->dev, 300);
 957
 958         return IRQ_HANDLED;
 959 }
 960
 961 static int rt286_probe(struct snd_soc_codec *codec)
 962 {
 963         struct rt286_priv *rt286 = snd_soc_codec_get_drvdata(codec);
 964
 965         rt286->codec = codec;
 966
 967         if (rt286->i2c->irq) {
 968                 regmap_update_bits(rt286->regmap,
 969                                         RT286_IRQ_CTRL, 0x2, 0x2);
 970
 971                 INIT_DELAYED_WORK(&rt286->jack_detect_work,
 972                                         rt286_jack_detect_work);
 973                 schedule_delayed_work(&rt286->jack_detect_work,
 974                                         msecs_to_jiffies(1250));
 975         }
 976
 977         return 0;
 978 }
 979
 980 static int rt286_remove(struct snd_soc_codec *codec)
 981 {
 982         struct rt286_priv *rt286 = snd_soc_codec_get_drvdata(codec);
 983
 984         cancel_delayed_work_sync(&rt286->jack_detect_work);
 985
 986         return 0;
 987 }
 988
 989 #ifdef CONFIG_PM
 990 static int rt286_suspend(struct snd_soc_codec *codec)
 991 {
 992         struct rt286_priv *rt286 = snd_soc_codec_get_drvdata(codec);
 993
 994         regcache_cache_only(rt286->regmap, true);
 995         regcache_mark_dirty(rt286->regmap);
 996
 997         return 0;
 998 }
 999
1000 static int rt286_resume(struct snd_soc_codec *codec)
1001 {
1002         struct rt286_priv *rt286 = snd_soc_codec_get_drvdata(codec);
1003
1004         regcache_cache_only(rt286->regmap, false);
1005         rt286_index_sync(codec);
1006         regcache_sync(rt286->regmap);
1007
1008         return 0;
1009 }
1010 #else
1011 #define rt286_suspend NULL
1012 #define rt286_resume NULL
1013 #endif
1014
1015 #define RT286_STEREO_RATES (SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000)
1016 #define RT286_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
1017                         SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S8)
1018
1019 static const struct snd_soc_dai_ops rt286_aif_dai_ops = {
1020         .hw_params = rt286_hw_params,
1021         .set_fmt = rt286_set_dai_fmt,
1022         .set_sysclk = rt286_set_dai_sysclk,
1023         .set_bclk_ratio = rt286_set_bclk_ratio,
1024 };
1025
1026 static struct snd_soc_dai_driver rt286_dai[] = {
1027         {
1028                 .name = "rt286-aif1",
1029                 .id = RT286_AIF1,
1030                 .playback = {
1031                         .stream_name = "AIF1 Playback",
1032                         .channels_min = 1,
1033                         .channels_max = 2,
1034                         .rates = RT286_STEREO_RATES,
1035                         .formats = RT286_FORMATS,
1036                 },
1037                 .capture = {
1038                         .stream_name = "AIF1 Capture",
1039                         .channels_min = 1,
1040                         .channels_max = 2,
1041                         .rates = RT286_STEREO_RATES,
1042                         .formats = RT286_FORMATS,
1043                 },
1044                 .ops = &rt286_aif_dai_ops,
1045                 .symmetric_rates = 1,
1046         },
1047         {
1048                 .name = "rt286-aif2",
1049                 .id = RT286_AIF2,
1050                 .playback = {
1051                         .stream_name = "AIF2 Playback",
1052                         .channels_min = 1,
1053                         .channels_max = 2,
1054                         .rates = RT286_STEREO_RATES,
1055                         .formats = RT286_FORMATS,
1056                 },
1057                 .capture = {
1058                         .stream_name = "AIF2 Capture",
1059                         .channels_min = 1,
1060                         .channels_max = 2,
1061                         .rates = RT286_STEREO_RATES,
1062                         .formats = RT286_FORMATS,
1063                 },
1064                 .ops = &rt286_aif_dai_ops,
1065                 .symmetric_rates = 1,
1066         },
1067
1068 };
1069
1070 static struct snd_soc_codec_driver soc_codec_dev_rt286 = {
1071         .probe = rt286_probe,
1072         .remove = rt286_remove,
1073         .suspend = rt286_suspend,
1074         .resume = rt286_resume,
1075         .set_bias_level = rt286_set_bias_level,
1076         .idle_bias_off = true,
1077         .controls = rt286_snd_controls,
1078         .num_controls = ARRAY_SIZE(rt286_snd_controls),
1079         .dapm_widgets = rt286_dapm_widgets,
1080         .num_dapm_widgets = ARRAY_SIZE(rt286_dapm_widgets),
1081         .dapm_routes = rt286_dapm_routes,
1082         .num_dapm_routes = ARRAY_SIZE(rt286_dapm_routes),
1083 };
1084
1085 static const struct regmap_config rt286_regmap = {
1086         .reg_bits = 32,
1087         .val_bits = 32,
1088         .max_register = 0x02370100,
1089         .volatile_reg = rt286_volatile_register,
1090         .readable_reg = rt286_readable_register,
1091         .reg_write = rl6347a_hw_write,
1092         .reg_read = rl6347a_hw_read,
1093         .cache_type = REGCACHE_RBTREE,
1094         .reg_defaults = rt286_reg,
1095         .num_reg_defaults = ARRAY_SIZE(rt286_reg),
1096 };
1097
1098 static const struct i2c_device_id rt286_i2c_id[] = {
1099         {"rt286", 0},
1100         {"rt288", 0},
1101         {}
1102 };
1103 MODULE_DEVICE_TABLE(i2c, rt286_i2c_id);
1104
1105 static const struct acpi_device_id rt286_acpi_match[] = {
1106         { "INT343A", 0 },
1107         {},
1108 };
1109 MODULE_DEVICE_TABLE(acpi, rt286_acpi_match);
1110
1111 static struct dmi_system_id force_combo_jack_table[] = {
1112         {
1113                 .ident = "Intel Wilson Beach",
1114                 .matches = {
1115                         DMI_MATCH(DMI_BOARD_NAME, "Wilson Beach SDS")
1116                 }
1117         },
1118         { }
1119 };
1120
1121 static struct dmi_system_id dmi_dell_dino[] = {
1122         {
1123                 .ident = "Dell Dino",
1124                 .matches = {
1125                         DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
1126                         DMI_MATCH(DMI_PRODUCT_NAME, "XPS 13 9343")
1127                 }
1128         },
1129         { }
1130 };
1131
1132 static int rt286_i2c_probe(struct i2c_client *i2c,
1133                            const struct i2c_device_id *id)
1134 {
1135         struct rt286_platform_data *pdata = dev_get_platdata(&i2c->dev);
1136         struct rt286_priv *rt286;
1137         int i, ret, val;
1138
1139         rt286 = devm_kzalloc(&i2c->dev, sizeof(*rt286),
1140                                 GFP_KERNEL);
1141         if (NULL == rt286)
1142                 return -ENOMEM;
1143
1144         rt286->regmap = devm_regmap_init(&i2c->dev, NULL, i2c, &rt286_regmap);
1145         if (IS_ERR(rt286->regmap)) {
1146                 ret = PTR_ERR(rt286->regmap);
1147                 dev_err(&i2c->dev, "Failed to allocate register map: %d\n",
1148                         ret);
1149                 return ret;
1150         }
1151
1152         ret = regmap_read(rt286->regmap,
1153                 RT286_GET_PARAM(AC_NODE_ROOT, AC_PAR_VENDOR_ID), &val);
1154         if (ret != 0) {
1155                 dev_err(&i2c->dev, "I2C error %d\n", ret);
1156                 return ret;
1157         }
1158         if (val != RT286_VENDOR_ID && val != RT288_VENDOR_ID) {
1159                 dev_err(&i2c->dev,
1160                         "Device with ID register %x is not rt286\n", val);
1161                 return -ENODEV;
1162         }
1163
1164         rt286->index_cache = rt286_index_def;
1165         rt286->index_cache_size = INDEX_CACHE_SIZE;
1166         rt286->i2c = i2c;
1167         i2c_set_clientdata(i2c, rt286);
1168
1169         /* restore codec default */
1170         for (i = 0; i < INDEX_CACHE_SIZE; i++)
1171                 regmap_write(rt286->regmap, rt286->index_cache[i].reg,
1172                                 rt286->index_cache[i].def);
1173         for (i = 0; i < ARRAY_SIZE(rt286_reg); i++)
1174                 regmap_write(rt286->regmap, rt286_reg[i].reg,
1175                                 rt286_reg[i].def);
1176
1177         if (pdata)
1178                 rt286->pdata = *pdata;
1179
1180         if (dmi_check_system(force_combo_jack_table) ||
1181                 dmi_check_system(dmi_dell_dino))
1182                 rt286->pdata.cbj_en = true;
1183
1184         regmap_write(rt286->regmap, RT286_SET_AUDIO_POWER, AC_PWRST_D3);
1185
1186         for (i = 0; i < RT286_POWER_REG_LEN; i++)
1187                 regmap_write(rt286->regmap,
1188                         RT286_SET_POWER(rt286_support_power_controls[i]),
1189                         AC_PWRST_D1);
1190
1191         if (!rt286->pdata.cbj_en) {
1192                 regmap_write(rt286->regmap, RT286_CBJ_CTRL2, 0x0000);
1193                 regmap_write(rt286->regmap, RT286_MIC1_DET_CTRL, 0x0816);
1194                 regmap_update_bits(rt286->regmap,
1195                                         RT286_CBJ_CTRL1, 0xf000, 0xb000);
1196         } else {
1197                 regmap_update_bits(rt286->regmap,
1198                                         RT286_CBJ_CTRL1, 0xf000, 0x5000);
1199         }
1200
1201         mdelay(10);
1202
1203         if (!rt286->pdata.gpio2_en)
1204                 regmap_write(rt286->regmap, RT286_SET_DMIC2_DEFAULT, 0x4000);
1205         else
1206                 regmap_write(rt286->regmap, RT286_SET_DMIC2_DEFAULT, 0);
1207
1208         mdelay(10);
1209
1210         regmap_write(rt286->regmap, RT286_MISC_CTRL1, 0x0000);
1211         /* Power down LDO, VREF */
1212         regmap_update_bits(rt286->regmap, RT286_POWER_CTRL2, 0xc, 0x0);
1213         regmap_update_bits(rt286->regmap, RT286_POWER_CTRL1, 0x1001, 0x1001);
1214
1215         /* Set depop parameter */
1216         regmap_update_bits(rt286->regmap, RT286_DEPOP_CTRL2, 0x403a, 0x401a);
1217         regmap_update_bits(rt286->regmap, RT286_DEPOP_CTRL3, 0xf777, 0x4737);
1218         regmap_update_bits(rt286->regmap, RT286_DEPOP_CTRL4, 0x00ff, 0x003f);
1219
1220         if (dmi_check_system(dmi_dell_dino)) {
1221                 regmap_update_bits(rt286->regmap,
1222                         RT286_SET_GPIO_MASK, 0x40, 0x40);
1223                 regmap_update_bits(rt286->regmap,
1224                         RT286_SET_GPIO_DIRECTION, 0x40, 0x40);
1225                 regmap_update_bits(rt286->regmap,
1226                         RT286_SET_GPIO_DATA, 0x40, 0x40);
1227                 regmap_update_bits(rt286->regmap,
1228                         RT286_GPIO_CTRL, 0xc, 0x8);
1229         }
1230
1231         if (rt286->i2c->irq) {
1232                 ret = request_threaded_irq(rt286->i2c->irq, NULL, rt286_irq,
1233                         IRQF_TRIGGER_HIGH | IRQF_ONESHOT, "rt286", rt286);
1234                 if (ret != 0) {
1235                         dev_err(&i2c->dev,
1236                                 "Failed to reguest IRQ: %d\n", ret);
1237                         return ret;
1238                 }
1239         }
1240
1241         ret = snd_soc_register_codec(&i2c->dev, &soc_codec_dev_rt286,
1242                                      rt286_dai, ARRAY_SIZE(rt286_dai));
1243
1244         return ret;
1245 }
1246
1247 static int rt286_i2c_remove(struct i2c_client *i2c)
1248 {
1249         struct rt286_priv *rt286 = i2c_get_clientdata(i2c);
1250
1251         if (i2c->irq)
1252                 free_irq(i2c->irq, rt286);
1253         snd_soc_unregister_codec(&i2c->dev);
1254
1255         return 0;
1256 }
1257
1258
1259 static struct i2c_driver rt286_i2c_driver = {
1260         .driver = {
1261                    .name = "rt286",
1262                    .owner = THIS_MODULE,
1263                    .acpi_match_table = ACPI_PTR(rt286_acpi_match),
1264                    },
1265         .probe = rt286_i2c_probe,
1266         .remove = rt286_i2c_remove,
1267         .id_table = rt286_i2c_id,
1268 };
1269
1270 module_i2c_driver(rt286_i2c_driver);
1271
1272 MODULE_DESCRIPTION("ASoC RT286 driver");
1273 MODULE_AUTHOR("Bard Liao <bardliao@realtek.com>");
1274 MODULE_LICENSE("GPL");