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ASoC: rt5645: fix implicit declaration error
[deliverable/linux.git] / sound / soc / codecs / rt5645.c
1 /*
2 * rt5645.c -- RT5645 ALSA SoC audio codec driver
3 *
4 * Copyright 2013 Realtek Semiconductor Corp.
5 * Author: Bard Liao <bardliao@realtek.com>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11
12 #include <linux/module.h>
13 #include <linux/moduleparam.h>
14 #include <linux/init.h>
15 #include <linux/delay.h>
16 #include <linux/pm.h>
17 #include <linux/i2c.h>
18 #include <linux/platform_device.h>
19 #include <linux/spi/spi.h>
20 #include <linux/gpio.h>
21 #include <linux/gpio/consumer.h>
22 #include <linux/acpi.h>
23 #include <linux/dmi.h>
24 #include <sound/core.h>
25 #include <sound/pcm.h>
26 #include <sound/pcm_params.h>
27 #include <sound/jack.h>
28 #include <sound/soc.h>
29 #include <sound/soc-dapm.h>
30 #include <sound/initval.h>
31 #include <sound/tlv.h>
32
33 #include "rl6231.h"
34 #include "rt5645.h"
35
36 #define RT5645_DEVICE_ID 0x6308
37 #define RT5650_DEVICE_ID 0x6419
38
39 #define RT5645_PR_RANGE_BASE (0xff + 1)
40 #define RT5645_PR_SPACING 0x100
41
42 #define RT5645_PR_BASE (RT5645_PR_RANGE_BASE + (0 * RT5645_PR_SPACING))
43
44 static const struct regmap_range_cfg rt5645_ranges[] = {
45 {
46 .name = "PR",
47 .range_min = RT5645_PR_BASE,
48 .range_max = RT5645_PR_BASE + 0xf8,
49 .selector_reg = RT5645_PRIV_INDEX,
50 .selector_mask = 0xff,
51 .selector_shift = 0x0,
52 .window_start = RT5645_PRIV_DATA,
53 .window_len = 0x1,
54 },
55 };
56
57 static const struct reg_default init_list[] = {
58 {RT5645_PR_BASE + 0x3d, 0x3600},
59 {RT5645_PR_BASE + 0x1c, 0xfd20},
60 {RT5645_PR_BASE + 0x20, 0x611f},
61 {RT5645_PR_BASE + 0x21, 0x4040},
62 {RT5645_PR_BASE + 0x23, 0x0004},
63 };
64 #define RT5645_INIT_REG_LEN ARRAY_SIZE(init_list)
65
66 static const struct reg_default rt5650_init_list[] = {
67 {0xf6, 0x0100},
68 };
69
70 static const struct reg_default rt5645_reg[] = {
71 { 0x00, 0x0000 },
72 { 0x01, 0xc8c8 },
73 { 0x02, 0xc8c8 },
74 { 0x03, 0xc8c8 },
75 { 0x0a, 0x0002 },
76 { 0x0b, 0x2827 },
77 { 0x0c, 0xe000 },
78 { 0x0d, 0x0000 },
79 { 0x0e, 0x0000 },
80 { 0x0f, 0x0808 },
81 { 0x14, 0x3333 },
82 { 0x16, 0x4b00 },
83 { 0x18, 0x018b },
84 { 0x19, 0xafaf },
85 { 0x1a, 0xafaf },
86 { 0x1b, 0x0001 },
87 { 0x1c, 0x2f2f },
88 { 0x1d, 0x2f2f },
89 { 0x1e, 0x0000 },
90 { 0x20, 0x0000 },
91 { 0x27, 0x7060 },
92 { 0x28, 0x7070 },
93 { 0x29, 0x8080 },
94 { 0x2a, 0x5656 },
95 { 0x2b, 0x5454 },
96 { 0x2c, 0xaaa0 },
97 { 0x2d, 0x0000 },
98 { 0x2f, 0x1002 },
99 { 0x31, 0x5000 },
100 { 0x32, 0x0000 },
101 { 0x33, 0x0000 },
102 { 0x34, 0x0000 },
103 { 0x35, 0x0000 },
104 { 0x3b, 0x0000 },
105 { 0x3c, 0x007f },
106 { 0x3d, 0x0000 },
107 { 0x3e, 0x007f },
108 { 0x3f, 0x0000 },
109 { 0x40, 0x001f },
110 { 0x41, 0x0000 },
111 { 0x42, 0x001f },
112 { 0x45, 0x6000 },
113 { 0x46, 0x003e },
114 { 0x47, 0x003e },
115 { 0x48, 0xf807 },
116 { 0x4a, 0x0004 },
117 { 0x4d, 0x0000 },
118 { 0x4e, 0x0000 },
119 { 0x4f, 0x01ff },
120 { 0x50, 0x0000 },
121 { 0x51, 0x0000 },
122 { 0x52, 0x01ff },
123 { 0x53, 0xf000 },
124 { 0x56, 0x0111 },
125 { 0x57, 0x0064 },
126 { 0x58, 0xef0e },
127 { 0x59, 0xf0f0 },
128 { 0x5a, 0xef0e },
129 { 0x5b, 0xf0f0 },
130 { 0x5c, 0xef0e },
131 { 0x5d, 0xf0f0 },
132 { 0x5e, 0xf000 },
133 { 0x5f, 0x0000 },
134 { 0x61, 0x0300 },
135 { 0x62, 0x0000 },
136 { 0x63, 0x00c2 },
137 { 0x64, 0x0000 },
138 { 0x65, 0x0000 },
139 { 0x66, 0x0000 },
140 { 0x6a, 0x0000 },
141 { 0x6c, 0x0aaa },
142 { 0x70, 0x8000 },
143 { 0x71, 0x8000 },
144 { 0x72, 0x8000 },
145 { 0x73, 0x7770 },
146 { 0x74, 0x3e00 },
147 { 0x75, 0x2409 },
148 { 0x76, 0x000a },
149 { 0x77, 0x0c00 },
150 { 0x78, 0x0000 },
151 { 0x79, 0x0123 },
152 { 0x80, 0x0000 },
153 { 0x81, 0x0000 },
154 { 0x82, 0x0000 },
155 { 0x83, 0x0000 },
156 { 0x84, 0x0000 },
157 { 0x85, 0x0000 },
158 { 0x8a, 0x0000 },
159 { 0x8e, 0x0004 },
160 { 0x8f, 0x1100 },
161 { 0x90, 0x0646 },
162 { 0x91, 0x0c06 },
163 { 0x93, 0x0000 },
164 { 0x94, 0x0200 },
165 { 0x95, 0x0000 },
166 { 0x9a, 0x2184 },
167 { 0x9b, 0x010a },
168 { 0x9c, 0x0aea },
169 { 0x9d, 0x000c },
170 { 0x9e, 0x0400 },
171 { 0xa0, 0xa0a8 },
172 { 0xa1, 0x0059 },
173 { 0xa2, 0x0001 },
174 { 0xae, 0x6000 },
175 { 0xaf, 0x0000 },
176 { 0xb0, 0x6000 },
177 { 0xb1, 0x0000 },
178 { 0xb2, 0x0000 },
179 { 0xb3, 0x001f },
180 { 0xb4, 0x020c },
181 { 0xb5, 0x1f00 },
182 { 0xb6, 0x0000 },
183 { 0xbb, 0x0000 },
184 { 0xbc, 0x0000 },
185 { 0xbd, 0x0000 },
186 { 0xbe, 0x0000 },
187 { 0xbf, 0x3100 },
188 { 0xc0, 0x0000 },
189 { 0xc1, 0x0000 },
190 { 0xc2, 0x0000 },
191 { 0xc3, 0x2000 },
192 { 0xcd, 0x0000 },
193 { 0xce, 0x0000 },
194 { 0xcf, 0x1813 },
195 { 0xd0, 0x0690 },
196 { 0xd1, 0x1c17 },
197 { 0xd3, 0xb320 },
198 { 0xd4, 0x0000 },
199 { 0xd6, 0x0400 },
200 { 0xd9, 0x0809 },
201 { 0xda, 0x0000 },
202 { 0xdb, 0x0003 },
203 { 0xdc, 0x0049 },
204 { 0xdd, 0x001b },
205 { 0xdf, 0x0008 },
206 { 0xe0, 0x4000 },
207 { 0xe6, 0x8000 },
208 { 0xe7, 0x0200 },
209 { 0xec, 0xb300 },
210 { 0xed, 0x0000 },
211 { 0xf0, 0x001f },
212 { 0xf1, 0x020c },
213 { 0xf2, 0x1f00 },
214 { 0xf3, 0x0000 },
215 { 0xf4, 0x4000 },
216 { 0xf8, 0x0000 },
217 { 0xf9, 0x0000 },
218 { 0xfa, 0x2060 },
219 { 0xfb, 0x4040 },
220 { 0xfc, 0x0000 },
221 { 0xfd, 0x0002 },
222 { 0xfe, 0x10ec },
223 { 0xff, 0x6308 },
224 };
225
226 static int rt5645_reset(struct snd_soc_codec *codec)
227 {
228 return snd_soc_write(codec, RT5645_RESET, 0);
229 }
230
231 static bool rt5645_volatile_register(struct device *dev, unsigned int reg)
232 {
233 int i;
234
235 for (i = 0; i < ARRAY_SIZE(rt5645_ranges); i++) {
236 if (reg >= rt5645_ranges[i].range_min &&
237 reg <= rt5645_ranges[i].range_max) {
238 return true;
239 }
240 }
241
242 switch (reg) {
243 case RT5645_RESET:
244 case RT5645_PRIV_DATA:
245 case RT5645_IN1_CTRL1:
246 case RT5645_IN1_CTRL2:
247 case RT5645_IN1_CTRL3:
248 case RT5645_A_JD_CTRL1:
249 case RT5645_ADC_EQ_CTRL1:
250 case RT5645_EQ_CTRL1:
251 case RT5645_ALC_CTRL_1:
252 case RT5645_IRQ_CTRL2:
253 case RT5645_IRQ_CTRL3:
254 case RT5645_INT_IRQ_ST:
255 case RT5645_IL_CMD:
256 case RT5650_4BTN_IL_CMD1:
257 case RT5645_VENDOR_ID:
258 case RT5645_VENDOR_ID1:
259 case RT5645_VENDOR_ID2:
260 return true;
261 default:
262 return false;
263 }
264 }
265
266 static bool rt5645_readable_register(struct device *dev, unsigned int reg)
267 {
268 int i;
269
270 for (i = 0; i < ARRAY_SIZE(rt5645_ranges); i++) {
271 if (reg >= rt5645_ranges[i].range_min &&
272 reg <= rt5645_ranges[i].range_max) {
273 return true;
274 }
275 }
276
277 switch (reg) {
278 case RT5645_RESET:
279 case RT5645_SPK_VOL:
280 case RT5645_HP_VOL:
281 case RT5645_LOUT1:
282 case RT5645_IN1_CTRL1:
283 case RT5645_IN1_CTRL2:
284 case RT5645_IN1_CTRL3:
285 case RT5645_IN2_CTRL:
286 case RT5645_INL1_INR1_VOL:
287 case RT5645_SPK_FUNC_LIM:
288 case RT5645_ADJ_HPF_CTRL:
289 case RT5645_DAC1_DIG_VOL:
290 case RT5645_DAC2_DIG_VOL:
291 case RT5645_DAC_CTRL:
292 case RT5645_STO1_ADC_DIG_VOL:
293 case RT5645_MONO_ADC_DIG_VOL:
294 case RT5645_ADC_BST_VOL1:
295 case RT5645_ADC_BST_VOL2:
296 case RT5645_STO1_ADC_MIXER:
297 case RT5645_MONO_ADC_MIXER:
298 case RT5645_AD_DA_MIXER:
299 case RT5645_STO_DAC_MIXER:
300 case RT5645_MONO_DAC_MIXER:
301 case RT5645_DIG_MIXER:
302 case RT5650_A_DAC_SOUR:
303 case RT5645_DIG_INF1_DATA:
304 case RT5645_PDM_OUT_CTRL:
305 case RT5645_REC_L1_MIXER:
306 case RT5645_REC_L2_MIXER:
307 case RT5645_REC_R1_MIXER:
308 case RT5645_REC_R2_MIXER:
309 case RT5645_HPMIXL_CTRL:
310 case RT5645_HPOMIXL_CTRL:
311 case RT5645_HPMIXR_CTRL:
312 case RT5645_HPOMIXR_CTRL:
313 case RT5645_HPO_MIXER:
314 case RT5645_SPK_L_MIXER:
315 case RT5645_SPK_R_MIXER:
316 case RT5645_SPO_MIXER:
317 case RT5645_SPO_CLSD_RATIO:
318 case RT5645_OUT_L1_MIXER:
319 case RT5645_OUT_R1_MIXER:
320 case RT5645_OUT_L_GAIN1:
321 case RT5645_OUT_L_GAIN2:
322 case RT5645_OUT_R_GAIN1:
323 case RT5645_OUT_R_GAIN2:
324 case RT5645_LOUT_MIXER:
325 case RT5645_HAPTIC_CTRL1:
326 case RT5645_HAPTIC_CTRL2:
327 case RT5645_HAPTIC_CTRL3:
328 case RT5645_HAPTIC_CTRL4:
329 case RT5645_HAPTIC_CTRL5:
330 case RT5645_HAPTIC_CTRL6:
331 case RT5645_HAPTIC_CTRL7:
332 case RT5645_HAPTIC_CTRL8:
333 case RT5645_HAPTIC_CTRL9:
334 case RT5645_HAPTIC_CTRL10:
335 case RT5645_PWR_DIG1:
336 case RT5645_PWR_DIG2:
337 case RT5645_PWR_ANLG1:
338 case RT5645_PWR_ANLG2:
339 case RT5645_PWR_MIXER:
340 case RT5645_PWR_VOL:
341 case RT5645_PRIV_INDEX:
342 case RT5645_PRIV_DATA:
343 case RT5645_I2S1_SDP:
344 case RT5645_I2S2_SDP:
345 case RT5645_ADDA_CLK1:
346 case RT5645_ADDA_CLK2:
347 case RT5645_DMIC_CTRL1:
348 case RT5645_DMIC_CTRL2:
349 case RT5645_TDM_CTRL_1:
350 case RT5645_TDM_CTRL_2:
351 case RT5645_TDM_CTRL_3:
352 case RT5645_GLB_CLK:
353 case RT5645_PLL_CTRL1:
354 case RT5645_PLL_CTRL2:
355 case RT5645_ASRC_1:
356 case RT5645_ASRC_2:
357 case RT5645_ASRC_3:
358 case RT5645_ASRC_4:
359 case RT5645_DEPOP_M1:
360 case RT5645_DEPOP_M2:
361 case RT5645_DEPOP_M3:
362 case RT5645_MICBIAS:
363 case RT5645_A_JD_CTRL1:
364 case RT5645_VAD_CTRL4:
365 case RT5645_CLSD_OUT_CTRL:
366 case RT5645_ADC_EQ_CTRL1:
367 case RT5645_ADC_EQ_CTRL2:
368 case RT5645_EQ_CTRL1:
369 case RT5645_EQ_CTRL2:
370 case RT5645_ALC_CTRL_1:
371 case RT5645_ALC_CTRL_2:
372 case RT5645_ALC_CTRL_3:
373 case RT5645_ALC_CTRL_4:
374 case RT5645_ALC_CTRL_5:
375 case RT5645_JD_CTRL:
376 case RT5645_IRQ_CTRL1:
377 case RT5645_IRQ_CTRL2:
378 case RT5645_IRQ_CTRL3:
379 case RT5645_INT_IRQ_ST:
380 case RT5645_GPIO_CTRL1:
381 case RT5645_GPIO_CTRL2:
382 case RT5645_GPIO_CTRL3:
383 case RT5645_BASS_BACK:
384 case RT5645_MP3_PLUS1:
385 case RT5645_MP3_PLUS2:
386 case RT5645_ADJ_HPF1:
387 case RT5645_ADJ_HPF2:
388 case RT5645_HP_CALIB_AMP_DET:
389 case RT5645_SV_ZCD1:
390 case RT5645_SV_ZCD2:
391 case RT5645_IL_CMD:
392 case RT5645_IL_CMD2:
393 case RT5645_IL_CMD3:
394 case RT5650_4BTN_IL_CMD1:
395 case RT5650_4BTN_IL_CMD2:
396 case RT5645_DRC1_HL_CTRL1:
397 case RT5645_DRC2_HL_CTRL1:
398 case RT5645_ADC_MONO_HP_CTRL1:
399 case RT5645_ADC_MONO_HP_CTRL2:
400 case RT5645_DRC2_CTRL1:
401 case RT5645_DRC2_CTRL2:
402 case RT5645_DRC2_CTRL3:
403 case RT5645_DRC2_CTRL4:
404 case RT5645_DRC2_CTRL5:
405 case RT5645_JD_CTRL3:
406 case RT5645_JD_CTRL4:
407 case RT5645_GEN_CTRL1:
408 case RT5645_GEN_CTRL2:
409 case RT5645_GEN_CTRL3:
410 case RT5645_VENDOR_ID:
411 case RT5645_VENDOR_ID1:
412 case RT5645_VENDOR_ID2:
413 return true;
414 default:
415 return false;
416 }
417 }
418
419 static const DECLARE_TLV_DB_SCALE(out_vol_tlv, -4650, 150, 0);
420 static const DECLARE_TLV_DB_SCALE(dac_vol_tlv, -65625, 375, 0);
421 static const DECLARE_TLV_DB_SCALE(in_vol_tlv, -3450, 150, 0);
422 static const DECLARE_TLV_DB_SCALE(adc_vol_tlv, -17625, 375, 0);
423 static const DECLARE_TLV_DB_SCALE(adc_bst_tlv, 0, 1200, 0);
424
425 /* {0, +20, +24, +30, +35, +40, +44, +50, +52} dB */
426 static unsigned int bst_tlv[] = {
427 TLV_DB_RANGE_HEAD(7),
428 0, 0, TLV_DB_SCALE_ITEM(0, 0, 0),
429 1, 1, TLV_DB_SCALE_ITEM(2000, 0, 0),
430 2, 2, TLV_DB_SCALE_ITEM(2400, 0, 0),
431 3, 5, TLV_DB_SCALE_ITEM(3000, 500, 0),
432 6, 6, TLV_DB_SCALE_ITEM(4400, 0, 0),
433 7, 7, TLV_DB_SCALE_ITEM(5000, 0, 0),
434 8, 8, TLV_DB_SCALE_ITEM(5200, 0, 0),
435 };
436
437 static const char * const rt5645_tdm_data_swap_select[] = {
438 "L/R", "R/L", "L/L", "R/R"
439 };
440
441 static SOC_ENUM_SINGLE_DECL(rt5645_tdm_adc_slot0_1_enum,
442 RT5645_TDM_CTRL_1, 6, rt5645_tdm_data_swap_select);
443
444 static SOC_ENUM_SINGLE_DECL(rt5645_tdm_adc_slot2_3_enum,
445 RT5645_TDM_CTRL_1, 4, rt5645_tdm_data_swap_select);
446
447 static SOC_ENUM_SINGLE_DECL(rt5645_tdm_adc_slot4_5_enum,
448 RT5645_TDM_CTRL_1, 2, rt5645_tdm_data_swap_select);
449
450 static SOC_ENUM_SINGLE_DECL(rt5645_tdm_adc_slot6_7_enum,
451 RT5645_TDM_CTRL_1, 0, rt5645_tdm_data_swap_select);
452
453 static const char * const rt5645_tdm_adc_data_select[] = {
454 "1/2/R", "2/1/R", "R/1/2", "R/2/1"
455 };
456
457 static SOC_ENUM_SINGLE_DECL(rt5645_tdm_adc_sel_enum,
458 RT5645_TDM_CTRL_1, 8,
459 rt5645_tdm_adc_data_select);
460
461 static const struct snd_kcontrol_new rt5645_snd_controls[] = {
462 /* Speaker Output Volume */
463 SOC_DOUBLE("Speaker Channel Switch", RT5645_SPK_VOL,
464 RT5645_VOL_L_SFT, RT5645_VOL_R_SFT, 1, 1),
465 SOC_DOUBLE_TLV("Speaker Playback Volume", RT5645_SPK_VOL,
466 RT5645_L_VOL_SFT, RT5645_R_VOL_SFT, 39, 1, out_vol_tlv),
467
468 /* Headphone Output Volume */
469 SOC_DOUBLE("HP Channel Switch", RT5645_HP_VOL,
470 RT5645_VOL_L_SFT, RT5645_VOL_R_SFT, 1, 1),
471 SOC_DOUBLE_TLV("HP Playback Volume", RT5645_HP_VOL,
472 RT5645_L_VOL_SFT, RT5645_R_VOL_SFT, 39, 1, out_vol_tlv),
473
474 /* OUTPUT Control */
475 SOC_DOUBLE("OUT Playback Switch", RT5645_LOUT1,
476 RT5645_L_MUTE_SFT, RT5645_R_MUTE_SFT, 1, 1),
477 SOC_DOUBLE("OUT Channel Switch", RT5645_LOUT1,
478 RT5645_VOL_L_SFT, RT5645_VOL_R_SFT, 1, 1),
479 SOC_DOUBLE_TLV("OUT Playback Volume", RT5645_LOUT1,
480 RT5645_L_VOL_SFT, RT5645_R_VOL_SFT, 39, 1, out_vol_tlv),
481
482 /* DAC Digital Volume */
483 SOC_DOUBLE("DAC2 Playback Switch", RT5645_DAC_CTRL,
484 RT5645_M_DAC_L2_VOL_SFT, RT5645_M_DAC_R2_VOL_SFT, 1, 1),
485 SOC_DOUBLE_TLV("DAC1 Playback Volume", RT5645_DAC1_DIG_VOL,
486 RT5645_L_VOL_SFT, RT5645_R_VOL_SFT, 175, 0, dac_vol_tlv),
487 SOC_DOUBLE_TLV("Mono DAC Playback Volume", RT5645_DAC2_DIG_VOL,
488 RT5645_L_VOL_SFT, RT5645_R_VOL_SFT, 175, 0, dac_vol_tlv),
489
490 /* IN1/IN2 Control */
491 SOC_SINGLE_TLV("IN1 Boost", RT5645_IN1_CTRL1,
492 RT5645_BST_SFT1, 8, 0, bst_tlv),
493 SOC_SINGLE_TLV("IN2 Boost", RT5645_IN2_CTRL,
494 RT5645_BST_SFT2, 8, 0, bst_tlv),
495
496 /* INL/INR Volume Control */
497 SOC_DOUBLE_TLV("IN Capture Volume", RT5645_INL1_INR1_VOL,
498 RT5645_INL_VOL_SFT, RT5645_INR_VOL_SFT, 31, 1, in_vol_tlv),
499
500 /* ADC Digital Volume Control */
501 SOC_DOUBLE("ADC Capture Switch", RT5645_STO1_ADC_DIG_VOL,
502 RT5645_L_MUTE_SFT, RT5645_R_MUTE_SFT, 1, 1),
503 SOC_DOUBLE_TLV("ADC Capture Volume", RT5645_STO1_ADC_DIG_VOL,
504 RT5645_L_VOL_SFT, RT5645_R_VOL_SFT, 127, 0, adc_vol_tlv),
505 SOC_DOUBLE("Mono ADC Capture Switch", RT5645_MONO_ADC_DIG_VOL,
506 RT5645_L_MUTE_SFT, RT5645_R_MUTE_SFT, 1, 1),
507 SOC_DOUBLE_TLV("Mono ADC Capture Volume", RT5645_MONO_ADC_DIG_VOL,
508 RT5645_L_VOL_SFT, RT5645_R_VOL_SFT, 127, 0, adc_vol_tlv),
509
510 /* ADC Boost Volume Control */
511 SOC_DOUBLE_TLV("STO1 ADC Boost Gain", RT5645_ADC_BST_VOL1,
512 RT5645_STO1_ADC_L_BST_SFT, RT5645_STO1_ADC_R_BST_SFT, 3, 0,
513 adc_bst_tlv),
514 SOC_DOUBLE_TLV("STO2 ADC Boost Gain", RT5645_ADC_BST_VOL1,
515 RT5645_STO2_ADC_L_BST_SFT, RT5645_STO2_ADC_R_BST_SFT, 3, 0,
516 adc_bst_tlv),
517
518 /* I2S2 function select */
519 SOC_SINGLE("I2S2 Func Switch", RT5645_GPIO_CTRL1, RT5645_I2S2_SEL_SFT,
520 1, 1),
521
522 /* TDM */
523 SOC_ENUM("TDM Adc Slot0 1 Data", rt5645_tdm_adc_slot0_1_enum),
524 SOC_ENUM("TDM Adc Slot2 3 Data", rt5645_tdm_adc_slot2_3_enum),
525 SOC_ENUM("TDM Adc Slot4 5 Data", rt5645_tdm_adc_slot4_5_enum),
526 SOC_ENUM("TDM Adc Slot6 7 Data", rt5645_tdm_adc_slot6_7_enum),
527 SOC_ENUM("TDM IF1 ADC DATA Sel", rt5645_tdm_adc_sel_enum),
528 SOC_SINGLE("TDM IF1_DAC1_L Sel", RT5645_TDM_CTRL_3, 12, 7, 0),
529 SOC_SINGLE("TDM IF1_DAC1_R Sel", RT5645_TDM_CTRL_3, 8, 7, 0),
530 SOC_SINGLE("TDM IF1_DAC2_L Sel", RT5645_TDM_CTRL_3, 4, 7, 0),
531 SOC_SINGLE("TDM IF1_DAC2_R Sel", RT5645_TDM_CTRL_3, 0, 7, 0),
532 };
533
534 /**
535 * set_dmic_clk - Set parameter of dmic.
536 *
537 * @w: DAPM widget.
538 * @kcontrol: The kcontrol of this widget.
539 * @event: Event id.
540 *
541 */
542 static int set_dmic_clk(struct snd_soc_dapm_widget *w,
543 struct snd_kcontrol *kcontrol, int event)
544 {
545 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
546 struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
547 int idx = -EINVAL;
548
549 idx = rl6231_calc_dmic_clk(rt5645->sysclk);
550
551 if (idx < 0)
552 dev_err(codec->dev, "Failed to set DMIC clock\n");
553 else
554 snd_soc_update_bits(codec, RT5645_DMIC_CTRL1,
555 RT5645_DMIC_CLK_MASK, idx << RT5645_DMIC_CLK_SFT);
556 return idx;
557 }
558
559 static int is_sys_clk_from_pll(struct snd_soc_dapm_widget *source,
560 struct snd_soc_dapm_widget *sink)
561 {
562 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(source->dapm);
563 unsigned int val;
564
565 val = snd_soc_read(codec, RT5645_GLB_CLK);
566 val &= RT5645_SCLK_SRC_MASK;
567 if (val == RT5645_SCLK_SRC_PLL1)
568 return 1;
569 else
570 return 0;
571 }
572
573 static int is_using_asrc(struct snd_soc_dapm_widget *source,
574 struct snd_soc_dapm_widget *sink)
575 {
576 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(source->dapm);
577 unsigned int reg, shift, val;
578
579 switch (source->shift) {
580 case 0:
581 reg = RT5645_ASRC_3;
582 shift = 0;
583 break;
584 case 1:
585 reg = RT5645_ASRC_3;
586 shift = 4;
587 break;
588 case 3:
589 reg = RT5645_ASRC_2;
590 shift = 0;
591 break;
592 case 8:
593 reg = RT5645_ASRC_2;
594 shift = 4;
595 break;
596 case 9:
597 reg = RT5645_ASRC_2;
598 shift = 8;
599 break;
600 case 10:
601 reg = RT5645_ASRC_2;
602 shift = 12;
603 break;
604 default:
605 return 0;
606 }
607
608 val = (snd_soc_read(codec, reg) >> shift) & 0xf;
609 switch (val) {
610 case 1:
611 case 2:
612 case 3:
613 case 4:
614 return 1;
615 default:
616 return 0;
617 }
618
619 }
620
621 /**
622 * rt5645_sel_asrc_clk_src - select ASRC clock source for a set of filters
623 * @codec: SoC audio codec device.
624 * @filter_mask: mask of filters.
625 * @clk_src: clock source
626 *
627 * The ASRC function is for asynchronous MCLK and LRCK. Also, since RT5645 can
628 * only support standard 32fs or 64fs i2s format, ASRC should be enabled to
629 * support special i2s clock format such as Intel's 100fs(100 * sampling rate).
630 * ASRC function will track i2s clock and generate a corresponding system clock
631 * for codec. This function provides an API to select the clock source for a
632 * set of filters specified by the mask. And the codec driver will turn on ASRC
633 * for these filters if ASRC is selected as their clock source.
634 */
635 int rt5645_sel_asrc_clk_src(struct snd_soc_codec *codec,
636 unsigned int filter_mask, unsigned int clk_src)
637 {
638 unsigned int asrc2_mask = 0;
639 unsigned int asrc2_value = 0;
640 unsigned int asrc3_mask = 0;
641 unsigned int asrc3_value = 0;
642
643 switch (clk_src) {
644 case RT5645_CLK_SEL_SYS:
645 case RT5645_CLK_SEL_I2S1_ASRC:
646 case RT5645_CLK_SEL_I2S2_ASRC:
647 case RT5645_CLK_SEL_SYS2:
648 break;
649
650 default:
651 return -EINVAL;
652 }
653
654 if (filter_mask & RT5645_DA_STEREO_FILTER) {
655 asrc2_mask |= RT5645_DA_STO_CLK_SEL_MASK;
656 asrc2_value = (asrc2_value & ~RT5645_DA_STO_CLK_SEL_MASK)
657 | (clk_src << RT5645_DA_STO_CLK_SEL_SFT);
658 }
659
660 if (filter_mask & RT5645_DA_MONO_L_FILTER) {
661 asrc2_mask |= RT5645_DA_MONOL_CLK_SEL_MASK;
662 asrc2_value = (asrc2_value & ~RT5645_DA_MONOL_CLK_SEL_MASK)
663 | (clk_src << RT5645_DA_MONOL_CLK_SEL_SFT);
664 }
665
666 if (filter_mask & RT5645_DA_MONO_R_FILTER) {
667 asrc2_mask |= RT5645_DA_MONOR_CLK_SEL_MASK;
668 asrc2_value = (asrc2_value & ~RT5645_DA_MONOR_CLK_SEL_MASK)
669 | (clk_src << RT5645_DA_MONOR_CLK_SEL_SFT);
670 }
671
672 if (filter_mask & RT5645_AD_STEREO_FILTER) {
673 asrc2_mask |= RT5645_AD_STO1_CLK_SEL_MASK;
674 asrc2_value = (asrc2_value & ~RT5645_AD_STO1_CLK_SEL_MASK)
675 | (clk_src << RT5645_AD_STO1_CLK_SEL_SFT);
676 }
677
678 if (filter_mask & RT5645_AD_MONO_L_FILTER) {
679 asrc3_mask |= RT5645_AD_MONOL_CLK_SEL_MASK;
680 asrc3_value = (asrc3_value & ~RT5645_AD_MONOL_CLK_SEL_MASK)
681 | (clk_src << RT5645_AD_MONOL_CLK_SEL_SFT);
682 }
683
684 if (filter_mask & RT5645_AD_MONO_R_FILTER) {
685 asrc3_mask |= RT5645_AD_MONOR_CLK_SEL_MASK;
686 asrc3_value = (asrc3_value & ~RT5645_AD_MONOR_CLK_SEL_MASK)
687 | (clk_src << RT5645_AD_MONOR_CLK_SEL_SFT);
688 }
689
690 if (asrc2_mask)
691 snd_soc_update_bits(codec, RT5645_ASRC_2,
692 asrc2_mask, asrc2_value);
693
694 if (asrc3_mask)
695 snd_soc_update_bits(codec, RT5645_ASRC_3,
696 asrc3_mask, asrc3_value);
697
698 return 0;
699 }
700 EXPORT_SYMBOL_GPL(rt5645_sel_asrc_clk_src);
701
702 /* Digital Mixer */
703 static const struct snd_kcontrol_new rt5645_sto1_adc_l_mix[] = {
704 SOC_DAPM_SINGLE("ADC1 Switch", RT5645_STO1_ADC_MIXER,
705 RT5645_M_ADC_L1_SFT, 1, 1),
706 SOC_DAPM_SINGLE("ADC2 Switch", RT5645_STO1_ADC_MIXER,
707 RT5645_M_ADC_L2_SFT, 1, 1),
708 };
709
710 static const struct snd_kcontrol_new rt5645_sto1_adc_r_mix[] = {
711 SOC_DAPM_SINGLE("ADC1 Switch", RT5645_STO1_ADC_MIXER,
712 RT5645_M_ADC_R1_SFT, 1, 1),
713 SOC_DAPM_SINGLE("ADC2 Switch", RT5645_STO1_ADC_MIXER,
714 RT5645_M_ADC_R2_SFT, 1, 1),
715 };
716
717 static const struct snd_kcontrol_new rt5645_mono_adc_l_mix[] = {
718 SOC_DAPM_SINGLE("ADC1 Switch", RT5645_MONO_ADC_MIXER,
719 RT5645_M_MONO_ADC_L1_SFT, 1, 1),
720 SOC_DAPM_SINGLE("ADC2 Switch", RT5645_MONO_ADC_MIXER,
721 RT5645_M_MONO_ADC_L2_SFT, 1, 1),
722 };
723
724 static const struct snd_kcontrol_new rt5645_mono_adc_r_mix[] = {
725 SOC_DAPM_SINGLE("ADC1 Switch", RT5645_MONO_ADC_MIXER,
726 RT5645_M_MONO_ADC_R1_SFT, 1, 1),
727 SOC_DAPM_SINGLE("ADC2 Switch", RT5645_MONO_ADC_MIXER,
728 RT5645_M_MONO_ADC_R2_SFT, 1, 1),
729 };
730
731 static const struct snd_kcontrol_new rt5645_dac_l_mix[] = {
732 SOC_DAPM_SINGLE("Stereo ADC Switch", RT5645_AD_DA_MIXER,
733 RT5645_M_ADCMIX_L_SFT, 1, 1),
734 SOC_DAPM_SINGLE("DAC1 Switch", RT5645_AD_DA_MIXER,
735 RT5645_M_DAC1_L_SFT, 1, 1),
736 };
737
738 static const struct snd_kcontrol_new rt5645_dac_r_mix[] = {
739 SOC_DAPM_SINGLE("Stereo ADC Switch", RT5645_AD_DA_MIXER,
740 RT5645_M_ADCMIX_R_SFT, 1, 1),
741 SOC_DAPM_SINGLE("DAC1 Switch", RT5645_AD_DA_MIXER,
742 RT5645_M_DAC1_R_SFT, 1, 1),
743 };
744
745 static const struct snd_kcontrol_new rt5645_sto_dac_l_mix[] = {
746 SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_STO_DAC_MIXER,
747 RT5645_M_DAC_L1_SFT, 1, 1),
748 SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_STO_DAC_MIXER,
749 RT5645_M_DAC_L2_SFT, 1, 1),
750 SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_STO_DAC_MIXER,
751 RT5645_M_DAC_R1_STO_L_SFT, 1, 1),
752 };
753
754 static const struct snd_kcontrol_new rt5645_sto_dac_r_mix[] = {
755 SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_STO_DAC_MIXER,
756 RT5645_M_DAC_R1_SFT, 1, 1),
757 SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_STO_DAC_MIXER,
758 RT5645_M_DAC_R2_SFT, 1, 1),
759 SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_STO_DAC_MIXER,
760 RT5645_M_DAC_L1_STO_R_SFT, 1, 1),
761 };
762
763 static const struct snd_kcontrol_new rt5645_mono_dac_l_mix[] = {
764 SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_MONO_DAC_MIXER,
765 RT5645_M_DAC_L1_MONO_L_SFT, 1, 1),
766 SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_MONO_DAC_MIXER,
767 RT5645_M_DAC_L2_MONO_L_SFT, 1, 1),
768 SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_MONO_DAC_MIXER,
769 RT5645_M_DAC_R2_MONO_L_SFT, 1, 1),
770 };
771
772 static const struct snd_kcontrol_new rt5645_mono_dac_r_mix[] = {
773 SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_MONO_DAC_MIXER,
774 RT5645_M_DAC_R1_MONO_R_SFT, 1, 1),
775 SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_MONO_DAC_MIXER,
776 RT5645_M_DAC_R2_MONO_R_SFT, 1, 1),
777 SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_MONO_DAC_MIXER,
778 RT5645_M_DAC_L2_MONO_R_SFT, 1, 1),
779 };
780
781 static const struct snd_kcontrol_new rt5645_dig_l_mix[] = {
782 SOC_DAPM_SINGLE("Sto DAC Mix L Switch", RT5645_DIG_MIXER,
783 RT5645_M_STO_L_DAC_L_SFT, 1, 1),
784 SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_DIG_MIXER,
785 RT5645_M_DAC_L2_DAC_L_SFT, 1, 1),
786 SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_DIG_MIXER,
787 RT5645_M_DAC_R2_DAC_L_SFT, 1, 1),
788 };
789
790 static const struct snd_kcontrol_new rt5645_dig_r_mix[] = {
791 SOC_DAPM_SINGLE("Sto DAC Mix R Switch", RT5645_DIG_MIXER,
792 RT5645_M_STO_R_DAC_R_SFT, 1, 1),
793 SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_DIG_MIXER,
794 RT5645_M_DAC_R2_DAC_R_SFT, 1, 1),
795 SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_DIG_MIXER,
796 RT5645_M_DAC_L2_DAC_R_SFT, 1, 1),
797 };
798
799 /* Analog Input Mixer */
800 static const struct snd_kcontrol_new rt5645_rec_l_mix[] = {
801 SOC_DAPM_SINGLE("HPOL Switch", RT5645_REC_L2_MIXER,
802 RT5645_M_HP_L_RM_L_SFT, 1, 1),
803 SOC_DAPM_SINGLE("INL Switch", RT5645_REC_L2_MIXER,
804 RT5645_M_IN_L_RM_L_SFT, 1, 1),
805 SOC_DAPM_SINGLE("BST2 Switch", RT5645_REC_L2_MIXER,
806 RT5645_M_BST2_RM_L_SFT, 1, 1),
807 SOC_DAPM_SINGLE("BST1 Switch", RT5645_REC_L2_MIXER,
808 RT5645_M_BST1_RM_L_SFT, 1, 1),
809 SOC_DAPM_SINGLE("OUT MIXL Switch", RT5645_REC_L2_MIXER,
810 RT5645_M_OM_L_RM_L_SFT, 1, 1),
811 };
812
813 static const struct snd_kcontrol_new rt5645_rec_r_mix[] = {
814 SOC_DAPM_SINGLE("HPOR Switch", RT5645_REC_R2_MIXER,
815 RT5645_M_HP_R_RM_R_SFT, 1, 1),
816 SOC_DAPM_SINGLE("INR Switch", RT5645_REC_R2_MIXER,
817 RT5645_M_IN_R_RM_R_SFT, 1, 1),
818 SOC_DAPM_SINGLE("BST2 Switch", RT5645_REC_R2_MIXER,
819 RT5645_M_BST2_RM_R_SFT, 1, 1),
820 SOC_DAPM_SINGLE("BST1 Switch", RT5645_REC_R2_MIXER,
821 RT5645_M_BST1_RM_R_SFT, 1, 1),
822 SOC_DAPM_SINGLE("OUT MIXR Switch", RT5645_REC_R2_MIXER,
823 RT5645_M_OM_R_RM_R_SFT, 1, 1),
824 };
825
826 static const struct snd_kcontrol_new rt5645_spk_l_mix[] = {
827 SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_SPK_L_MIXER,
828 RT5645_M_DAC_L1_SM_L_SFT, 1, 1),
829 SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_SPK_L_MIXER,
830 RT5645_M_DAC_L2_SM_L_SFT, 1, 1),
831 SOC_DAPM_SINGLE("INL Switch", RT5645_SPK_L_MIXER,
832 RT5645_M_IN_L_SM_L_SFT, 1, 1),
833 SOC_DAPM_SINGLE("BST1 Switch", RT5645_SPK_L_MIXER,
834 RT5645_M_BST1_L_SM_L_SFT, 1, 1),
835 };
836
837 static const struct snd_kcontrol_new rt5645_spk_r_mix[] = {
838 SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_SPK_R_MIXER,
839 RT5645_M_DAC_R1_SM_R_SFT, 1, 1),
840 SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_SPK_R_MIXER,
841 RT5645_M_DAC_R2_SM_R_SFT, 1, 1),
842 SOC_DAPM_SINGLE("INR Switch", RT5645_SPK_R_MIXER,
843 RT5645_M_IN_R_SM_R_SFT, 1, 1),
844 SOC_DAPM_SINGLE("BST2 Switch", RT5645_SPK_R_MIXER,
845 RT5645_M_BST2_R_SM_R_SFT, 1, 1),
846 };
847
848 static const struct snd_kcontrol_new rt5645_out_l_mix[] = {
849 SOC_DAPM_SINGLE("BST1 Switch", RT5645_OUT_L1_MIXER,
850 RT5645_M_BST1_OM_L_SFT, 1, 1),
851 SOC_DAPM_SINGLE("INL Switch", RT5645_OUT_L1_MIXER,
852 RT5645_M_IN_L_OM_L_SFT, 1, 1),
853 SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_OUT_L1_MIXER,
854 RT5645_M_DAC_L2_OM_L_SFT, 1, 1),
855 SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_OUT_L1_MIXER,
856 RT5645_M_DAC_L1_OM_L_SFT, 1, 1),
857 };
858
859 static const struct snd_kcontrol_new rt5645_out_r_mix[] = {
860 SOC_DAPM_SINGLE("BST2 Switch", RT5645_OUT_R1_MIXER,
861 RT5645_M_BST2_OM_R_SFT, 1, 1),
862 SOC_DAPM_SINGLE("INR Switch", RT5645_OUT_R1_MIXER,
863 RT5645_M_IN_R_OM_R_SFT, 1, 1),
864 SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_OUT_R1_MIXER,
865 RT5645_M_DAC_R2_OM_R_SFT, 1, 1),
866 SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_OUT_R1_MIXER,
867 RT5645_M_DAC_R1_OM_R_SFT, 1, 1),
868 };
869
870 static const struct snd_kcontrol_new rt5645_spo_l_mix[] = {
871 SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_SPO_MIXER,
872 RT5645_M_DAC_R1_SPM_L_SFT, 1, 1),
873 SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_SPO_MIXER,
874 RT5645_M_DAC_L1_SPM_L_SFT, 1, 1),
875 SOC_DAPM_SINGLE("SPKVOL R Switch", RT5645_SPO_MIXER,
876 RT5645_M_SV_R_SPM_L_SFT, 1, 1),
877 SOC_DAPM_SINGLE("SPKVOL L Switch", RT5645_SPO_MIXER,
878 RT5645_M_SV_L_SPM_L_SFT, 1, 1),
879 };
880
881 static const struct snd_kcontrol_new rt5645_spo_r_mix[] = {
882 SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_SPO_MIXER,
883 RT5645_M_DAC_R1_SPM_R_SFT, 1, 1),
884 SOC_DAPM_SINGLE("SPKVOL R Switch", RT5645_SPO_MIXER,
885 RT5645_M_SV_R_SPM_R_SFT, 1, 1),
886 };
887
888 static const struct snd_kcontrol_new rt5645_hpo_mix[] = {
889 SOC_DAPM_SINGLE("DAC1 Switch", RT5645_HPO_MIXER,
890 RT5645_M_DAC1_HM_SFT, 1, 1),
891 SOC_DAPM_SINGLE("HPVOL Switch", RT5645_HPO_MIXER,
892 RT5645_M_HPVOL_HM_SFT, 1, 1),
893 };
894
895 static const struct snd_kcontrol_new rt5645_hpvoll_mix[] = {
896 SOC_DAPM_SINGLE("DAC1 Switch", RT5645_HPOMIXL_CTRL,
897 RT5645_M_DAC1_HV_SFT, 1, 1),
898 SOC_DAPM_SINGLE("DAC2 Switch", RT5645_HPOMIXL_CTRL,
899 RT5645_M_DAC2_HV_SFT, 1, 1),
900 SOC_DAPM_SINGLE("INL Switch", RT5645_HPOMIXL_CTRL,
901 RT5645_M_IN_HV_SFT, 1, 1),
902 SOC_DAPM_SINGLE("BST1 Switch", RT5645_HPOMIXL_CTRL,
903 RT5645_M_BST1_HV_SFT, 1, 1),
904 };
905
906 static const struct snd_kcontrol_new rt5645_hpvolr_mix[] = {
907 SOC_DAPM_SINGLE("DAC1 Switch", RT5645_HPOMIXR_CTRL,
908 RT5645_M_DAC1_HV_SFT, 1, 1),
909 SOC_DAPM_SINGLE("DAC2 Switch", RT5645_HPOMIXR_CTRL,
910 RT5645_M_DAC2_HV_SFT, 1, 1),
911 SOC_DAPM_SINGLE("INR Switch", RT5645_HPOMIXR_CTRL,
912 RT5645_M_IN_HV_SFT, 1, 1),
913 SOC_DAPM_SINGLE("BST2 Switch", RT5645_HPOMIXR_CTRL,
914 RT5645_M_BST2_HV_SFT, 1, 1),
915 };
916
917 static const struct snd_kcontrol_new rt5645_lout_mix[] = {
918 SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_LOUT_MIXER,
919 RT5645_M_DAC_L1_LM_SFT, 1, 1),
920 SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_LOUT_MIXER,
921 RT5645_M_DAC_R1_LM_SFT, 1, 1),
922 SOC_DAPM_SINGLE("OUTMIX L Switch", RT5645_LOUT_MIXER,
923 RT5645_M_OV_L_LM_SFT, 1, 1),
924 SOC_DAPM_SINGLE("OUTMIX R Switch", RT5645_LOUT_MIXER,
925 RT5645_M_OV_R_LM_SFT, 1, 1),
926 };
927
928 /*DAC1 L/R source*/ /* MX-29 [9:8] [11:10] */
929 static const char * const rt5645_dac1_src[] = {
930 "IF1 DAC", "IF2 DAC", "IF3 DAC"
931 };
932
933 static SOC_ENUM_SINGLE_DECL(
934 rt5645_dac1l_enum, RT5645_AD_DA_MIXER,
935 RT5645_DAC1_L_SEL_SFT, rt5645_dac1_src);
936
937 static const struct snd_kcontrol_new rt5645_dac1l_mux =
938 SOC_DAPM_ENUM("DAC1 L source", rt5645_dac1l_enum);
939
940 static SOC_ENUM_SINGLE_DECL(
941 rt5645_dac1r_enum, RT5645_AD_DA_MIXER,
942 RT5645_DAC1_R_SEL_SFT, rt5645_dac1_src);
943
944 static const struct snd_kcontrol_new rt5645_dac1r_mux =
945 SOC_DAPM_ENUM("DAC1 R source", rt5645_dac1r_enum);
946
947 /*DAC2 L/R source*/ /* MX-1B [6:4] [2:0] */
948 static const char * const rt5645_dac12_src[] = {
949 "IF1 DAC", "IF2 DAC", "IF3 DAC", "Mono ADC", "VAD_ADC"
950 };
951
952 static SOC_ENUM_SINGLE_DECL(
953 rt5645_dac2l_enum, RT5645_DAC_CTRL,
954 RT5645_DAC2_L_SEL_SFT, rt5645_dac12_src);
955
956 static const struct snd_kcontrol_new rt5645_dac_l2_mux =
957 SOC_DAPM_ENUM("DAC2 L source", rt5645_dac2l_enum);
958
959 static const char * const rt5645_dacr2_src[] = {
960 "IF1 DAC", "IF2 DAC", "IF3 DAC", "Mono ADC", "Haptic"
961 };
962
963 static SOC_ENUM_SINGLE_DECL(
964 rt5645_dac2r_enum, RT5645_DAC_CTRL,
965 RT5645_DAC2_R_SEL_SFT, rt5645_dacr2_src);
966
967 static const struct snd_kcontrol_new rt5645_dac_r2_mux =
968 SOC_DAPM_ENUM("DAC2 R source", rt5645_dac2r_enum);
969
970
971 /* INL/R source */
972 static const char * const rt5645_inl_src[] = {
973 "IN2P", "MonoP"
974 };
975
976 static SOC_ENUM_SINGLE_DECL(
977 rt5645_inl_enum, RT5645_INL1_INR1_VOL,
978 RT5645_INL_SEL_SFT, rt5645_inl_src);
979
980 static const struct snd_kcontrol_new rt5645_inl_mux =
981 SOC_DAPM_ENUM("INL source", rt5645_inl_enum);
982
983 static const char * const rt5645_inr_src[] = {
984 "IN2N", "MonoN"
985 };
986
987 static SOC_ENUM_SINGLE_DECL(
988 rt5645_inr_enum, RT5645_INL1_INR1_VOL,
989 RT5645_INR_SEL_SFT, rt5645_inr_src);
990
991 static const struct snd_kcontrol_new rt5645_inr_mux =
992 SOC_DAPM_ENUM("INR source", rt5645_inr_enum);
993
994 /* Stereo1 ADC source */
995 /* MX-27 [12] */
996 static const char * const rt5645_stereo_adc1_src[] = {
997 "DAC MIX", "ADC"
998 };
999
1000 static SOC_ENUM_SINGLE_DECL(
1001 rt5645_stereo1_adc1_enum, RT5645_STO1_ADC_MIXER,
1002 RT5645_ADC_1_SRC_SFT, rt5645_stereo_adc1_src);
1003
1004 static const struct snd_kcontrol_new rt5645_sto_adc1_mux =
1005 SOC_DAPM_ENUM("Stereo1 ADC1 Mux", rt5645_stereo1_adc1_enum);
1006
1007 /* MX-27 [11] */
1008 static const char * const rt5645_stereo_adc2_src[] = {
1009 "DAC MIX", "DMIC"
1010 };
1011
1012 static SOC_ENUM_SINGLE_DECL(
1013 rt5645_stereo1_adc2_enum, RT5645_STO1_ADC_MIXER,
1014 RT5645_ADC_2_SRC_SFT, rt5645_stereo_adc2_src);
1015
1016 static const struct snd_kcontrol_new rt5645_sto_adc2_mux =
1017 SOC_DAPM_ENUM("Stereo1 ADC2 Mux", rt5645_stereo1_adc2_enum);
1018
1019 /* MX-27 [8] */
1020 static const char * const rt5645_stereo_dmic_src[] = {
1021 "DMIC1", "DMIC2"
1022 };
1023
1024 static SOC_ENUM_SINGLE_DECL(
1025 rt5645_stereo1_dmic_enum, RT5645_STO1_ADC_MIXER,
1026 RT5645_DMIC_SRC_SFT, rt5645_stereo_dmic_src);
1027
1028 static const struct snd_kcontrol_new rt5645_sto1_dmic_mux =
1029 SOC_DAPM_ENUM("Stereo1 DMIC source", rt5645_stereo1_dmic_enum);
1030
1031 /* Mono ADC source */
1032 /* MX-28 [12] */
1033 static const char * const rt5645_mono_adc_l1_src[] = {
1034 "Mono DAC MIXL", "ADC"
1035 };
1036
1037 static SOC_ENUM_SINGLE_DECL(
1038 rt5645_mono_adc_l1_enum, RT5645_MONO_ADC_MIXER,
1039 RT5645_MONO_ADC_L1_SRC_SFT, rt5645_mono_adc_l1_src);
1040
1041 static const struct snd_kcontrol_new rt5645_mono_adc_l1_mux =
1042 SOC_DAPM_ENUM("Mono ADC1 left source", rt5645_mono_adc_l1_enum);
1043 /* MX-28 [11] */
1044 static const char * const rt5645_mono_adc_l2_src[] = {
1045 "Mono DAC MIXL", "DMIC"
1046 };
1047
1048 static SOC_ENUM_SINGLE_DECL(
1049 rt5645_mono_adc_l2_enum, RT5645_MONO_ADC_MIXER,
1050 RT5645_MONO_ADC_L2_SRC_SFT, rt5645_mono_adc_l2_src);
1051
1052 static const struct snd_kcontrol_new rt5645_mono_adc_l2_mux =
1053 SOC_DAPM_ENUM("Mono ADC2 left source", rt5645_mono_adc_l2_enum);
1054
1055 /* MX-28 [8] */
1056 static const char * const rt5645_mono_dmic_src[] = {
1057 "DMIC1", "DMIC2"
1058 };
1059
1060 static SOC_ENUM_SINGLE_DECL(
1061 rt5645_mono_dmic_l_enum, RT5645_MONO_ADC_MIXER,
1062 RT5645_MONO_DMIC_L_SRC_SFT, rt5645_mono_dmic_src);
1063
1064 static const struct snd_kcontrol_new rt5645_mono_dmic_l_mux =
1065 SOC_DAPM_ENUM("Mono DMIC left source", rt5645_mono_dmic_l_enum);
1066 /* MX-28 [1:0] */
1067 static SOC_ENUM_SINGLE_DECL(
1068 rt5645_mono_dmic_r_enum, RT5645_MONO_ADC_MIXER,
1069 RT5645_MONO_DMIC_R_SRC_SFT, rt5645_mono_dmic_src);
1070
1071 static const struct snd_kcontrol_new rt5645_mono_dmic_r_mux =
1072 SOC_DAPM_ENUM("Mono DMIC Right source", rt5645_mono_dmic_r_enum);
1073 /* MX-28 [4] */
1074 static const char * const rt5645_mono_adc_r1_src[] = {
1075 "Mono DAC MIXR", "ADC"
1076 };
1077
1078 static SOC_ENUM_SINGLE_DECL(
1079 rt5645_mono_adc_r1_enum, RT5645_MONO_ADC_MIXER,
1080 RT5645_MONO_ADC_R1_SRC_SFT, rt5645_mono_adc_r1_src);
1081
1082 static const struct snd_kcontrol_new rt5645_mono_adc_r1_mux =
1083 SOC_DAPM_ENUM("Mono ADC1 right source", rt5645_mono_adc_r1_enum);
1084 /* MX-28 [3] */
1085 static const char * const rt5645_mono_adc_r2_src[] = {
1086 "Mono DAC MIXR", "DMIC"
1087 };
1088
1089 static SOC_ENUM_SINGLE_DECL(
1090 rt5645_mono_adc_r2_enum, RT5645_MONO_ADC_MIXER,
1091 RT5645_MONO_ADC_R2_SRC_SFT, rt5645_mono_adc_r2_src);
1092
1093 static const struct snd_kcontrol_new rt5645_mono_adc_r2_mux =
1094 SOC_DAPM_ENUM("Mono ADC2 right source", rt5645_mono_adc_r2_enum);
1095
1096 /* MX-77 [9:8] */
1097 static const char * const rt5645_if1_adc_in_src[] = {
1098 "IF_ADC1", "IF_ADC2", "VAD_ADC"
1099 };
1100
1101 static SOC_ENUM_SINGLE_DECL(
1102 rt5645_if1_adc_in_enum, RT5645_TDM_CTRL_1,
1103 RT5645_IF1_ADC_IN_SFT, rt5645_if1_adc_in_src);
1104
1105 static const struct snd_kcontrol_new rt5645_if1_adc_in_mux =
1106 SOC_DAPM_ENUM("IF1 ADC IN source", rt5645_if1_adc_in_enum);
1107
1108 /* MX-2d [3] [2] */
1109 static const char * const rt5650_a_dac1_src[] = {
1110 "DAC1", "Stereo DAC Mixer"
1111 };
1112
1113 static SOC_ENUM_SINGLE_DECL(
1114 rt5650_a_dac1_l_enum, RT5650_A_DAC_SOUR,
1115 RT5650_A_DAC1_L_IN_SFT, rt5650_a_dac1_src);
1116
1117 static const struct snd_kcontrol_new rt5650_a_dac1_l_mux =
1118 SOC_DAPM_ENUM("A DAC1 L source", rt5650_a_dac1_l_enum);
1119
1120 static SOC_ENUM_SINGLE_DECL(
1121 rt5650_a_dac1_r_enum, RT5650_A_DAC_SOUR,
1122 RT5650_A_DAC1_R_IN_SFT, rt5650_a_dac1_src);
1123
1124 static const struct snd_kcontrol_new rt5650_a_dac1_r_mux =
1125 SOC_DAPM_ENUM("A DAC1 R source", rt5650_a_dac1_r_enum);
1126
1127 /* MX-2d [1] [0] */
1128 static const char * const rt5650_a_dac2_src[] = {
1129 "Stereo DAC Mixer", "Mono DAC Mixer"
1130 };
1131
1132 static SOC_ENUM_SINGLE_DECL(
1133 rt5650_a_dac2_l_enum, RT5650_A_DAC_SOUR,
1134 RT5650_A_DAC2_L_IN_SFT, rt5650_a_dac2_src);
1135
1136 static const struct snd_kcontrol_new rt5650_a_dac2_l_mux =
1137 SOC_DAPM_ENUM("A DAC2 L source", rt5650_a_dac2_l_enum);
1138
1139 static SOC_ENUM_SINGLE_DECL(
1140 rt5650_a_dac2_r_enum, RT5650_A_DAC_SOUR,
1141 RT5650_A_DAC2_R_IN_SFT, rt5650_a_dac2_src);
1142
1143 static const struct snd_kcontrol_new rt5650_a_dac2_r_mux =
1144 SOC_DAPM_ENUM("A DAC2 R source", rt5650_a_dac2_r_enum);
1145
1146 /* MX-2F [13:12] */
1147 static const char * const rt5645_if2_adc_in_src[] = {
1148 "IF_ADC1", "IF_ADC2", "VAD_ADC"
1149 };
1150
1151 static SOC_ENUM_SINGLE_DECL(
1152 rt5645_if2_adc_in_enum, RT5645_DIG_INF1_DATA,
1153 RT5645_IF2_ADC_IN_SFT, rt5645_if2_adc_in_src);
1154
1155 static const struct snd_kcontrol_new rt5645_if2_adc_in_mux =
1156 SOC_DAPM_ENUM("IF2 ADC IN source", rt5645_if2_adc_in_enum);
1157
1158 /* MX-2F [1:0] */
1159 static const char * const rt5645_if3_adc_in_src[] = {
1160 "IF_ADC1", "IF_ADC2", "VAD_ADC"
1161 };
1162
1163 static SOC_ENUM_SINGLE_DECL(
1164 rt5645_if3_adc_in_enum, RT5645_DIG_INF1_DATA,
1165 RT5645_IF3_ADC_IN_SFT, rt5645_if3_adc_in_src);
1166
1167 static const struct snd_kcontrol_new rt5645_if3_adc_in_mux =
1168 SOC_DAPM_ENUM("IF3 ADC IN source", rt5645_if3_adc_in_enum);
1169
1170 /* MX-31 [15] [13] [11] [9] */
1171 static const char * const rt5645_pdm_src[] = {
1172 "Mono DAC", "Stereo DAC"
1173 };
1174
1175 static SOC_ENUM_SINGLE_DECL(
1176 rt5645_pdm1_l_enum, RT5645_PDM_OUT_CTRL,
1177 RT5645_PDM1_L_SFT, rt5645_pdm_src);
1178
1179 static const struct snd_kcontrol_new rt5645_pdm1_l_mux =
1180 SOC_DAPM_ENUM("PDM1 L source", rt5645_pdm1_l_enum);
1181
1182 static SOC_ENUM_SINGLE_DECL(
1183 rt5645_pdm1_r_enum, RT5645_PDM_OUT_CTRL,
1184 RT5645_PDM1_R_SFT, rt5645_pdm_src);
1185
1186 static const struct snd_kcontrol_new rt5645_pdm1_r_mux =
1187 SOC_DAPM_ENUM("PDM1 R source", rt5645_pdm1_r_enum);
1188
1189 /* MX-9D [9:8] */
1190 static const char * const rt5645_vad_adc_src[] = {
1191 "Sto1 ADC L", "Mono ADC L", "Mono ADC R"
1192 };
1193
1194 static SOC_ENUM_SINGLE_DECL(
1195 rt5645_vad_adc_enum, RT5645_VAD_CTRL4,
1196 RT5645_VAD_SEL_SFT, rt5645_vad_adc_src);
1197
1198 static const struct snd_kcontrol_new rt5645_vad_adc_mux =
1199 SOC_DAPM_ENUM("VAD ADC source", rt5645_vad_adc_enum);
1200
1201 static const struct snd_kcontrol_new spk_l_vol_control =
1202 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_SPK_VOL,
1203 RT5645_L_MUTE_SFT, 1, 1);
1204
1205 static const struct snd_kcontrol_new spk_r_vol_control =
1206 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_SPK_VOL,
1207 RT5645_R_MUTE_SFT, 1, 1);
1208
1209 static const struct snd_kcontrol_new hp_l_vol_control =
1210 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_HP_VOL,
1211 RT5645_L_MUTE_SFT, 1, 1);
1212
1213 static const struct snd_kcontrol_new hp_r_vol_control =
1214 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_HP_VOL,
1215 RT5645_R_MUTE_SFT, 1, 1);
1216
1217 static const struct snd_kcontrol_new pdm1_l_vol_control =
1218 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_PDM_OUT_CTRL,
1219 RT5645_M_PDM1_L, 1, 1);
1220
1221 static const struct snd_kcontrol_new pdm1_r_vol_control =
1222 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_PDM_OUT_CTRL,
1223 RT5645_M_PDM1_R, 1, 1);
1224
1225 static void hp_amp_power(struct snd_soc_codec *codec, int on)
1226 {
1227 static int hp_amp_power_count;
1228 struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
1229
1230 if (on) {
1231 if (hp_amp_power_count <= 0) {
1232 /* depop parameters */
1233 snd_soc_update_bits(codec, RT5645_DEPOP_M2,
1234 RT5645_DEPOP_MASK, RT5645_DEPOP_MAN);
1235 snd_soc_write(codec, RT5645_DEPOP_M1, 0x000d);
1236 regmap_write(rt5645->regmap, RT5645_PR_BASE +
1237 RT5645_HP_DCC_INT1, 0x9f01);
1238 mdelay(150);
1239 /* headphone amp power on */
1240 snd_soc_update_bits(codec, RT5645_PWR_ANLG1,
1241 RT5645_PWR_FV1 | RT5645_PWR_FV2 , 0);
1242 snd_soc_update_bits(codec, RT5645_PWR_VOL,
1243 RT5645_PWR_HV_L | RT5645_PWR_HV_R,
1244 RT5645_PWR_HV_L | RT5645_PWR_HV_R);
1245 snd_soc_update_bits(codec, RT5645_PWR_ANLG1,
1246 RT5645_PWR_HP_L | RT5645_PWR_HP_R |
1247 RT5645_PWR_HA,
1248 RT5645_PWR_HP_L | RT5645_PWR_HP_R |
1249 RT5645_PWR_HA);
1250 mdelay(5);
1251 snd_soc_update_bits(codec, RT5645_PWR_ANLG1,
1252 RT5645_PWR_FV1 | RT5645_PWR_FV2,
1253 RT5645_PWR_FV1 | RT5645_PWR_FV2);
1254
1255 snd_soc_update_bits(codec, RT5645_DEPOP_M1,
1256 RT5645_HP_CO_MASK | RT5645_HP_SG_MASK,
1257 RT5645_HP_CO_EN | RT5645_HP_SG_EN);
1258 regmap_write(rt5645->regmap, RT5645_PR_BASE +
1259 0x14, 0x1aaa);
1260 regmap_write(rt5645->regmap, RT5645_PR_BASE +
1261 0x24, 0x0430);
1262 }
1263 hp_amp_power_count++;
1264 } else {
1265 hp_amp_power_count--;
1266 if (hp_amp_power_count <= 0) {
1267 snd_soc_update_bits(codec, RT5645_DEPOP_M1,
1268 RT5645_HP_SG_MASK | RT5645_HP_L_SMT_MASK |
1269 RT5645_HP_R_SMT_MASK, RT5645_HP_SG_DIS |
1270 RT5645_HP_L_SMT_DIS | RT5645_HP_R_SMT_DIS);
1271 /* headphone amp power down */
1272 snd_soc_write(codec, RT5645_DEPOP_M1, 0x0000);
1273 snd_soc_update_bits(codec, RT5645_PWR_ANLG1,
1274 RT5645_PWR_HP_L | RT5645_PWR_HP_R |
1275 RT5645_PWR_HA, 0);
1276 snd_soc_update_bits(codec, RT5645_DEPOP_M2,
1277 RT5645_DEPOP_MASK, 0);
1278 }
1279 }
1280 }
1281
1282 static int rt5645_hp_event(struct snd_soc_dapm_widget *w,
1283 struct snd_kcontrol *kcontrol, int event)
1284 {
1285 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
1286 struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
1287
1288 switch (event) {
1289 case SND_SOC_DAPM_POST_PMU:
1290 hp_amp_power(codec, 1);
1291 /* headphone unmute sequence */
1292 if (rt5645->codec_type == CODEC_TYPE_RT5650) {
1293 snd_soc_write(codec, RT5645_DEPOP_M3, 0x0737);
1294 } else {
1295 snd_soc_update_bits(codec, RT5645_DEPOP_M3,
1296 RT5645_CP_FQ1_MASK | RT5645_CP_FQ2_MASK |
1297 RT5645_CP_FQ3_MASK,
1298 (RT5645_CP_FQ_192_KHZ << RT5645_CP_FQ1_SFT) |
1299 (RT5645_CP_FQ_12_KHZ << RT5645_CP_FQ2_SFT) |
1300 (RT5645_CP_FQ_192_KHZ << RT5645_CP_FQ3_SFT));
1301 }
1302 regmap_write(rt5645->regmap,
1303 RT5645_PR_BASE + RT5645_MAMP_INT_REG2, 0xfc00);
1304 snd_soc_update_bits(codec, RT5645_DEPOP_M1,
1305 RT5645_SMT_TRIG_MASK, RT5645_SMT_TRIG_EN);
1306 snd_soc_update_bits(codec, RT5645_DEPOP_M1,
1307 RT5645_RSTN_MASK, RT5645_RSTN_EN);
1308 snd_soc_update_bits(codec, RT5645_DEPOP_M1,
1309 RT5645_RSTN_MASK | RT5645_HP_L_SMT_MASK |
1310 RT5645_HP_R_SMT_MASK, RT5645_RSTN_DIS |
1311 RT5645_HP_L_SMT_EN | RT5645_HP_R_SMT_EN);
1312 msleep(40);
1313 snd_soc_update_bits(codec, RT5645_DEPOP_M1,
1314 RT5645_HP_SG_MASK | RT5645_HP_L_SMT_MASK |
1315 RT5645_HP_R_SMT_MASK, RT5645_HP_SG_DIS |
1316 RT5645_HP_L_SMT_DIS | RT5645_HP_R_SMT_DIS);
1317 break;
1318
1319 case SND_SOC_DAPM_PRE_PMD:
1320 /* headphone mute sequence */
1321 if (rt5645->codec_type == CODEC_TYPE_RT5650) {
1322 snd_soc_write(codec, RT5645_DEPOP_M3, 0x0737);
1323 } else {
1324 snd_soc_update_bits(codec, RT5645_DEPOP_M3,
1325 RT5645_CP_FQ1_MASK | RT5645_CP_FQ2_MASK |
1326 RT5645_CP_FQ3_MASK,
1327 (RT5645_CP_FQ_96_KHZ << RT5645_CP_FQ1_SFT) |
1328 (RT5645_CP_FQ_12_KHZ << RT5645_CP_FQ2_SFT) |
1329 (RT5645_CP_FQ_96_KHZ << RT5645_CP_FQ3_SFT));
1330 }
1331 regmap_write(rt5645->regmap,
1332 RT5645_PR_BASE + RT5645_MAMP_INT_REG2, 0xfc00);
1333 snd_soc_update_bits(codec, RT5645_DEPOP_M1,
1334 RT5645_HP_SG_MASK, RT5645_HP_SG_EN);
1335 snd_soc_update_bits(codec, RT5645_DEPOP_M1,
1336 RT5645_RSTP_MASK, RT5645_RSTP_EN);
1337 snd_soc_update_bits(codec, RT5645_DEPOP_M1,
1338 RT5645_RSTP_MASK | RT5645_HP_L_SMT_MASK |
1339 RT5645_HP_R_SMT_MASK, RT5645_RSTP_DIS |
1340 RT5645_HP_L_SMT_EN | RT5645_HP_R_SMT_EN);
1341 msleep(30);
1342 hp_amp_power(codec, 0);
1343 break;
1344
1345 default:
1346 return 0;
1347 }
1348
1349 return 0;
1350 }
1351
1352 static int rt5645_spk_event(struct snd_soc_dapm_widget *w,
1353 struct snd_kcontrol *kcontrol, int event)
1354 {
1355 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
1356
1357 switch (event) {
1358 case SND_SOC_DAPM_POST_PMU:
1359 snd_soc_update_bits(codec, RT5645_PWR_DIG1,
1360 RT5645_PWR_CLS_D | RT5645_PWR_CLS_D_R |
1361 RT5645_PWR_CLS_D_L,
1362 RT5645_PWR_CLS_D | RT5645_PWR_CLS_D_R |
1363 RT5645_PWR_CLS_D_L);
1364 break;
1365
1366 case SND_SOC_DAPM_PRE_PMD:
1367 snd_soc_update_bits(codec, RT5645_PWR_DIG1,
1368 RT5645_PWR_CLS_D | RT5645_PWR_CLS_D_R |
1369 RT5645_PWR_CLS_D_L, 0);
1370 break;
1371
1372 default:
1373 return 0;
1374 }
1375
1376 return 0;
1377 }
1378
1379 static int rt5645_lout_event(struct snd_soc_dapm_widget *w,
1380 struct snd_kcontrol *kcontrol, int event)
1381 {
1382 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
1383
1384 switch (event) {
1385 case SND_SOC_DAPM_POST_PMU:
1386 hp_amp_power(codec, 1);
1387 snd_soc_update_bits(codec, RT5645_PWR_ANLG1,
1388 RT5645_PWR_LM, RT5645_PWR_LM);
1389 snd_soc_update_bits(codec, RT5645_LOUT1,
1390 RT5645_L_MUTE | RT5645_R_MUTE, 0);
1391 break;
1392
1393 case SND_SOC_DAPM_PRE_PMD:
1394 snd_soc_update_bits(codec, RT5645_LOUT1,
1395 RT5645_L_MUTE | RT5645_R_MUTE,
1396 RT5645_L_MUTE | RT5645_R_MUTE);
1397 snd_soc_update_bits(codec, RT5645_PWR_ANLG1,
1398 RT5645_PWR_LM, 0);
1399 hp_amp_power(codec, 0);
1400 break;
1401
1402 default:
1403 return 0;
1404 }
1405
1406 return 0;
1407 }
1408
1409 static int rt5645_bst2_event(struct snd_soc_dapm_widget *w,
1410 struct snd_kcontrol *kcontrol, int event)
1411 {
1412 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
1413
1414 switch (event) {
1415 case SND_SOC_DAPM_POST_PMU:
1416 snd_soc_update_bits(codec, RT5645_PWR_ANLG2,
1417 RT5645_PWR_BST2_P, RT5645_PWR_BST2_P);
1418 break;
1419
1420 case SND_SOC_DAPM_PRE_PMD:
1421 snd_soc_update_bits(codec, RT5645_PWR_ANLG2,
1422 RT5645_PWR_BST2_P, 0);
1423 break;
1424
1425 default:
1426 return 0;
1427 }
1428
1429 return 0;
1430 }
1431
1432 static const struct snd_soc_dapm_widget rt5645_dapm_widgets[] = {
1433 SND_SOC_DAPM_SUPPLY("LDO2", RT5645_PWR_MIXER,
1434 RT5645_PWR_LDO2_BIT, 0, NULL, 0),
1435 SND_SOC_DAPM_SUPPLY("PLL1", RT5645_PWR_ANLG2,
1436 RT5645_PWR_PLL_BIT, 0, NULL, 0),
1437
1438 SND_SOC_DAPM_SUPPLY("JD Power", RT5645_PWR_ANLG2,
1439 RT5645_PWR_JD1_BIT, 0, NULL, 0),
1440 SND_SOC_DAPM_SUPPLY("Mic Det Power", RT5645_PWR_VOL,
1441 RT5645_PWR_MIC_DET_BIT, 0, NULL, 0),
1442
1443 /* ASRC */
1444 SND_SOC_DAPM_SUPPLY_S("I2S1 ASRC", 1, RT5645_ASRC_1,
1445 11, 0, NULL, 0),
1446 SND_SOC_DAPM_SUPPLY_S("I2S2 ASRC", 1, RT5645_ASRC_1,
1447 12, 0, NULL, 0),
1448 SND_SOC_DAPM_SUPPLY_S("DAC STO ASRC", 1, RT5645_ASRC_1,
1449 10, 0, NULL, 0),
1450 SND_SOC_DAPM_SUPPLY_S("DAC MONO L ASRC", 1, RT5645_ASRC_1,
1451 9, 0, NULL, 0),
1452 SND_SOC_DAPM_SUPPLY_S("DAC MONO R ASRC", 1, RT5645_ASRC_1,
1453 8, 0, NULL, 0),
1454 SND_SOC_DAPM_SUPPLY_S("DMIC STO1 ASRC", 1, RT5645_ASRC_1,
1455 7, 0, NULL, 0),
1456 SND_SOC_DAPM_SUPPLY_S("DMIC MONO L ASRC", 1, RT5645_ASRC_1,
1457 5, 0, NULL, 0),
1458 SND_SOC_DAPM_SUPPLY_S("DMIC MONO R ASRC", 1, RT5645_ASRC_1,
1459 4, 0, NULL, 0),
1460 SND_SOC_DAPM_SUPPLY_S("ADC STO1 ASRC", 1, RT5645_ASRC_1,
1461 3, 0, NULL, 0),
1462 SND_SOC_DAPM_SUPPLY_S("ADC MONO L ASRC", 1, RT5645_ASRC_1,
1463 1, 0, NULL, 0),
1464 SND_SOC_DAPM_SUPPLY_S("ADC MONO R ASRC", 1, RT5645_ASRC_1,
1465 0, 0, NULL, 0),
1466
1467 /* Input Side */
1468 /* micbias */
1469 SND_SOC_DAPM_MICBIAS("micbias1", RT5645_PWR_ANLG2,
1470 RT5645_PWR_MB1_BIT, 0),
1471 SND_SOC_DAPM_MICBIAS("micbias2", RT5645_PWR_ANLG2,
1472 RT5645_PWR_MB2_BIT, 0),
1473 /* Input Lines */
1474 SND_SOC_DAPM_INPUT("DMIC L1"),
1475 SND_SOC_DAPM_INPUT("DMIC R1"),
1476 SND_SOC_DAPM_INPUT("DMIC L2"),
1477 SND_SOC_DAPM_INPUT("DMIC R2"),
1478
1479 SND_SOC_DAPM_INPUT("IN1P"),
1480 SND_SOC_DAPM_INPUT("IN1N"),
1481 SND_SOC_DAPM_INPUT("IN2P"),
1482 SND_SOC_DAPM_INPUT("IN2N"),
1483
1484 SND_SOC_DAPM_INPUT("Haptic Generator"),
1485
1486 SND_SOC_DAPM_PGA("DMIC1", SND_SOC_NOPM, 0, 0, NULL, 0),
1487 SND_SOC_DAPM_PGA("DMIC2", SND_SOC_NOPM, 0, 0, NULL, 0),
1488 SND_SOC_DAPM_SUPPLY("DMIC CLK", SND_SOC_NOPM, 0, 0,
1489 set_dmic_clk, SND_SOC_DAPM_PRE_PMU),
1490 SND_SOC_DAPM_SUPPLY("DMIC1 Power", RT5645_DMIC_CTRL1,
1491 RT5645_DMIC_1_EN_SFT, 0, NULL, 0),
1492 SND_SOC_DAPM_SUPPLY("DMIC2 Power", RT5645_DMIC_CTRL1,
1493 RT5645_DMIC_2_EN_SFT, 0, NULL, 0),
1494 /* Boost */
1495 SND_SOC_DAPM_PGA("BST1", RT5645_PWR_ANLG2,
1496 RT5645_PWR_BST1_BIT, 0, NULL, 0),
1497 SND_SOC_DAPM_PGA_E("BST2", RT5645_PWR_ANLG2,
1498 RT5645_PWR_BST2_BIT, 0, NULL, 0, rt5645_bst2_event,
1499 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
1500 /* Input Volume */
1501 SND_SOC_DAPM_PGA("INL VOL", RT5645_PWR_VOL,
1502 RT5645_PWR_IN_L_BIT, 0, NULL, 0),
1503 SND_SOC_DAPM_PGA("INR VOL", RT5645_PWR_VOL,
1504 RT5645_PWR_IN_R_BIT, 0, NULL, 0),
1505 /* REC Mixer */
1506 SND_SOC_DAPM_MIXER("RECMIXL", RT5645_PWR_MIXER, RT5645_PWR_RM_L_BIT,
1507 0, rt5645_rec_l_mix, ARRAY_SIZE(rt5645_rec_l_mix)),
1508 SND_SOC_DAPM_MIXER("RECMIXR", RT5645_PWR_MIXER, RT5645_PWR_RM_R_BIT,
1509 0, rt5645_rec_r_mix, ARRAY_SIZE(rt5645_rec_r_mix)),
1510 /* ADCs */
1511 SND_SOC_DAPM_ADC("ADC L", NULL, SND_SOC_NOPM, 0, 0),
1512 SND_SOC_DAPM_ADC("ADC R", NULL, SND_SOC_NOPM, 0, 0),
1513
1514 SND_SOC_DAPM_SUPPLY("ADC L power", RT5645_PWR_DIG1,
1515 RT5645_PWR_ADC_L_BIT, 0, NULL, 0),
1516 SND_SOC_DAPM_SUPPLY("ADC R power", RT5645_PWR_DIG1,
1517 RT5645_PWR_ADC_R_BIT, 0, NULL, 0),
1518
1519 /* ADC Mux */
1520 SND_SOC_DAPM_MUX("Stereo1 DMIC Mux", SND_SOC_NOPM, 0, 0,
1521 &rt5645_sto1_dmic_mux),
1522 SND_SOC_DAPM_MUX("Stereo1 ADC L2 Mux", SND_SOC_NOPM, 0, 0,
1523 &rt5645_sto_adc2_mux),
1524 SND_SOC_DAPM_MUX("Stereo1 ADC R2 Mux", SND_SOC_NOPM, 0, 0,
1525 &rt5645_sto_adc2_mux),
1526 SND_SOC_DAPM_MUX("Stereo1 ADC L1 Mux", SND_SOC_NOPM, 0, 0,
1527 &rt5645_sto_adc1_mux),
1528 SND_SOC_DAPM_MUX("Stereo1 ADC R1 Mux", SND_SOC_NOPM, 0, 0,
1529 &rt5645_sto_adc1_mux),
1530 SND_SOC_DAPM_MUX("Mono DMIC L Mux", SND_SOC_NOPM, 0, 0,
1531 &rt5645_mono_dmic_l_mux),
1532 SND_SOC_DAPM_MUX("Mono DMIC R Mux", SND_SOC_NOPM, 0, 0,
1533 &rt5645_mono_dmic_r_mux),
1534 SND_SOC_DAPM_MUX("Mono ADC L2 Mux", SND_SOC_NOPM, 0, 0,
1535 &rt5645_mono_adc_l2_mux),
1536 SND_SOC_DAPM_MUX("Mono ADC L1 Mux", SND_SOC_NOPM, 0, 0,
1537 &rt5645_mono_adc_l1_mux),
1538 SND_SOC_DAPM_MUX("Mono ADC R1 Mux", SND_SOC_NOPM, 0, 0,
1539 &rt5645_mono_adc_r1_mux),
1540 SND_SOC_DAPM_MUX("Mono ADC R2 Mux", SND_SOC_NOPM, 0, 0,
1541 &rt5645_mono_adc_r2_mux),
1542 /* ADC Mixer */
1543
1544 SND_SOC_DAPM_SUPPLY_S("adc stereo1 filter", 1, RT5645_PWR_DIG2,
1545 RT5645_PWR_ADC_S1F_BIT, 0, NULL, 0),
1546 SND_SOC_DAPM_MIXER_E("Sto1 ADC MIXL", SND_SOC_NOPM, 0, 0,
1547 rt5645_sto1_adc_l_mix, ARRAY_SIZE(rt5645_sto1_adc_l_mix),
1548 NULL, 0),
1549 SND_SOC_DAPM_MIXER_E("Sto1 ADC MIXR", SND_SOC_NOPM, 0, 0,
1550 rt5645_sto1_adc_r_mix, ARRAY_SIZE(rt5645_sto1_adc_r_mix),
1551 NULL, 0),
1552 SND_SOC_DAPM_SUPPLY_S("adc mono left filter", 1, RT5645_PWR_DIG2,
1553 RT5645_PWR_ADC_MF_L_BIT, 0, NULL, 0),
1554 SND_SOC_DAPM_MIXER_E("Mono ADC MIXL", SND_SOC_NOPM, 0, 0,
1555 rt5645_mono_adc_l_mix, ARRAY_SIZE(rt5645_mono_adc_l_mix),
1556 NULL, 0),
1557 SND_SOC_DAPM_SUPPLY_S("adc mono right filter", 1, RT5645_PWR_DIG2,
1558 RT5645_PWR_ADC_MF_R_BIT, 0, NULL, 0),
1559 SND_SOC_DAPM_MIXER_E("Mono ADC MIXR", SND_SOC_NOPM, 0, 0,
1560 rt5645_mono_adc_r_mix, ARRAY_SIZE(rt5645_mono_adc_r_mix),
1561 NULL, 0),
1562
1563 /* ADC PGA */
1564 SND_SOC_DAPM_PGA("Stereo1 ADC MIXL", SND_SOC_NOPM, 0, 0, NULL, 0),
1565 SND_SOC_DAPM_PGA("Stereo1 ADC MIXR", SND_SOC_NOPM, 0, 0, NULL, 0),
1566 SND_SOC_DAPM_PGA("Sto2 ADC LR MIX", SND_SOC_NOPM, 0, 0, NULL, 0),
1567 SND_SOC_DAPM_PGA("VAD_ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
1568 SND_SOC_DAPM_PGA("IF_ADC1", SND_SOC_NOPM, 0, 0, NULL, 0),
1569 SND_SOC_DAPM_PGA("IF_ADC2", SND_SOC_NOPM, 0, 0, NULL, 0),
1570 SND_SOC_DAPM_PGA("IF1_ADC1", SND_SOC_NOPM, 0, 0, NULL, 0),
1571 SND_SOC_DAPM_PGA("IF1_ADC2", SND_SOC_NOPM, 0, 0, NULL, 0),
1572 SND_SOC_DAPM_PGA("IF1_ADC3", SND_SOC_NOPM, 0, 0, NULL, 0),
1573 SND_SOC_DAPM_PGA("IF1_ADC4", SND_SOC_NOPM, 0, 0, NULL, 0),
1574
1575 /* IF1 2 Mux */
1576 SND_SOC_DAPM_MUX("IF1 ADC Mux", SND_SOC_NOPM,
1577 0, 0, &rt5645_if1_adc_in_mux),
1578 SND_SOC_DAPM_MUX("IF2 ADC Mux", SND_SOC_NOPM,
1579 0, 0, &rt5645_if2_adc_in_mux),
1580
1581 /* Digital Interface */
1582 SND_SOC_DAPM_SUPPLY("I2S1", RT5645_PWR_DIG1,
1583 RT5645_PWR_I2S1_BIT, 0, NULL, 0),
1584 SND_SOC_DAPM_PGA("IF1 DAC1", SND_SOC_NOPM, 0, 0, NULL, 0),
1585 SND_SOC_DAPM_PGA("IF1 DAC2", SND_SOC_NOPM, 0, 0, NULL, 0),
1586 SND_SOC_DAPM_PGA("IF1 DAC1 L", SND_SOC_NOPM, 0, 0, NULL, 0),
1587 SND_SOC_DAPM_PGA("IF1 DAC1 R", SND_SOC_NOPM, 0, 0, NULL, 0),
1588 SND_SOC_DAPM_PGA("IF1 DAC2 L", SND_SOC_NOPM, 0, 0, NULL, 0),
1589 SND_SOC_DAPM_PGA("IF1 DAC2 R", SND_SOC_NOPM, 0, 0, NULL, 0),
1590 SND_SOC_DAPM_PGA("IF1 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
1591 SND_SOC_DAPM_PGA("IF1 ADC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1592 SND_SOC_DAPM_PGA("IF1 ADC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1593 SND_SOC_DAPM_SUPPLY("I2S2", RT5645_PWR_DIG1,
1594 RT5645_PWR_I2S2_BIT, 0, NULL, 0),
1595 SND_SOC_DAPM_PGA("IF2 DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
1596 SND_SOC_DAPM_PGA("IF2 DAC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1597 SND_SOC_DAPM_PGA("IF2 DAC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1598 SND_SOC_DAPM_PGA("IF2 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
1599
1600 /* Digital Interface Select */
1601 SND_SOC_DAPM_MUX("VAD ADC Mux", SND_SOC_NOPM,
1602 0, 0, &rt5645_vad_adc_mux),
1603
1604 /* Audio Interface */
1605 SND_SOC_DAPM_AIF_IN("AIF1RX", "AIF1 Playback", 0, SND_SOC_NOPM, 0, 0),
1606 SND_SOC_DAPM_AIF_OUT("AIF1TX", "AIF1 Capture", 0, SND_SOC_NOPM, 0, 0),
1607 SND_SOC_DAPM_AIF_IN("AIF2RX", "AIF2 Playback", 0, SND_SOC_NOPM, 0, 0),
1608 SND_SOC_DAPM_AIF_OUT("AIF2TX", "AIF2 Capture", 0, SND_SOC_NOPM, 0, 0),
1609
1610 /* Output Side */
1611 /* DAC mixer before sound effect */
1612 SND_SOC_DAPM_MIXER("DAC1 MIXL", SND_SOC_NOPM, 0, 0,
1613 rt5645_dac_l_mix, ARRAY_SIZE(rt5645_dac_l_mix)),
1614 SND_SOC_DAPM_MIXER("DAC1 MIXR", SND_SOC_NOPM, 0, 0,
1615 rt5645_dac_r_mix, ARRAY_SIZE(rt5645_dac_r_mix)),
1616
1617 /* DAC2 channel Mux */
1618 SND_SOC_DAPM_MUX("DAC L2 Mux", SND_SOC_NOPM, 0, 0, &rt5645_dac_l2_mux),
1619 SND_SOC_DAPM_MUX("DAC R2 Mux", SND_SOC_NOPM, 0, 0, &rt5645_dac_r2_mux),
1620 SND_SOC_DAPM_PGA("DAC L2 Volume", RT5645_PWR_DIG1,
1621 RT5645_PWR_DAC_L2_BIT, 0, NULL, 0),
1622 SND_SOC_DAPM_PGA("DAC R2 Volume", RT5645_PWR_DIG1,
1623 RT5645_PWR_DAC_R2_BIT, 0, NULL, 0),
1624
1625 SND_SOC_DAPM_MUX("DAC1 L Mux", SND_SOC_NOPM, 0, 0, &rt5645_dac1l_mux),
1626 SND_SOC_DAPM_MUX("DAC1 R Mux", SND_SOC_NOPM, 0, 0, &rt5645_dac1r_mux),
1627
1628 /* DAC Mixer */
1629 SND_SOC_DAPM_SUPPLY_S("dac stereo1 filter", 1, RT5645_PWR_DIG2,
1630 RT5645_PWR_DAC_S1F_BIT, 0, NULL, 0),
1631 SND_SOC_DAPM_SUPPLY_S("dac mono left filter", 1, RT5645_PWR_DIG2,
1632 RT5645_PWR_DAC_MF_L_BIT, 0, NULL, 0),
1633 SND_SOC_DAPM_SUPPLY_S("dac mono right filter", 1, RT5645_PWR_DIG2,
1634 RT5645_PWR_DAC_MF_R_BIT, 0, NULL, 0),
1635 SND_SOC_DAPM_MIXER("Stereo DAC MIXL", SND_SOC_NOPM, 0, 0,
1636 rt5645_sto_dac_l_mix, ARRAY_SIZE(rt5645_sto_dac_l_mix)),
1637 SND_SOC_DAPM_MIXER("Stereo DAC MIXR", SND_SOC_NOPM, 0, 0,
1638 rt5645_sto_dac_r_mix, ARRAY_SIZE(rt5645_sto_dac_r_mix)),
1639 SND_SOC_DAPM_MIXER("Mono DAC MIXL", SND_SOC_NOPM, 0, 0,
1640 rt5645_mono_dac_l_mix, ARRAY_SIZE(rt5645_mono_dac_l_mix)),
1641 SND_SOC_DAPM_MIXER("Mono DAC MIXR", SND_SOC_NOPM, 0, 0,
1642 rt5645_mono_dac_r_mix, ARRAY_SIZE(rt5645_mono_dac_r_mix)),
1643 SND_SOC_DAPM_MIXER("DAC MIXL", SND_SOC_NOPM, 0, 0,
1644 rt5645_dig_l_mix, ARRAY_SIZE(rt5645_dig_l_mix)),
1645 SND_SOC_DAPM_MIXER("DAC MIXR", SND_SOC_NOPM, 0, 0,
1646 rt5645_dig_r_mix, ARRAY_SIZE(rt5645_dig_r_mix)),
1647
1648 /* DACs */
1649 SND_SOC_DAPM_DAC("DAC L1", NULL, RT5645_PWR_DIG1, RT5645_PWR_DAC_L1_BIT,
1650 0),
1651 SND_SOC_DAPM_DAC("DAC L2", NULL, RT5645_PWR_DIG1, RT5645_PWR_DAC_L2_BIT,
1652 0),
1653 SND_SOC_DAPM_DAC("DAC R1", NULL, RT5645_PWR_DIG1, RT5645_PWR_DAC_R1_BIT,
1654 0),
1655 SND_SOC_DAPM_DAC("DAC R2", NULL, RT5645_PWR_DIG1, RT5645_PWR_DAC_R2_BIT,
1656 0),
1657 /* OUT Mixer */
1658 SND_SOC_DAPM_MIXER("SPK MIXL", RT5645_PWR_MIXER, RT5645_PWR_SM_L_BIT,
1659 0, rt5645_spk_l_mix, ARRAY_SIZE(rt5645_spk_l_mix)),
1660 SND_SOC_DAPM_MIXER("SPK MIXR", RT5645_PWR_MIXER, RT5645_PWR_SM_R_BIT,
1661 0, rt5645_spk_r_mix, ARRAY_SIZE(rt5645_spk_r_mix)),
1662 SND_SOC_DAPM_MIXER("OUT MIXL", RT5645_PWR_MIXER, RT5645_PWR_OM_L_BIT,
1663 0, rt5645_out_l_mix, ARRAY_SIZE(rt5645_out_l_mix)),
1664 SND_SOC_DAPM_MIXER("OUT MIXR", RT5645_PWR_MIXER, RT5645_PWR_OM_R_BIT,
1665 0, rt5645_out_r_mix, ARRAY_SIZE(rt5645_out_r_mix)),
1666 /* Ouput Volume */
1667 SND_SOC_DAPM_SWITCH("SPKVOL L", RT5645_PWR_VOL, RT5645_PWR_SV_L_BIT, 0,
1668 &spk_l_vol_control),
1669 SND_SOC_DAPM_SWITCH("SPKVOL R", RT5645_PWR_VOL, RT5645_PWR_SV_R_BIT, 0,
1670 &spk_r_vol_control),
1671 SND_SOC_DAPM_MIXER("HPOVOL MIXL", RT5645_PWR_VOL, RT5645_PWR_HV_L_BIT,
1672 0, rt5645_hpvoll_mix, ARRAY_SIZE(rt5645_hpvoll_mix)),
1673 SND_SOC_DAPM_MIXER("HPOVOL MIXR", RT5645_PWR_VOL, RT5645_PWR_HV_R_BIT,
1674 0, rt5645_hpvolr_mix, ARRAY_SIZE(rt5645_hpvolr_mix)),
1675 SND_SOC_DAPM_SUPPLY("HPOVOL MIXL Power", RT5645_PWR_MIXER,
1676 RT5645_PWR_HM_L_BIT, 0, NULL, 0),
1677 SND_SOC_DAPM_SUPPLY("HPOVOL MIXR Power", RT5645_PWR_MIXER,
1678 RT5645_PWR_HM_R_BIT, 0, NULL, 0),
1679 SND_SOC_DAPM_PGA("DAC 1", SND_SOC_NOPM, 0, 0, NULL, 0),
1680 SND_SOC_DAPM_PGA("DAC 2", SND_SOC_NOPM, 0, 0, NULL, 0),
1681 SND_SOC_DAPM_PGA("HPOVOL", SND_SOC_NOPM, 0, 0, NULL, 0),
1682 SND_SOC_DAPM_SWITCH("HPOVOL L", SND_SOC_NOPM, 0, 0, &hp_l_vol_control),
1683 SND_SOC_DAPM_SWITCH("HPOVOL R", SND_SOC_NOPM, 0, 0, &hp_r_vol_control),
1684
1685 /* HPO/LOUT/Mono Mixer */
1686 SND_SOC_DAPM_MIXER("SPOL MIX", SND_SOC_NOPM, 0, 0, rt5645_spo_l_mix,
1687 ARRAY_SIZE(rt5645_spo_l_mix)),
1688 SND_SOC_DAPM_MIXER("SPOR MIX", SND_SOC_NOPM, 0, 0, rt5645_spo_r_mix,
1689 ARRAY_SIZE(rt5645_spo_r_mix)),
1690 SND_SOC_DAPM_MIXER("HPO MIX", SND_SOC_NOPM, 0, 0, rt5645_hpo_mix,
1691 ARRAY_SIZE(rt5645_hpo_mix)),
1692 SND_SOC_DAPM_MIXER("LOUT MIX", SND_SOC_NOPM, 0, 0, rt5645_lout_mix,
1693 ARRAY_SIZE(rt5645_lout_mix)),
1694
1695 SND_SOC_DAPM_PGA_S("HP amp", 1, SND_SOC_NOPM, 0, 0, rt5645_hp_event,
1696 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
1697 SND_SOC_DAPM_PGA_S("LOUT amp", 1, SND_SOC_NOPM, 0, 0, rt5645_lout_event,
1698 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
1699 SND_SOC_DAPM_PGA_S("SPK amp", 2, SND_SOC_NOPM, 0, 0, rt5645_spk_event,
1700 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
1701
1702 /* PDM */
1703 SND_SOC_DAPM_SUPPLY("PDM1 Power", RT5645_PWR_DIG2, RT5645_PWR_PDM1_BIT,
1704 0, NULL, 0),
1705 SND_SOC_DAPM_MUX("PDM1 L Mux", SND_SOC_NOPM, 0, 0, &rt5645_pdm1_l_mux),
1706 SND_SOC_DAPM_MUX("PDM1 R Mux", SND_SOC_NOPM, 0, 0, &rt5645_pdm1_r_mux),
1707
1708 SND_SOC_DAPM_SWITCH("PDM1 L", SND_SOC_NOPM, 0, 0, &pdm1_l_vol_control),
1709 SND_SOC_DAPM_SWITCH("PDM1 R", SND_SOC_NOPM, 0, 0, &pdm1_r_vol_control),
1710
1711 /* Output Lines */
1712 SND_SOC_DAPM_OUTPUT("HPOL"),
1713 SND_SOC_DAPM_OUTPUT("HPOR"),
1714 SND_SOC_DAPM_OUTPUT("LOUTL"),
1715 SND_SOC_DAPM_OUTPUT("LOUTR"),
1716 SND_SOC_DAPM_OUTPUT("PDM1L"),
1717 SND_SOC_DAPM_OUTPUT("PDM1R"),
1718 SND_SOC_DAPM_OUTPUT("SPOL"),
1719 SND_SOC_DAPM_OUTPUT("SPOR"),
1720 };
1721
1722 static const struct snd_soc_dapm_widget rt5650_specific_dapm_widgets[] = {
1723 SND_SOC_DAPM_MUX("A DAC1 L Mux", SND_SOC_NOPM,
1724 0, 0, &rt5650_a_dac1_l_mux),
1725 SND_SOC_DAPM_MUX("A DAC1 R Mux", SND_SOC_NOPM,
1726 0, 0, &rt5650_a_dac1_r_mux),
1727 SND_SOC_DAPM_MUX("A DAC2 L Mux", SND_SOC_NOPM,
1728 0, 0, &rt5650_a_dac2_l_mux),
1729 SND_SOC_DAPM_MUX("A DAC2 R Mux", SND_SOC_NOPM,
1730 0, 0, &rt5650_a_dac2_r_mux),
1731 };
1732
1733 static const struct snd_soc_dapm_route rt5645_dapm_routes[] = {
1734 { "adc stereo1 filter", NULL, "ADC STO1 ASRC", is_using_asrc },
1735 { "adc mono left filter", NULL, "ADC MONO L ASRC", is_using_asrc },
1736 { "adc mono right filter", NULL, "ADC MONO R ASRC", is_using_asrc },
1737 { "dac mono left filter", NULL, "DAC MONO L ASRC", is_using_asrc },
1738 { "dac mono right filter", NULL, "DAC MONO R ASRC", is_using_asrc },
1739 { "dac stereo1 filter", NULL, "DAC STO ASRC", is_using_asrc },
1740
1741 { "I2S1", NULL, "I2S1 ASRC" },
1742 { "I2S2", NULL, "I2S2 ASRC" },
1743
1744 { "IN1P", NULL, "LDO2" },
1745 { "IN2P", NULL, "LDO2" },
1746
1747 { "DMIC1", NULL, "DMIC L1" },
1748 { "DMIC1", NULL, "DMIC R1" },
1749 { "DMIC2", NULL, "DMIC L2" },
1750 { "DMIC2", NULL, "DMIC R2" },
1751
1752 { "BST1", NULL, "IN1P" },
1753 { "BST1", NULL, "IN1N" },
1754 { "BST1", NULL, "JD Power" },
1755 { "BST1", NULL, "Mic Det Power" },
1756 { "BST2", NULL, "IN2P" },
1757 { "BST2", NULL, "IN2N" },
1758
1759 { "INL VOL", NULL, "IN2P" },
1760 { "INR VOL", NULL, "IN2N" },
1761
1762 { "RECMIXL", "HPOL Switch", "HPOL" },
1763 { "RECMIXL", "INL Switch", "INL VOL" },
1764 { "RECMIXL", "BST2 Switch", "BST2" },
1765 { "RECMIXL", "BST1 Switch", "BST1" },
1766 { "RECMIXL", "OUT MIXL Switch", "OUT MIXL" },
1767
1768 { "RECMIXR", "HPOR Switch", "HPOR" },
1769 { "RECMIXR", "INR Switch", "INR VOL" },
1770 { "RECMIXR", "BST2 Switch", "BST2" },
1771 { "RECMIXR", "BST1 Switch", "BST1" },
1772 { "RECMIXR", "OUT MIXR Switch", "OUT MIXR" },
1773
1774 { "ADC L", NULL, "RECMIXL" },
1775 { "ADC L", NULL, "ADC L power" },
1776 { "ADC R", NULL, "RECMIXR" },
1777 { "ADC R", NULL, "ADC R power" },
1778
1779 {"DMIC L1", NULL, "DMIC CLK"},
1780 {"DMIC L1", NULL, "DMIC1 Power"},
1781 {"DMIC R1", NULL, "DMIC CLK"},
1782 {"DMIC R1", NULL, "DMIC1 Power"},
1783 {"DMIC L2", NULL, "DMIC CLK"},
1784 {"DMIC L2", NULL, "DMIC2 Power"},
1785 {"DMIC R2", NULL, "DMIC CLK"},
1786 {"DMIC R2", NULL, "DMIC2 Power"},
1787
1788 { "Stereo1 DMIC Mux", "DMIC1", "DMIC1" },
1789 { "Stereo1 DMIC Mux", "DMIC2", "DMIC2" },
1790 { "Stereo1 DMIC Mux", NULL, "DMIC STO1 ASRC" },
1791
1792 { "Mono DMIC L Mux", "DMIC1", "DMIC L1" },
1793 { "Mono DMIC L Mux", "DMIC2", "DMIC L2" },
1794 { "Mono DMIC L Mux", NULL, "DMIC MONO L ASRC" },
1795
1796 { "Mono DMIC R Mux", "DMIC1", "DMIC R1" },
1797 { "Mono DMIC R Mux", "DMIC2", "DMIC R2" },
1798 { "Mono DMIC R Mux", NULL, "DMIC MONO R ASRC" },
1799
1800 { "Stereo1 ADC L2 Mux", "DMIC", "Stereo1 DMIC Mux" },
1801 { "Stereo1 ADC L2 Mux", "DAC MIX", "DAC MIXL" },
1802 { "Stereo1 ADC L1 Mux", "ADC", "ADC L" },
1803 { "Stereo1 ADC L1 Mux", "DAC MIX", "DAC MIXL" },
1804
1805 { "Stereo1 ADC R1 Mux", "ADC", "ADC R" },
1806 { "Stereo1 ADC R1 Mux", "DAC MIX", "DAC MIXR" },
1807 { "Stereo1 ADC R2 Mux", "DMIC", "Stereo1 DMIC Mux" },
1808 { "Stereo1 ADC R2 Mux", "DAC MIX", "DAC MIXR" },
1809
1810 { "Mono ADC L2 Mux", "DMIC", "Mono DMIC L Mux" },
1811 { "Mono ADC L2 Mux", "Mono DAC MIXL", "Mono DAC MIXL" },
1812 { "Mono ADC L1 Mux", "Mono DAC MIXL", "Mono DAC MIXL" },
1813 { "Mono ADC L1 Mux", "ADC", "ADC L" },
1814
1815 { "Mono ADC R1 Mux", "Mono DAC MIXR", "Mono DAC MIXR" },
1816 { "Mono ADC R1 Mux", "ADC", "ADC R" },
1817 { "Mono ADC R2 Mux", "DMIC", "Mono DMIC R Mux" },
1818 { "Mono ADC R2 Mux", "Mono DAC MIXR", "Mono DAC MIXR" },
1819
1820 { "Sto1 ADC MIXL", "ADC1 Switch", "Stereo1 ADC L1 Mux" },
1821 { "Sto1 ADC MIXL", "ADC2 Switch", "Stereo1 ADC L2 Mux" },
1822 { "Sto1 ADC MIXR", "ADC1 Switch", "Stereo1 ADC R1 Mux" },
1823 { "Sto1 ADC MIXR", "ADC2 Switch", "Stereo1 ADC R2 Mux" },
1824
1825 { "Stereo1 ADC MIXL", NULL, "Sto1 ADC MIXL" },
1826 { "Stereo1 ADC MIXL", NULL, "adc stereo1 filter" },
1827 { "adc stereo1 filter", NULL, "PLL1", is_sys_clk_from_pll },
1828
1829 { "Stereo1 ADC MIXR", NULL, "Sto1 ADC MIXR" },
1830 { "Stereo1 ADC MIXR", NULL, "adc stereo1 filter" },
1831 { "adc stereo1 filter", NULL, "PLL1", is_sys_clk_from_pll },
1832
1833 { "Mono ADC MIXL", "ADC1 Switch", "Mono ADC L1 Mux" },
1834 { "Mono ADC MIXL", "ADC2 Switch", "Mono ADC L2 Mux" },
1835 { "Mono ADC MIXL", NULL, "adc mono left filter" },
1836 { "adc mono left filter", NULL, "PLL1", is_sys_clk_from_pll },
1837
1838 { "Mono ADC MIXR", "ADC1 Switch", "Mono ADC R1 Mux" },
1839 { "Mono ADC MIXR", "ADC2 Switch", "Mono ADC R2 Mux" },
1840 { "Mono ADC MIXR", NULL, "adc mono right filter" },
1841 { "adc mono right filter", NULL, "PLL1", is_sys_clk_from_pll },
1842
1843 { "VAD ADC Mux", "Sto1 ADC L", "Stereo1 ADC MIXL" },
1844 { "VAD ADC Mux", "Mono ADC L", "Mono ADC MIXL" },
1845 { "VAD ADC Mux", "Mono ADC R", "Mono ADC MIXR" },
1846
1847 { "IF_ADC1", NULL, "Stereo1 ADC MIXL" },
1848 { "IF_ADC1", NULL, "Stereo1 ADC MIXR" },
1849 { "IF_ADC2", NULL, "Mono ADC MIXL" },
1850 { "IF_ADC2", NULL, "Mono ADC MIXR" },
1851 { "VAD_ADC", NULL, "VAD ADC Mux" },
1852
1853 { "IF1 ADC Mux", "IF_ADC1", "IF_ADC1" },
1854 { "IF1 ADC Mux", "IF_ADC2", "IF_ADC2" },
1855 { "IF1 ADC Mux", "VAD_ADC", "VAD_ADC" },
1856
1857 { "IF2 ADC Mux", "IF_ADC1", "IF_ADC1" },
1858 { "IF2 ADC Mux", "IF_ADC2", "IF_ADC2" },
1859 { "IF2 ADC Mux", "VAD_ADC", "VAD_ADC" },
1860
1861 { "IF1 ADC", NULL, "I2S1" },
1862 { "IF1 ADC", NULL, "IF1 ADC Mux" },
1863 { "IF2 ADC", NULL, "I2S2" },
1864 { "IF2 ADC", NULL, "IF2 ADC Mux" },
1865
1866 { "AIF1TX", NULL, "IF1 ADC" },
1867 { "AIF1TX", NULL, "IF2 ADC" },
1868 { "AIF2TX", NULL, "IF2 ADC" },
1869
1870 { "IF1 DAC1", NULL, "AIF1RX" },
1871 { "IF1 DAC2", NULL, "AIF1RX" },
1872 { "IF2 DAC", NULL, "AIF2RX" },
1873
1874 { "IF1 DAC1", NULL, "I2S1" },
1875 { "IF1 DAC2", NULL, "I2S1" },
1876 { "IF2 DAC", NULL, "I2S2" },
1877
1878 { "IF1 DAC2 L", NULL, "IF1 DAC2" },
1879 { "IF1 DAC2 R", NULL, "IF1 DAC2" },
1880 { "IF1 DAC1 L", NULL, "IF1 DAC1" },
1881 { "IF1 DAC1 R", NULL, "IF1 DAC1" },
1882 { "IF2 DAC L", NULL, "IF2 DAC" },
1883 { "IF2 DAC R", NULL, "IF2 DAC" },
1884
1885 { "DAC1 L Mux", "IF1 DAC", "IF1 DAC1 L" },
1886 { "DAC1 L Mux", "IF2 DAC", "IF2 DAC L" },
1887
1888 { "DAC1 R Mux", "IF1 DAC", "IF1 DAC1 R" },
1889 { "DAC1 R Mux", "IF2 DAC", "IF2 DAC R" },
1890
1891 { "DAC1 MIXL", "Stereo ADC Switch", "Stereo1 ADC MIXL" },
1892 { "DAC1 MIXL", "DAC1 Switch", "DAC1 L Mux" },
1893 { "DAC1 MIXL", NULL, "dac stereo1 filter" },
1894 { "DAC1 MIXR", "Stereo ADC Switch", "Stereo1 ADC MIXR" },
1895 { "DAC1 MIXR", "DAC1 Switch", "DAC1 R Mux" },
1896 { "DAC1 MIXR", NULL, "dac stereo1 filter" },
1897
1898 { "DAC L2 Mux", "IF1 DAC", "IF1 DAC2 L" },
1899 { "DAC L2 Mux", "IF2 DAC", "IF2 DAC L" },
1900 { "DAC L2 Mux", "Mono ADC", "Mono ADC MIXL" },
1901 { "DAC L2 Mux", "VAD_ADC", "VAD_ADC" },
1902 { "DAC L2 Volume", NULL, "DAC L2 Mux" },
1903 { "DAC L2 Volume", NULL, "dac mono left filter" },
1904
1905 { "DAC R2 Mux", "IF1 DAC", "IF1 DAC2 R" },
1906 { "DAC R2 Mux", "IF2 DAC", "IF2 DAC R" },
1907 { "DAC R2 Mux", "Mono ADC", "Mono ADC MIXR" },
1908 { "DAC R2 Mux", "Haptic", "Haptic Generator" },
1909 { "DAC R2 Volume", NULL, "DAC R2 Mux" },
1910 { "DAC R2 Volume", NULL, "dac mono right filter" },
1911
1912 { "Stereo DAC MIXL", "DAC L1 Switch", "DAC1 MIXL" },
1913 { "Stereo DAC MIXL", "DAC R1 Switch", "DAC1 MIXR" },
1914 { "Stereo DAC MIXL", "DAC L2 Switch", "DAC L2 Volume" },
1915 { "Stereo DAC MIXL", NULL, "dac stereo1 filter" },
1916 { "Stereo DAC MIXR", "DAC R1 Switch", "DAC1 MIXR" },
1917 { "Stereo DAC MIXR", "DAC L1 Switch", "DAC1 MIXL" },
1918 { "Stereo DAC MIXR", "DAC R2 Switch", "DAC R2 Volume" },
1919 { "Stereo DAC MIXR", NULL, "dac stereo1 filter" },
1920
1921 { "Mono DAC MIXL", "DAC L1 Switch", "DAC1 MIXL" },
1922 { "Mono DAC MIXL", "DAC L2 Switch", "DAC L2 Volume" },
1923 { "Mono DAC MIXL", "DAC R2 Switch", "DAC R2 Volume" },
1924 { "Mono DAC MIXL", NULL, "dac mono left filter" },
1925 { "Mono DAC MIXR", "DAC R1 Switch", "DAC1 MIXR" },
1926 { "Mono DAC MIXR", "DAC R2 Switch", "DAC R2 Volume" },
1927 { "Mono DAC MIXR", "DAC L2 Switch", "DAC L2 Volume" },
1928 { "Mono DAC MIXR", NULL, "dac mono right filter" },
1929
1930 { "DAC MIXL", "Sto DAC Mix L Switch", "Stereo DAC MIXL" },
1931 { "DAC MIXL", "DAC L2 Switch", "DAC L2 Volume" },
1932 { "DAC MIXL", "DAC R2 Switch", "DAC R2 Volume" },
1933 { "DAC MIXR", "Sto DAC Mix R Switch", "Stereo DAC MIXR" },
1934 { "DAC MIXR", "DAC R2 Switch", "DAC R2 Volume" },
1935 { "DAC MIXR", "DAC L2 Switch", "DAC L2 Volume" },
1936
1937 { "DAC L1", NULL, "PLL1", is_sys_clk_from_pll },
1938 { "DAC R1", NULL, "PLL1", is_sys_clk_from_pll },
1939 { "DAC L2", NULL, "PLL1", is_sys_clk_from_pll },
1940 { "DAC R2", NULL, "PLL1", is_sys_clk_from_pll },
1941
1942 { "SPK MIXL", "BST1 Switch", "BST1" },
1943 { "SPK MIXL", "INL Switch", "INL VOL" },
1944 { "SPK MIXL", "DAC L1 Switch", "DAC L1" },
1945 { "SPK MIXL", "DAC L2 Switch", "DAC L2" },
1946 { "SPK MIXR", "BST2 Switch", "BST2" },
1947 { "SPK MIXR", "INR Switch", "INR VOL" },
1948 { "SPK MIXR", "DAC R1 Switch", "DAC R1" },
1949 { "SPK MIXR", "DAC R2 Switch", "DAC R2" },
1950
1951 { "OUT MIXL", "BST1 Switch", "BST1" },
1952 { "OUT MIXL", "INL Switch", "INL VOL" },
1953 { "OUT MIXL", "DAC L2 Switch", "DAC L2" },
1954 { "OUT MIXL", "DAC L1 Switch", "DAC L1" },
1955
1956 { "OUT MIXR", "BST2 Switch", "BST2" },
1957 { "OUT MIXR", "INR Switch", "INR VOL" },
1958 { "OUT MIXR", "DAC R2 Switch", "DAC R2" },
1959 { "OUT MIXR", "DAC R1 Switch", "DAC R1" },
1960
1961 { "HPOVOL MIXL", "DAC1 Switch", "DAC L1" },
1962 { "HPOVOL MIXL", "DAC2 Switch", "DAC L2" },
1963 { "HPOVOL MIXL", "INL Switch", "INL VOL" },
1964 { "HPOVOL MIXL", "BST1 Switch", "BST1" },
1965 { "HPOVOL MIXL", NULL, "HPOVOL MIXL Power" },
1966 { "HPOVOL MIXR", "DAC1 Switch", "DAC R1" },
1967 { "HPOVOL MIXR", "DAC2 Switch", "DAC R2" },
1968 { "HPOVOL MIXR", "INR Switch", "INR VOL" },
1969 { "HPOVOL MIXR", "BST2 Switch", "BST2" },
1970 { "HPOVOL MIXR", NULL, "HPOVOL MIXR Power" },
1971
1972 { "DAC 2", NULL, "DAC L2" },
1973 { "DAC 2", NULL, "DAC R2" },
1974 { "DAC 1", NULL, "DAC L1" },
1975 { "DAC 1", NULL, "DAC R1" },
1976 { "HPOVOL L", "Switch", "HPOVOL MIXL" },
1977 { "HPOVOL R", "Switch", "HPOVOL MIXR" },
1978 { "HPOVOL", NULL, "HPOVOL L" },
1979 { "HPOVOL", NULL, "HPOVOL R" },
1980 { "HPO MIX", "DAC1 Switch", "DAC 1" },
1981 { "HPO MIX", "HPVOL Switch", "HPOVOL" },
1982
1983 { "SPKVOL L", "Switch", "SPK MIXL" },
1984 { "SPKVOL R", "Switch", "SPK MIXR" },
1985
1986 { "SPOL MIX", "DAC R1 Switch", "DAC R1" },
1987 { "SPOL MIX", "DAC L1 Switch", "DAC L1" },
1988 { "SPOL MIX", "SPKVOL R Switch", "SPKVOL R" },
1989 { "SPOL MIX", "SPKVOL L Switch", "SPKVOL L" },
1990 { "SPOR MIX", "DAC R1 Switch", "DAC R1" },
1991 { "SPOR MIX", "SPKVOL R Switch", "SPKVOL R" },
1992
1993 { "LOUT MIX", "DAC L1 Switch", "DAC L1" },
1994 { "LOUT MIX", "DAC R1 Switch", "DAC R1" },
1995 { "LOUT MIX", "OUTMIX L Switch", "OUT MIXL" },
1996 { "LOUT MIX", "OUTMIX R Switch", "OUT MIXR" },
1997
1998 { "PDM1 L Mux", "Stereo DAC", "Stereo DAC MIXL" },
1999 { "PDM1 L Mux", "Mono DAC", "Mono DAC MIXL" },
2000 { "PDM1 L Mux", NULL, "PDM1 Power" },
2001 { "PDM1 R Mux", "Stereo DAC", "Stereo DAC MIXR" },
2002 { "PDM1 R Mux", "Mono DAC", "Mono DAC MIXR" },
2003 { "PDM1 R Mux", NULL, "PDM1 Power" },
2004
2005 { "HP amp", NULL, "HPO MIX" },
2006 { "HP amp", NULL, "JD Power" },
2007 { "HP amp", NULL, "Mic Det Power" },
2008 { "HP amp", NULL, "LDO2" },
2009 { "HPOL", NULL, "HP amp" },
2010 { "HPOR", NULL, "HP amp" },
2011
2012 { "LOUT amp", NULL, "LOUT MIX" },
2013 { "LOUTL", NULL, "LOUT amp" },
2014 { "LOUTR", NULL, "LOUT amp" },
2015
2016 { "PDM1 L", "Switch", "PDM1 L Mux" },
2017 { "PDM1 R", "Switch", "PDM1 R Mux" },
2018
2019 { "PDM1L", NULL, "PDM1 L" },
2020 { "PDM1R", NULL, "PDM1 R" },
2021
2022 { "SPK amp", NULL, "SPOL MIX" },
2023 { "SPK amp", NULL, "SPOR MIX" },
2024 { "SPOL", NULL, "SPK amp" },
2025 { "SPOR", NULL, "SPK amp" },
2026 };
2027
2028 static const struct snd_soc_dapm_route rt5650_specific_dapm_routes[] = {
2029 { "A DAC1 L Mux", "DAC1", "DAC1 MIXL"},
2030 { "A DAC1 L Mux", "Stereo DAC Mixer", "Stereo DAC MIXL"},
2031 { "A DAC1 R Mux", "DAC1", "DAC1 MIXR"},
2032 { "A DAC1 R Mux", "Stereo DAC Mixer", "Stereo DAC MIXR"},
2033
2034 { "A DAC2 L Mux", "Stereo DAC Mixer", "Stereo DAC MIXL"},
2035 { "A DAC2 L Mux", "Mono DAC Mixer", "Mono DAC MIXL"},
2036 { "A DAC2 R Mux", "Stereo DAC Mixer", "Stereo DAC MIXR"},
2037 { "A DAC2 R Mux", "Mono DAC Mixer", "Mono DAC MIXR"},
2038
2039 { "DAC L1", NULL, "A DAC1 L Mux" },
2040 { "DAC R1", NULL, "A DAC1 R Mux" },
2041 { "DAC L2", NULL, "A DAC2 L Mux" },
2042 { "DAC R2", NULL, "A DAC2 R Mux" },
2043 };
2044
2045 static const struct snd_soc_dapm_route rt5645_specific_dapm_routes[] = {
2046 { "DAC L1", NULL, "Stereo DAC MIXL" },
2047 { "DAC R1", NULL, "Stereo DAC MIXR" },
2048 { "DAC L2", NULL, "Mono DAC MIXL" },
2049 { "DAC R2", NULL, "Mono DAC MIXR" },
2050 };
2051
2052 static int rt5645_hw_params(struct snd_pcm_substream *substream,
2053 struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
2054 {
2055 struct snd_soc_codec *codec = dai->codec;
2056 struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
2057 unsigned int val_len = 0, val_clk, mask_clk, dl_sft;
2058 int pre_div, bclk_ms, frame_size;
2059
2060 rt5645->lrck[dai->id] = params_rate(params);
2061 pre_div = rl6231_get_clk_info(rt5645->sysclk, rt5645->lrck[dai->id]);
2062 if (pre_div < 0) {
2063 dev_err(codec->dev, "Unsupported clock setting\n");
2064 return -EINVAL;
2065 }
2066 frame_size = snd_soc_params_to_frame_size(params);
2067 if (frame_size < 0) {
2068 dev_err(codec->dev, "Unsupported frame size: %d\n", frame_size);
2069 return -EINVAL;
2070 }
2071
2072 switch (rt5645->codec_type) {
2073 case CODEC_TYPE_RT5650:
2074 dl_sft = 4;
2075 break;
2076 default:
2077 dl_sft = 2;
2078 break;
2079 }
2080
2081 bclk_ms = frame_size > 32;
2082 rt5645->bclk[dai->id] = rt5645->lrck[dai->id] * (32 << bclk_ms);
2083
2084 dev_dbg(dai->dev, "bclk is %dHz and lrck is %dHz\n",
2085 rt5645->bclk[dai->id], rt5645->lrck[dai->id]);
2086 dev_dbg(dai->dev, "bclk_ms is %d and pre_div is %d for iis %d\n",
2087 bclk_ms, pre_div, dai->id);
2088
2089 switch (params_width(params)) {
2090 case 16:
2091 break;
2092 case 20:
2093 val_len = 0x1;
2094 break;
2095 case 24:
2096 val_len = 0x2;
2097 break;
2098 case 8:
2099 val_len = 0x3;
2100 break;
2101 default:
2102 return -EINVAL;
2103 }
2104
2105 switch (dai->id) {
2106 case RT5645_AIF1:
2107 mask_clk = RT5645_I2S_BCLK_MS1_MASK | RT5645_I2S_PD1_MASK;
2108 val_clk = bclk_ms << RT5645_I2S_BCLK_MS1_SFT |
2109 pre_div << RT5645_I2S_PD1_SFT;
2110 snd_soc_update_bits(codec, RT5645_I2S1_SDP,
2111 (0x3 << dl_sft), (val_len << dl_sft));
2112 snd_soc_update_bits(codec, RT5645_ADDA_CLK1, mask_clk, val_clk);
2113 break;
2114 case RT5645_AIF2:
2115 mask_clk = RT5645_I2S_BCLK_MS2_MASK | RT5645_I2S_PD2_MASK;
2116 val_clk = bclk_ms << RT5645_I2S_BCLK_MS2_SFT |
2117 pre_div << RT5645_I2S_PD2_SFT;
2118 snd_soc_update_bits(codec, RT5645_I2S2_SDP,
2119 (0x3 << dl_sft), (val_len << dl_sft));
2120 snd_soc_update_bits(codec, RT5645_ADDA_CLK1, mask_clk, val_clk);
2121 break;
2122 default:
2123 dev_err(codec->dev, "Invalid dai->id: %d\n", dai->id);
2124 return -EINVAL;
2125 }
2126
2127 return 0;
2128 }
2129
2130 static int rt5645_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt)
2131 {
2132 struct snd_soc_codec *codec = dai->codec;
2133 struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
2134 unsigned int reg_val = 0, pol_sft;
2135
2136 switch (rt5645->codec_type) {
2137 case CODEC_TYPE_RT5650:
2138 pol_sft = 8;
2139 break;
2140 default:
2141 pol_sft = 7;
2142 break;
2143 }
2144
2145 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
2146 case SND_SOC_DAIFMT_CBM_CFM:
2147 rt5645->master[dai->id] = 1;
2148 break;
2149 case SND_SOC_DAIFMT_CBS_CFS:
2150 reg_val |= RT5645_I2S_MS_S;
2151 rt5645->master[dai->id] = 0;
2152 break;
2153 default:
2154 return -EINVAL;
2155 }
2156
2157 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
2158 case SND_SOC_DAIFMT_NB_NF:
2159 break;
2160 case SND_SOC_DAIFMT_IB_NF:
2161 reg_val |= (1 << pol_sft);
2162 break;
2163 default:
2164 return -EINVAL;
2165 }
2166
2167 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
2168 case SND_SOC_DAIFMT_I2S:
2169 break;
2170 case SND_SOC_DAIFMT_LEFT_J:
2171 reg_val |= RT5645_I2S_DF_LEFT;
2172 break;
2173 case SND_SOC_DAIFMT_DSP_A:
2174 reg_val |= RT5645_I2S_DF_PCM_A;
2175 break;
2176 case SND_SOC_DAIFMT_DSP_B:
2177 reg_val |= RT5645_I2S_DF_PCM_B;
2178 break;
2179 default:
2180 return -EINVAL;
2181 }
2182 switch (dai->id) {
2183 case RT5645_AIF1:
2184 snd_soc_update_bits(codec, RT5645_I2S1_SDP,
2185 RT5645_I2S_MS_MASK | (1 << pol_sft) |
2186 RT5645_I2S_DF_MASK, reg_val);
2187 break;
2188 case RT5645_AIF2:
2189 snd_soc_update_bits(codec, RT5645_I2S2_SDP,
2190 RT5645_I2S_MS_MASK | (1 << pol_sft) |
2191 RT5645_I2S_DF_MASK, reg_val);
2192 break;
2193 default:
2194 dev_err(codec->dev, "Invalid dai->id: %d\n", dai->id);
2195 return -EINVAL;
2196 }
2197 return 0;
2198 }
2199
2200 static int rt5645_set_dai_sysclk(struct snd_soc_dai *dai,
2201 int clk_id, unsigned int freq, int dir)
2202 {
2203 struct snd_soc_codec *codec = dai->codec;
2204 struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
2205 unsigned int reg_val = 0;
2206
2207 if (freq == rt5645->sysclk && clk_id == rt5645->sysclk_src)
2208 return 0;
2209
2210 switch (clk_id) {
2211 case RT5645_SCLK_S_MCLK:
2212 reg_val |= RT5645_SCLK_SRC_MCLK;
2213 break;
2214 case RT5645_SCLK_S_PLL1:
2215 reg_val |= RT5645_SCLK_SRC_PLL1;
2216 break;
2217 case RT5645_SCLK_S_RCCLK:
2218 reg_val |= RT5645_SCLK_SRC_RCCLK;
2219 break;
2220 default:
2221 dev_err(codec->dev, "Invalid clock id (%d)\n", clk_id);
2222 return -EINVAL;
2223 }
2224 snd_soc_update_bits(codec, RT5645_GLB_CLK,
2225 RT5645_SCLK_SRC_MASK, reg_val);
2226 rt5645->sysclk = freq;
2227 rt5645->sysclk_src = clk_id;
2228
2229 dev_dbg(dai->dev, "Sysclk is %dHz and clock id is %d\n", freq, clk_id);
2230
2231 return 0;
2232 }
2233
2234 static int rt5645_set_dai_pll(struct snd_soc_dai *dai, int pll_id, int source,
2235 unsigned int freq_in, unsigned int freq_out)
2236 {
2237 struct snd_soc_codec *codec = dai->codec;
2238 struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
2239 struct rl6231_pll_code pll_code;
2240 int ret;
2241
2242 if (source == rt5645->pll_src && freq_in == rt5645->pll_in &&
2243 freq_out == rt5645->pll_out)
2244 return 0;
2245
2246 if (!freq_in || !freq_out) {
2247 dev_dbg(codec->dev, "PLL disabled\n");
2248
2249 rt5645->pll_in = 0;
2250 rt5645->pll_out = 0;
2251 snd_soc_update_bits(codec, RT5645_GLB_CLK,
2252 RT5645_SCLK_SRC_MASK, RT5645_SCLK_SRC_MCLK);
2253 return 0;
2254 }
2255
2256 switch (source) {
2257 case RT5645_PLL1_S_MCLK:
2258 snd_soc_update_bits(codec, RT5645_GLB_CLK,
2259 RT5645_PLL1_SRC_MASK, RT5645_PLL1_SRC_MCLK);
2260 break;
2261 case RT5645_PLL1_S_BCLK1:
2262 case RT5645_PLL1_S_BCLK2:
2263 switch (dai->id) {
2264 case RT5645_AIF1:
2265 snd_soc_update_bits(codec, RT5645_GLB_CLK,
2266 RT5645_PLL1_SRC_MASK, RT5645_PLL1_SRC_BCLK1);
2267 break;
2268 case RT5645_AIF2:
2269 snd_soc_update_bits(codec, RT5645_GLB_CLK,
2270 RT5645_PLL1_SRC_MASK, RT5645_PLL1_SRC_BCLK2);
2271 break;
2272 default:
2273 dev_err(codec->dev, "Invalid dai->id: %d\n", dai->id);
2274 return -EINVAL;
2275 }
2276 break;
2277 default:
2278 dev_err(codec->dev, "Unknown PLL source %d\n", source);
2279 return -EINVAL;
2280 }
2281
2282 ret = rl6231_pll_calc(freq_in, freq_out, &pll_code);
2283 if (ret < 0) {
2284 dev_err(codec->dev, "Unsupport input clock %d\n", freq_in);
2285 return ret;
2286 }
2287
2288 dev_dbg(codec->dev, "bypass=%d m=%d n=%d k=%d\n",
2289 pll_code.m_bp, (pll_code.m_bp ? 0 : pll_code.m_code),
2290 pll_code.n_code, pll_code.k_code);
2291
2292 snd_soc_write(codec, RT5645_PLL_CTRL1,
2293 pll_code.n_code << RT5645_PLL_N_SFT | pll_code.k_code);
2294 snd_soc_write(codec, RT5645_PLL_CTRL2,
2295 (pll_code.m_bp ? 0 : pll_code.m_code) << RT5645_PLL_M_SFT |
2296 pll_code.m_bp << RT5645_PLL_M_BP_SFT);
2297
2298 rt5645->pll_in = freq_in;
2299 rt5645->pll_out = freq_out;
2300 rt5645->pll_src = source;
2301
2302 return 0;
2303 }
2304
2305 static int rt5645_set_tdm_slot(struct snd_soc_dai *dai, unsigned int tx_mask,
2306 unsigned int rx_mask, int slots, int slot_width)
2307 {
2308 struct snd_soc_codec *codec = dai->codec;
2309 struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
2310 unsigned int i_slot_sft, o_slot_sft, i_width_sht, o_width_sht, en_sft;
2311 unsigned int mask, val = 0;
2312
2313 switch (rt5645->codec_type) {
2314 case CODEC_TYPE_RT5650:
2315 en_sft = 15;
2316 i_slot_sft = 10;
2317 o_slot_sft = 8;
2318 i_width_sht = 6;
2319 o_width_sht = 4;
2320 mask = 0x8ff0;
2321 break;
2322 default:
2323 en_sft = 14;
2324 i_slot_sft = o_slot_sft = 12;
2325 i_width_sht = o_width_sht = 10;
2326 mask = 0x7c00;
2327 break;
2328 }
2329 if (rx_mask || tx_mask) {
2330 val |= (1 << en_sft);
2331 if (rt5645->codec_type == CODEC_TYPE_RT5645)
2332 snd_soc_update_bits(codec, RT5645_BASS_BACK,
2333 RT5645_G_BB_BST_MASK, RT5645_G_BB_BST_25DB);
2334 }
2335
2336 switch (slots) {
2337 case 4:
2338 val |= (1 << i_slot_sft) | (1 << o_slot_sft);
2339 break;
2340 case 6:
2341 val |= (2 << i_slot_sft) | (2 << o_slot_sft);
2342 break;
2343 case 8:
2344 val |= (3 << i_slot_sft) | (3 << o_slot_sft);
2345 break;
2346 case 2:
2347 default:
2348 break;
2349 }
2350
2351 switch (slot_width) {
2352 case 20:
2353 val |= (1 << i_width_sht) | (1 << o_width_sht);
2354 break;
2355 case 24:
2356 val |= (2 << i_width_sht) | (2 << o_width_sht);
2357 break;
2358 case 32:
2359 val |= (3 << i_width_sht) | (3 << o_width_sht);
2360 break;
2361 case 16:
2362 default:
2363 break;
2364 }
2365
2366 snd_soc_update_bits(codec, RT5645_TDM_CTRL_1, mask, val);
2367
2368 return 0;
2369 }
2370
2371 static int rt5645_set_bias_level(struct snd_soc_codec *codec,
2372 enum snd_soc_bias_level level)
2373 {
2374 struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
2375
2376 switch (level) {
2377 case SND_SOC_BIAS_PREPARE:
2378 if (SND_SOC_BIAS_STANDBY == codec->dapm.bias_level) {
2379 snd_soc_update_bits(codec, RT5645_PWR_ANLG1,
2380 RT5645_PWR_VREF1 | RT5645_PWR_MB |
2381 RT5645_PWR_BG | RT5645_PWR_VREF2,
2382 RT5645_PWR_VREF1 | RT5645_PWR_MB |
2383 RT5645_PWR_BG | RT5645_PWR_VREF2);
2384 mdelay(10);
2385 snd_soc_update_bits(codec, RT5645_PWR_ANLG1,
2386 RT5645_PWR_FV1 | RT5645_PWR_FV2,
2387 RT5645_PWR_FV1 | RT5645_PWR_FV2);
2388 snd_soc_update_bits(codec, RT5645_GEN_CTRL1,
2389 RT5645_DIG_GATE_CTRL, RT5645_DIG_GATE_CTRL);
2390 }
2391 break;
2392
2393 case SND_SOC_BIAS_STANDBY:
2394 snd_soc_update_bits(codec, RT5645_PWR_ANLG1,
2395 RT5645_PWR_VREF1 | RT5645_PWR_MB |
2396 RT5645_PWR_BG | RT5645_PWR_VREF2,
2397 RT5645_PWR_VREF1 | RT5645_PWR_MB |
2398 RT5645_PWR_BG | RT5645_PWR_VREF2);
2399 snd_soc_update_bits(codec, RT5645_PWR_ANLG1,
2400 RT5645_PWR_FV1 | RT5645_PWR_FV2,
2401 RT5645_PWR_FV1 | RT5645_PWR_FV2);
2402 break;
2403
2404 case SND_SOC_BIAS_OFF:
2405 snd_soc_write(codec, RT5645_DEPOP_M2, 0x1100);
2406 if (!rt5645->en_button_func)
2407 snd_soc_update_bits(codec, RT5645_GEN_CTRL1,
2408 RT5645_DIG_GATE_CTRL, 0);
2409 snd_soc_update_bits(codec, RT5645_PWR_ANLG1,
2410 RT5645_PWR_VREF1 | RT5645_PWR_MB |
2411 RT5645_PWR_BG | RT5645_PWR_VREF2 |
2412 RT5645_PWR_FV1 | RT5645_PWR_FV2, 0x0);
2413 break;
2414
2415 default:
2416 break;
2417 }
2418 codec->dapm.bias_level = level;
2419
2420 return 0;
2421 }
2422
2423 static void rt5645_enable_push_button_irq(struct snd_soc_codec *codec,
2424 bool enable)
2425 {
2426 struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
2427
2428 if (enable) {
2429 snd_soc_dapm_force_enable_pin_unlocked(&codec->dapm,
2430 "ADC L power");
2431 snd_soc_dapm_force_enable_pin_unlocked(&codec->dapm,
2432 "ADC R power");
2433 snd_soc_dapm_force_enable_pin_unlocked(&codec->dapm,
2434 "LDO2");
2435 snd_soc_dapm_force_enable_pin_unlocked(&codec->dapm,
2436 "Mic Det Power");
2437 snd_soc_dapm_sync_unlocked(&codec->dapm);
2438 snd_soc_update_bits(codec,
2439 RT5645_INT_IRQ_ST, 0x8, 0x8);
2440 snd_soc_update_bits(codec,
2441 RT5650_4BTN_IL_CMD2, 0x8000, 0x8000);
2442 snd_soc_read(codec, RT5650_4BTN_IL_CMD1);
2443 pr_debug("%s read %x = %x\n", __func__, RT5650_4BTN_IL_CMD1,
2444 snd_soc_read(codec, RT5650_4BTN_IL_CMD1));
2445 } else {
2446 snd_soc_update_bits(codec, RT5650_4BTN_IL_CMD2, 0x8000, 0x0);
2447 snd_soc_update_bits(codec, RT5645_INT_IRQ_ST, 0x8, 0x0);
2448 snd_soc_dapm_disable_pin_unlocked(&codec->dapm,
2449 "ADC L power");
2450 snd_soc_dapm_disable_pin_unlocked(&codec->dapm,
2451 "ADC R power");
2452 if (rt5645->pdata.jd_mode == 0)
2453 snd_soc_dapm_disable_pin_unlocked(&codec->dapm,
2454 "LDO2");
2455 snd_soc_dapm_disable_pin_unlocked(&codec->dapm,
2456 "Mic Det Power");
2457 snd_soc_dapm_sync_unlocked(&codec->dapm);
2458 }
2459 }
2460
2461 static int rt5645_jack_detect(struct snd_soc_codec *codec, int jack_insert)
2462 {
2463 struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
2464 unsigned int val;
2465
2466 if (jack_insert) {
2467 if (codec->component.card->instantiated) {
2468 snd_soc_dapm_force_enable_pin(&codec->dapm,
2469 "micbias1");
2470 snd_soc_dapm_force_enable_pin(&codec->dapm,
2471 "micbias2");
2472 snd_soc_dapm_force_enable_pin(&codec->dapm,
2473 "LDO2");
2474 snd_soc_dapm_force_enable_pin(&codec->dapm,
2475 "Mic Det Power");
2476 snd_soc_dapm_sync(&codec->dapm);
2477 } else {
2478 /* Power up necessary bits for JD if dapm is
2479 not ready yet */
2480 snd_soc_update_bits(codec, RT5645_PWR_ANLG2,
2481 RT5645_PWR_MB1 | RT5645_PWR_MB2,
2482 RT5645_PWR_MB1 | RT5645_PWR_MB2);
2483 snd_soc_update_bits(codec, RT5645_PWR_MIXER,
2484 RT5645_PWR_LDO2, RT5645_PWR_LDO2);
2485 snd_soc_update_bits(codec, RT5645_PWR_VOL,
2486 RT5645_PWR_MIC_DET, RT5645_PWR_MIC_DET);
2487 }
2488
2489 snd_soc_write(codec, RT5645_IN1_CTRL1, 0x0006);
2490 snd_soc_write(codec, RT5645_JD_CTRL3, 0x00b0);
2491
2492 snd_soc_update_bits(codec, RT5645_IN1_CTRL2,
2493 RT5645_CBJ_MN_JD, 0);
2494 snd_soc_update_bits(codec, RT5645_IN1_CTRL2,
2495 RT5645_CBJ_MN_JD, RT5645_CBJ_MN_JD);
2496
2497 msleep(400);
2498 val = snd_soc_read(codec, RT5645_IN1_CTRL3) & 0x7;
2499 dev_dbg(codec->dev, "val = %d\n", val);
2500
2501 if (codec->component.card->instantiated) {
2502 snd_soc_dapm_disable_pin(&codec->dapm, "micbias1");
2503 snd_soc_dapm_disable_pin(&codec->dapm, "micbias2");
2504 if (rt5645->pdata.jd_mode == 0)
2505 snd_soc_dapm_disable_pin(&codec->dapm, "LDO2");
2506 snd_soc_dapm_disable_pin(&codec->dapm,
2507 "Mic Det Power");
2508 snd_soc_dapm_sync(&codec->dapm);
2509 } else {
2510 snd_soc_update_bits(codec, RT5645_PWR_ANLG2,
2511 RT5645_PWR_MB1 | RT5645_PWR_MB2, 0);
2512 if (rt5645->pdata.jd_mode == 0)
2513 snd_soc_update_bits(codec, RT5645_PWR_MIXER,
2514 RT5645_PWR_LDO2, 0);
2515 snd_soc_update_bits(codec, RT5645_PWR_VOL,
2516 RT5645_PWR_MIC_DET, 0);
2517 }
2518
2519 if (val == 1 || val == 2) {
2520 rt5645->jack_type = SND_JACK_HEADSET;
2521 if (rt5645->en_button_func) {
2522 msleep(100);
2523 rt5645_enable_push_button_irq(codec, true);
2524 }
2525 } else {
2526 rt5645->jack_type = SND_JACK_HEADPHONE;
2527 }
2528
2529 } else { /* jack out */
2530 rt5645->jack_type = 0;
2531 if (rt5645->en_button_func)
2532 rt5645_enable_push_button_irq(codec, false);
2533 }
2534
2535 return rt5645->jack_type;
2536 }
2537
2538 static int rt5645_irq_detection(struct rt5645_priv *rt5645);
2539
2540 int rt5645_set_jack_detect(struct snd_soc_codec *codec,
2541 struct snd_soc_jack *hp_jack, struct snd_soc_jack *mic_jack,
2542 struct snd_soc_jack *btn_jack)
2543 {
2544 struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
2545
2546 rt5645->hp_jack = hp_jack;
2547 rt5645->mic_jack = mic_jack;
2548 rt5645->btn_jack = btn_jack;
2549 if (rt5645->btn_jack && rt5645->codec_type == CODEC_TYPE_RT5650) {
2550 rt5645->en_button_func = true;
2551 regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
2552 RT5645_GP1_PIN_IRQ, RT5645_GP1_PIN_IRQ);
2553 regmap_update_bits(rt5645->regmap, RT5645_DEPOP_M1,
2554 RT5645_HP_CB_MASK, RT5645_HP_CB_PU);
2555 regmap_update_bits(rt5645->regmap, RT5645_GEN_CTRL1,
2556 RT5645_DIG_GATE_CTRL, RT5645_DIG_GATE_CTRL);
2557 }
2558 rt5645_irq_detection(rt5645);
2559
2560 return 0;
2561 }
2562 EXPORT_SYMBOL_GPL(rt5645_set_jack_detect);
2563
2564 static void rt5645_jack_detect_work(struct work_struct *work)
2565 {
2566 struct rt5645_priv *rt5645 =
2567 container_of(work, struct rt5645_priv, jack_detect_work.work);
2568
2569 rt5645_irq_detection(rt5645);
2570 }
2571
2572 static irqreturn_t rt5645_irq(int irq, void *data)
2573 {
2574 struct rt5645_priv *rt5645 = data;
2575
2576 queue_delayed_work(system_power_efficient_wq,
2577 &rt5645->jack_detect_work, msecs_to_jiffies(250));
2578
2579 return IRQ_HANDLED;
2580 }
2581
2582 static int rt5645_button_detect(struct snd_soc_codec *codec)
2583 {
2584 int btn_type, val;
2585
2586 val = snd_soc_read(codec, RT5650_4BTN_IL_CMD1);
2587 pr_debug("val=0x%x\n", val);
2588 btn_type = val & 0xfff0;
2589 snd_soc_write(codec, RT5650_4BTN_IL_CMD1, val);
2590
2591 return btn_type;
2592 }
2593
2594 static int rt5645_irq_detection(struct rt5645_priv *rt5645)
2595 {
2596 int val, btn_type, gpio_state = 0, report = 0;
2597
2598 switch (rt5645->pdata.jd_mode) {
2599 case 0: /* Not using rt5645 JD */
2600 if (gpio_is_valid(rt5645->pdata.hp_det_gpio)) {
2601 gpio_state = gpio_get_value(rt5645->pdata.hp_det_gpio);
2602 dev_dbg(rt5645->codec->dev, "gpio = %d(%d)\n",
2603 rt5645->pdata.hp_det_gpio, gpio_state);
2604 }
2605 if ((rt5645->pdata.gpio_hp_det_active_high && gpio_state) ||
2606 (!rt5645->pdata.gpio_hp_det_active_high &&
2607 !gpio_state)) {
2608 report = rt5645_jack_detect(rt5645->codec, 1);
2609 } else {
2610 report = rt5645_jack_detect(rt5645->codec, 0);
2611 }
2612 snd_soc_jack_report(rt5645->hp_jack,
2613 report, SND_JACK_HEADPHONE);
2614 snd_soc_jack_report(rt5645->mic_jack,
2615 report, SND_JACK_MICROPHONE);
2616 return report;
2617 case 1: /* 2 port */
2618 val = snd_soc_read(rt5645->codec, RT5645_A_JD_CTRL1) & 0x0070;
2619 break;
2620 default: /* 1 port */
2621 val = snd_soc_read(rt5645->codec, RT5645_A_JD_CTRL1) & 0x0020;
2622 break;
2623
2624 }
2625
2626 switch (val) {
2627 /* jack in */
2628 case 0x30: /* 2 port */
2629 case 0x0: /* 1 port or 2 port */
2630 if (rt5645->jack_type == 0) {
2631 report = rt5645_jack_detect(rt5645->codec, 1);
2632 /* for push button and jack out */
2633 break;
2634 }
2635 btn_type = 0;
2636 if (snd_soc_read(rt5645->codec, RT5645_INT_IRQ_ST) & 0x4) {
2637 /* button pressed */
2638 report = SND_JACK_HEADSET;
2639 btn_type = rt5645_button_detect(rt5645->codec);
2640 /* rt5650 can report three kinds of button behavior,
2641 one click, double click and hold. However,
2642 currently we will report button pressed/released
2643 event. So all the three button behaviors are
2644 treated as button pressed. */
2645 switch (btn_type) {
2646 case 0x8000:
2647 case 0x4000:
2648 case 0x2000:
2649 report |= SND_JACK_BTN_0;
2650 break;
2651 case 0x1000:
2652 case 0x0800:
2653 case 0x0400:
2654 report |= SND_JACK_BTN_1;
2655 break;
2656 case 0x0200:
2657 case 0x0100:
2658 case 0x0080:
2659 report |= SND_JACK_BTN_2;
2660 break;
2661 case 0x0040:
2662 case 0x0020:
2663 case 0x0010:
2664 report |= SND_JACK_BTN_3;
2665 break;
2666 case 0x0000: /* unpressed */
2667 break;
2668 default:
2669 dev_err(rt5645->codec->dev,
2670 "Unexpected button code 0x%04x\n",
2671 btn_type);
2672 break;
2673 }
2674 }
2675 if (btn_type == 0)/* button release */
2676 report = rt5645->jack_type;
2677
2678 break;
2679 /* jack out */
2680 case 0x70: /* 2 port */
2681 case 0x10: /* 2 port */
2682 case 0x20: /* 1 port */
2683 report = 0;
2684 snd_soc_update_bits(rt5645->codec,
2685 RT5645_INT_IRQ_ST, 0x1, 0x0);
2686 rt5645_jack_detect(rt5645->codec, 0);
2687 break;
2688 default:
2689 break;
2690 }
2691
2692 snd_soc_jack_report(rt5645->hp_jack, report, SND_JACK_HEADPHONE);
2693 snd_soc_jack_report(rt5645->mic_jack, report, SND_JACK_MICROPHONE);
2694 if (rt5645->en_button_func)
2695 snd_soc_jack_report(rt5645->btn_jack,
2696 report, SND_JACK_MICROPHONE);
2697
2698 return report;
2699 }
2700
2701 static int rt5645_probe(struct snd_soc_codec *codec)
2702 {
2703 struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
2704
2705 rt5645->codec = codec;
2706
2707 switch (rt5645->codec_type) {
2708 case CODEC_TYPE_RT5645:
2709 snd_soc_dapm_add_routes(&codec->dapm,
2710 rt5645_specific_dapm_routes,
2711 ARRAY_SIZE(rt5645_specific_dapm_routes));
2712 break;
2713 case CODEC_TYPE_RT5650:
2714 snd_soc_dapm_new_controls(&codec->dapm,
2715 rt5650_specific_dapm_widgets,
2716 ARRAY_SIZE(rt5650_specific_dapm_widgets));
2717 snd_soc_dapm_add_routes(&codec->dapm,
2718 rt5650_specific_dapm_routes,
2719 ARRAY_SIZE(rt5650_specific_dapm_routes));
2720 break;
2721 }
2722
2723 rt5645_set_bias_level(codec, SND_SOC_BIAS_OFF);
2724
2725 snd_soc_update_bits(codec, RT5645_CHARGE_PUMP, 0x0300, 0x0200);
2726
2727 /* for JD function */
2728 if (rt5645->pdata.en_jd_func) {
2729 snd_soc_dapm_force_enable_pin(&codec->dapm, "JD Power");
2730 snd_soc_dapm_force_enable_pin(&codec->dapm, "LDO2");
2731 snd_soc_dapm_sync(&codec->dapm);
2732 }
2733
2734 return 0;
2735 }
2736
2737 static int rt5645_remove(struct snd_soc_codec *codec)
2738 {
2739 rt5645_reset(codec);
2740 return 0;
2741 }
2742
2743 #ifdef CONFIG_PM
2744 static int rt5645_suspend(struct snd_soc_codec *codec)
2745 {
2746 struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
2747
2748 regcache_cache_only(rt5645->regmap, true);
2749 regcache_mark_dirty(rt5645->regmap);
2750
2751 return 0;
2752 }
2753
2754 static int rt5645_resume(struct snd_soc_codec *codec)
2755 {
2756 struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
2757
2758 regcache_cache_only(rt5645->regmap, false);
2759 regcache_sync(rt5645->regmap);
2760
2761 return 0;
2762 }
2763 #else
2764 #define rt5645_suspend NULL
2765 #define rt5645_resume NULL
2766 #endif
2767
2768 #define RT5645_STEREO_RATES SNDRV_PCM_RATE_8000_96000
2769 #define RT5645_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
2770 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S8)
2771
2772 static struct snd_soc_dai_ops rt5645_aif_dai_ops = {
2773 .hw_params = rt5645_hw_params,
2774 .set_fmt = rt5645_set_dai_fmt,
2775 .set_sysclk = rt5645_set_dai_sysclk,
2776 .set_tdm_slot = rt5645_set_tdm_slot,
2777 .set_pll = rt5645_set_dai_pll,
2778 };
2779
2780 static struct snd_soc_dai_driver rt5645_dai[] = {
2781 {
2782 .name = "rt5645-aif1",
2783 .id = RT5645_AIF1,
2784 .playback = {
2785 .stream_name = "AIF1 Playback",
2786 .channels_min = 1,
2787 .channels_max = 2,
2788 .rates = RT5645_STEREO_RATES,
2789 .formats = RT5645_FORMATS,
2790 },
2791 .capture = {
2792 .stream_name = "AIF1 Capture",
2793 .channels_min = 1,
2794 .channels_max = 2,
2795 .rates = RT5645_STEREO_RATES,
2796 .formats = RT5645_FORMATS,
2797 },
2798 .ops = &rt5645_aif_dai_ops,
2799 },
2800 {
2801 .name = "rt5645-aif2",
2802 .id = RT5645_AIF2,
2803 .playback = {
2804 .stream_name = "AIF2 Playback",
2805 .channels_min = 1,
2806 .channels_max = 2,
2807 .rates = RT5645_STEREO_RATES,
2808 .formats = RT5645_FORMATS,
2809 },
2810 .capture = {
2811 .stream_name = "AIF2 Capture",
2812 .channels_min = 1,
2813 .channels_max = 2,
2814 .rates = RT5645_STEREO_RATES,
2815 .formats = RT5645_FORMATS,
2816 },
2817 .ops = &rt5645_aif_dai_ops,
2818 },
2819 };
2820
2821 static struct snd_soc_codec_driver soc_codec_dev_rt5645 = {
2822 .probe = rt5645_probe,
2823 .remove = rt5645_remove,
2824 .suspend = rt5645_suspend,
2825 .resume = rt5645_resume,
2826 .set_bias_level = rt5645_set_bias_level,
2827 .idle_bias_off = true,
2828 .controls = rt5645_snd_controls,
2829 .num_controls = ARRAY_SIZE(rt5645_snd_controls),
2830 .dapm_widgets = rt5645_dapm_widgets,
2831 .num_dapm_widgets = ARRAY_SIZE(rt5645_dapm_widgets),
2832 .dapm_routes = rt5645_dapm_routes,
2833 .num_dapm_routes = ARRAY_SIZE(rt5645_dapm_routes),
2834 };
2835
2836 static const struct regmap_config rt5645_regmap = {
2837 .reg_bits = 8,
2838 .val_bits = 16,
2839 .use_single_rw = true,
2840 .max_register = RT5645_VENDOR_ID2 + 1 + (ARRAY_SIZE(rt5645_ranges) *
2841 RT5645_PR_SPACING),
2842 .volatile_reg = rt5645_volatile_register,
2843 .readable_reg = rt5645_readable_register,
2844
2845 .cache_type = REGCACHE_RBTREE,
2846 .reg_defaults = rt5645_reg,
2847 .num_reg_defaults = ARRAY_SIZE(rt5645_reg),
2848 .ranges = rt5645_ranges,
2849 .num_ranges = ARRAY_SIZE(rt5645_ranges),
2850 };
2851
2852 static const struct i2c_device_id rt5645_i2c_id[] = {
2853 { "rt5645", 0 },
2854 { "rt5650", 0 },
2855 { }
2856 };
2857 MODULE_DEVICE_TABLE(i2c, rt5645_i2c_id);
2858
2859 #ifdef CONFIG_ACPI
2860 static struct acpi_device_id rt5645_acpi_match[] = {
2861 { "10EC5645", 0 },
2862 { "10EC5650", 0 },
2863 {},
2864 };
2865 MODULE_DEVICE_TABLE(acpi, rt5645_acpi_match);
2866 #endif
2867
2868 static struct rt5645_platform_data *rt5645_pdata;
2869
2870 static struct rt5645_platform_data strago_platform_data = {
2871 .dmic_en = true,
2872 .dmic1_data_pin = -1,
2873 .dmic2_data_pin = RT5645_DMIC_DATA_IN2P,
2874 .en_jd_func = true,
2875 .jd_mode = 3,
2876 };
2877
2878 static int strago_quirk_cb(const struct dmi_system_id *id)
2879 {
2880 rt5645_pdata = &strago_platform_data;
2881
2882 return 1;
2883 }
2884
2885 static struct dmi_system_id dmi_platform_intel_braswell[] = {
2886 {
2887 .ident = "Intel Strago",
2888 .callback = strago_quirk_cb,
2889 .matches = {
2890 DMI_MATCH(DMI_PRODUCT_NAME, "Strago"),
2891 },
2892 },
2893 { }
2894 };
2895
2896 static int rt5645_i2c_probe(struct i2c_client *i2c,
2897 const struct i2c_device_id *id)
2898 {
2899 struct rt5645_platform_data *pdata = dev_get_platdata(&i2c->dev);
2900 struct rt5645_priv *rt5645;
2901 int ret;
2902 unsigned int val;
2903 struct gpio_desc *gpiod;
2904
2905 rt5645 = devm_kzalloc(&i2c->dev, sizeof(struct rt5645_priv),
2906 GFP_KERNEL);
2907 if (rt5645 == NULL)
2908 return -ENOMEM;
2909
2910 rt5645->i2c = i2c;
2911 i2c_set_clientdata(i2c, rt5645);
2912
2913 if (pdata) {
2914 rt5645->pdata = *pdata;
2915 } else {
2916 if (dmi_check_system(dmi_platform_intel_braswell)) {
2917 rt5645->pdata = *rt5645_pdata;
2918 gpiod = devm_gpiod_get_index(&i2c->dev, "rt5645", 0);
2919
2920 if (IS_ERR(gpiod) || gpiod_direction_input(gpiod)) {
2921 rt5645->pdata.hp_det_gpio = -1;
2922 dev_err(&i2c->dev, "failed to initialize gpiod\n");
2923 } else {
2924 rt5645->pdata.hp_det_gpio = desc_to_gpio(gpiod);
2925 rt5645->pdata.gpio_hp_det_active_high
2926 = !gpiod_is_active_low(gpiod);
2927 }
2928 }
2929 }
2930
2931 rt5645->regmap = devm_regmap_init_i2c(i2c, &rt5645_regmap);
2932 if (IS_ERR(rt5645->regmap)) {
2933 ret = PTR_ERR(rt5645->regmap);
2934 dev_err(&i2c->dev, "Failed to allocate register map: %d\n",
2935 ret);
2936 return ret;
2937 }
2938
2939 regmap_read(rt5645->regmap, RT5645_VENDOR_ID2, &val);
2940
2941 switch (val) {
2942 case RT5645_DEVICE_ID:
2943 rt5645->codec_type = CODEC_TYPE_RT5645;
2944 break;
2945 case RT5650_DEVICE_ID:
2946 rt5645->codec_type = CODEC_TYPE_RT5650;
2947 break;
2948 default:
2949 dev_err(&i2c->dev,
2950 "Device with ID register %x is not rt5645 or rt5650\n",
2951 val);
2952 return -ENODEV;
2953 }
2954
2955 regmap_write(rt5645->regmap, RT5645_RESET, 0);
2956
2957 ret = regmap_register_patch(rt5645->regmap, init_list,
2958 ARRAY_SIZE(init_list));
2959 if (ret != 0)
2960 dev_warn(&i2c->dev, "Failed to apply regmap patch: %d\n", ret);
2961
2962 if (rt5645->codec_type == CODEC_TYPE_RT5650) {
2963 ret = regmap_register_patch(rt5645->regmap, rt5650_init_list,
2964 ARRAY_SIZE(rt5650_init_list));
2965 if (ret != 0)
2966 dev_warn(&i2c->dev, "Apply rt5650 patch failed: %d\n",
2967 ret);
2968 }
2969
2970 if (rt5645->pdata.in2_diff)
2971 regmap_update_bits(rt5645->regmap, RT5645_IN2_CTRL,
2972 RT5645_IN_DF2, RT5645_IN_DF2);
2973
2974 if (rt5645->pdata.dmic_en) {
2975 regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
2976 RT5645_GP2_PIN_MASK, RT5645_GP2_PIN_DMIC1_SCL);
2977
2978 switch (rt5645->pdata.dmic1_data_pin) {
2979 case RT5645_DMIC_DATA_IN2N:
2980 regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1,
2981 RT5645_DMIC_1_DP_MASK, RT5645_DMIC_1_DP_IN2N);
2982 break;
2983
2984 case RT5645_DMIC_DATA_GPIO5:
2985 regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1,
2986 RT5645_DMIC_1_DP_MASK, RT5645_DMIC_1_DP_GPIO5);
2987 regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
2988 RT5645_GP5_PIN_MASK, RT5645_GP5_PIN_DMIC1_SDA);
2989 break;
2990
2991 case RT5645_DMIC_DATA_GPIO11:
2992 regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1,
2993 RT5645_DMIC_1_DP_MASK, RT5645_DMIC_1_DP_GPIO11);
2994 regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
2995 RT5645_GP11_PIN_MASK,
2996 RT5645_GP11_PIN_DMIC1_SDA);
2997 break;
2998
2999 default:
3000 break;
3001 }
3002
3003 switch (rt5645->pdata.dmic2_data_pin) {
3004 case RT5645_DMIC_DATA_IN2P:
3005 regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1,
3006 RT5645_DMIC_2_DP_MASK, RT5645_DMIC_2_DP_IN2P);
3007 break;
3008
3009 case RT5645_DMIC_DATA_GPIO6:
3010 regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1,
3011 RT5645_DMIC_2_DP_MASK, RT5645_DMIC_2_DP_GPIO6);
3012 regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
3013 RT5645_GP6_PIN_MASK, RT5645_GP6_PIN_DMIC2_SDA);
3014 break;
3015
3016 case RT5645_DMIC_DATA_GPIO10:
3017 regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1,
3018 RT5645_DMIC_2_DP_MASK, RT5645_DMIC_2_DP_GPIO10);
3019 regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
3020 RT5645_GP10_PIN_MASK,
3021 RT5645_GP10_PIN_DMIC2_SDA);
3022 break;
3023
3024 case RT5645_DMIC_DATA_GPIO12:
3025 regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1,
3026 RT5645_DMIC_2_DP_MASK, RT5645_DMIC_2_DP_GPIO12);
3027 regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
3028 RT5645_GP12_PIN_MASK,
3029 RT5645_GP12_PIN_DMIC2_SDA);
3030 break;
3031
3032 default:
3033 break;
3034 }
3035
3036 }
3037
3038 if (rt5645->pdata.en_jd_func) {
3039 regmap_update_bits(rt5645->regmap, RT5645_GEN_CTRL3,
3040 RT5645_IRQ_CLK_GATE_CTRL, RT5645_IRQ_CLK_GATE_CTRL);
3041 regmap_update_bits(rt5645->regmap, RT5645_IN1_CTRL1,
3042 RT5645_CBJ_BST1_EN, RT5645_CBJ_BST1_EN);
3043 regmap_update_bits(rt5645->regmap, RT5645_JD_CTRL3,
3044 RT5645_JD_CBJ_EN | RT5645_JD_CBJ_POL,
3045 RT5645_JD_CBJ_EN | RT5645_JD_CBJ_POL);
3046 regmap_update_bits(rt5645->regmap, RT5645_MICBIAS,
3047 RT5645_IRQ_CLK_INT, RT5645_IRQ_CLK_INT);
3048 }
3049
3050 if (rt5645->pdata.jd_mode) {
3051 regmap_update_bits(rt5645->regmap, RT5645_IRQ_CTRL2,
3052 RT5645_IRQ_JD_1_1_EN, RT5645_IRQ_JD_1_1_EN);
3053 regmap_update_bits(rt5645->regmap, RT5645_GEN_CTRL3,
3054 RT5645_JD_PSV_MODE, RT5645_JD_PSV_MODE);
3055 regmap_update_bits(rt5645->regmap, RT5645_HPO_MIXER,
3056 RT5645_IRQ_PSV_MODE, RT5645_IRQ_PSV_MODE);
3057 regmap_update_bits(rt5645->regmap, RT5645_MICBIAS,
3058 RT5645_MIC2_OVCD_EN, RT5645_MIC2_OVCD_EN);
3059 regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
3060 RT5645_GP1_PIN_IRQ, RT5645_GP1_PIN_IRQ);
3061 switch (rt5645->pdata.jd_mode) {
3062 case 1:
3063 regmap_update_bits(rt5645->regmap, RT5645_A_JD_CTRL1,
3064 RT5645_JD1_MODE_MASK,
3065 RT5645_JD1_MODE_0);
3066 break;
3067 case 2:
3068 regmap_update_bits(rt5645->regmap, RT5645_A_JD_CTRL1,
3069 RT5645_JD1_MODE_MASK,
3070 RT5645_JD1_MODE_1);
3071 break;
3072 case 3:
3073 regmap_update_bits(rt5645->regmap, RT5645_A_JD_CTRL1,
3074 RT5645_JD1_MODE_MASK,
3075 RT5645_JD1_MODE_2);
3076 break;
3077 default:
3078 break;
3079 }
3080 }
3081
3082 if (rt5645->i2c->irq) {
3083 ret = request_threaded_irq(rt5645->i2c->irq, NULL, rt5645_irq,
3084 IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING
3085 | IRQF_ONESHOT, "rt5645", rt5645);
3086 if (ret)
3087 dev_err(&i2c->dev, "Failed to reguest IRQ: %d\n", ret);
3088 }
3089
3090 if (gpio_is_valid(rt5645->pdata.hp_det_gpio)) {
3091 ret = gpio_request(rt5645->pdata.hp_det_gpio, "rt5645");
3092 if (ret)
3093 dev_err(&i2c->dev, "Fail gpio_request hp_det_gpio\n");
3094
3095 ret = gpio_direction_input(rt5645->pdata.hp_det_gpio);
3096 if (ret)
3097 dev_err(&i2c->dev, "Fail gpio_direction hp_det_gpio\n");
3098 }
3099
3100 INIT_DELAYED_WORK(&rt5645->jack_detect_work, rt5645_jack_detect_work);
3101
3102 return snd_soc_register_codec(&i2c->dev, &soc_codec_dev_rt5645,
3103 rt5645_dai, ARRAY_SIZE(rt5645_dai));
3104 }
3105
3106 static int rt5645_i2c_remove(struct i2c_client *i2c)
3107 {
3108 struct rt5645_priv *rt5645 = i2c_get_clientdata(i2c);
3109
3110 if (i2c->irq)
3111 free_irq(i2c->irq, rt5645);
3112
3113 cancel_delayed_work_sync(&rt5645->jack_detect_work);
3114
3115 if (gpio_is_valid(rt5645->pdata.hp_det_gpio))
3116 gpio_free(rt5645->pdata.hp_det_gpio);
3117
3118 snd_soc_unregister_codec(&i2c->dev);
3119
3120 return 0;
3121 }
3122
3123 static struct i2c_driver rt5645_i2c_driver = {
3124 .driver = {
3125 .name = "rt5645",
3126 .owner = THIS_MODULE,
3127 .acpi_match_table = ACPI_PTR(rt5645_acpi_match),
3128 },
3129 .probe = rt5645_i2c_probe,
3130 .remove = rt5645_i2c_remove,
3131 .id_table = rt5645_i2c_id,
3132 };
3133 module_i2c_driver(rt5645_i2c_driver);
3134
3135 MODULE_DESCRIPTION("ASoC RT5645 driver");
3136 MODULE_AUTHOR("Bard Liao <bardliao@realtek.com>");
3137 MODULE_LICENSE("GPL v2");
Linux kernel - Deliverables
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