89863a5bc83072221aafe520dfeac8338d9d3ff4
[deliverable/linux.git] / sound / soc / codecs / wm8750.c
1 /*
2 * wm8750.c -- WM8750 ALSA SoC audio driver
3 *
4 * Copyright 2005 Openedhand Ltd.
5 *
6 * Author: Richard Purdie <richard@openedhand.com>
7 *
8 * Based on WM8753.c
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 */
14
15 #include <linux/module.h>
16 #include <linux/moduleparam.h>
17 #include <linux/init.h>
18 #include <linux/delay.h>
19 #include <linux/pm.h>
20 #include <linux/i2c.h>
21 #include <linux/platform_device.h>
22 #include <linux/spi/spi.h>
23 #include <linux/slab.h>
24 #include <sound/core.h>
25 #include <sound/pcm.h>
26 #include <sound/pcm_params.h>
27 #include <sound/soc.h>
28 #include <sound/soc-dapm.h>
29 #include <sound/initval.h>
30
31 #include "wm8750.h"
32
33 /*
34 * wm8750 register cache
35 * We can't read the WM8750 register space when we
36 * are using 2 wire for device control, so we cache them instead.
37 */
38 static const u16 wm8750_reg[] = {
39 0x0097, 0x0097, 0x0079, 0x0079, /* 0 */
40 0x0000, 0x0008, 0x0000, 0x000a, /* 4 */
41 0x0000, 0x0000, 0x00ff, 0x00ff, /* 8 */
42 0x000f, 0x000f, 0x0000, 0x0000, /* 12 */
43 0x0000, 0x007b, 0x0000, 0x0032, /* 16 */
44 0x0000, 0x00c3, 0x00c3, 0x00c0, /* 20 */
45 0x0000, 0x0000, 0x0000, 0x0000, /* 24 */
46 0x0000, 0x0000, 0x0000, 0x0000, /* 28 */
47 0x0000, 0x0000, 0x0050, 0x0050, /* 32 */
48 0x0050, 0x0050, 0x0050, 0x0050, /* 36 */
49 0x0079, 0x0079, 0x0079, /* 40 */
50 };
51
52 /* codec private data */
53 struct wm8750_priv {
54 unsigned int sysclk;
55 enum snd_soc_control_type control_type;
56 void *control_data;
57 u16 reg_cache[ARRAY_SIZE(wm8750_reg)];
58 };
59
60 #define wm8750_reset(c) snd_soc_write(c, WM8750_RESET, 0)
61
62 /*
63 * WM8750 Controls
64 */
65 static const char *wm8750_bass[] = {"Linear Control", "Adaptive Boost"};
66 static const char *wm8750_bass_filter[] = { "130Hz @ 48kHz", "200Hz @ 48kHz" };
67 static const char *wm8750_treble[] = {"8kHz", "4kHz"};
68 static const char *wm8750_3d_lc[] = {"200Hz", "500Hz"};
69 static const char *wm8750_3d_uc[] = {"2.2kHz", "1.5kHz"};
70 static const char *wm8750_3d_func[] = {"Capture", "Playback"};
71 static const char *wm8750_alc_func[] = {"Off", "Right", "Left", "Stereo"};
72 static const char *wm8750_ng_type[] = {"Constant PGA Gain",
73 "Mute ADC Output"};
74 static const char *wm8750_line_mux[] = {"Line 1", "Line 2", "Line 3", "PGA",
75 "Differential"};
76 static const char *wm8750_pga_sel[] = {"Line 1", "Line 2", "Line 3",
77 "Differential"};
78 static const char *wm8750_out3[] = {"VREF", "ROUT1 + Vol", "MonoOut",
79 "ROUT1"};
80 static const char *wm8750_diff_sel[] = {"Line 1", "Line 2"};
81 static const char *wm8750_adcpol[] = {"Normal", "L Invert", "R Invert",
82 "L + R Invert"};
83 static const char *wm8750_deemph[] = {"None", "32Khz", "44.1Khz", "48Khz"};
84 static const char *wm8750_mono_mux[] = {"Stereo", "Mono (Left)",
85 "Mono (Right)", "Digital Mono"};
86
87 static const struct soc_enum wm8750_enum[] = {
88 SOC_ENUM_SINGLE(WM8750_BASS, 7, 2, wm8750_bass),
89 SOC_ENUM_SINGLE(WM8750_BASS, 6, 2, wm8750_bass_filter),
90 SOC_ENUM_SINGLE(WM8750_TREBLE, 6, 2, wm8750_treble),
91 SOC_ENUM_SINGLE(WM8750_3D, 5, 2, wm8750_3d_lc),
92 SOC_ENUM_SINGLE(WM8750_3D, 6, 2, wm8750_3d_uc),
93 SOC_ENUM_SINGLE(WM8750_3D, 7, 2, wm8750_3d_func),
94 SOC_ENUM_SINGLE(WM8750_ALC1, 7, 4, wm8750_alc_func),
95 SOC_ENUM_SINGLE(WM8750_NGATE, 1, 2, wm8750_ng_type),
96 SOC_ENUM_SINGLE(WM8750_LOUTM1, 0, 5, wm8750_line_mux),
97 SOC_ENUM_SINGLE(WM8750_ROUTM1, 0, 5, wm8750_line_mux),
98 SOC_ENUM_SINGLE(WM8750_LADCIN, 6, 4, wm8750_pga_sel), /* 10 */
99 SOC_ENUM_SINGLE(WM8750_RADCIN, 6, 4, wm8750_pga_sel),
100 SOC_ENUM_SINGLE(WM8750_ADCTL2, 7, 4, wm8750_out3),
101 SOC_ENUM_SINGLE(WM8750_ADCIN, 8, 2, wm8750_diff_sel),
102 SOC_ENUM_SINGLE(WM8750_ADCDAC, 5, 4, wm8750_adcpol),
103 SOC_ENUM_SINGLE(WM8750_ADCDAC, 1, 4, wm8750_deemph),
104 SOC_ENUM_SINGLE(WM8750_ADCIN, 6, 4, wm8750_mono_mux), /* 16 */
105
106 };
107
108 static const struct snd_kcontrol_new wm8750_snd_controls[] = {
109
110 SOC_DOUBLE_R("Capture Volume", WM8750_LINVOL, WM8750_RINVOL, 0, 63, 0),
111 SOC_DOUBLE_R("Capture ZC Switch", WM8750_LINVOL, WM8750_RINVOL, 6, 1, 0),
112 SOC_DOUBLE_R("Capture Switch", WM8750_LINVOL, WM8750_RINVOL, 7, 1, 1),
113
114 SOC_DOUBLE_R("Headphone Playback ZC Switch", WM8750_LOUT1V,
115 WM8750_ROUT1V, 7, 1, 0),
116 SOC_DOUBLE_R("Speaker Playback ZC Switch", WM8750_LOUT2V,
117 WM8750_ROUT2V, 7, 1, 0),
118
119 SOC_ENUM("Playback De-emphasis", wm8750_enum[15]),
120
121 SOC_ENUM("Capture Polarity", wm8750_enum[14]),
122 SOC_SINGLE("Playback 6dB Attenuate", WM8750_ADCDAC, 7, 1, 0),
123 SOC_SINGLE("Capture 6dB Attenuate", WM8750_ADCDAC, 8, 1, 0),
124
125 SOC_DOUBLE_R("PCM Volume", WM8750_LDAC, WM8750_RDAC, 0, 255, 0),
126
127 SOC_ENUM("Bass Boost", wm8750_enum[0]),
128 SOC_ENUM("Bass Filter", wm8750_enum[1]),
129 SOC_SINGLE("Bass Volume", WM8750_BASS, 0, 15, 1),
130
131 SOC_SINGLE("Treble Volume", WM8750_TREBLE, 0, 15, 1),
132 SOC_ENUM("Treble Cut-off", wm8750_enum[2]),
133
134 SOC_SINGLE("3D Switch", WM8750_3D, 0, 1, 0),
135 SOC_SINGLE("3D Volume", WM8750_3D, 1, 15, 0),
136 SOC_ENUM("3D Lower Cut-off", wm8750_enum[3]),
137 SOC_ENUM("3D Upper Cut-off", wm8750_enum[4]),
138 SOC_ENUM("3D Mode", wm8750_enum[5]),
139
140 SOC_SINGLE("ALC Capture Target Volume", WM8750_ALC1, 0, 7, 0),
141 SOC_SINGLE("ALC Capture Max Volume", WM8750_ALC1, 4, 7, 0),
142 SOC_ENUM("ALC Capture Function", wm8750_enum[6]),
143 SOC_SINGLE("ALC Capture ZC Switch", WM8750_ALC2, 7, 1, 0),
144 SOC_SINGLE("ALC Capture Hold Time", WM8750_ALC2, 0, 15, 0),
145 SOC_SINGLE("ALC Capture Decay Time", WM8750_ALC3, 4, 15, 0),
146 SOC_SINGLE("ALC Capture Attack Time", WM8750_ALC3, 0, 15, 0),
147 SOC_SINGLE("ALC Capture NG Threshold", WM8750_NGATE, 3, 31, 0),
148 SOC_ENUM("ALC Capture NG Type", wm8750_enum[4]),
149 SOC_SINGLE("ALC Capture NG Switch", WM8750_NGATE, 0, 1, 0),
150
151 SOC_SINGLE("Left ADC Capture Volume", WM8750_LADC, 0, 255, 0),
152 SOC_SINGLE("Right ADC Capture Volume", WM8750_RADC, 0, 255, 0),
153
154 SOC_SINGLE("ZC Timeout Switch", WM8750_ADCTL1, 0, 1, 0),
155 SOC_SINGLE("Playback Invert Switch", WM8750_ADCTL1, 1, 1, 0),
156
157 SOC_SINGLE("Right Speaker Playback Invert Switch", WM8750_ADCTL2, 4, 1, 0),
158
159 /* Unimplemented */
160 /* ADCDAC Bit 0 - ADCHPD */
161 /* ADCDAC Bit 4 - HPOR */
162 /* ADCTL1 Bit 2,3 - DATSEL */
163 /* ADCTL1 Bit 4,5 - DMONOMIX */
164 /* ADCTL1 Bit 6,7 - VSEL */
165 /* ADCTL2 Bit 2 - LRCM */
166 /* ADCTL2 Bit 3 - TRI */
167 /* ADCTL3 Bit 5 - HPFLREN */
168 /* ADCTL3 Bit 6 - VROI */
169 /* ADCTL3 Bit 7,8 - ADCLRM */
170 /* ADCIN Bit 4 - LDCM */
171 /* ADCIN Bit 5 - RDCM */
172
173 SOC_DOUBLE_R("Mic Boost", WM8750_LADCIN, WM8750_RADCIN, 4, 3, 0),
174
175 SOC_DOUBLE_R("Bypass Left Playback Volume", WM8750_LOUTM1,
176 WM8750_LOUTM2, 4, 7, 1),
177 SOC_DOUBLE_R("Bypass Right Playback Volume", WM8750_ROUTM1,
178 WM8750_ROUTM2, 4, 7, 1),
179 SOC_DOUBLE_R("Bypass Mono Playback Volume", WM8750_MOUTM1,
180 WM8750_MOUTM2, 4, 7, 1),
181
182 SOC_SINGLE("Mono Playback ZC Switch", WM8750_MOUTV, 7, 1, 0),
183
184 SOC_DOUBLE_R("Headphone Playback Volume", WM8750_LOUT1V, WM8750_ROUT1V,
185 0, 127, 0),
186 SOC_DOUBLE_R("Speaker Playback Volume", WM8750_LOUT2V, WM8750_ROUT2V,
187 0, 127, 0),
188
189 SOC_SINGLE("Mono Playback Volume", WM8750_MOUTV, 0, 127, 0),
190
191 };
192
193 /*
194 * DAPM Controls
195 */
196
197 /* Left Mixer */
198 static const struct snd_kcontrol_new wm8750_left_mixer_controls[] = {
199 SOC_DAPM_SINGLE("Playback Switch", WM8750_LOUTM1, 8, 1, 0),
200 SOC_DAPM_SINGLE("Left Bypass Switch", WM8750_LOUTM1, 7, 1, 0),
201 SOC_DAPM_SINGLE("Right Playback Switch", WM8750_LOUTM2, 8, 1, 0),
202 SOC_DAPM_SINGLE("Right Bypass Switch", WM8750_LOUTM2, 7, 1, 0),
203 };
204
205 /* Right Mixer */
206 static const struct snd_kcontrol_new wm8750_right_mixer_controls[] = {
207 SOC_DAPM_SINGLE("Left Playback Switch", WM8750_ROUTM1, 8, 1, 0),
208 SOC_DAPM_SINGLE("Left Bypass Switch", WM8750_ROUTM1, 7, 1, 0),
209 SOC_DAPM_SINGLE("Playback Switch", WM8750_ROUTM2, 8, 1, 0),
210 SOC_DAPM_SINGLE("Right Bypass Switch", WM8750_ROUTM2, 7, 1, 0),
211 };
212
213 /* Mono Mixer */
214 static const struct snd_kcontrol_new wm8750_mono_mixer_controls[] = {
215 SOC_DAPM_SINGLE("Left Playback Switch", WM8750_MOUTM1, 8, 1, 0),
216 SOC_DAPM_SINGLE("Left Bypass Switch", WM8750_MOUTM1, 7, 1, 0),
217 SOC_DAPM_SINGLE("Right Playback Switch", WM8750_MOUTM2, 8, 1, 0),
218 SOC_DAPM_SINGLE("Right Bypass Switch", WM8750_MOUTM2, 7, 1, 0),
219 };
220
221 /* Left Line Mux */
222 static const struct snd_kcontrol_new wm8750_left_line_controls =
223 SOC_DAPM_ENUM("Route", wm8750_enum[8]);
224
225 /* Right Line Mux */
226 static const struct snd_kcontrol_new wm8750_right_line_controls =
227 SOC_DAPM_ENUM("Route", wm8750_enum[9]);
228
229 /* Left PGA Mux */
230 static const struct snd_kcontrol_new wm8750_left_pga_controls =
231 SOC_DAPM_ENUM("Route", wm8750_enum[10]);
232
233 /* Right PGA Mux */
234 static const struct snd_kcontrol_new wm8750_right_pga_controls =
235 SOC_DAPM_ENUM("Route", wm8750_enum[11]);
236
237 /* Out 3 Mux */
238 static const struct snd_kcontrol_new wm8750_out3_controls =
239 SOC_DAPM_ENUM("Route", wm8750_enum[12]);
240
241 /* Differential Mux */
242 static const struct snd_kcontrol_new wm8750_diffmux_controls =
243 SOC_DAPM_ENUM("Route", wm8750_enum[13]);
244
245 /* Mono ADC Mux */
246 static const struct snd_kcontrol_new wm8750_monomux_controls =
247 SOC_DAPM_ENUM("Route", wm8750_enum[16]);
248
249 static const struct snd_soc_dapm_widget wm8750_dapm_widgets[] = {
250 SND_SOC_DAPM_MIXER("Left Mixer", SND_SOC_NOPM, 0, 0,
251 &wm8750_left_mixer_controls[0],
252 ARRAY_SIZE(wm8750_left_mixer_controls)),
253 SND_SOC_DAPM_MIXER("Right Mixer", SND_SOC_NOPM, 0, 0,
254 &wm8750_right_mixer_controls[0],
255 ARRAY_SIZE(wm8750_right_mixer_controls)),
256 SND_SOC_DAPM_MIXER("Mono Mixer", WM8750_PWR2, 2, 0,
257 &wm8750_mono_mixer_controls[0],
258 ARRAY_SIZE(wm8750_mono_mixer_controls)),
259
260 SND_SOC_DAPM_PGA("Right Out 2", WM8750_PWR2, 3, 0, NULL, 0),
261 SND_SOC_DAPM_PGA("Left Out 2", WM8750_PWR2, 4, 0, NULL, 0),
262 SND_SOC_DAPM_PGA("Right Out 1", WM8750_PWR2, 5, 0, NULL, 0),
263 SND_SOC_DAPM_PGA("Left Out 1", WM8750_PWR2, 6, 0, NULL, 0),
264 SND_SOC_DAPM_DAC("Right DAC", "Right Playback", WM8750_PWR2, 7, 0),
265 SND_SOC_DAPM_DAC("Left DAC", "Left Playback", WM8750_PWR2, 8, 0),
266
267 SND_SOC_DAPM_MICBIAS("Mic Bias", WM8750_PWR1, 1, 0),
268 SND_SOC_DAPM_ADC("Right ADC", "Right Capture", WM8750_PWR1, 2, 0),
269 SND_SOC_DAPM_ADC("Left ADC", "Left Capture", WM8750_PWR1, 3, 0),
270
271 SND_SOC_DAPM_MUX("Left PGA Mux", WM8750_PWR1, 5, 0,
272 &wm8750_left_pga_controls),
273 SND_SOC_DAPM_MUX("Right PGA Mux", WM8750_PWR1, 4, 0,
274 &wm8750_right_pga_controls),
275 SND_SOC_DAPM_MUX("Left Line Mux", SND_SOC_NOPM, 0, 0,
276 &wm8750_left_line_controls),
277 SND_SOC_DAPM_MUX("Right Line Mux", SND_SOC_NOPM, 0, 0,
278 &wm8750_right_line_controls),
279
280 SND_SOC_DAPM_MUX("Out3 Mux", SND_SOC_NOPM, 0, 0, &wm8750_out3_controls),
281 SND_SOC_DAPM_PGA("Out 3", WM8750_PWR2, 1, 0, NULL, 0),
282 SND_SOC_DAPM_PGA("Mono Out 1", WM8750_PWR2, 2, 0, NULL, 0),
283
284 SND_SOC_DAPM_MUX("Differential Mux", SND_SOC_NOPM, 0, 0,
285 &wm8750_diffmux_controls),
286 SND_SOC_DAPM_MUX("Left ADC Mux", SND_SOC_NOPM, 0, 0,
287 &wm8750_monomux_controls),
288 SND_SOC_DAPM_MUX("Right ADC Mux", SND_SOC_NOPM, 0, 0,
289 &wm8750_monomux_controls),
290
291 SND_SOC_DAPM_OUTPUT("LOUT1"),
292 SND_SOC_DAPM_OUTPUT("ROUT1"),
293 SND_SOC_DAPM_OUTPUT("LOUT2"),
294 SND_SOC_DAPM_OUTPUT("ROUT2"),
295 SND_SOC_DAPM_OUTPUT("MONO1"),
296 SND_SOC_DAPM_OUTPUT("OUT3"),
297 SND_SOC_DAPM_OUTPUT("VREF"),
298
299 SND_SOC_DAPM_INPUT("LINPUT1"),
300 SND_SOC_DAPM_INPUT("LINPUT2"),
301 SND_SOC_DAPM_INPUT("LINPUT3"),
302 SND_SOC_DAPM_INPUT("RINPUT1"),
303 SND_SOC_DAPM_INPUT("RINPUT2"),
304 SND_SOC_DAPM_INPUT("RINPUT3"),
305 };
306
307 static const struct snd_soc_dapm_route audio_map[] = {
308 /* left mixer */
309 {"Left Mixer", "Playback Switch", "Left DAC"},
310 {"Left Mixer", "Left Bypass Switch", "Left Line Mux"},
311 {"Left Mixer", "Right Playback Switch", "Right DAC"},
312 {"Left Mixer", "Right Bypass Switch", "Right Line Mux"},
313
314 /* right mixer */
315 {"Right Mixer", "Left Playback Switch", "Left DAC"},
316 {"Right Mixer", "Left Bypass Switch", "Left Line Mux"},
317 {"Right Mixer", "Playback Switch", "Right DAC"},
318 {"Right Mixer", "Right Bypass Switch", "Right Line Mux"},
319
320 /* left out 1 */
321 {"Left Out 1", NULL, "Left Mixer"},
322 {"LOUT1", NULL, "Left Out 1"},
323
324 /* left out 2 */
325 {"Left Out 2", NULL, "Left Mixer"},
326 {"LOUT2", NULL, "Left Out 2"},
327
328 /* right out 1 */
329 {"Right Out 1", NULL, "Right Mixer"},
330 {"ROUT1", NULL, "Right Out 1"},
331
332 /* right out 2 */
333 {"Right Out 2", NULL, "Right Mixer"},
334 {"ROUT2", NULL, "Right Out 2"},
335
336 /* mono mixer */
337 {"Mono Mixer", "Left Playback Switch", "Left DAC"},
338 {"Mono Mixer", "Left Bypass Switch", "Left Line Mux"},
339 {"Mono Mixer", "Right Playback Switch", "Right DAC"},
340 {"Mono Mixer", "Right Bypass Switch", "Right Line Mux"},
341
342 /* mono out */
343 {"Mono Out 1", NULL, "Mono Mixer"},
344 {"MONO1", NULL, "Mono Out 1"},
345
346 /* out 3 */
347 {"Out3 Mux", "VREF", "VREF"},
348 {"Out3 Mux", "ROUT1 + Vol", "ROUT1"},
349 {"Out3 Mux", "ROUT1", "Right Mixer"},
350 {"Out3 Mux", "MonoOut", "MONO1"},
351 {"Out 3", NULL, "Out3 Mux"},
352 {"OUT3", NULL, "Out 3"},
353
354 /* Left Line Mux */
355 {"Left Line Mux", "Line 1", "LINPUT1"},
356 {"Left Line Mux", "Line 2", "LINPUT2"},
357 {"Left Line Mux", "Line 3", "LINPUT3"},
358 {"Left Line Mux", "PGA", "Left PGA Mux"},
359 {"Left Line Mux", "Differential", "Differential Mux"},
360
361 /* Right Line Mux */
362 {"Right Line Mux", "Line 1", "RINPUT1"},
363 {"Right Line Mux", "Line 2", "RINPUT2"},
364 {"Right Line Mux", "Line 3", "RINPUT3"},
365 {"Right Line Mux", "PGA", "Right PGA Mux"},
366 {"Right Line Mux", "Differential", "Differential Mux"},
367
368 /* Left PGA Mux */
369 {"Left PGA Mux", "Line 1", "LINPUT1"},
370 {"Left PGA Mux", "Line 2", "LINPUT2"},
371 {"Left PGA Mux", "Line 3", "LINPUT3"},
372 {"Left PGA Mux", "Differential", "Differential Mux"},
373
374 /* Right PGA Mux */
375 {"Right PGA Mux", "Line 1", "RINPUT1"},
376 {"Right PGA Mux", "Line 2", "RINPUT2"},
377 {"Right PGA Mux", "Line 3", "RINPUT3"},
378 {"Right PGA Mux", "Differential", "Differential Mux"},
379
380 /* Differential Mux */
381 {"Differential Mux", "Line 1", "LINPUT1"},
382 {"Differential Mux", "Line 1", "RINPUT1"},
383 {"Differential Mux", "Line 2", "LINPUT2"},
384 {"Differential Mux", "Line 2", "RINPUT2"},
385
386 /* Left ADC Mux */
387 {"Left ADC Mux", "Stereo", "Left PGA Mux"},
388 {"Left ADC Mux", "Mono (Left)", "Left PGA Mux"},
389 {"Left ADC Mux", "Digital Mono", "Left PGA Mux"},
390
391 /* Right ADC Mux */
392 {"Right ADC Mux", "Stereo", "Right PGA Mux"},
393 {"Right ADC Mux", "Mono (Right)", "Right PGA Mux"},
394 {"Right ADC Mux", "Digital Mono", "Right PGA Mux"},
395
396 /* ADC */
397 {"Left ADC", NULL, "Left ADC Mux"},
398 {"Right ADC", NULL, "Right ADC Mux"},
399 };
400
401 static int wm8750_add_widgets(struct snd_soc_codec *codec)
402 {
403 snd_soc_dapm_new_controls(codec, wm8750_dapm_widgets,
404 ARRAY_SIZE(wm8750_dapm_widgets));
405
406 snd_soc_dapm_add_routes(codec, audio_map, ARRAY_SIZE(audio_map));
407
408 return 0;
409 }
410
411 struct _coeff_div {
412 u32 mclk;
413 u32 rate;
414 u16 fs;
415 u8 sr:5;
416 u8 usb:1;
417 };
418
419 /* codec hifi mclk clock divider coefficients */
420 static const struct _coeff_div coeff_div[] = {
421 /* 8k */
422 {12288000, 8000, 1536, 0x6, 0x0},
423 {11289600, 8000, 1408, 0x16, 0x0},
424 {18432000, 8000, 2304, 0x7, 0x0},
425 {16934400, 8000, 2112, 0x17, 0x0},
426 {12000000, 8000, 1500, 0x6, 0x1},
427
428 /* 11.025k */
429 {11289600, 11025, 1024, 0x18, 0x0},
430 {16934400, 11025, 1536, 0x19, 0x0},
431 {12000000, 11025, 1088, 0x19, 0x1},
432
433 /* 16k */
434 {12288000, 16000, 768, 0xa, 0x0},
435 {18432000, 16000, 1152, 0xb, 0x0},
436 {12000000, 16000, 750, 0xa, 0x1},
437
438 /* 22.05k */
439 {11289600, 22050, 512, 0x1a, 0x0},
440 {16934400, 22050, 768, 0x1b, 0x0},
441 {12000000, 22050, 544, 0x1b, 0x1},
442
443 /* 32k */
444 {12288000, 32000, 384, 0xc, 0x0},
445 {18432000, 32000, 576, 0xd, 0x0},
446 {12000000, 32000, 375, 0xa, 0x1},
447
448 /* 44.1k */
449 {11289600, 44100, 256, 0x10, 0x0},
450 {16934400, 44100, 384, 0x11, 0x0},
451 {12000000, 44100, 272, 0x11, 0x1},
452
453 /* 48k */
454 {12288000, 48000, 256, 0x0, 0x0},
455 {18432000, 48000, 384, 0x1, 0x0},
456 {12000000, 48000, 250, 0x0, 0x1},
457
458 /* 88.2k */
459 {11289600, 88200, 128, 0x1e, 0x0},
460 {16934400, 88200, 192, 0x1f, 0x0},
461 {12000000, 88200, 136, 0x1f, 0x1},
462
463 /* 96k */
464 {12288000, 96000, 128, 0xe, 0x0},
465 {18432000, 96000, 192, 0xf, 0x0},
466 {12000000, 96000, 125, 0xe, 0x1},
467 };
468
469 static inline int get_coeff(int mclk, int rate)
470 {
471 int i;
472
473 for (i = 0; i < ARRAY_SIZE(coeff_div); i++) {
474 if (coeff_div[i].rate == rate && coeff_div[i].mclk == mclk)
475 return i;
476 }
477
478 printk(KERN_ERR "wm8750: could not get coeff for mclk %d @ rate %d\n",
479 mclk, rate);
480 return -EINVAL;
481 }
482
483 static int wm8750_set_dai_sysclk(struct snd_soc_dai *codec_dai,
484 int clk_id, unsigned int freq, int dir)
485 {
486 struct snd_soc_codec *codec = codec_dai->codec;
487 struct wm8750_priv *wm8750 = snd_soc_codec_get_drvdata(codec);
488
489 switch (freq) {
490 case 11289600:
491 case 12000000:
492 case 12288000:
493 case 16934400:
494 case 18432000:
495 wm8750->sysclk = freq;
496 return 0;
497 }
498 return -EINVAL;
499 }
500
501 static int wm8750_set_dai_fmt(struct snd_soc_dai *codec_dai,
502 unsigned int fmt)
503 {
504 struct snd_soc_codec *codec = codec_dai->codec;
505 u16 iface = 0;
506
507 /* set master/slave audio interface */
508 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
509 case SND_SOC_DAIFMT_CBM_CFM:
510 iface = 0x0040;
511 break;
512 case SND_SOC_DAIFMT_CBS_CFS:
513 break;
514 default:
515 return -EINVAL;
516 }
517
518 /* interface format */
519 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
520 case SND_SOC_DAIFMT_I2S:
521 iface |= 0x0002;
522 break;
523 case SND_SOC_DAIFMT_RIGHT_J:
524 break;
525 case SND_SOC_DAIFMT_LEFT_J:
526 iface |= 0x0001;
527 break;
528 case SND_SOC_DAIFMT_DSP_A:
529 iface |= 0x0003;
530 break;
531 case SND_SOC_DAIFMT_DSP_B:
532 iface |= 0x0013;
533 break;
534 default:
535 return -EINVAL;
536 }
537
538 /* clock inversion */
539 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
540 case SND_SOC_DAIFMT_NB_NF:
541 break;
542 case SND_SOC_DAIFMT_IB_IF:
543 iface |= 0x0090;
544 break;
545 case SND_SOC_DAIFMT_IB_NF:
546 iface |= 0x0080;
547 break;
548 case SND_SOC_DAIFMT_NB_IF:
549 iface |= 0x0010;
550 break;
551 default:
552 return -EINVAL;
553 }
554
555 snd_soc_write(codec, WM8750_IFACE, iface);
556 return 0;
557 }
558
559 static int wm8750_pcm_hw_params(struct snd_pcm_substream *substream,
560 struct snd_pcm_hw_params *params,
561 struct snd_soc_dai *dai)
562 {
563 struct snd_soc_pcm_runtime *rtd = substream->private_data;
564 struct snd_soc_codec *codec = rtd->codec;
565 struct wm8750_priv *wm8750 = snd_soc_codec_get_drvdata(codec);
566 u16 iface = snd_soc_read(codec, WM8750_IFACE) & 0x1f3;
567 u16 srate = snd_soc_read(codec, WM8750_SRATE) & 0x1c0;
568 int coeff = get_coeff(wm8750->sysclk, params_rate(params));
569
570 /* bit size */
571 switch (params_format(params)) {
572 case SNDRV_PCM_FORMAT_S16_LE:
573 break;
574 case SNDRV_PCM_FORMAT_S20_3LE:
575 iface |= 0x0004;
576 break;
577 case SNDRV_PCM_FORMAT_S24_LE:
578 iface |= 0x0008;
579 break;
580 case SNDRV_PCM_FORMAT_S32_LE:
581 iface |= 0x000c;
582 break;
583 }
584
585 /* set iface & srate */
586 snd_soc_write(codec, WM8750_IFACE, iface);
587 if (coeff >= 0)
588 snd_soc_write(codec, WM8750_SRATE, srate |
589 (coeff_div[coeff].sr << 1) | coeff_div[coeff].usb);
590
591 return 0;
592 }
593
594 static int wm8750_mute(struct snd_soc_dai *dai, int mute)
595 {
596 struct snd_soc_codec *codec = dai->codec;
597 u16 mute_reg = snd_soc_read(codec, WM8750_ADCDAC) & 0xfff7;
598
599 if (mute)
600 snd_soc_write(codec, WM8750_ADCDAC, mute_reg | 0x8);
601 else
602 snd_soc_write(codec, WM8750_ADCDAC, mute_reg);
603 return 0;
604 }
605
606 static int wm8750_set_bias_level(struct snd_soc_codec *codec,
607 enum snd_soc_bias_level level)
608 {
609 u16 pwr_reg = snd_soc_read(codec, WM8750_PWR1) & 0xfe3e;
610
611 switch (level) {
612 case SND_SOC_BIAS_ON:
613 /* set vmid to 50k and unmute dac */
614 snd_soc_write(codec, WM8750_PWR1, pwr_reg | 0x00c0);
615 break;
616 case SND_SOC_BIAS_PREPARE:
617 break;
618 case SND_SOC_BIAS_STANDBY:
619 if (codec->bias_level == SND_SOC_BIAS_OFF) {
620 /* Set VMID to 5k */
621 snd_soc_write(codec, WM8750_PWR1, pwr_reg | 0x01c1);
622
623 /* ...and ramp */
624 msleep(1000);
625 }
626
627 /* mute dac and set vmid to 500k, enable VREF */
628 snd_soc_write(codec, WM8750_PWR1, pwr_reg | 0x0141);
629 break;
630 case SND_SOC_BIAS_OFF:
631 snd_soc_write(codec, WM8750_PWR1, 0x0001);
632 break;
633 }
634 codec->bias_level = level;
635 return 0;
636 }
637
638 #define WM8750_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 |\
639 SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 | SNDRV_PCM_RATE_44100 | \
640 SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000)
641
642 #define WM8750_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
643 SNDRV_PCM_FMTBIT_S24_LE)
644
645 static struct snd_soc_dai_ops wm8750_dai_ops = {
646 .hw_params = wm8750_pcm_hw_params,
647 .digital_mute = wm8750_mute,
648 .set_fmt = wm8750_set_dai_fmt,
649 .set_sysclk = wm8750_set_dai_sysclk,
650 };
651
652 static struct snd_soc_dai_driver wm8750_dai = {
653 .name = "wm8750-hifi",
654 .playback = {
655 .stream_name = "Playback",
656 .channels_min = 1,
657 .channels_max = 2,
658 .rates = WM8750_RATES,
659 .formats = WM8750_FORMATS,},
660 .capture = {
661 .stream_name = "Capture",
662 .channels_min = 1,
663 .channels_max = 2,
664 .rates = WM8750_RATES,
665 .formats = WM8750_FORMATS,},
666 .ops = &wm8750_dai_ops,
667 };
668
669 static int wm8750_suspend(struct snd_soc_codec *codec, pm_message_t state)
670 {
671 wm8750_set_bias_level(codec, SND_SOC_BIAS_OFF);
672 return 0;
673 }
674
675 static int wm8750_resume(struct snd_soc_codec *codec)
676 {
677 int i;
678 u8 data[2];
679 u16 *cache = codec->reg_cache;
680
681 /* Sync reg_cache with the hardware */
682 for (i = 0; i < ARRAY_SIZE(wm8750_reg); i++) {
683 if (i == WM8750_RESET)
684 continue;
685 data[0] = (i << 1) | ((cache[i] >> 8) & 0x0001);
686 data[1] = cache[i] & 0x00ff;
687 codec->hw_write(codec->control_data, data, 2);
688 }
689
690 wm8750_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
691
692 return 0;
693 }
694
695 static int wm8750_probe(struct snd_soc_codec *codec)
696 {
697 struct wm8750_priv *wm8750 = snd_soc_codec_get_drvdata(codec);
698 int reg, ret;
699
700 codec->control_data = wm8750->control_data;
701 ret = snd_soc_codec_set_cache_io(codec, 7, 9, wm8750->control_type);
702 if (ret < 0) {
703 printk(KERN_ERR "wm8750: failed to set cache I/O: %d\n", ret);
704 return ret;
705 }
706
707 ret = wm8750_reset(codec);
708 if (ret < 0) {
709 printk(KERN_ERR "wm8750: failed to reset: %d\n", ret);
710 return ret;
711 }
712
713 /* charge output caps */
714 wm8750_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
715
716 /* set the update bits */
717 reg = snd_soc_read(codec, WM8750_LDAC);
718 snd_soc_write(codec, WM8750_LDAC, reg | 0x0100);
719 reg = snd_soc_read(codec, WM8750_RDAC);
720 snd_soc_write(codec, WM8750_RDAC, reg | 0x0100);
721 reg = snd_soc_read(codec, WM8750_LOUT1V);
722 snd_soc_write(codec, WM8750_LOUT1V, reg | 0x0100);
723 reg = snd_soc_read(codec, WM8750_ROUT1V);
724 snd_soc_write(codec, WM8750_ROUT1V, reg | 0x0100);
725 reg = snd_soc_read(codec, WM8750_LOUT2V);
726 snd_soc_write(codec, WM8750_LOUT2V, reg | 0x0100);
727 reg = snd_soc_read(codec, WM8750_ROUT2V);
728 snd_soc_write(codec, WM8750_ROUT2V, reg | 0x0100);
729 reg = snd_soc_read(codec, WM8750_LINVOL);
730 snd_soc_write(codec, WM8750_LINVOL, reg | 0x0100);
731 reg = snd_soc_read(codec, WM8750_RINVOL);
732 snd_soc_write(codec, WM8750_RINVOL, reg | 0x0100);
733
734 snd_soc_add_controls(codec, wm8750_snd_controls,
735 ARRAY_SIZE(wm8750_snd_controls));
736 wm8750_add_widgets(codec);
737 return ret;
738 }
739
740 static int wm8750_remove(struct snd_soc_codec *codec)
741 {
742 wm8750_set_bias_level(codec, SND_SOC_BIAS_OFF);
743 return 0;
744 }
745
746 static struct snd_soc_codec_driver soc_codec_dev_wm8750 = {
747 .probe = wm8750_probe,
748 .remove = wm8750_remove,
749 .suspend = wm8750_suspend,
750 .resume = wm8750_resume,
751 .set_bias_level = wm8750_set_bias_level,
752 .reg_cache_size = sizeof(wm8750_reg),
753 .reg_word_size = sizeof(u16),
754 .reg_cache_default = wm8750_reg,
755 };
756
757 #if defined(CONFIG_SPI_MASTER)
758 static int __devinit wm8750_spi_probe(struct spi_device *spi)
759 {
760 struct wm8750_priv *wm8750;
761 int ret;
762
763 wm8750 = kzalloc(sizeof(struct wm8750_priv), GFP_KERNEL);
764 if (wm8750 == NULL)
765 return -ENOMEM;
766
767 wm8750->control_data = spi;
768 wm8750->control_type = SND_SOC_SPI;
769 spi_set_drvdata(spi, wm8750);
770
771 ret = snd_soc_register_codec(&spi->dev,
772 &soc_codec_dev_wm8750, &wm8750_dai, 1);
773 if (ret < 0)
774 kfree(wm8750);
775 return ret;
776 }
777
778 static int __devexit wm8750_spi_remove(struct spi_device *spi)
779 {
780 snd_soc_unregister_codec(&spi->dev);
781 kfree(spi_get_drvdata(spi));
782 return 0;
783 }
784
785 static struct spi_driver wm8750_spi_driver = {
786 .driver = {
787 .name = "wm8750-codec",
788 .bus = &spi_bus_type,
789 .owner = THIS_MODULE,
790 },
791 .probe = wm8750_spi_probe,
792 .remove = __devexit_p(wm8750_spi_remove),
793 };
794 #endif /* CONFIG_SPI_MASTER */
795
796 #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
797 static __devinit int wm8750_i2c_probe(struct i2c_client *i2c,
798 const struct i2c_device_id *id)
799 {
800 struct wm8750_priv *wm8750;
801 int ret;
802
803 wm8750 = kzalloc(sizeof(struct wm8750_priv), GFP_KERNEL);
804 if (wm8750 == NULL)
805 return -ENOMEM;
806
807 i2c_set_clientdata(i2c, wm8750);
808 wm8750->control_data = i2c;
809 wm8750->control_type = SND_SOC_I2C;
810
811 ret = snd_soc_register_codec(&i2c->dev,
812 &soc_codec_dev_wm8750, &wm8750_dai, 1);
813 if (ret < 0)
814 kfree(wm8750);
815 return ret;
816 }
817
818 static __devexit int wm8750_i2c_remove(struct i2c_client *client)
819 {
820 snd_soc_unregister_codec(&client->dev);
821 kfree(i2c_get_clientdata(client));
822 return 0;
823 }
824
825 static const struct i2c_device_id wm8750_i2c_id[] = {
826 { "wm8750", 0 },
827 { "wm8987", 0 },
828 { }
829 };
830 MODULE_DEVICE_TABLE(i2c, wm8750_i2c_id);
831
832 static struct i2c_driver wm8750_i2c_driver = {
833 .driver = {
834 .name = "wm8750-codec",
835 .owner = THIS_MODULE,
836 },
837 .probe = wm8750_i2c_probe,
838 .remove = __devexit_p(wm8750_i2c_remove),
839 .id_table = wm8750_i2c_id,
840 };
841 #endif
842
843 static int __init wm8750_modinit(void)
844 {
845 int ret = 0;
846 #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
847 ret = i2c_add_driver(&wm8750_i2c_driver);
848 if (ret != 0) {
849 printk(KERN_ERR "Failed to register wm8750 I2C driver: %d\n",
850 ret);
851 }
852 #endif
853 #if defined(CONFIG_SPI_MASTER)
854 ret = spi_register_driver(&wm8750_spi_driver);
855 if (ret != 0) {
856 printk(KERN_ERR "Failed to register wm8750 SPI driver: %d\n",
857 ret);
858 }
859 #endif
860 return ret;
861 }
862 module_init(wm8750_modinit);
863
864 static void __exit wm8750_exit(void)
865 {
866 #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
867 i2c_del_driver(&wm8750_i2c_driver);
868 #endif
869 #if defined(CONFIG_SPI_MASTER)
870 spi_unregister_driver(&wm8750_spi_driver);
871 #endif
872 }
873 module_exit(wm8750_exit);
874
875 MODULE_DESCRIPTION("ASoC WM8750 driver");
876 MODULE_AUTHOR("Liam Girdwood");
877 MODULE_LICENSE("GPL");
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