2 * Fifo-attached Serial Interface (FSI) support for SH7724
4 * Copyright (C) 2009 Renesas Solutions Corp.
5 * Kuninori Morimoto <morimoto.kuninori@renesas.com>
8 * Copyright (c) 2007 Manuel Lauss <mano@roarinelk.homelinux.net>
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
15 #include <linux/delay.h>
16 #include <linux/dma-mapping.h>
17 #include <linux/pm_runtime.h>
19 #include <linux/scatterlist.h>
20 #include <linux/sh_dma.h>
21 #include <linux/slab.h>
22 #include <linux/module.h>
23 #include <linux/workqueue.h>
24 #include <sound/soc.h>
25 #include <sound/pcm_params.h>
26 #include <sound/sh_fsi.h>
28 /* PortA/PortB register */
29 #define REG_DO_FMT 0x0000
30 #define REG_DOFF_CTL 0x0004
31 #define REG_DOFF_ST 0x0008
32 #define REG_DI_FMT 0x000C
33 #define REG_DIFF_CTL 0x0010
34 #define REG_DIFF_ST 0x0014
35 #define REG_CKG1 0x0018
36 #define REG_CKG2 0x001C
37 #define REG_DIDT 0x0020
38 #define REG_DODT 0x0024
39 #define REG_MUTE_ST 0x0028
40 #define REG_OUT_DMAC 0x002C
41 #define REG_OUT_SEL 0x0030
42 #define REG_IN_DMAC 0x0038
45 #define MST_CLK_RST 0x0210
46 #define MST_SOFT_RST 0x0214
47 #define MST_FIFO_SZ 0x0218
49 /* core register (depend on FSI version) */
50 #define A_MST_CTLR 0x0180
51 #define B_MST_CTLR 0x01A0
52 #define CPU_INT_ST 0x01F4
53 #define CPU_IEMSK 0x01F8
54 #define CPU_IMSK 0x01FC
61 #define CR_BWS_MASK (0x3 << 20) /* FSI2 */
62 #define CR_BWS_24 (0x0 << 20) /* FSI2 */
63 #define CR_BWS_16 (0x1 << 20) /* FSI2 */
64 #define CR_BWS_20 (0x2 << 20) /* FSI2 */
66 #define CR_DTMD_PCM (0x0 << 8) /* FSI2 */
67 #define CR_DTMD_SPDIF_PCM (0x1 << 8) /* FSI2 */
68 #define CR_DTMD_SPDIF_STREAM (0x2 << 8) /* FSI2 */
70 #define CR_MONO (0x0 << 4)
71 #define CR_MONO_D (0x1 << 4)
72 #define CR_PCM (0x2 << 4)
73 #define CR_I2S (0x3 << 4)
74 #define CR_TDM (0x4 << 4)
75 #define CR_TDM_D (0x5 << 4)
79 #define VDMD_MASK (0x3 << 4)
80 #define VDMD_FRONT (0x0 << 4) /* Package in front */
81 #define VDMD_BACK (0x1 << 4) /* Package in back */
82 #define VDMD_STREAM (0x2 << 4) /* Stream mode(16bit * 2) */
84 #define DMA_ON (0x1 << 0)
88 #define IRQ_HALF 0x00100000
89 #define FIFO_CLR 0x00000001
92 #define ERR_OVER 0x00000010
93 #define ERR_UNDER 0x00000001
94 #define ST_ERR (ERR_OVER | ERR_UNDER)
97 #define ACKMD_MASK 0x00007000
98 #define BPFMD_MASK 0x00000700
100 #define DOMD (1 << 0)
103 #define BP (1 << 4) /* Fix the signal of Biphase output */
104 #define SE (1 << 0) /* Fix the master clock */
110 /* IO SHIFT / MACRO */
115 #define AB_IO(param, shift) (param << shift)
118 #define PBSR (1 << 12) /* Port B Software Reset */
119 #define PASR (1 << 8) /* Port A Software Reset */
120 #define IR (1 << 4) /* Interrupt Reset */
121 #define FSISR (1 << 0) /* Software Reset */
124 #define DMMD (1 << 4) /* SPDIF output timing 0: Biphase only */
125 /* 1: Biphase and serial */
128 #define FIFO_SZ_MASK 0x7
130 #define FSI_RATES SNDRV_PCM_RATE_8000_96000
132 #define FSI_FMTS (SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S16_LE)
134 typedef int (*set_rate_func
)(struct device
*dev
, int rate
, int enable
);
141 * A : sample widtht 16bit setting
142 * B : sample widtht 24bit setting
145 #define SHIFT_16DATA 0
146 #define SHIFT_24DATA 4
148 #define PACKAGE_24BITBUS_BACK 0
149 #define PACKAGE_24BITBUS_FRONT 1
150 #define PACKAGE_16BITBUS_STREAM 2
152 #define BUSOP_SET(s, a) ((a) << SHIFT_ ## s ## DATA)
153 #define BUSOP_GET(s, a) (((a) >> SHIFT_ ## s ## DATA) & 0xF)
156 * FSI driver use below type name for variable
158 * xxx_num : number of data
159 * xxx_pos : position of data
160 * xxx_capa : capacity of data
164 * period/frame/sample image
168 * period pos period pos
170 * |<-------------------- period--------------------->|
171 * ==|============================================ ... =|==
173 * ||<----- frame ----->|<------ frame ----->| ... |
174 * |+--------------------+--------------------+- ... |
175 * ||[ sample ][ sample ]|[ sample ][ sample ]| ... |
176 * |+--------------------+--------------------+- ... |
177 * ==|============================================ ... =|==
195 * FSIxCLK [CPG] (ick) -------> |
196 * |-> FSI_DIV (div)-> FSI2
197 * FSIxCK [external] (xck) ---> |
204 struct fsi_stream_handler
;
208 * these are initialized by fsi_stream_init()
210 struct snd_pcm_substream
*substream
;
211 int fifo_sample_capa
; /* sample capacity of FSI FIFO */
212 int buff_sample_capa
; /* sample capacity of ALSA buffer */
213 int buff_sample_pos
; /* sample position of ALSA buffer */
214 int period_samples
; /* sample number / 1 period */
215 int period_pos
; /* current period position */
216 int sample_width
; /* sample width */
226 * thse are initialized by fsi_handler_init()
228 struct fsi_stream_handler
*handler
;
229 struct fsi_priv
*priv
;
232 * these are for DMAEngine
234 struct dma_chan
*chan
;
235 struct sh_dmae_slave slave
; /* see fsi_handler_init() */
236 struct work_struct work
;
241 /* see [FSI clock] */
246 int (*set_rate
)(struct device
*dev
,
247 struct fsi_priv
*fsi
,
256 struct fsi_master
*master
;
257 struct sh_fsi_port_info
*info
;
259 struct fsi_stream playback
;
260 struct fsi_stream capture
;
262 struct fsi_clk clock
;
277 struct fsi_stream_handler
{
278 int (*init
)(struct fsi_priv
*fsi
, struct fsi_stream
*io
);
279 int (*quit
)(struct fsi_priv
*fsi
, struct fsi_stream
*io
);
280 int (*probe
)(struct fsi_priv
*fsi
, struct fsi_stream
*io
, struct device
*dev
);
281 int (*transfer
)(struct fsi_priv
*fsi
, struct fsi_stream
*io
);
282 int (*remove
)(struct fsi_priv
*fsi
, struct fsi_stream
*io
);
283 void (*start_stop
)(struct fsi_priv
*fsi
, struct fsi_stream
*io
,
286 #define fsi_stream_handler_call(io, func, args...) \
288 !((io)->handler->func) ? 0 : \
289 (io)->handler->func(args))
304 struct fsi_priv fsia
;
305 struct fsi_priv fsib
;
306 struct fsi_core
*core
;
310 static int fsi_stream_is_play(struct fsi_priv
*fsi
, struct fsi_stream
*io
);
313 * basic read write function
316 static void __fsi_reg_write(u32 __iomem
*reg
, u32 data
)
318 /* valid data area is 24bit */
321 __raw_writel(data
, reg
);
324 static u32
__fsi_reg_read(u32 __iomem
*reg
)
326 return __raw_readl(reg
);
329 static void __fsi_reg_mask_set(u32 __iomem
*reg
, u32 mask
, u32 data
)
331 u32 val
= __fsi_reg_read(reg
);
336 __fsi_reg_write(reg
, val
);
339 #define fsi_reg_write(p, r, d)\
340 __fsi_reg_write((p->base + REG_##r), d)
342 #define fsi_reg_read(p, r)\
343 __fsi_reg_read((p->base + REG_##r))
345 #define fsi_reg_mask_set(p, r, m, d)\
346 __fsi_reg_mask_set((p->base + REG_##r), m, d)
348 #define fsi_master_read(p, r) _fsi_master_read(p, MST_##r)
349 #define fsi_core_read(p, r) _fsi_master_read(p, p->core->r)
350 static u32
_fsi_master_read(struct fsi_master
*master
, u32 reg
)
355 spin_lock_irqsave(&master
->lock
, flags
);
356 ret
= __fsi_reg_read(master
->base
+ reg
);
357 spin_unlock_irqrestore(&master
->lock
, flags
);
362 #define fsi_master_mask_set(p, r, m, d) _fsi_master_mask_set(p, MST_##r, m, d)
363 #define fsi_core_mask_set(p, r, m, d) _fsi_master_mask_set(p, p->core->r, m, d)
364 static void _fsi_master_mask_set(struct fsi_master
*master
,
365 u32 reg
, u32 mask
, u32 data
)
369 spin_lock_irqsave(&master
->lock
, flags
);
370 __fsi_reg_mask_set(master
->base
+ reg
, mask
, data
);
371 spin_unlock_irqrestore(&master
->lock
, flags
);
377 static int fsi_version(struct fsi_master
*master
)
379 return master
->core
->ver
;
382 static struct fsi_master
*fsi_get_master(struct fsi_priv
*fsi
)
387 static int fsi_is_clk_master(struct fsi_priv
*fsi
)
389 return fsi
->clk_master
;
392 static int fsi_is_port_a(struct fsi_priv
*fsi
)
394 return fsi
->master
->base
== fsi
->base
;
397 static int fsi_is_spdif(struct fsi_priv
*fsi
)
402 static int fsi_is_enable_stream(struct fsi_priv
*fsi
)
404 return fsi
->enable_stream
;
407 static int fsi_is_play(struct snd_pcm_substream
*substream
)
409 return substream
->stream
== SNDRV_PCM_STREAM_PLAYBACK
;
412 static struct snd_soc_dai
*fsi_get_dai(struct snd_pcm_substream
*substream
)
414 struct snd_soc_pcm_runtime
*rtd
= substream
->private_data
;
419 static struct fsi_priv
*fsi_get_priv_frm_dai(struct snd_soc_dai
*dai
)
421 struct fsi_master
*master
= snd_soc_dai_get_drvdata(dai
);
424 return &master
->fsia
;
426 return &master
->fsib
;
429 static struct fsi_priv
*fsi_get_priv(struct snd_pcm_substream
*substream
)
431 return fsi_get_priv_frm_dai(fsi_get_dai(substream
));
434 static set_rate_func
fsi_get_info_set_rate(struct fsi_priv
*fsi
)
439 return fsi
->info
->set_rate
;
442 static u32
fsi_get_info_flags(struct fsi_priv
*fsi
)
447 return fsi
->info
->flags
;
450 static u32
fsi_get_port_shift(struct fsi_priv
*fsi
, struct fsi_stream
*io
)
452 int is_play
= fsi_stream_is_play(fsi
, io
);
453 int is_porta
= fsi_is_port_a(fsi
);
457 shift
= is_play
? AO_SHIFT
: AI_SHIFT
;
459 shift
= is_play
? BO_SHIFT
: BI_SHIFT
;
464 static int fsi_frame2sample(struct fsi_priv
*fsi
, int frames
)
466 return frames
* fsi
->chan_num
;
469 static int fsi_sample2frame(struct fsi_priv
*fsi
, int samples
)
471 return samples
/ fsi
->chan_num
;
474 static int fsi_get_current_fifo_samples(struct fsi_priv
*fsi
,
475 struct fsi_stream
*io
)
477 int is_play
= fsi_stream_is_play(fsi
, io
);
482 fsi_reg_read(fsi
, DOFF_ST
) :
483 fsi_reg_read(fsi
, DIFF_ST
);
485 frames
= 0x1ff & (status
>> 8);
487 return fsi_frame2sample(fsi
, frames
);
490 static void fsi_count_fifo_err(struct fsi_priv
*fsi
)
492 u32 ostatus
= fsi_reg_read(fsi
, DOFF_ST
);
493 u32 istatus
= fsi_reg_read(fsi
, DIFF_ST
);
495 if (ostatus
& ERR_OVER
)
496 fsi
->playback
.oerr_num
++;
498 if (ostatus
& ERR_UNDER
)
499 fsi
->playback
.uerr_num
++;
501 if (istatus
& ERR_OVER
)
502 fsi
->capture
.oerr_num
++;
504 if (istatus
& ERR_UNDER
)
505 fsi
->capture
.uerr_num
++;
507 fsi_reg_write(fsi
, DOFF_ST
, 0);
508 fsi_reg_write(fsi
, DIFF_ST
, 0);
512 * fsi_stream_xx() function
514 static inline int fsi_stream_is_play(struct fsi_priv
*fsi
,
515 struct fsi_stream
*io
)
517 return &fsi
->playback
== io
;
520 static inline struct fsi_stream
*fsi_stream_get(struct fsi_priv
*fsi
,
521 struct snd_pcm_substream
*substream
)
523 return fsi_is_play(substream
) ? &fsi
->playback
: &fsi
->capture
;
526 static int fsi_stream_is_working(struct fsi_priv
*fsi
,
527 struct fsi_stream
*io
)
529 struct fsi_master
*master
= fsi_get_master(fsi
);
533 spin_lock_irqsave(&master
->lock
, flags
);
534 ret
= !!(io
->substream
&& io
->substream
->runtime
);
535 spin_unlock_irqrestore(&master
->lock
, flags
);
540 static struct fsi_priv
*fsi_stream_to_priv(struct fsi_stream
*io
)
545 static void fsi_stream_init(struct fsi_priv
*fsi
,
546 struct fsi_stream
*io
,
547 struct snd_pcm_substream
*substream
)
549 struct snd_pcm_runtime
*runtime
= substream
->runtime
;
550 struct fsi_master
*master
= fsi_get_master(fsi
);
553 spin_lock_irqsave(&master
->lock
, flags
);
554 io
->substream
= substream
;
555 io
->buff_sample_capa
= fsi_frame2sample(fsi
, runtime
->buffer_size
);
556 io
->buff_sample_pos
= 0;
557 io
->period_samples
= fsi_frame2sample(fsi
, runtime
->period_size
);
559 io
->sample_width
= samples_to_bytes(runtime
, 1);
561 io
->oerr_num
= -1; /* ignore 1st err */
562 io
->uerr_num
= -1; /* ignore 1st err */
563 fsi_stream_handler_call(io
, init
, fsi
, io
);
564 spin_unlock_irqrestore(&master
->lock
, flags
);
567 static void fsi_stream_quit(struct fsi_priv
*fsi
, struct fsi_stream
*io
)
569 struct snd_soc_dai
*dai
= fsi_get_dai(io
->substream
);
570 struct fsi_master
*master
= fsi_get_master(fsi
);
573 spin_lock_irqsave(&master
->lock
, flags
);
575 if (io
->oerr_num
> 0)
576 dev_err(dai
->dev
, "over_run = %d\n", io
->oerr_num
);
578 if (io
->uerr_num
> 0)
579 dev_err(dai
->dev
, "under_run = %d\n", io
->uerr_num
);
581 fsi_stream_handler_call(io
, quit
, fsi
, io
);
582 io
->substream
= NULL
;
583 io
->buff_sample_capa
= 0;
584 io
->buff_sample_pos
= 0;
585 io
->period_samples
= 0;
587 io
->sample_width
= 0;
591 spin_unlock_irqrestore(&master
->lock
, flags
);
594 static int fsi_stream_transfer(struct fsi_stream
*io
)
596 struct fsi_priv
*fsi
= fsi_stream_to_priv(io
);
600 return fsi_stream_handler_call(io
, transfer
, fsi
, io
);
603 #define fsi_stream_start(fsi, io)\
604 fsi_stream_handler_call(io, start_stop, fsi, io, 1)
606 #define fsi_stream_stop(fsi, io)\
607 fsi_stream_handler_call(io, start_stop, fsi, io, 0)
609 static int fsi_stream_probe(struct fsi_priv
*fsi
, struct device
*dev
)
611 struct fsi_stream
*io
;
615 ret1
= fsi_stream_handler_call(io
, probe
, fsi
, io
, dev
);
618 ret2
= fsi_stream_handler_call(io
, probe
, fsi
, io
, dev
);
628 static int fsi_stream_remove(struct fsi_priv
*fsi
)
630 struct fsi_stream
*io
;
634 ret1
= fsi_stream_handler_call(io
, remove
, fsi
, io
);
637 ret2
= fsi_stream_handler_call(io
, remove
, fsi
, io
);
648 * format/bus/dma setting
650 static void fsi_format_bus_setup(struct fsi_priv
*fsi
, struct fsi_stream
*io
,
651 u32 bus
, struct device
*dev
)
653 struct fsi_master
*master
= fsi_get_master(fsi
);
654 int is_play
= fsi_stream_is_play(fsi
, io
);
657 if (fsi_version(master
) >= 2) {
661 * FSI2 needs DMA/Bus setting
664 case PACKAGE_24BITBUS_FRONT
:
667 dev_dbg(dev
, "24bit bus / package in front\n");
669 case PACKAGE_16BITBUS_STREAM
:
672 dev_dbg(dev
, "16bit bus / stream mode\n");
674 case PACKAGE_24BITBUS_BACK
:
678 dev_dbg(dev
, "24bit bus / package in back\n");
683 fsi_reg_write(fsi
, OUT_DMAC
, dma
);
685 fsi_reg_write(fsi
, IN_DMAC
, dma
);
689 fsi_reg_write(fsi
, DO_FMT
, fmt
);
691 fsi_reg_write(fsi
, DI_FMT
, fmt
);
698 static void fsi_irq_enable(struct fsi_priv
*fsi
, struct fsi_stream
*io
)
700 u32 data
= AB_IO(1, fsi_get_port_shift(fsi
, io
));
701 struct fsi_master
*master
= fsi_get_master(fsi
);
703 fsi_core_mask_set(master
, imsk
, data
, data
);
704 fsi_core_mask_set(master
, iemsk
, data
, data
);
707 static void fsi_irq_disable(struct fsi_priv
*fsi
, struct fsi_stream
*io
)
709 u32 data
= AB_IO(1, fsi_get_port_shift(fsi
, io
));
710 struct fsi_master
*master
= fsi_get_master(fsi
);
712 fsi_core_mask_set(master
, imsk
, data
, 0);
713 fsi_core_mask_set(master
, iemsk
, data
, 0);
716 static u32
fsi_irq_get_status(struct fsi_master
*master
)
718 return fsi_core_read(master
, int_st
);
721 static void fsi_irq_clear_status(struct fsi_priv
*fsi
)
724 struct fsi_master
*master
= fsi_get_master(fsi
);
726 data
|= AB_IO(1, fsi_get_port_shift(fsi
, &fsi
->playback
));
727 data
|= AB_IO(1, fsi_get_port_shift(fsi
, &fsi
->capture
));
729 /* clear interrupt factor */
730 fsi_core_mask_set(master
, int_st
, data
, 0);
734 * SPDIF master clock function
736 * These functions are used later FSI2
738 static void fsi_spdif_clk_ctrl(struct fsi_priv
*fsi
, int enable
)
740 struct fsi_master
*master
= fsi_get_master(fsi
);
744 val
= enable
? mask
: 0;
747 fsi_core_mask_set(master
, a_mclk
, mask
, val
) :
748 fsi_core_mask_set(master
, b_mclk
, mask
, val
);
754 static int fsi_clk_init(struct device
*dev
,
755 struct fsi_priv
*fsi
,
759 int (*set_rate
)(struct device
*dev
,
760 struct fsi_priv
*fsi
,
763 struct fsi_clk
*clock
= &fsi
->clock
;
764 int is_porta
= fsi_is_port_a(fsi
);
771 clock
->set_rate
= set_rate
;
773 clock
->own
= devm_clk_get(dev
, NULL
);
774 if (IS_ERR(clock
->own
))
779 clock
->xck
= devm_clk_get(dev
, is_porta
? "xcka" : "xckb");
780 if (IS_ERR(clock
->xck
)) {
781 dev_err(dev
, "can't get xck clock\n");
784 if (clock
->xck
== clock
->own
) {
785 dev_err(dev
, "cpu doesn't support xck clock\n");
790 /* FSIACLK/FSIBCLK */
792 clock
->ick
= devm_clk_get(dev
, is_porta
? "icka" : "ickb");
793 if (IS_ERR(clock
->ick
)) {
794 dev_err(dev
, "can't get ick clock\n");
797 if (clock
->ick
== clock
->own
) {
798 dev_err(dev
, "cpu doesn't support ick clock\n");
805 clock
->div
= devm_clk_get(dev
, is_porta
? "diva" : "divb");
806 if (IS_ERR(clock
->div
)) {
807 dev_err(dev
, "can't get div clock\n");
810 if (clock
->div
== clock
->own
) {
811 dev_err(dev
, "cpu doens't support div clock\n");
819 #define fsi_clk_invalid(fsi) fsi_clk_valid(fsi, 0)
820 static void fsi_clk_valid(struct fsi_priv
*fsi
, unsigned long rate
)
822 fsi
->clock
.rate
= rate
;
825 static int fsi_clk_is_valid(struct fsi_priv
*fsi
)
827 return fsi
->clock
.set_rate
&&
831 static int fsi_clk_enable(struct device
*dev
,
832 struct fsi_priv
*fsi
,
835 struct fsi_clk
*clock
= &fsi
->clock
;
838 if (!fsi_clk_is_valid(fsi
))
841 if (0 == clock
->count
) {
842 ret
= clock
->set_rate(dev
, fsi
, rate
);
844 fsi_clk_invalid(fsi
);
849 clk_enable(clock
->xck
);
851 clk_enable(clock
->ick
);
853 clk_enable(clock
->div
);
861 static int fsi_clk_disable(struct device
*dev
,
862 struct fsi_priv
*fsi
)
864 struct fsi_clk
*clock
= &fsi
->clock
;
866 if (!fsi_clk_is_valid(fsi
))
869 if (1 == clock
->count
--) {
871 clk_disable(clock
->xck
);
873 clk_disable(clock
->ick
);
875 clk_disable(clock
->div
);
881 static int fsi_clk_set_ackbpf(struct device
*dev
,
882 struct fsi_priv
*fsi
,
883 int ackmd
, int bpfmd
)
887 /* check ackmd/bpfmd relationship */
889 dev_err(dev
, "unsupported rate (%d/%d)\n", ackmd
, bpfmd
);
911 dev_err(dev
, "unsupported ackmd (%d)\n", ackmd
);
936 dev_err(dev
, "unsupported bpfmd (%d)\n", bpfmd
);
940 dev_dbg(dev
, "ACKMD/BPFMD = %d/%d\n", ackmd
, bpfmd
);
942 fsi_reg_mask_set(fsi
, CKG1
, (ACKMD_MASK
| BPFMD_MASK
) , data
);
948 static int fsi_clk_set_rate_external(struct device
*dev
,
949 struct fsi_priv
*fsi
,
952 struct clk
*xck
= fsi
->clock
.xck
;
953 struct clk
*ick
= fsi
->clock
.ick
;
958 /* check clock rate */
959 xrate
= clk_get_rate(xck
);
961 dev_err(dev
, "unsupported clock rate\n");
965 clk_set_parent(ick
, xck
);
966 clk_set_rate(ick
, xrate
);
968 bpfmd
= fsi
->chan_num
* 32;
969 ackmd
= xrate
/ rate
;
971 dev_dbg(dev
, "external/rate = %ld/%ld\n", xrate
, rate
);
973 ret
= fsi_clk_set_ackbpf(dev
, fsi
, ackmd
, bpfmd
);
975 dev_err(dev
, "%s failed", __func__
);
980 static int fsi_clk_set_rate_cpg(struct device
*dev
,
981 struct fsi_priv
*fsi
,
984 struct clk
*ick
= fsi
->clock
.ick
;
985 struct clk
*div
= fsi
->clock
.div
;
986 unsigned long target
= 0; /* 12288000 or 11289600 */
987 unsigned long actual
, cout
;
988 unsigned long diff
, min
;
989 unsigned long best_cout
, best_act
;
994 if (!(12288000 % rate
))
996 if (!(11289600 % rate
))
999 dev_err(dev
, "unsupported rate\n");
1003 bpfmd
= fsi
->chan_num
* 32;
1004 ackmd
= target
/ rate
;
1005 ret
= fsi_clk_set_ackbpf(dev
, fsi
, ackmd
, bpfmd
);
1007 dev_err(dev
, "%s failed", __func__
);
1014 * [CPG] = cout => [FSI_DIV] = audio => [FSI] => [codec]
1016 * But, it needs to find best match of CPG and FSI_DIV
1017 * combination, since it is difficult to generate correct
1018 * frequency of audio clock from ick clock only.
1019 * Because ick is created from its parent clock.
1021 * target = rate x [512/256/128/64]fs
1022 * cout = round(target x adjustment)
1023 * actual = cout / adjustment (by FSI-DIV) ~= target
1029 for (adj
= 1; adj
< 0xffff; adj
++) {
1031 cout
= target
* adj
;
1032 if (cout
> 100000000) /* max clock = 100MHz */
1035 /* cout/actual audio clock */
1036 cout
= clk_round_rate(ick
, cout
);
1037 actual
= cout
/ adj
;
1039 /* find best frequency */
1040 diff
= abs(actual
- target
);
1048 ret
= clk_set_rate(ick
, best_cout
);
1050 dev_err(dev
, "ick clock failed\n");
1054 ret
= clk_set_rate(div
, clk_round_rate(div
, best_act
));
1056 dev_err(dev
, "div clock failed\n");
1060 dev_dbg(dev
, "ick/div = %ld/%ld\n",
1061 clk_get_rate(ick
), clk_get_rate(div
));
1066 static int fsi_set_master_clk(struct device
*dev
, struct fsi_priv
*fsi
,
1067 long rate
, int enable
)
1069 set_rate_func set_rate
= fsi_get_info_set_rate(fsi
);
1075 * set_rate will be deleted
1079 return fsi_clk_enable(dev
, fsi
, rate
);
1081 return fsi_clk_disable(dev
, fsi
);
1084 ret
= set_rate(dev
, rate
, enable
);
1085 if (ret
< 0) /* error */
1094 switch (ret
& SH_FSI_ACKMD_MASK
) {
1097 case SH_FSI_ACKMD_512
:
1098 data
|= (0x0 << 12);
1100 case SH_FSI_ACKMD_256
:
1101 data
|= (0x1 << 12);
1103 case SH_FSI_ACKMD_128
:
1104 data
|= (0x2 << 12);
1106 case SH_FSI_ACKMD_64
:
1107 data
|= (0x3 << 12);
1109 case SH_FSI_ACKMD_32
:
1110 data
|= (0x4 << 12);
1114 switch (ret
& SH_FSI_BPFMD_MASK
) {
1117 case SH_FSI_BPFMD_32
:
1120 case SH_FSI_BPFMD_64
:
1123 case SH_FSI_BPFMD_128
:
1126 case SH_FSI_BPFMD_256
:
1129 case SH_FSI_BPFMD_512
:
1132 case SH_FSI_BPFMD_16
:
1137 fsi_reg_mask_set(fsi
, CKG1
, (ACKMD_MASK
| BPFMD_MASK
) , data
);
1146 * pio data transfer handler
1148 static void fsi_pio_push16(struct fsi_priv
*fsi
, u8
*_buf
, int samples
)
1152 if (fsi_is_enable_stream(fsi
)) {
1156 * fsi_pio_push_init()
1158 u32
*buf
= (u32
*)_buf
;
1160 for (i
= 0; i
< samples
/ 2; i
++)
1161 fsi_reg_write(fsi
, DODT
, buf
[i
]);
1164 u16
*buf
= (u16
*)_buf
;
1166 for (i
= 0; i
< samples
; i
++)
1167 fsi_reg_write(fsi
, DODT
, ((u32
)*(buf
+ i
) << 8));
1171 static void fsi_pio_pop16(struct fsi_priv
*fsi
, u8
*_buf
, int samples
)
1173 u16
*buf
= (u16
*)_buf
;
1176 for (i
= 0; i
< samples
; i
++)
1177 *(buf
+ i
) = (u16
)(fsi_reg_read(fsi
, DIDT
) >> 8);
1180 static void fsi_pio_push32(struct fsi_priv
*fsi
, u8
*_buf
, int samples
)
1182 u32
*buf
= (u32
*)_buf
;
1185 for (i
= 0; i
< samples
; i
++)
1186 fsi_reg_write(fsi
, DODT
, *(buf
+ i
));
1189 static void fsi_pio_pop32(struct fsi_priv
*fsi
, u8
*_buf
, int samples
)
1191 u32
*buf
= (u32
*)_buf
;
1194 for (i
= 0; i
< samples
; i
++)
1195 *(buf
+ i
) = fsi_reg_read(fsi
, DIDT
);
1198 static u8
*fsi_pio_get_area(struct fsi_priv
*fsi
, struct fsi_stream
*io
)
1200 struct snd_pcm_runtime
*runtime
= io
->substream
->runtime
;
1202 return runtime
->dma_area
+
1203 samples_to_bytes(runtime
, io
->buff_sample_pos
);
1206 static int fsi_pio_transfer(struct fsi_priv
*fsi
, struct fsi_stream
*io
,
1207 void (*run16
)(struct fsi_priv
*fsi
, u8
*buf
, int samples
),
1208 void (*run32
)(struct fsi_priv
*fsi
, u8
*buf
, int samples
),
1211 struct snd_pcm_runtime
*runtime
;
1212 struct snd_pcm_substream
*substream
;
1216 if (!fsi_stream_is_working(fsi
, io
))
1220 substream
= io
->substream
;
1221 runtime
= substream
->runtime
;
1223 /* FSI FIFO has limit.
1224 * So, this driver can not send periods data at a time
1226 if (io
->buff_sample_pos
>=
1227 io
->period_samples
* (io
->period_pos
+ 1)) {
1230 io
->period_pos
= (io
->period_pos
+ 1) % runtime
->periods
;
1232 if (0 == io
->period_pos
)
1233 io
->buff_sample_pos
= 0;
1236 buf
= fsi_pio_get_area(fsi
, io
);
1238 switch (io
->sample_width
) {
1240 run16(fsi
, buf
, samples
);
1243 run32(fsi
, buf
, samples
);
1249 /* update buff_sample_pos */
1250 io
->buff_sample_pos
+= samples
;
1253 snd_pcm_period_elapsed(substream
);
1258 static int fsi_pio_pop(struct fsi_priv
*fsi
, struct fsi_stream
*io
)
1260 int sample_residues
; /* samples in FSI fifo */
1261 int sample_space
; /* ALSA free samples space */
1264 sample_residues
= fsi_get_current_fifo_samples(fsi
, io
);
1265 sample_space
= io
->buff_sample_capa
- io
->buff_sample_pos
;
1267 samples
= min(sample_residues
, sample_space
);
1269 return fsi_pio_transfer(fsi
, io
,
1275 static int fsi_pio_push(struct fsi_priv
*fsi
, struct fsi_stream
*io
)
1277 int sample_residues
; /* ALSA residue samples */
1278 int sample_space
; /* FSI fifo free samples space */
1281 sample_residues
= io
->buff_sample_capa
- io
->buff_sample_pos
;
1282 sample_space
= io
->fifo_sample_capa
-
1283 fsi_get_current_fifo_samples(fsi
, io
);
1285 samples
= min(sample_residues
, sample_space
);
1287 return fsi_pio_transfer(fsi
, io
,
1293 static void fsi_pio_start_stop(struct fsi_priv
*fsi
, struct fsi_stream
*io
,
1296 struct fsi_master
*master
= fsi_get_master(fsi
);
1297 u32 clk
= fsi_is_port_a(fsi
) ? CRA
: CRB
;
1300 fsi_irq_enable(fsi
, io
);
1302 fsi_irq_disable(fsi
, io
);
1304 if (fsi_is_clk_master(fsi
))
1305 fsi_master_mask_set(master
, CLK_RST
, clk
, (enable
) ? clk
: 0);
1308 static int fsi_pio_push_init(struct fsi_priv
*fsi
, struct fsi_stream
*io
)
1311 * we can use 16bit stream mode
1312 * when "playback" and "16bit data"
1313 * and platform allows "stream mode"
1317 if (fsi_is_enable_stream(fsi
))
1318 io
->bus_option
= BUSOP_SET(24, PACKAGE_24BITBUS_BACK
) |
1319 BUSOP_SET(16, PACKAGE_16BITBUS_STREAM
);
1321 io
->bus_option
= BUSOP_SET(24, PACKAGE_24BITBUS_BACK
) |
1322 BUSOP_SET(16, PACKAGE_24BITBUS_BACK
);
1326 static int fsi_pio_pop_init(struct fsi_priv
*fsi
, struct fsi_stream
*io
)
1329 * always 24bit bus, package back when "capture"
1331 io
->bus_option
= BUSOP_SET(24, PACKAGE_24BITBUS_BACK
) |
1332 BUSOP_SET(16, PACKAGE_24BITBUS_BACK
);
1336 static struct fsi_stream_handler fsi_pio_push_handler
= {
1337 .init
= fsi_pio_push_init
,
1338 .transfer
= fsi_pio_push
,
1339 .start_stop
= fsi_pio_start_stop
,
1342 static struct fsi_stream_handler fsi_pio_pop_handler
= {
1343 .init
= fsi_pio_pop_init
,
1344 .transfer
= fsi_pio_pop
,
1345 .start_stop
= fsi_pio_start_stop
,
1348 static irqreturn_t
fsi_interrupt(int irq
, void *data
)
1350 struct fsi_master
*master
= data
;
1351 u32 int_st
= fsi_irq_get_status(master
);
1353 /* clear irq status */
1354 fsi_master_mask_set(master
, SOFT_RST
, IR
, 0);
1355 fsi_master_mask_set(master
, SOFT_RST
, IR
, IR
);
1357 if (int_st
& AB_IO(1, AO_SHIFT
))
1358 fsi_stream_transfer(&master
->fsia
.playback
);
1359 if (int_st
& AB_IO(1, BO_SHIFT
))
1360 fsi_stream_transfer(&master
->fsib
.playback
);
1361 if (int_st
& AB_IO(1, AI_SHIFT
))
1362 fsi_stream_transfer(&master
->fsia
.capture
);
1363 if (int_st
& AB_IO(1, BI_SHIFT
))
1364 fsi_stream_transfer(&master
->fsib
.capture
);
1366 fsi_count_fifo_err(&master
->fsia
);
1367 fsi_count_fifo_err(&master
->fsib
);
1369 fsi_irq_clear_status(&master
->fsia
);
1370 fsi_irq_clear_status(&master
->fsib
);
1376 * dma data transfer handler
1378 static int fsi_dma_init(struct fsi_priv
*fsi
, struct fsi_stream
*io
)
1380 struct snd_pcm_runtime
*runtime
= io
->substream
->runtime
;
1381 struct snd_soc_dai
*dai
= fsi_get_dai(io
->substream
);
1382 enum dma_data_direction dir
= fsi_stream_is_play(fsi
, io
) ?
1383 DMA_TO_DEVICE
: DMA_FROM_DEVICE
;
1386 * 24bit data : 24bit bus / package in back
1387 * 16bit data : 16bit bus / stream mode
1389 io
->bus_option
= BUSOP_SET(24, PACKAGE_24BITBUS_BACK
) |
1390 BUSOP_SET(16, PACKAGE_16BITBUS_STREAM
);
1392 io
->dma
= dma_map_single(dai
->dev
, runtime
->dma_area
,
1393 snd_pcm_lib_buffer_bytes(io
->substream
), dir
);
1397 static int fsi_dma_quit(struct fsi_priv
*fsi
, struct fsi_stream
*io
)
1399 struct snd_soc_dai
*dai
= fsi_get_dai(io
->substream
);
1400 enum dma_data_direction dir
= fsi_stream_is_play(fsi
, io
) ?
1401 DMA_TO_DEVICE
: DMA_FROM_DEVICE
;
1403 dma_unmap_single(dai
->dev
, io
->dma
,
1404 snd_pcm_lib_buffer_bytes(io
->substream
), dir
);
1408 static dma_addr_t
fsi_dma_get_area(struct fsi_stream
*io
)
1410 struct snd_pcm_runtime
*runtime
= io
->substream
->runtime
;
1412 return io
->dma
+ samples_to_bytes(runtime
, io
->buff_sample_pos
);
1415 static void fsi_dma_complete(void *data
)
1417 struct fsi_stream
*io
= (struct fsi_stream
*)data
;
1418 struct fsi_priv
*fsi
= fsi_stream_to_priv(io
);
1419 struct snd_pcm_runtime
*runtime
= io
->substream
->runtime
;
1420 struct snd_soc_dai
*dai
= fsi_get_dai(io
->substream
);
1421 enum dma_data_direction dir
= fsi_stream_is_play(fsi
, io
) ?
1422 DMA_TO_DEVICE
: DMA_FROM_DEVICE
;
1424 dma_sync_single_for_cpu(dai
->dev
, fsi_dma_get_area(io
),
1425 samples_to_bytes(runtime
, io
->period_samples
), dir
);
1427 io
->buff_sample_pos
+= io
->period_samples
;
1430 if (io
->period_pos
>= runtime
->periods
) {
1432 io
->buff_sample_pos
= 0;
1435 fsi_count_fifo_err(fsi
);
1436 fsi_stream_transfer(io
);
1438 snd_pcm_period_elapsed(io
->substream
);
1441 static void fsi_dma_do_work(struct work_struct
*work
)
1443 struct fsi_stream
*io
= container_of(work
, struct fsi_stream
, work
);
1444 struct fsi_priv
*fsi
= fsi_stream_to_priv(io
);
1445 struct snd_soc_dai
*dai
;
1446 struct dma_async_tx_descriptor
*desc
;
1447 struct snd_pcm_runtime
*runtime
;
1448 enum dma_data_direction dir
;
1449 int is_play
= fsi_stream_is_play(fsi
, io
);
1453 if (!fsi_stream_is_working(fsi
, io
))
1456 dai
= fsi_get_dai(io
->substream
);
1457 runtime
= io
->substream
->runtime
;
1458 dir
= is_play
? DMA_TO_DEVICE
: DMA_FROM_DEVICE
;
1459 len
= samples_to_bytes(runtime
, io
->period_samples
);
1460 buf
= fsi_dma_get_area(io
);
1462 dma_sync_single_for_device(dai
->dev
, buf
, len
, dir
);
1464 desc
= dmaengine_prep_slave_single(io
->chan
, buf
, len
, dir
,
1465 DMA_PREP_INTERRUPT
| DMA_CTRL_ACK
);
1467 dev_err(dai
->dev
, "dmaengine_prep_slave_sg() fail\n");
1471 desc
->callback
= fsi_dma_complete
;
1472 desc
->callback_param
= io
;
1474 if (dmaengine_submit(desc
) < 0) {
1475 dev_err(dai
->dev
, "tx_submit() fail\n");
1479 dma_async_issue_pending(io
->chan
);
1484 * In DMAEngine case, codec and FSI cannot be started simultaneously
1485 * since FSI is using the scheduler work queue.
1486 * Therefore, in capture case, probably FSI FIFO will have got
1487 * overflow error in this point.
1488 * in that case, DMA cannot start transfer until error was cleared.
1491 if (ERR_OVER
& fsi_reg_read(fsi
, DIFF_ST
)) {
1492 fsi_reg_mask_set(fsi
, DIFF_CTL
, FIFO_CLR
, FIFO_CLR
);
1493 fsi_reg_write(fsi
, DIFF_ST
, 0);
1498 static bool fsi_dma_filter(struct dma_chan
*chan
, void *param
)
1500 struct sh_dmae_slave
*slave
= param
;
1502 chan
->private = slave
;
1507 static int fsi_dma_transfer(struct fsi_priv
*fsi
, struct fsi_stream
*io
)
1509 schedule_work(&io
->work
);
1514 static void fsi_dma_push_start_stop(struct fsi_priv
*fsi
, struct fsi_stream
*io
,
1517 struct fsi_master
*master
= fsi_get_master(fsi
);
1518 u32 clk
= fsi_is_port_a(fsi
) ? CRA
: CRB
;
1519 u32 enable
= start
? DMA_ON
: 0;
1521 fsi_reg_mask_set(fsi
, OUT_DMAC
, DMA_ON
, enable
);
1523 dmaengine_terminate_all(io
->chan
);
1525 if (fsi_is_clk_master(fsi
))
1526 fsi_master_mask_set(master
, CLK_RST
, clk
, (enable
) ? clk
: 0);
1529 static int fsi_dma_probe(struct fsi_priv
*fsi
, struct fsi_stream
*io
, struct device
*dev
)
1531 dma_cap_mask_t mask
;
1534 dma_cap_set(DMA_SLAVE
, mask
);
1536 io
->chan
= dma_request_channel(mask
, fsi_dma_filter
, &io
->slave
);
1539 /* switch to PIO handler */
1540 if (fsi_stream_is_play(fsi
, io
))
1541 fsi
->playback
.handler
= &fsi_pio_push_handler
;
1543 fsi
->capture
.handler
= &fsi_pio_pop_handler
;
1545 dev_info(dev
, "switch handler (dma => pio)\n");
1548 return fsi_stream_probe(fsi
, dev
);
1551 INIT_WORK(&io
->work
, fsi_dma_do_work
);
1556 static int fsi_dma_remove(struct fsi_priv
*fsi
, struct fsi_stream
*io
)
1558 cancel_work_sync(&io
->work
);
1560 fsi_stream_stop(fsi
, io
);
1563 dma_release_channel(io
->chan
);
1569 static struct fsi_stream_handler fsi_dma_push_handler
= {
1570 .init
= fsi_dma_init
,
1571 .quit
= fsi_dma_quit
,
1572 .probe
= fsi_dma_probe
,
1573 .transfer
= fsi_dma_transfer
,
1574 .remove
= fsi_dma_remove
,
1575 .start_stop
= fsi_dma_push_start_stop
,
1581 static void fsi_fifo_init(struct fsi_priv
*fsi
,
1582 struct fsi_stream
*io
,
1585 struct fsi_master
*master
= fsi_get_master(fsi
);
1586 int is_play
= fsi_stream_is_play(fsi
, io
);
1590 /* get on-chip RAM capacity */
1591 shift
= fsi_master_read(master
, FIFO_SZ
);
1592 shift
>>= fsi_get_port_shift(fsi
, io
);
1593 shift
&= FIFO_SZ_MASK
;
1594 frame_capa
= 256 << shift
;
1595 dev_dbg(dev
, "fifo = %d words\n", frame_capa
);
1598 * The maximum number of sample data varies depending
1599 * on the number of channels selected for the format.
1601 * FIFOs are used in 4-channel units in 3-channel mode
1602 * and in 8-channel units in 5- to 7-channel mode
1603 * meaning that more FIFOs than the required size of DPRAM
1606 * ex) if 256 words of DP-RAM is connected
1607 * 1 channel: 256 (256 x 1 = 256)
1608 * 2 channels: 128 (128 x 2 = 256)
1609 * 3 channels: 64 ( 64 x 3 = 192)
1610 * 4 channels: 64 ( 64 x 4 = 256)
1611 * 5 channels: 32 ( 32 x 5 = 160)
1612 * 6 channels: 32 ( 32 x 6 = 192)
1613 * 7 channels: 32 ( 32 x 7 = 224)
1614 * 8 channels: 32 ( 32 x 8 = 256)
1616 for (i
= 1; i
< fsi
->chan_num
; i
<<= 1)
1618 dev_dbg(dev
, "%d channel %d store\n",
1619 fsi
->chan_num
, frame_capa
);
1621 io
->fifo_sample_capa
= fsi_frame2sample(fsi
, frame_capa
);
1624 * set interrupt generation factor
1628 fsi_reg_write(fsi
, DOFF_CTL
, IRQ_HALF
);
1629 fsi_reg_mask_set(fsi
, DOFF_CTL
, FIFO_CLR
, FIFO_CLR
);
1631 fsi_reg_write(fsi
, DIFF_CTL
, IRQ_HALF
);
1632 fsi_reg_mask_set(fsi
, DIFF_CTL
, FIFO_CLR
, FIFO_CLR
);
1636 static int fsi_hw_startup(struct fsi_priv
*fsi
,
1637 struct fsi_stream
*io
,
1640 u32 flags
= fsi_get_info_flags(fsi
);
1644 if (fsi_is_clk_master(fsi
))
1647 fsi_reg_mask_set(fsi
, CKG1
, (DIMD
| DOMD
), data
);
1649 /* clock inversion (CKG2) */
1651 if (fsi
->bit_clk_inv
)
1653 if (fsi
->lr_clk_inv
)
1655 if (fsi_is_clk_master(fsi
))
1659 * SH_FSI_xxx_INV style will be removed
1661 if (SH_FSI_LRM_INV
& flags
)
1663 if (SH_FSI_BRM_INV
& flags
)
1665 if (SH_FSI_LRS_INV
& flags
)
1667 if (SH_FSI_BRS_INV
& flags
)
1670 fsi_reg_write(fsi
, CKG2
, data
);
1673 if (fsi_is_spdif(fsi
)) {
1674 fsi_spdif_clk_ctrl(fsi
, 1);
1675 fsi_reg_mask_set(fsi
, OUT_SEL
, DMMD
, DMMD
);
1682 switch (io
->sample_width
) {
1684 data
= BUSOP_GET(16, io
->bus_option
);
1687 data
= BUSOP_GET(24, io
->bus_option
);
1690 fsi_format_bus_setup(fsi
, io
, data
, dev
);
1693 fsi_irq_disable(fsi
, io
);
1694 fsi_irq_clear_status(fsi
);
1697 fsi_fifo_init(fsi
, io
, dev
);
1699 /* start master clock */
1700 if (fsi_is_clk_master(fsi
))
1701 return fsi_set_master_clk(dev
, fsi
, fsi
->rate
, 1);
1706 static int fsi_hw_shutdown(struct fsi_priv
*fsi
,
1709 /* stop master clock */
1710 if (fsi_is_clk_master(fsi
))
1711 return fsi_set_master_clk(dev
, fsi
, fsi
->rate
, 0);
1716 static int fsi_dai_startup(struct snd_pcm_substream
*substream
,
1717 struct snd_soc_dai
*dai
)
1719 struct fsi_priv
*fsi
= fsi_get_priv(substream
);
1721 fsi_clk_invalid(fsi
);
1727 static void fsi_dai_shutdown(struct snd_pcm_substream
*substream
,
1728 struct snd_soc_dai
*dai
)
1730 struct fsi_priv
*fsi
= fsi_get_priv(substream
);
1732 fsi_clk_invalid(fsi
);
1736 static int fsi_dai_trigger(struct snd_pcm_substream
*substream
, int cmd
,
1737 struct snd_soc_dai
*dai
)
1739 struct fsi_priv
*fsi
= fsi_get_priv(substream
);
1740 struct fsi_stream
*io
= fsi_stream_get(fsi
, substream
);
1744 case SNDRV_PCM_TRIGGER_START
:
1745 fsi_stream_init(fsi
, io
, substream
);
1747 ret
= fsi_hw_startup(fsi
, io
, dai
->dev
);
1749 ret
= fsi_stream_transfer(io
);
1751 fsi_stream_start(fsi
, io
);
1753 case SNDRV_PCM_TRIGGER_STOP
:
1755 ret
= fsi_hw_shutdown(fsi
, dai
->dev
);
1756 fsi_stream_stop(fsi
, io
);
1757 fsi_stream_quit(fsi
, io
);
1764 static int fsi_set_fmt_dai(struct fsi_priv
*fsi
, unsigned int fmt
)
1766 switch (fmt
& SND_SOC_DAIFMT_FORMAT_MASK
) {
1767 case SND_SOC_DAIFMT_I2S
:
1771 case SND_SOC_DAIFMT_LEFT_J
:
1782 static int fsi_set_fmt_spdif(struct fsi_priv
*fsi
)
1784 struct fsi_master
*master
= fsi_get_master(fsi
);
1786 if (fsi_version(master
) < 2)
1789 fsi
->fmt
= CR_DTMD_SPDIF_PCM
| CR_PCM
;
1795 static int fsi_dai_set_fmt(struct snd_soc_dai
*dai
, unsigned int fmt
)
1797 struct fsi_priv
*fsi
= fsi_get_priv_frm_dai(dai
);
1798 set_rate_func set_rate
= fsi_get_info_set_rate(fsi
);
1801 /* set master/slave audio interface */
1802 switch (fmt
& SND_SOC_DAIFMT_MASTER_MASK
) {
1803 case SND_SOC_DAIFMT_CBM_CFM
:
1804 fsi
->clk_master
= 1;
1806 case SND_SOC_DAIFMT_CBS_CFS
:
1812 /* set clock inversion */
1813 switch (fmt
& SND_SOC_DAIFMT_INV_MASK
) {
1814 case SND_SOC_DAIFMT_NB_IF
:
1815 fsi
->bit_clk_inv
= 0;
1816 fsi
->lr_clk_inv
= 1;
1818 case SND_SOC_DAIFMT_IB_NF
:
1819 fsi
->bit_clk_inv
= 1;
1820 fsi
->lr_clk_inv
= 0;
1822 case SND_SOC_DAIFMT_IB_IF
:
1823 fsi
->bit_clk_inv
= 1;
1824 fsi
->lr_clk_inv
= 1;
1826 case SND_SOC_DAIFMT_NB_NF
:
1828 fsi
->bit_clk_inv
= 0;
1829 fsi
->lr_clk_inv
= 0;
1833 if (fsi_is_clk_master(fsi
)) {
1837 * set_rate will be deleted
1840 dev_warn(dai
->dev
, "set_rate will be removed soon\n");
1843 fsi_clk_init(dai
->dev
, fsi
, 0, 1, 1,
1844 fsi_clk_set_rate_cpg
);
1846 fsi_clk_init(dai
->dev
, fsi
, 1, 1, 0,
1847 fsi_clk_set_rate_external
);
1851 if (fsi_is_spdif(fsi
))
1852 ret
= fsi_set_fmt_spdif(fsi
);
1854 ret
= fsi_set_fmt_dai(fsi
, fmt
& SND_SOC_DAIFMT_FORMAT_MASK
);
1859 static int fsi_dai_hw_params(struct snd_pcm_substream
*substream
,
1860 struct snd_pcm_hw_params
*params
,
1861 struct snd_soc_dai
*dai
)
1863 struct fsi_priv
*fsi
= fsi_get_priv(substream
);
1865 if (fsi_is_clk_master(fsi
)) {
1866 fsi
->rate
= params_rate(params
);
1867 fsi_clk_valid(fsi
, fsi
->rate
);
1873 static const struct snd_soc_dai_ops fsi_dai_ops
= {
1874 .startup
= fsi_dai_startup
,
1875 .shutdown
= fsi_dai_shutdown
,
1876 .trigger
= fsi_dai_trigger
,
1877 .set_fmt
= fsi_dai_set_fmt
,
1878 .hw_params
= fsi_dai_hw_params
,
1885 static struct snd_pcm_hardware fsi_pcm_hardware
= {
1886 .info
= SNDRV_PCM_INFO_INTERLEAVED
|
1887 SNDRV_PCM_INFO_MMAP
|
1888 SNDRV_PCM_INFO_MMAP_VALID
|
1889 SNDRV_PCM_INFO_PAUSE
,
1890 .formats
= FSI_FMTS
,
1896 .buffer_bytes_max
= 64 * 1024,
1897 .period_bytes_min
= 32,
1898 .period_bytes_max
= 8192,
1904 static int fsi_pcm_open(struct snd_pcm_substream
*substream
)
1906 struct snd_pcm_runtime
*runtime
= substream
->runtime
;
1909 snd_soc_set_runtime_hwparams(substream
, &fsi_pcm_hardware
);
1911 ret
= snd_pcm_hw_constraint_integer(runtime
,
1912 SNDRV_PCM_HW_PARAM_PERIODS
);
1917 static int fsi_hw_params(struct snd_pcm_substream
*substream
,
1918 struct snd_pcm_hw_params
*hw_params
)
1920 return snd_pcm_lib_malloc_pages(substream
,
1921 params_buffer_bytes(hw_params
));
1924 static int fsi_hw_free(struct snd_pcm_substream
*substream
)
1926 return snd_pcm_lib_free_pages(substream
);
1929 static snd_pcm_uframes_t
fsi_pointer(struct snd_pcm_substream
*substream
)
1931 struct fsi_priv
*fsi
= fsi_get_priv(substream
);
1932 struct fsi_stream
*io
= fsi_stream_get(fsi
, substream
);
1934 return fsi_sample2frame(fsi
, io
->buff_sample_pos
);
1937 static struct snd_pcm_ops fsi_pcm_ops
= {
1938 .open
= fsi_pcm_open
,
1939 .ioctl
= snd_pcm_lib_ioctl
,
1940 .hw_params
= fsi_hw_params
,
1941 .hw_free
= fsi_hw_free
,
1942 .pointer
= fsi_pointer
,
1949 #define PREALLOC_BUFFER (32 * 1024)
1950 #define PREALLOC_BUFFER_MAX (32 * 1024)
1952 static void fsi_pcm_free(struct snd_pcm
*pcm
)
1954 snd_pcm_lib_preallocate_free_for_all(pcm
);
1957 static int fsi_pcm_new(struct snd_soc_pcm_runtime
*rtd
)
1959 struct snd_pcm
*pcm
= rtd
->pcm
;
1962 * dont use SNDRV_DMA_TYPE_DEV, since it will oops the SH kernel
1963 * in MMAP mode (i.e. aplay -M)
1965 return snd_pcm_lib_preallocate_pages_for_all(
1967 SNDRV_DMA_TYPE_CONTINUOUS
,
1968 snd_dma_continuous_data(GFP_KERNEL
),
1969 PREALLOC_BUFFER
, PREALLOC_BUFFER_MAX
);
1976 static struct snd_soc_dai_driver fsi_soc_dai
[] = {
1981 .formats
= FSI_FMTS
,
1987 .formats
= FSI_FMTS
,
1991 .ops
= &fsi_dai_ops
,
1997 .formats
= FSI_FMTS
,
2003 .formats
= FSI_FMTS
,
2007 .ops
= &fsi_dai_ops
,
2011 static struct snd_soc_platform_driver fsi_soc_platform
= {
2012 .ops
= &fsi_pcm_ops
,
2013 .pcm_new
= fsi_pcm_new
,
2014 .pcm_free
= fsi_pcm_free
,
2020 static void fsi_port_info_init(struct fsi_priv
*fsi
,
2021 struct sh_fsi_port_info
*info
)
2023 if (info
->flags
& SH_FSI_FMT_SPDIF
)
2026 if (info
->flags
& SH_FSI_CLK_CPG
)
2029 if (info
->flags
& SH_FSI_ENABLE_STREAM_MODE
)
2030 fsi
->enable_stream
= 1;
2033 static void fsi_handler_init(struct fsi_priv
*fsi
,
2034 struct sh_fsi_port_info
*info
)
2036 fsi
->playback
.handler
= &fsi_pio_push_handler
; /* default PIO */
2037 fsi
->playback
.priv
= fsi
;
2038 fsi
->capture
.handler
= &fsi_pio_pop_handler
; /* default PIO */
2039 fsi
->capture
.priv
= fsi
;
2042 fsi
->playback
.slave
.shdma_slave
.slave_id
= info
->tx_id
;
2043 fsi
->playback
.handler
= &fsi_dma_push_handler
;
2047 static int fsi_probe(struct platform_device
*pdev
)
2049 struct fsi_master
*master
;
2050 const struct platform_device_id
*id_entry
;
2051 struct sh_fsi_platform_info
*info
= pdev
->dev
.platform_data
;
2052 struct sh_fsi_port_info nul_info
, *pinfo
;
2053 struct fsi_priv
*fsi
;
2054 struct resource
*res
;
2062 id_entry
= pdev
->id_entry
;
2064 dev_err(&pdev
->dev
, "unknown fsi device\n");
2068 res
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
2069 irq
= platform_get_irq(pdev
, 0);
2070 if (!res
|| (int)irq
<= 0) {
2071 dev_err(&pdev
->dev
, "Not enough FSI platform resources.\n");
2075 master
= devm_kzalloc(&pdev
->dev
, sizeof(*master
), GFP_KERNEL
);
2077 dev_err(&pdev
->dev
, "Could not allocate master\n");
2081 master
->base
= devm_ioremap_nocache(&pdev
->dev
,
2082 res
->start
, resource_size(res
));
2083 if (!master
->base
) {
2084 dev_err(&pdev
->dev
, "Unable to ioremap FSI registers.\n");
2088 /* master setting */
2090 master
->core
= (struct fsi_core
*)id_entry
->driver_data
;
2091 spin_lock_init(&master
->lock
);
2094 pinfo
= (info
) ? &info
->port_a
: &nul_info
;
2095 fsi
= &master
->fsia
;
2096 fsi
->base
= master
->base
;
2097 fsi
->master
= master
;
2099 fsi_port_info_init(fsi
, pinfo
);
2100 fsi_handler_init(fsi
, pinfo
);
2101 ret
= fsi_stream_probe(fsi
, &pdev
->dev
);
2103 dev_err(&pdev
->dev
, "FSIA stream probe failed\n");
2108 pinfo
= (info
) ? &info
->port_b
: &nul_info
;
2109 fsi
= &master
->fsib
;
2110 fsi
->base
= master
->base
+ 0x40;
2111 fsi
->master
= master
;
2113 fsi_port_info_init(fsi
, pinfo
);
2114 fsi_handler_init(fsi
, pinfo
);
2115 ret
= fsi_stream_probe(fsi
, &pdev
->dev
);
2117 dev_err(&pdev
->dev
, "FSIB stream probe failed\n");
2121 pm_runtime_enable(&pdev
->dev
);
2122 dev_set_drvdata(&pdev
->dev
, master
);
2124 ret
= devm_request_irq(&pdev
->dev
, irq
, &fsi_interrupt
, 0,
2125 id_entry
->name
, master
);
2127 dev_err(&pdev
->dev
, "irq request err\n");
2131 ret
= snd_soc_register_platform(&pdev
->dev
, &fsi_soc_platform
);
2133 dev_err(&pdev
->dev
, "cannot snd soc register\n");
2137 ret
= snd_soc_register_dais(&pdev
->dev
, fsi_soc_dai
,
2138 ARRAY_SIZE(fsi_soc_dai
));
2140 dev_err(&pdev
->dev
, "cannot snd dai register\n");
2147 snd_soc_unregister_platform(&pdev
->dev
);
2149 pm_runtime_disable(&pdev
->dev
);
2150 fsi_stream_remove(&master
->fsib
);
2152 fsi_stream_remove(&master
->fsia
);
2157 static int fsi_remove(struct platform_device
*pdev
)
2159 struct fsi_master
*master
;
2161 master
= dev_get_drvdata(&pdev
->dev
);
2163 pm_runtime_disable(&pdev
->dev
);
2165 snd_soc_unregister_dais(&pdev
->dev
, ARRAY_SIZE(fsi_soc_dai
));
2166 snd_soc_unregister_platform(&pdev
->dev
);
2168 fsi_stream_remove(&master
->fsia
);
2169 fsi_stream_remove(&master
->fsib
);
2174 static void __fsi_suspend(struct fsi_priv
*fsi
,
2175 struct fsi_stream
*io
,
2178 if (!fsi_stream_is_working(fsi
, io
))
2181 fsi_stream_stop(fsi
, io
);
2182 fsi_hw_shutdown(fsi
, dev
);
2185 static void __fsi_resume(struct fsi_priv
*fsi
,
2186 struct fsi_stream
*io
,
2189 if (!fsi_stream_is_working(fsi
, io
))
2192 fsi_hw_startup(fsi
, io
, dev
);
2193 fsi_stream_start(fsi
, io
);
2196 static int fsi_suspend(struct device
*dev
)
2198 struct fsi_master
*master
= dev_get_drvdata(dev
);
2199 struct fsi_priv
*fsia
= &master
->fsia
;
2200 struct fsi_priv
*fsib
= &master
->fsib
;
2202 __fsi_suspend(fsia
, &fsia
->playback
, dev
);
2203 __fsi_suspend(fsia
, &fsia
->capture
, dev
);
2205 __fsi_suspend(fsib
, &fsib
->playback
, dev
);
2206 __fsi_suspend(fsib
, &fsib
->capture
, dev
);
2211 static int fsi_resume(struct device
*dev
)
2213 struct fsi_master
*master
= dev_get_drvdata(dev
);
2214 struct fsi_priv
*fsia
= &master
->fsia
;
2215 struct fsi_priv
*fsib
= &master
->fsib
;
2217 __fsi_resume(fsia
, &fsia
->playback
, dev
);
2218 __fsi_resume(fsia
, &fsia
->capture
, dev
);
2220 __fsi_resume(fsib
, &fsib
->playback
, dev
);
2221 __fsi_resume(fsib
, &fsib
->capture
, dev
);
2226 static struct dev_pm_ops fsi_pm_ops
= {
2227 .suspend
= fsi_suspend
,
2228 .resume
= fsi_resume
,
2231 static struct fsi_core fsi1_core
= {
2240 static struct fsi_core fsi2_core
= {
2244 .int_st
= CPU_INT_ST
,
2247 .a_mclk
= A_MST_CTLR
,
2248 .b_mclk
= B_MST_CTLR
,
2251 static struct platform_device_id fsi_id_table
[] = {
2252 { "sh_fsi", (kernel_ulong_t
)&fsi1_core
},
2253 { "sh_fsi2", (kernel_ulong_t
)&fsi2_core
},
2256 MODULE_DEVICE_TABLE(platform
, fsi_id_table
);
2258 static struct platform_driver fsi_driver
= {
2260 .name
= "fsi-pcm-audio",
2264 .remove
= fsi_remove
,
2265 .id_table
= fsi_id_table
,
2268 module_platform_driver(fsi_driver
);
2270 MODULE_LICENSE("GPL");
2271 MODULE_DESCRIPTION("SuperH onchip FSI audio driver");
2272 MODULE_AUTHOR("Kuninori Morimoto <morimoto.kuninori@renesas.com>");
2273 MODULE_ALIAS("platform:fsi-pcm-audio");