ASoC: soc-cache: Introduce raw bulk write support
[deliverable/linux.git] / sound / soc / soc-cache.c
1 /*
2 * soc-cache.c -- ASoC register cache helpers
3 *
4 * Copyright 2009 Wolfson Microelectronics PLC.
5 *
6 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 */
13
14 #include <linux/i2c.h>
15 #include <linux/spi/spi.h>
16 #include <sound/soc.h>
17 #include <linux/lzo.h>
18 #include <linux/bitmap.h>
19 #include <linux/rbtree.h>
20
21 #include <trace/events/asoc.h>
22
23 static unsigned int snd_soc_4_12_read(struct snd_soc_codec *codec,
24 unsigned int reg)
25 {
26 int ret;
27 unsigned int val;
28
29 if (reg >= codec->driver->reg_cache_size ||
30 snd_soc_codec_volatile_register(codec, reg) ||
31 codec->cache_bypass) {
32 if (codec->cache_only)
33 return -1;
34
35 BUG_ON(!codec->hw_read);
36 return codec->hw_read(codec, reg);
37 }
38
39 ret = snd_soc_cache_read(codec, reg, &val);
40 if (ret < 0)
41 return -1;
42 return val;
43 }
44
45 static int snd_soc_4_12_write(struct snd_soc_codec *codec, unsigned int reg,
46 unsigned int value)
47 {
48 u8 data[2];
49 int ret;
50
51 data[0] = (reg << 4) | ((value >> 8) & 0x000f);
52 data[1] = value & 0x00ff;
53
54 if (!snd_soc_codec_volatile_register(codec, reg) &&
55 reg < codec->driver->reg_cache_size &&
56 !codec->cache_bypass) {
57 ret = snd_soc_cache_write(codec, reg, value);
58 if (ret < 0)
59 return -1;
60 }
61
62 if (codec->cache_only) {
63 codec->cache_sync = 1;
64 return 0;
65 }
66
67 ret = codec->hw_write(codec->control_data, data, 2);
68 if (ret == 2)
69 return 0;
70 if (ret < 0)
71 return ret;
72 else
73 return -EIO;
74 }
75
76 #if defined(CONFIG_SPI_MASTER)
77 static int snd_soc_4_12_spi_write(void *control_data, const char *data,
78 int len)
79 {
80 struct spi_device *spi = control_data;
81 struct spi_transfer t;
82 struct spi_message m;
83 u8 msg[2];
84
85 if (len <= 0)
86 return 0;
87
88 msg[0] = data[1];
89 msg[1] = data[0];
90
91 spi_message_init(&m);
92 memset(&t, 0, sizeof t);
93
94 t.tx_buf = &msg[0];
95 t.len = len;
96
97 spi_message_add_tail(&t, &m);
98 spi_sync(spi, &m);
99
100 return len;
101 }
102 #else
103 #define snd_soc_4_12_spi_write NULL
104 #endif
105
106 static unsigned int snd_soc_7_9_read(struct snd_soc_codec *codec,
107 unsigned int reg)
108 {
109 int ret;
110 unsigned int val;
111
112 if (reg >= codec->driver->reg_cache_size ||
113 snd_soc_codec_volatile_register(codec, reg) ||
114 codec->cache_bypass) {
115 if (codec->cache_only)
116 return -1;
117
118 BUG_ON(!codec->hw_read);
119 return codec->hw_read(codec, reg);
120 }
121
122 ret = snd_soc_cache_read(codec, reg, &val);
123 if (ret < 0)
124 return -1;
125 return val;
126 }
127
128 static int snd_soc_7_9_write(struct snd_soc_codec *codec, unsigned int reg,
129 unsigned int value)
130 {
131 u8 data[2];
132 int ret;
133
134 data[0] = (reg << 1) | ((value >> 8) & 0x0001);
135 data[1] = value & 0x00ff;
136
137 if (!snd_soc_codec_volatile_register(codec, reg) &&
138 reg < codec->driver->reg_cache_size &&
139 !codec->cache_bypass) {
140 ret = snd_soc_cache_write(codec, reg, value);
141 if (ret < 0)
142 return -1;
143 }
144
145 if (codec->cache_only) {
146 codec->cache_sync = 1;
147 return 0;
148 }
149
150 ret = codec->hw_write(codec->control_data, data, 2);
151 if (ret == 2)
152 return 0;
153 if (ret < 0)
154 return ret;
155 else
156 return -EIO;
157 }
158
159 #if defined(CONFIG_SPI_MASTER)
160 static int snd_soc_7_9_spi_write(void *control_data, const char *data,
161 int len)
162 {
163 struct spi_device *spi = control_data;
164 struct spi_transfer t;
165 struct spi_message m;
166 u8 msg[2];
167
168 if (len <= 0)
169 return 0;
170
171 msg[0] = data[0];
172 msg[1] = data[1];
173
174 spi_message_init(&m);
175 memset(&t, 0, sizeof t);
176
177 t.tx_buf = &msg[0];
178 t.len = len;
179
180 spi_message_add_tail(&t, &m);
181 spi_sync(spi, &m);
182
183 return len;
184 }
185 #else
186 #define snd_soc_7_9_spi_write NULL
187 #endif
188
189 static int snd_soc_8_8_write(struct snd_soc_codec *codec, unsigned int reg,
190 unsigned int value)
191 {
192 u8 data[2];
193 int ret;
194
195 reg &= 0xff;
196 data[0] = reg;
197 data[1] = value & 0xff;
198
199 if (!snd_soc_codec_volatile_register(codec, reg) &&
200 reg < codec->driver->reg_cache_size &&
201 !codec->cache_bypass) {
202 ret = snd_soc_cache_write(codec, reg, value);
203 if (ret < 0)
204 return -1;
205 }
206
207 if (codec->cache_only) {
208 codec->cache_sync = 1;
209 return 0;
210 }
211
212 if (codec->hw_write(codec->control_data, data, 2) == 2)
213 return 0;
214 else
215 return -EIO;
216 }
217
218 static unsigned int snd_soc_8_8_read(struct snd_soc_codec *codec,
219 unsigned int reg)
220 {
221 int ret;
222 unsigned int val;
223
224 reg &= 0xff;
225 if (reg >= codec->driver->reg_cache_size ||
226 snd_soc_codec_volatile_register(codec, reg) ||
227 codec->cache_bypass) {
228 if (codec->cache_only)
229 return -1;
230
231 BUG_ON(!codec->hw_read);
232 return codec->hw_read(codec, reg);
233 }
234
235 ret = snd_soc_cache_read(codec, reg, &val);
236 if (ret < 0)
237 return -1;
238 return val;
239 }
240
241 #if defined(CONFIG_SPI_MASTER)
242 static int snd_soc_8_8_spi_write(void *control_data, const char *data,
243 int len)
244 {
245 struct spi_device *spi = control_data;
246 struct spi_transfer t;
247 struct spi_message m;
248 u8 msg[2];
249
250 if (len <= 0)
251 return 0;
252
253 msg[0] = data[0];
254 msg[1] = data[1];
255
256 spi_message_init(&m);
257 memset(&t, 0, sizeof t);
258
259 t.tx_buf = &msg[0];
260 t.len = len;
261
262 spi_message_add_tail(&t, &m);
263 spi_sync(spi, &m);
264
265 return len;
266 }
267 #else
268 #define snd_soc_8_8_spi_write NULL
269 #endif
270
271 static int snd_soc_8_16_write(struct snd_soc_codec *codec, unsigned int reg,
272 unsigned int value)
273 {
274 u8 data[3];
275 int ret;
276
277 data[0] = reg;
278 data[1] = (value >> 8) & 0xff;
279 data[2] = value & 0xff;
280
281 if (!snd_soc_codec_volatile_register(codec, reg) &&
282 reg < codec->driver->reg_cache_size &&
283 !codec->cache_bypass) {
284 ret = snd_soc_cache_write(codec, reg, value);
285 if (ret < 0)
286 return -1;
287 }
288
289 if (codec->cache_only) {
290 codec->cache_sync = 1;
291 return 0;
292 }
293
294 if (codec->hw_write(codec->control_data, data, 3) == 3)
295 return 0;
296 else
297 return -EIO;
298 }
299
300 static unsigned int snd_soc_8_16_read(struct snd_soc_codec *codec,
301 unsigned int reg)
302 {
303 int ret;
304 unsigned int val;
305
306 if (reg >= codec->driver->reg_cache_size ||
307 snd_soc_codec_volatile_register(codec, reg) ||
308 codec->cache_bypass) {
309 if (codec->cache_only)
310 return -1;
311
312 BUG_ON(!codec->hw_read);
313 return codec->hw_read(codec, reg);
314 }
315
316 ret = snd_soc_cache_read(codec, reg, &val);
317 if (ret < 0)
318 return -1;
319 return val;
320 }
321
322 #if defined(CONFIG_SPI_MASTER)
323 static int snd_soc_8_16_spi_write(void *control_data, const char *data,
324 int len)
325 {
326 struct spi_device *spi = control_data;
327 struct spi_transfer t;
328 struct spi_message m;
329 u8 msg[3];
330
331 if (len <= 0)
332 return 0;
333
334 msg[0] = data[0];
335 msg[1] = data[1];
336 msg[2] = data[2];
337
338 spi_message_init(&m);
339 memset(&t, 0, sizeof t);
340
341 t.tx_buf = &msg[0];
342 t.len = len;
343
344 spi_message_add_tail(&t, &m);
345 spi_sync(spi, &m);
346
347 return len;
348 }
349 #else
350 #define snd_soc_8_16_spi_write NULL
351 #endif
352
353 #if defined(CONFIG_I2C) || (defined(CONFIG_I2C_MODULE) && defined(MODULE))
354 static unsigned int do_i2c_read(struct snd_soc_codec *codec,
355 void *reg, int reglen,
356 void *data, int datalen)
357 {
358 struct i2c_msg xfer[2];
359 int ret;
360 struct i2c_client *client = codec->control_data;
361
362 /* Write register */
363 xfer[0].addr = client->addr;
364 xfer[0].flags = 0;
365 xfer[0].len = reglen;
366 xfer[0].buf = reg;
367
368 /* Read data */
369 xfer[1].addr = client->addr;
370 xfer[1].flags = I2C_M_RD;
371 xfer[1].len = datalen;
372 xfer[1].buf = data;
373
374 ret = i2c_transfer(client->adapter, xfer, 2);
375 dev_err(&client->dev, "i2c_transfer() returned %d\n", ret);
376 if (ret == 2)
377 return 0;
378 else if (ret < 0)
379 return ret;
380 else
381 return -EIO;
382 }
383 #endif
384
385 #if defined(CONFIG_I2C) || (defined(CONFIG_I2C_MODULE) && defined(MODULE))
386 static unsigned int snd_soc_8_8_read_i2c(struct snd_soc_codec *codec,
387 unsigned int r)
388 {
389 u8 reg = r;
390 u8 data;
391 int ret;
392
393 ret = do_i2c_read(codec, &reg, 1, &data, 1);
394 if (ret < 0)
395 return 0;
396 return data;
397 }
398 #else
399 #define snd_soc_8_8_read_i2c NULL
400 #endif
401
402 #if defined(CONFIG_I2C) || (defined(CONFIG_I2C_MODULE) && defined(MODULE))
403 static unsigned int snd_soc_8_16_read_i2c(struct snd_soc_codec *codec,
404 unsigned int r)
405 {
406 u8 reg = r;
407 u16 data;
408 int ret;
409
410 ret = do_i2c_read(codec, &reg, 1, &data, 2);
411 if (ret < 0)
412 return 0;
413 return (data >> 8) | ((data & 0xff) << 8);
414 }
415 #else
416 #define snd_soc_8_16_read_i2c NULL
417 #endif
418
419 #if defined(CONFIG_I2C) || (defined(CONFIG_I2C_MODULE) && defined(MODULE))
420 static unsigned int snd_soc_16_8_read_i2c(struct snd_soc_codec *codec,
421 unsigned int r)
422 {
423 u16 reg = r;
424 u8 data;
425 int ret;
426
427 ret = do_i2c_read(codec, &reg, 2, &data, 1);
428 if (ret < 0)
429 return 0;
430 return data;
431 }
432 #else
433 #define snd_soc_16_8_read_i2c NULL
434 #endif
435
436 static unsigned int snd_soc_16_8_read(struct snd_soc_codec *codec,
437 unsigned int reg)
438 {
439 int ret;
440 unsigned int val;
441
442 reg &= 0xff;
443 if (reg >= codec->driver->reg_cache_size ||
444 snd_soc_codec_volatile_register(codec, reg) ||
445 codec->cache_bypass) {
446 if (codec->cache_only)
447 return -1;
448
449 BUG_ON(!codec->hw_read);
450 return codec->hw_read(codec, reg);
451 }
452
453 ret = snd_soc_cache_read(codec, reg, &val);
454 if (ret < 0)
455 return -1;
456 return val;
457 }
458
459 static int snd_soc_16_8_write(struct snd_soc_codec *codec, unsigned int reg,
460 unsigned int value)
461 {
462 u8 data[3];
463 int ret;
464
465 data[0] = (reg >> 8) & 0xff;
466 data[1] = reg & 0xff;
467 data[2] = value;
468
469 reg &= 0xff;
470 if (!snd_soc_codec_volatile_register(codec, reg) &&
471 reg < codec->driver->reg_cache_size &&
472 !codec->cache_bypass) {
473 ret = snd_soc_cache_write(codec, reg, value);
474 if (ret < 0)
475 return -1;
476 }
477
478 if (codec->cache_only) {
479 codec->cache_sync = 1;
480 return 0;
481 }
482
483 ret = codec->hw_write(codec->control_data, data, 3);
484 if (ret == 3)
485 return 0;
486 if (ret < 0)
487 return ret;
488 else
489 return -EIO;
490 }
491
492 #if defined(CONFIG_SPI_MASTER)
493 static int snd_soc_16_8_spi_write(void *control_data, const char *data,
494 int len)
495 {
496 struct spi_device *spi = control_data;
497 struct spi_transfer t;
498 struct spi_message m;
499 u8 msg[3];
500
501 if (len <= 0)
502 return 0;
503
504 msg[0] = data[0];
505 msg[1] = data[1];
506 msg[2] = data[2];
507
508 spi_message_init(&m);
509 memset(&t, 0, sizeof t);
510
511 t.tx_buf = &msg[0];
512 t.len = len;
513
514 spi_message_add_tail(&t, &m);
515 spi_sync(spi, &m);
516
517 return len;
518 }
519 #else
520 #define snd_soc_16_8_spi_write NULL
521 #endif
522
523 #if defined(CONFIG_I2C) || (defined(CONFIG_I2C_MODULE) && defined(MODULE))
524 static unsigned int snd_soc_16_16_read_i2c(struct snd_soc_codec *codec,
525 unsigned int r)
526 {
527 u16 reg = cpu_to_be16(r);
528 u16 data;
529 int ret;
530
531 ret = do_i2c_read(codec, &reg, 2, &data, 2);
532 if (ret < 0)
533 return 0;
534 return be16_to_cpu(data);
535 }
536 #else
537 #define snd_soc_16_16_read_i2c NULL
538 #endif
539
540 static unsigned int snd_soc_16_16_read(struct snd_soc_codec *codec,
541 unsigned int reg)
542 {
543 int ret;
544 unsigned int val;
545
546 if (reg >= codec->driver->reg_cache_size ||
547 snd_soc_codec_volatile_register(codec, reg) ||
548 codec->cache_bypass) {
549 if (codec->cache_only)
550 return -1;
551
552 BUG_ON(!codec->hw_read);
553 return codec->hw_read(codec, reg);
554 }
555
556 ret = snd_soc_cache_read(codec, reg, &val);
557 if (ret < 0)
558 return -1;
559
560 return val;
561 }
562
563 static int snd_soc_16_16_write(struct snd_soc_codec *codec, unsigned int reg,
564 unsigned int value)
565 {
566 u8 data[4];
567 int ret;
568
569 data[0] = (reg >> 8) & 0xff;
570 data[1] = reg & 0xff;
571 data[2] = (value >> 8) & 0xff;
572 data[3] = value & 0xff;
573
574 if (!snd_soc_codec_volatile_register(codec, reg) &&
575 reg < codec->driver->reg_cache_size &&
576 !codec->cache_bypass) {
577 ret = snd_soc_cache_write(codec, reg, value);
578 if (ret < 0)
579 return -1;
580 }
581
582 if (codec->cache_only) {
583 codec->cache_sync = 1;
584 return 0;
585 }
586
587 ret = codec->hw_write(codec->control_data, data, 4);
588 if (ret == 4)
589 return 0;
590 if (ret < 0)
591 return ret;
592 else
593 return -EIO;
594 }
595
596 #if defined(CONFIG_SPI_MASTER)
597 static int snd_soc_16_16_spi_write(void *control_data, const char *data,
598 int len)
599 {
600 struct spi_device *spi = control_data;
601 struct spi_transfer t;
602 struct spi_message m;
603 u8 msg[4];
604
605 if (len <= 0)
606 return 0;
607
608 msg[0] = data[0];
609 msg[1] = data[1];
610 msg[2] = data[2];
611 msg[3] = data[3];
612
613 spi_message_init(&m);
614 memset(&t, 0, sizeof t);
615
616 t.tx_buf = &msg[0];
617 t.len = len;
618
619 spi_message_add_tail(&t, &m);
620 spi_sync(spi, &m);
621
622 return len;
623 }
624 #else
625 #define snd_soc_16_16_spi_write NULL
626 #endif
627
628 /* Primitive bulk write support for soc-cache. The data pointed to by `data' needs
629 * to already be in the form the hardware expects including any leading register specific
630 * data. Any data written through this function will not go through the cache as it
631 * only handles writing to volatile or out of bounds registers.
632 */
633 static int snd_soc_hw_bulk_write_raw(struct snd_soc_codec *codec, unsigned int reg,
634 const void *data, size_t len)
635 {
636 int ret;
637
638 /* Ensure that the base register is volatile. Subsequently
639 * any other register that is touched by this routine should be
640 * volatile as well to ensure that we don't get out of sync with
641 * the cache.
642 */
643 if (!snd_soc_codec_volatile_register(codec, reg)
644 && reg < codec->driver->reg_cache_size)
645 return -EINVAL;
646
647 switch (codec->control_type) {
648 case SND_SOC_I2C:
649 ret = i2c_master_send(codec->control_data, data, len);
650 break;
651 case SND_SOC_SPI:
652 ret = do_spi_write(codec->control_data, data, len);
653 break;
654 default:
655 BUG();
656 }
657
658 if (ret == len)
659 return 0;
660 if (ret < 0)
661 return ret;
662 else
663 return -EIO;
664 }
665
666 static struct {
667 int addr_bits;
668 int data_bits;
669 int (*write)(struct snd_soc_codec *codec, unsigned int, unsigned int);
670 int (*spi_write)(void *, const char *, int);
671 unsigned int (*read)(struct snd_soc_codec *, unsigned int);
672 unsigned int (*i2c_read)(struct snd_soc_codec *, unsigned int);
673 } io_types[] = {
674 {
675 .addr_bits = 4, .data_bits = 12,
676 .write = snd_soc_4_12_write, .read = snd_soc_4_12_read,
677 .spi_write = snd_soc_4_12_spi_write,
678 },
679 {
680 .addr_bits = 7, .data_bits = 9,
681 .write = snd_soc_7_9_write, .read = snd_soc_7_9_read,
682 .spi_write = snd_soc_7_9_spi_write,
683 },
684 {
685 .addr_bits = 8, .data_bits = 8,
686 .write = snd_soc_8_8_write, .read = snd_soc_8_8_read,
687 .i2c_read = snd_soc_8_8_read_i2c,
688 .spi_write = snd_soc_8_8_spi_write,
689 },
690 {
691 .addr_bits = 8, .data_bits = 16,
692 .write = snd_soc_8_16_write, .read = snd_soc_8_16_read,
693 .i2c_read = snd_soc_8_16_read_i2c,
694 .spi_write = snd_soc_8_16_spi_write,
695 },
696 {
697 .addr_bits = 16, .data_bits = 8,
698 .write = snd_soc_16_8_write, .read = snd_soc_16_8_read,
699 .i2c_read = snd_soc_16_8_read_i2c,
700 .spi_write = snd_soc_16_8_spi_write,
701 },
702 {
703 .addr_bits = 16, .data_bits = 16,
704 .write = snd_soc_16_16_write, .read = snd_soc_16_16_read,
705 .i2c_read = snd_soc_16_16_read_i2c,
706 .spi_write = snd_soc_16_16_spi_write,
707 },
708 };
709
710 /**
711 * snd_soc_codec_set_cache_io: Set up standard I/O functions.
712 *
713 * @codec: CODEC to configure.
714 * @type: Type of cache.
715 * @addr_bits: Number of bits of register address data.
716 * @data_bits: Number of bits of data per register.
717 * @control: Control bus used.
718 *
719 * Register formats are frequently shared between many I2C and SPI
720 * devices. In order to promote code reuse the ASoC core provides
721 * some standard implementations of CODEC read and write operations
722 * which can be set up using this function.
723 *
724 * The caller is responsible for allocating and initialising the
725 * actual cache.
726 *
727 * Note that at present this code cannot be used by CODECs with
728 * volatile registers.
729 */
730 int snd_soc_codec_set_cache_io(struct snd_soc_codec *codec,
731 int addr_bits, int data_bits,
732 enum snd_soc_control_type control)
733 {
734 int i;
735
736 for (i = 0; i < ARRAY_SIZE(io_types); i++)
737 if (io_types[i].addr_bits == addr_bits &&
738 io_types[i].data_bits == data_bits)
739 break;
740 if (i == ARRAY_SIZE(io_types)) {
741 printk(KERN_ERR
742 "No I/O functions for %d bit address %d bit data\n",
743 addr_bits, data_bits);
744 return -EINVAL;
745 }
746
747 codec->write = io_types[i].write;
748 codec->read = io_types[i].read;
749 codec->bulk_write_raw = snd_soc_hw_bulk_write_raw;
750
751 switch (control) {
752 case SND_SOC_CUSTOM:
753 break;
754
755 case SND_SOC_I2C:
756 #if defined(CONFIG_I2C) || (defined(CONFIG_I2C_MODULE) && defined(MODULE))
757 codec->hw_write = (hw_write_t)i2c_master_send;
758 #endif
759 if (io_types[i].i2c_read)
760 codec->hw_read = io_types[i].i2c_read;
761
762 codec->control_data = container_of(codec->dev,
763 struct i2c_client,
764 dev);
765 break;
766
767 case SND_SOC_SPI:
768 if (io_types[i].spi_write)
769 codec->hw_write = io_types[i].spi_write;
770
771 codec->control_data = container_of(codec->dev,
772 struct spi_device,
773 dev);
774 break;
775 }
776
777 return 0;
778 }
779 EXPORT_SYMBOL_GPL(snd_soc_codec_set_cache_io);
780
781 static bool snd_soc_set_cache_val(void *base, unsigned int idx,
782 unsigned int val, unsigned int word_size)
783 {
784 switch (word_size) {
785 case 1: {
786 u8 *cache = base;
787 if (cache[idx] == val)
788 return true;
789 cache[idx] = val;
790 break;
791 }
792 case 2: {
793 u16 *cache = base;
794 if (cache[idx] == val)
795 return true;
796 cache[idx] = val;
797 break;
798 }
799 default:
800 BUG();
801 }
802 return false;
803 }
804
805 static unsigned int snd_soc_get_cache_val(const void *base, unsigned int idx,
806 unsigned int word_size)
807 {
808 switch (word_size) {
809 case 1: {
810 const u8 *cache = base;
811 return cache[idx];
812 }
813 case 2: {
814 const u16 *cache = base;
815 return cache[idx];
816 }
817 default:
818 BUG();
819 }
820 /* unreachable */
821 return -1;
822 }
823
824 struct snd_soc_rbtree_node {
825 struct rb_node node;
826 unsigned int reg;
827 unsigned int value;
828 unsigned int defval;
829 } __attribute__ ((packed));
830
831 struct snd_soc_rbtree_ctx {
832 struct rb_root root;
833 };
834
835 static struct snd_soc_rbtree_node *snd_soc_rbtree_lookup(
836 struct rb_root *root, unsigned int reg)
837 {
838 struct rb_node *node;
839 struct snd_soc_rbtree_node *rbnode;
840
841 node = root->rb_node;
842 while (node) {
843 rbnode = container_of(node, struct snd_soc_rbtree_node, node);
844 if (rbnode->reg < reg)
845 node = node->rb_left;
846 else if (rbnode->reg > reg)
847 node = node->rb_right;
848 else
849 return rbnode;
850 }
851
852 return NULL;
853 }
854
855 static int snd_soc_rbtree_insert(struct rb_root *root,
856 struct snd_soc_rbtree_node *rbnode)
857 {
858 struct rb_node **new, *parent;
859 struct snd_soc_rbtree_node *rbnode_tmp;
860
861 parent = NULL;
862 new = &root->rb_node;
863 while (*new) {
864 rbnode_tmp = container_of(*new, struct snd_soc_rbtree_node,
865 node);
866 parent = *new;
867 if (rbnode_tmp->reg < rbnode->reg)
868 new = &((*new)->rb_left);
869 else if (rbnode_tmp->reg > rbnode->reg)
870 new = &((*new)->rb_right);
871 else
872 return 0;
873 }
874
875 /* insert the node into the rbtree */
876 rb_link_node(&rbnode->node, parent, new);
877 rb_insert_color(&rbnode->node, root);
878
879 return 1;
880 }
881
882 static int snd_soc_rbtree_cache_sync(struct snd_soc_codec *codec)
883 {
884 struct snd_soc_rbtree_ctx *rbtree_ctx;
885 struct rb_node *node;
886 struct snd_soc_rbtree_node *rbnode;
887 unsigned int val;
888 int ret;
889
890 rbtree_ctx = codec->reg_cache;
891 for (node = rb_first(&rbtree_ctx->root); node; node = rb_next(node)) {
892 rbnode = rb_entry(node, struct snd_soc_rbtree_node, node);
893 if (rbnode->value == rbnode->defval)
894 continue;
895 ret = snd_soc_cache_read(codec, rbnode->reg, &val);
896 if (ret)
897 return ret;
898 codec->cache_bypass = 1;
899 ret = snd_soc_write(codec, rbnode->reg, val);
900 codec->cache_bypass = 0;
901 if (ret)
902 return ret;
903 dev_dbg(codec->dev, "Synced register %#x, value = %#x\n",
904 rbnode->reg, val);
905 }
906
907 return 0;
908 }
909
910 static int snd_soc_rbtree_cache_write(struct snd_soc_codec *codec,
911 unsigned int reg, unsigned int value)
912 {
913 struct snd_soc_rbtree_ctx *rbtree_ctx;
914 struct snd_soc_rbtree_node *rbnode;
915
916 rbtree_ctx = codec->reg_cache;
917 rbnode = snd_soc_rbtree_lookup(&rbtree_ctx->root, reg);
918 if (rbnode) {
919 if (rbnode->value == value)
920 return 0;
921 rbnode->value = value;
922 } else {
923 /* bail out early, no need to create the rbnode yet */
924 if (!value)
925 return 0;
926 /*
927 * for uninitialized registers whose value is changed
928 * from the default zero, create an rbnode and insert
929 * it into the tree.
930 */
931 rbnode = kzalloc(sizeof *rbnode, GFP_KERNEL);
932 if (!rbnode)
933 return -ENOMEM;
934 rbnode->reg = reg;
935 rbnode->value = value;
936 snd_soc_rbtree_insert(&rbtree_ctx->root, rbnode);
937 }
938
939 return 0;
940 }
941
942 static int snd_soc_rbtree_cache_read(struct snd_soc_codec *codec,
943 unsigned int reg, unsigned int *value)
944 {
945 struct snd_soc_rbtree_ctx *rbtree_ctx;
946 struct snd_soc_rbtree_node *rbnode;
947
948 rbtree_ctx = codec->reg_cache;
949 rbnode = snd_soc_rbtree_lookup(&rbtree_ctx->root, reg);
950 if (rbnode) {
951 *value = rbnode->value;
952 } else {
953 /* uninitialized registers default to 0 */
954 *value = 0;
955 }
956
957 return 0;
958 }
959
960 static int snd_soc_rbtree_cache_exit(struct snd_soc_codec *codec)
961 {
962 struct rb_node *next;
963 struct snd_soc_rbtree_ctx *rbtree_ctx;
964 struct snd_soc_rbtree_node *rbtree_node;
965
966 /* if we've already been called then just return */
967 rbtree_ctx = codec->reg_cache;
968 if (!rbtree_ctx)
969 return 0;
970
971 /* free up the rbtree */
972 next = rb_first(&rbtree_ctx->root);
973 while (next) {
974 rbtree_node = rb_entry(next, struct snd_soc_rbtree_node, node);
975 next = rb_next(&rbtree_node->node);
976 rb_erase(&rbtree_node->node, &rbtree_ctx->root);
977 kfree(rbtree_node);
978 }
979
980 /* release the resources */
981 kfree(codec->reg_cache);
982 codec->reg_cache = NULL;
983
984 return 0;
985 }
986
987 static int snd_soc_rbtree_cache_init(struct snd_soc_codec *codec)
988 {
989 struct snd_soc_rbtree_node *rbtree_node;
990 struct snd_soc_rbtree_ctx *rbtree_ctx;
991 unsigned int val;
992 unsigned int word_size;
993 int i;
994 int ret;
995
996 codec->reg_cache = kmalloc(sizeof *rbtree_ctx, GFP_KERNEL);
997 if (!codec->reg_cache)
998 return -ENOMEM;
999
1000 rbtree_ctx = codec->reg_cache;
1001 rbtree_ctx->root = RB_ROOT;
1002
1003 if (!codec->reg_def_copy)
1004 return 0;
1005
1006 /*
1007 * populate the rbtree with the initialized registers. All other
1008 * registers will be inserted when they are first modified.
1009 */
1010 word_size = codec->driver->reg_word_size;
1011 for (i = 0; i < codec->driver->reg_cache_size; ++i) {
1012 val = snd_soc_get_cache_val(codec->reg_def_copy, i, word_size);
1013 if (!val)
1014 continue;
1015 rbtree_node = kzalloc(sizeof *rbtree_node, GFP_KERNEL);
1016 if (!rbtree_node) {
1017 ret = -ENOMEM;
1018 snd_soc_cache_exit(codec);
1019 break;
1020 }
1021 rbtree_node->reg = i;
1022 rbtree_node->value = val;
1023 rbtree_node->defval = val;
1024 snd_soc_rbtree_insert(&rbtree_ctx->root, rbtree_node);
1025 }
1026
1027 return 0;
1028 }
1029
1030 #ifdef CONFIG_SND_SOC_CACHE_LZO
1031 struct snd_soc_lzo_ctx {
1032 void *wmem;
1033 void *dst;
1034 const void *src;
1035 size_t src_len;
1036 size_t dst_len;
1037 size_t decompressed_size;
1038 unsigned long *sync_bmp;
1039 int sync_bmp_nbits;
1040 };
1041
1042 #define LZO_BLOCK_NUM 8
1043 static int snd_soc_lzo_block_count(void)
1044 {
1045 return LZO_BLOCK_NUM;
1046 }
1047
1048 static int snd_soc_lzo_prepare(struct snd_soc_lzo_ctx *lzo_ctx)
1049 {
1050 lzo_ctx->wmem = kmalloc(LZO1X_MEM_COMPRESS, GFP_KERNEL);
1051 if (!lzo_ctx->wmem)
1052 return -ENOMEM;
1053 return 0;
1054 }
1055
1056 static int snd_soc_lzo_compress(struct snd_soc_lzo_ctx *lzo_ctx)
1057 {
1058 size_t compress_size;
1059 int ret;
1060
1061 ret = lzo1x_1_compress(lzo_ctx->src, lzo_ctx->src_len,
1062 lzo_ctx->dst, &compress_size, lzo_ctx->wmem);
1063 if (ret != LZO_E_OK || compress_size > lzo_ctx->dst_len)
1064 return -EINVAL;
1065 lzo_ctx->dst_len = compress_size;
1066 return 0;
1067 }
1068
1069 static int snd_soc_lzo_decompress(struct snd_soc_lzo_ctx *lzo_ctx)
1070 {
1071 size_t dst_len;
1072 int ret;
1073
1074 dst_len = lzo_ctx->dst_len;
1075 ret = lzo1x_decompress_safe(lzo_ctx->src, lzo_ctx->src_len,
1076 lzo_ctx->dst, &dst_len);
1077 if (ret != LZO_E_OK || dst_len != lzo_ctx->dst_len)
1078 return -EINVAL;
1079 return 0;
1080 }
1081
1082 static int snd_soc_lzo_compress_cache_block(struct snd_soc_codec *codec,
1083 struct snd_soc_lzo_ctx *lzo_ctx)
1084 {
1085 int ret;
1086
1087 lzo_ctx->dst_len = lzo1x_worst_compress(PAGE_SIZE);
1088 lzo_ctx->dst = kmalloc(lzo_ctx->dst_len, GFP_KERNEL);
1089 if (!lzo_ctx->dst) {
1090 lzo_ctx->dst_len = 0;
1091 return -ENOMEM;
1092 }
1093
1094 ret = snd_soc_lzo_compress(lzo_ctx);
1095 if (ret < 0)
1096 return ret;
1097 return 0;
1098 }
1099
1100 static int snd_soc_lzo_decompress_cache_block(struct snd_soc_codec *codec,
1101 struct snd_soc_lzo_ctx *lzo_ctx)
1102 {
1103 int ret;
1104
1105 lzo_ctx->dst_len = lzo_ctx->decompressed_size;
1106 lzo_ctx->dst = kmalloc(lzo_ctx->dst_len, GFP_KERNEL);
1107 if (!lzo_ctx->dst) {
1108 lzo_ctx->dst_len = 0;
1109 return -ENOMEM;
1110 }
1111
1112 ret = snd_soc_lzo_decompress(lzo_ctx);
1113 if (ret < 0)
1114 return ret;
1115 return 0;
1116 }
1117
1118 static inline int snd_soc_lzo_get_blkindex(struct snd_soc_codec *codec,
1119 unsigned int reg)
1120 {
1121 const struct snd_soc_codec_driver *codec_drv;
1122
1123 codec_drv = codec->driver;
1124 return (reg * codec_drv->reg_word_size) /
1125 DIV_ROUND_UP(codec->reg_size, snd_soc_lzo_block_count());
1126 }
1127
1128 static inline int snd_soc_lzo_get_blkpos(struct snd_soc_codec *codec,
1129 unsigned int reg)
1130 {
1131 const struct snd_soc_codec_driver *codec_drv;
1132
1133 codec_drv = codec->driver;
1134 return reg % (DIV_ROUND_UP(codec->reg_size, snd_soc_lzo_block_count()) /
1135 codec_drv->reg_word_size);
1136 }
1137
1138 static inline int snd_soc_lzo_get_blksize(struct snd_soc_codec *codec)
1139 {
1140 const struct snd_soc_codec_driver *codec_drv;
1141
1142 codec_drv = codec->driver;
1143 return DIV_ROUND_UP(codec->reg_size, snd_soc_lzo_block_count());
1144 }
1145
1146 static int snd_soc_lzo_cache_sync(struct snd_soc_codec *codec)
1147 {
1148 struct snd_soc_lzo_ctx **lzo_blocks;
1149 unsigned int val;
1150 int i;
1151 int ret;
1152
1153 lzo_blocks = codec->reg_cache;
1154 for_each_set_bit(i, lzo_blocks[0]->sync_bmp, lzo_blocks[0]->sync_bmp_nbits) {
1155 ret = snd_soc_cache_read(codec, i, &val);
1156 if (ret)
1157 return ret;
1158 codec->cache_bypass = 1;
1159 ret = snd_soc_write(codec, i, val);
1160 codec->cache_bypass = 0;
1161 if (ret)
1162 return ret;
1163 dev_dbg(codec->dev, "Synced register %#x, value = %#x\n",
1164 i, val);
1165 }
1166
1167 return 0;
1168 }
1169
1170 static int snd_soc_lzo_cache_write(struct snd_soc_codec *codec,
1171 unsigned int reg, unsigned int value)
1172 {
1173 struct snd_soc_lzo_ctx *lzo_block, **lzo_blocks;
1174 int ret, blkindex, blkpos;
1175 size_t blksize, tmp_dst_len;
1176 void *tmp_dst;
1177
1178 /* index of the compressed lzo block */
1179 blkindex = snd_soc_lzo_get_blkindex(codec, reg);
1180 /* register index within the decompressed block */
1181 blkpos = snd_soc_lzo_get_blkpos(codec, reg);
1182 /* size of the compressed block */
1183 blksize = snd_soc_lzo_get_blksize(codec);
1184 lzo_blocks = codec->reg_cache;
1185 lzo_block = lzo_blocks[blkindex];
1186
1187 /* save the pointer and length of the compressed block */
1188 tmp_dst = lzo_block->dst;
1189 tmp_dst_len = lzo_block->dst_len;
1190
1191 /* prepare the source to be the compressed block */
1192 lzo_block->src = lzo_block->dst;
1193 lzo_block->src_len = lzo_block->dst_len;
1194
1195 /* decompress the block */
1196 ret = snd_soc_lzo_decompress_cache_block(codec, lzo_block);
1197 if (ret < 0) {
1198 kfree(lzo_block->dst);
1199 goto out;
1200 }
1201
1202 /* write the new value to the cache */
1203 if (snd_soc_set_cache_val(lzo_block->dst, blkpos, value,
1204 codec->driver->reg_word_size)) {
1205 kfree(lzo_block->dst);
1206 goto out;
1207 }
1208
1209 /* prepare the source to be the decompressed block */
1210 lzo_block->src = lzo_block->dst;
1211 lzo_block->src_len = lzo_block->dst_len;
1212
1213 /* compress the block */
1214 ret = snd_soc_lzo_compress_cache_block(codec, lzo_block);
1215 if (ret < 0) {
1216 kfree(lzo_block->dst);
1217 kfree(lzo_block->src);
1218 goto out;
1219 }
1220
1221 /* set the bit so we know we have to sync this register */
1222 set_bit(reg, lzo_block->sync_bmp);
1223 kfree(tmp_dst);
1224 kfree(lzo_block->src);
1225 return 0;
1226 out:
1227 lzo_block->dst = tmp_dst;
1228 lzo_block->dst_len = tmp_dst_len;
1229 return ret;
1230 }
1231
1232 static int snd_soc_lzo_cache_read(struct snd_soc_codec *codec,
1233 unsigned int reg, unsigned int *value)
1234 {
1235 struct snd_soc_lzo_ctx *lzo_block, **lzo_blocks;
1236 int ret, blkindex, blkpos;
1237 size_t blksize, tmp_dst_len;
1238 void *tmp_dst;
1239
1240 *value = 0;
1241 /* index of the compressed lzo block */
1242 blkindex = snd_soc_lzo_get_blkindex(codec, reg);
1243 /* register index within the decompressed block */
1244 blkpos = snd_soc_lzo_get_blkpos(codec, reg);
1245 /* size of the compressed block */
1246 blksize = snd_soc_lzo_get_blksize(codec);
1247 lzo_blocks = codec->reg_cache;
1248 lzo_block = lzo_blocks[blkindex];
1249
1250 /* save the pointer and length of the compressed block */
1251 tmp_dst = lzo_block->dst;
1252 tmp_dst_len = lzo_block->dst_len;
1253
1254 /* prepare the source to be the compressed block */
1255 lzo_block->src = lzo_block->dst;
1256 lzo_block->src_len = lzo_block->dst_len;
1257
1258 /* decompress the block */
1259 ret = snd_soc_lzo_decompress_cache_block(codec, lzo_block);
1260 if (ret >= 0)
1261 /* fetch the value from the cache */
1262 *value = snd_soc_get_cache_val(lzo_block->dst, blkpos,
1263 codec->driver->reg_word_size);
1264
1265 kfree(lzo_block->dst);
1266 /* restore the pointer and length of the compressed block */
1267 lzo_block->dst = tmp_dst;
1268 lzo_block->dst_len = tmp_dst_len;
1269 return 0;
1270 }
1271
1272 static int snd_soc_lzo_cache_exit(struct snd_soc_codec *codec)
1273 {
1274 struct snd_soc_lzo_ctx **lzo_blocks;
1275 int i, blkcount;
1276
1277 lzo_blocks = codec->reg_cache;
1278 if (!lzo_blocks)
1279 return 0;
1280
1281 blkcount = snd_soc_lzo_block_count();
1282 /*
1283 * the pointer to the bitmap used for syncing the cache
1284 * is shared amongst all lzo_blocks. Ensure it is freed
1285 * only once.
1286 */
1287 if (lzo_blocks[0])
1288 kfree(lzo_blocks[0]->sync_bmp);
1289 for (i = 0; i < blkcount; ++i) {
1290 if (lzo_blocks[i]) {
1291 kfree(lzo_blocks[i]->wmem);
1292 kfree(lzo_blocks[i]->dst);
1293 }
1294 /* each lzo_block is a pointer returned by kmalloc or NULL */
1295 kfree(lzo_blocks[i]);
1296 }
1297 kfree(lzo_blocks);
1298 codec->reg_cache = NULL;
1299 return 0;
1300 }
1301
1302 static int snd_soc_lzo_cache_init(struct snd_soc_codec *codec)
1303 {
1304 struct snd_soc_lzo_ctx **lzo_blocks;
1305 size_t bmp_size;
1306 const struct snd_soc_codec_driver *codec_drv;
1307 int ret, tofree, i, blksize, blkcount;
1308 const char *p, *end;
1309 unsigned long *sync_bmp;
1310
1311 ret = 0;
1312 codec_drv = codec->driver;
1313
1314 /*
1315 * If we have not been given a default register cache
1316 * then allocate a dummy zero-ed out region, compress it
1317 * and remember to free it afterwards.
1318 */
1319 tofree = 0;
1320 if (!codec->reg_def_copy)
1321 tofree = 1;
1322
1323 if (!codec->reg_def_copy) {
1324 codec->reg_def_copy = kzalloc(codec->reg_size, GFP_KERNEL);
1325 if (!codec->reg_def_copy)
1326 return -ENOMEM;
1327 }
1328
1329 blkcount = snd_soc_lzo_block_count();
1330 codec->reg_cache = kzalloc(blkcount * sizeof *lzo_blocks,
1331 GFP_KERNEL);
1332 if (!codec->reg_cache) {
1333 ret = -ENOMEM;
1334 goto err_tofree;
1335 }
1336 lzo_blocks = codec->reg_cache;
1337
1338 /*
1339 * allocate a bitmap to be used when syncing the cache with
1340 * the hardware. Each time a register is modified, the corresponding
1341 * bit is set in the bitmap, so we know that we have to sync
1342 * that register.
1343 */
1344 bmp_size = codec_drv->reg_cache_size;
1345 sync_bmp = kmalloc(BITS_TO_LONGS(bmp_size) * sizeof(long),
1346 GFP_KERNEL);
1347 if (!sync_bmp) {
1348 ret = -ENOMEM;
1349 goto err;
1350 }
1351 bitmap_zero(sync_bmp, bmp_size);
1352
1353 /* allocate the lzo blocks and initialize them */
1354 for (i = 0; i < blkcount; ++i) {
1355 lzo_blocks[i] = kzalloc(sizeof **lzo_blocks,
1356 GFP_KERNEL);
1357 if (!lzo_blocks[i]) {
1358 kfree(sync_bmp);
1359 ret = -ENOMEM;
1360 goto err;
1361 }
1362 lzo_blocks[i]->sync_bmp = sync_bmp;
1363 lzo_blocks[i]->sync_bmp_nbits = bmp_size;
1364 /* alloc the working space for the compressed block */
1365 ret = snd_soc_lzo_prepare(lzo_blocks[i]);
1366 if (ret < 0)
1367 goto err;
1368 }
1369
1370 blksize = snd_soc_lzo_get_blksize(codec);
1371 p = codec->reg_def_copy;
1372 end = codec->reg_def_copy + codec->reg_size;
1373 /* compress the register map and fill the lzo blocks */
1374 for (i = 0; i < blkcount; ++i, p += blksize) {
1375 lzo_blocks[i]->src = p;
1376 if (p + blksize > end)
1377 lzo_blocks[i]->src_len = end - p;
1378 else
1379 lzo_blocks[i]->src_len = blksize;
1380 ret = snd_soc_lzo_compress_cache_block(codec,
1381 lzo_blocks[i]);
1382 if (ret < 0)
1383 goto err;
1384 lzo_blocks[i]->decompressed_size =
1385 lzo_blocks[i]->src_len;
1386 }
1387
1388 if (tofree) {
1389 kfree(codec->reg_def_copy);
1390 codec->reg_def_copy = NULL;
1391 }
1392 return 0;
1393 err:
1394 snd_soc_cache_exit(codec);
1395 err_tofree:
1396 if (tofree) {
1397 kfree(codec->reg_def_copy);
1398 codec->reg_def_copy = NULL;
1399 }
1400 return ret;
1401 }
1402 #endif
1403
1404 static int snd_soc_flat_cache_sync(struct snd_soc_codec *codec)
1405 {
1406 int i;
1407 int ret;
1408 const struct snd_soc_codec_driver *codec_drv;
1409 unsigned int val;
1410
1411 codec_drv = codec->driver;
1412 for (i = 0; i < codec_drv->reg_cache_size; ++i) {
1413 ret = snd_soc_cache_read(codec, i, &val);
1414 if (ret)
1415 return ret;
1416 if (codec->reg_def_copy)
1417 if (snd_soc_get_cache_val(codec->reg_def_copy,
1418 i, codec_drv->reg_word_size) == val)
1419 continue;
1420 ret = snd_soc_write(codec, i, val);
1421 if (ret)
1422 return ret;
1423 dev_dbg(codec->dev, "Synced register %#x, value = %#x\n",
1424 i, val);
1425 }
1426 return 0;
1427 }
1428
1429 static int snd_soc_flat_cache_write(struct snd_soc_codec *codec,
1430 unsigned int reg, unsigned int value)
1431 {
1432 snd_soc_set_cache_val(codec->reg_cache, reg, value,
1433 codec->driver->reg_word_size);
1434 return 0;
1435 }
1436
1437 static int snd_soc_flat_cache_read(struct snd_soc_codec *codec,
1438 unsigned int reg, unsigned int *value)
1439 {
1440 *value = snd_soc_get_cache_val(codec->reg_cache, reg,
1441 codec->driver->reg_word_size);
1442 return 0;
1443 }
1444
1445 static int snd_soc_flat_cache_exit(struct snd_soc_codec *codec)
1446 {
1447 if (!codec->reg_cache)
1448 return 0;
1449 kfree(codec->reg_cache);
1450 codec->reg_cache = NULL;
1451 return 0;
1452 }
1453
1454 static int snd_soc_flat_cache_init(struct snd_soc_codec *codec)
1455 {
1456 const struct snd_soc_codec_driver *codec_drv;
1457
1458 codec_drv = codec->driver;
1459
1460 if (codec->reg_def_copy)
1461 codec->reg_cache = kmemdup(codec->reg_def_copy,
1462 codec->reg_size, GFP_KERNEL);
1463 else
1464 codec->reg_cache = kzalloc(codec->reg_size, GFP_KERNEL);
1465 if (!codec->reg_cache)
1466 return -ENOMEM;
1467
1468 return 0;
1469 }
1470
1471 /* an array of all supported compression types */
1472 static const struct snd_soc_cache_ops cache_types[] = {
1473 /* Flat *must* be the first entry for fallback */
1474 {
1475 .id = SND_SOC_FLAT_COMPRESSION,
1476 .name = "flat",
1477 .init = snd_soc_flat_cache_init,
1478 .exit = snd_soc_flat_cache_exit,
1479 .read = snd_soc_flat_cache_read,
1480 .write = snd_soc_flat_cache_write,
1481 .sync = snd_soc_flat_cache_sync
1482 },
1483 #ifdef CONFIG_SND_SOC_CACHE_LZO
1484 {
1485 .id = SND_SOC_LZO_COMPRESSION,
1486 .name = "LZO",
1487 .init = snd_soc_lzo_cache_init,
1488 .exit = snd_soc_lzo_cache_exit,
1489 .read = snd_soc_lzo_cache_read,
1490 .write = snd_soc_lzo_cache_write,
1491 .sync = snd_soc_lzo_cache_sync
1492 },
1493 #endif
1494 {
1495 .id = SND_SOC_RBTREE_COMPRESSION,
1496 .name = "rbtree",
1497 .init = snd_soc_rbtree_cache_init,
1498 .exit = snd_soc_rbtree_cache_exit,
1499 .read = snd_soc_rbtree_cache_read,
1500 .write = snd_soc_rbtree_cache_write,
1501 .sync = snd_soc_rbtree_cache_sync
1502 }
1503 };
1504
1505 int snd_soc_cache_init(struct snd_soc_codec *codec)
1506 {
1507 int i;
1508
1509 for (i = 0; i < ARRAY_SIZE(cache_types); ++i)
1510 if (cache_types[i].id == codec->compress_type)
1511 break;
1512
1513 /* Fall back to flat compression */
1514 if (i == ARRAY_SIZE(cache_types)) {
1515 dev_warn(codec->dev, "Could not match compress type: %d\n",
1516 codec->compress_type);
1517 i = 0;
1518 }
1519
1520 mutex_init(&codec->cache_rw_mutex);
1521 codec->cache_ops = &cache_types[i];
1522
1523 if (codec->cache_ops->init) {
1524 if (codec->cache_ops->name)
1525 dev_dbg(codec->dev, "Initializing %s cache for %s codec\n",
1526 codec->cache_ops->name, codec->name);
1527 return codec->cache_ops->init(codec);
1528 }
1529 return -EINVAL;
1530 }
1531
1532 /*
1533 * NOTE: keep in mind that this function might be called
1534 * multiple times.
1535 */
1536 int snd_soc_cache_exit(struct snd_soc_codec *codec)
1537 {
1538 if (codec->cache_ops && codec->cache_ops->exit) {
1539 if (codec->cache_ops->name)
1540 dev_dbg(codec->dev, "Destroying %s cache for %s codec\n",
1541 codec->cache_ops->name, codec->name);
1542 return codec->cache_ops->exit(codec);
1543 }
1544 return -EINVAL;
1545 }
1546
1547 /**
1548 * snd_soc_cache_read: Fetch the value of a given register from the cache.
1549 *
1550 * @codec: CODEC to configure.
1551 * @reg: The register index.
1552 * @value: The value to be returned.
1553 */
1554 int snd_soc_cache_read(struct snd_soc_codec *codec,
1555 unsigned int reg, unsigned int *value)
1556 {
1557 int ret;
1558
1559 mutex_lock(&codec->cache_rw_mutex);
1560
1561 if (value && codec->cache_ops && codec->cache_ops->read) {
1562 ret = codec->cache_ops->read(codec, reg, value);
1563 mutex_unlock(&codec->cache_rw_mutex);
1564 return ret;
1565 }
1566
1567 mutex_unlock(&codec->cache_rw_mutex);
1568 return -EINVAL;
1569 }
1570 EXPORT_SYMBOL_GPL(snd_soc_cache_read);
1571
1572 /**
1573 * snd_soc_cache_write: Set the value of a given register in the cache.
1574 *
1575 * @codec: CODEC to configure.
1576 * @reg: The register index.
1577 * @value: The new register value.
1578 */
1579 int snd_soc_cache_write(struct snd_soc_codec *codec,
1580 unsigned int reg, unsigned int value)
1581 {
1582 int ret;
1583
1584 mutex_lock(&codec->cache_rw_mutex);
1585
1586 if (codec->cache_ops && codec->cache_ops->write) {
1587 ret = codec->cache_ops->write(codec, reg, value);
1588 mutex_unlock(&codec->cache_rw_mutex);
1589 return ret;
1590 }
1591
1592 mutex_unlock(&codec->cache_rw_mutex);
1593 return -EINVAL;
1594 }
1595 EXPORT_SYMBOL_GPL(snd_soc_cache_write);
1596
1597 /**
1598 * snd_soc_cache_sync: Sync the register cache with the hardware.
1599 *
1600 * @codec: CODEC to configure.
1601 *
1602 * Any registers that should not be synced should be marked as
1603 * volatile. In general drivers can choose not to use the provided
1604 * syncing functionality if they so require.
1605 */
1606 int snd_soc_cache_sync(struct snd_soc_codec *codec)
1607 {
1608 int ret;
1609 const char *name;
1610
1611 if (!codec->cache_sync) {
1612 return 0;
1613 }
1614
1615 if (!codec->cache_ops || !codec->cache_ops->sync)
1616 return -EINVAL;
1617
1618 if (codec->cache_ops->name)
1619 name = codec->cache_ops->name;
1620 else
1621 name = "unknown";
1622
1623 if (codec->cache_ops->name)
1624 dev_dbg(codec->dev, "Syncing %s cache for %s codec\n",
1625 codec->cache_ops->name, codec->name);
1626 trace_snd_soc_cache_sync(codec, name, "start");
1627 ret = codec->cache_ops->sync(codec);
1628 if (!ret)
1629 codec->cache_sync = 0;
1630 trace_snd_soc_cache_sync(codec, name, "end");
1631 return ret;
1632 }
1633 EXPORT_SYMBOL_GPL(snd_soc_cache_sync);
1634
1635 static int snd_soc_get_reg_access_index(struct snd_soc_codec *codec,
1636 unsigned int reg)
1637 {
1638 const struct snd_soc_codec_driver *codec_drv;
1639 unsigned int min, max, index;
1640
1641 codec_drv = codec->driver;
1642 min = 0;
1643 max = codec_drv->reg_access_size - 1;
1644 do {
1645 index = (min + max) / 2;
1646 if (codec_drv->reg_access_default[index].reg == reg)
1647 return index;
1648 if (codec_drv->reg_access_default[index].reg < reg)
1649 min = index + 1;
1650 else
1651 max = index;
1652 } while (min <= max);
1653 return -1;
1654 }
1655
1656 int snd_soc_default_volatile_register(struct snd_soc_codec *codec,
1657 unsigned int reg)
1658 {
1659 int index;
1660
1661 if (reg >= codec->driver->reg_cache_size)
1662 return 1;
1663 index = snd_soc_get_reg_access_index(codec, reg);
1664 if (index < 0)
1665 return 0;
1666 return codec->driver->reg_access_default[index].vol;
1667 }
1668 EXPORT_SYMBOL_GPL(snd_soc_default_volatile_register);
1669
1670 int snd_soc_default_readable_register(struct snd_soc_codec *codec,
1671 unsigned int reg)
1672 {
1673 int index;
1674
1675 if (reg >= codec->driver->reg_cache_size)
1676 return 1;
1677 index = snd_soc_get_reg_access_index(codec, reg);
1678 if (index < 0)
1679 return 0;
1680 return codec->driver->reg_access_default[index].read;
1681 }
1682 EXPORT_SYMBOL_GPL(snd_soc_default_readable_register);
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