2 * irq_comm.c: Common API for in kernel interrupt controller
3 * Copyright (c) 2007, Intel Corporation.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc., 59 Temple
16 * Place - Suite 330, Boston, MA 02111-1307 USA.
18 * Yaozu (Eddie) Dong <Eddie.dong@intel.com>
20 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
23 #include <linux/kvm_host.h>
24 #include <linux/slab.h>
25 #include <linux/export.h>
26 #include <trace/events/kvm.h>
28 #include <asm/msidef.h>
30 #include <asm/iosapic.h>
37 static int kvm_set_pic_irq(struct kvm_kernel_irq_routing_entry
*e
,
38 struct kvm
*kvm
, int irq_source_id
, int level
)
41 struct kvm_pic
*pic
= pic_irqchip(kvm
);
42 return kvm_pic_set_irq(pic
, e
->irqchip
.pin
, irq_source_id
, level
);
48 static int kvm_set_ioapic_irq(struct kvm_kernel_irq_routing_entry
*e
,
49 struct kvm
*kvm
, int irq_source_id
, int level
)
51 struct kvm_ioapic
*ioapic
= kvm
->arch
.vioapic
;
52 return kvm_ioapic_set_irq(ioapic
, e
->irqchip
.pin
, irq_source_id
, level
);
55 inline static bool kvm_is_dm_lowest_prio(struct kvm_lapic_irq
*irq
)
58 return irq
->delivery_mode
==
59 (IOSAPIC_LOWEST_PRIORITY
<< IOSAPIC_DELIVERY_SHIFT
);
61 return irq
->delivery_mode
== APIC_DM_LOWEST
;
65 int kvm_irq_delivery_to_apic(struct kvm
*kvm
, struct kvm_lapic
*src
,
66 struct kvm_lapic_irq
*irq
)
69 struct kvm_vcpu
*vcpu
, *lowest
= NULL
;
71 if (irq
->dest_mode
== 0 && irq
->dest_id
== 0xff &&
72 kvm_is_dm_lowest_prio(irq
)) {
73 printk(KERN_INFO
"kvm: apic: phys broadcast and lowest prio\n");
74 irq
->delivery_mode
= APIC_DM_FIXED
;
77 if (kvm_irq_delivery_to_apic_fast(kvm
, src
, irq
, &r
))
80 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
81 if (!kvm_apic_present(vcpu
))
84 if (!kvm_apic_match_dest(vcpu
, src
, irq
->shorthand
,
85 irq
->dest_id
, irq
->dest_mode
))
88 if (!kvm_is_dm_lowest_prio(irq
)) {
91 r
+= kvm_apic_set_irq(vcpu
, irq
);
92 } else if (kvm_lapic_enabled(vcpu
)) {
95 else if (kvm_apic_compare_prio(vcpu
, lowest
) < 0)
101 r
= kvm_apic_set_irq(lowest
, irq
);
106 static inline void kvm_set_msi_irq(struct kvm_kernel_irq_routing_entry
*e
,
107 struct kvm_lapic_irq
*irq
)
109 trace_kvm_msi_set_irq(e
->msi
.address_lo
, e
->msi
.data
);
111 irq
->dest_id
= (e
->msi
.address_lo
&
112 MSI_ADDR_DEST_ID_MASK
) >> MSI_ADDR_DEST_ID_SHIFT
;
113 irq
->vector
= (e
->msi
.data
&
114 MSI_DATA_VECTOR_MASK
) >> MSI_DATA_VECTOR_SHIFT
;
115 irq
->dest_mode
= (1 << MSI_ADDR_DEST_MODE_SHIFT
) & e
->msi
.address_lo
;
116 irq
->trig_mode
= (1 << MSI_DATA_TRIGGER_SHIFT
) & e
->msi
.data
;
117 irq
->delivery_mode
= e
->msi
.data
& 0x700;
120 /* TODO Deal with RH bit of MSI message address */
123 int kvm_set_msi(struct kvm_kernel_irq_routing_entry
*e
,
124 struct kvm
*kvm
, int irq_source_id
, int level
)
126 struct kvm_lapic_irq irq
;
131 kvm_set_msi_irq(e
, &irq
);
133 return kvm_irq_delivery_to_apic(kvm
, NULL
, &irq
);
137 static int kvm_set_msi_inatomic(struct kvm_kernel_irq_routing_entry
*e
,
140 struct kvm_lapic_irq irq
;
143 kvm_set_msi_irq(e
, &irq
);
145 if (kvm_irq_delivery_to_apic_fast(kvm
, NULL
, &irq
, &r
))
151 int kvm_send_userspace_msi(struct kvm
*kvm
, struct kvm_msi
*msi
)
153 struct kvm_kernel_irq_routing_entry route
;
155 if (!irqchip_in_kernel(kvm
) || msi
->flags
!= 0)
158 route
.msi
.address_lo
= msi
->address_lo
;
159 route
.msi
.address_hi
= msi
->address_hi
;
160 route
.msi
.data
= msi
->data
;
162 return kvm_set_msi(&route
, kvm
, KVM_USERSPACE_IRQ_SOURCE_ID
, 1);
167 * < 0 Interrupt was ignored (masked or not delivered for other reasons)
168 * = 0 Interrupt was coalesced (previous irq is still pending)
169 * > 0 Number of CPUs interrupt was delivered to
171 int kvm_set_irq(struct kvm
*kvm
, int irq_source_id
, u32 irq
, int level
)
173 struct kvm_kernel_irq_routing_entry
*e
, irq_set
[KVM_NR_IRQCHIPS
];
175 struct kvm_irq_routing_table
*irq_rt
;
177 trace_kvm_set_irq(irq
, level
, irq_source_id
);
179 /* Not possible to detect if the guest uses the PIC or the
180 * IOAPIC. So set the bit in both. The guest will ignore
181 * writes to the unused one.
184 irq_rt
= rcu_dereference(kvm
->irq_routing
);
185 if (irq
< irq_rt
->nr_rt_entries
)
186 hlist_for_each_entry(e
, &irq_rt
->map
[irq
], link
)
192 r
= irq_set
[i
].set(&irq_set
[i
], kvm
, irq_source_id
, level
);
196 ret
= r
+ ((ret
< 0) ? 0 : ret
);
203 * Deliver an IRQ in an atomic context if we can, or return a failure,
204 * user can retry in a process context.
206 * -EWOULDBLOCK - Can't deliver in atomic context: retry in a process context.
207 * Other values - No need to retry.
209 int kvm_set_irq_inatomic(struct kvm
*kvm
, int irq_source_id
, u32 irq
, int level
)
211 struct kvm_kernel_irq_routing_entry
*e
;
213 struct kvm_irq_routing_table
*irq_rt
;
215 trace_kvm_set_irq(irq
, level
, irq_source_id
);
218 * Injection into either PIC or IOAPIC might need to scan all CPUs,
219 * which would need to be retried from thread context; when same GSI
220 * is connected to both PIC and IOAPIC, we'd have to report a
221 * partial failure here.
222 * Since there's no easy way to do this, we only support injecting MSI
223 * which is limited to 1:1 GSI mapping.
226 irq_rt
= rcu_dereference(kvm
->irq_routing
);
227 if (irq
< irq_rt
->nr_rt_entries
)
228 hlist_for_each_entry(e
, &irq_rt
->map
[irq
], link
) {
229 if (likely(e
->type
== KVM_IRQ_ROUTING_MSI
))
230 ret
= kvm_set_msi_inatomic(e
, kvm
);
239 bool kvm_irq_has_notifier(struct kvm
*kvm
, unsigned irqchip
, unsigned pin
)
241 struct kvm_irq_ack_notifier
*kian
;
245 gsi
= rcu_dereference(kvm
->irq_routing
)->chip
[irqchip
][pin
];
247 hlist_for_each_entry_rcu(kian
, &kvm
->irq_ack_notifier_list
,
249 if (kian
->gsi
== gsi
) {
258 EXPORT_SYMBOL_GPL(kvm_irq_has_notifier
);
260 void kvm_notify_acked_irq(struct kvm
*kvm
, unsigned irqchip
, unsigned pin
)
262 struct kvm_irq_ack_notifier
*kian
;
265 trace_kvm_ack_irq(irqchip
, pin
);
268 gsi
= rcu_dereference(kvm
->irq_routing
)->chip
[irqchip
][pin
];
270 hlist_for_each_entry_rcu(kian
, &kvm
->irq_ack_notifier_list
,
272 if (kian
->gsi
== gsi
)
273 kian
->irq_acked(kian
);
277 void kvm_register_irq_ack_notifier(struct kvm
*kvm
,
278 struct kvm_irq_ack_notifier
*kian
)
280 mutex_lock(&kvm
->irq_lock
);
281 hlist_add_head_rcu(&kian
->link
, &kvm
->irq_ack_notifier_list
);
282 mutex_unlock(&kvm
->irq_lock
);
283 kvm_ioapic_make_eoibitmap_request(kvm
);
286 void kvm_unregister_irq_ack_notifier(struct kvm
*kvm
,
287 struct kvm_irq_ack_notifier
*kian
)
289 mutex_lock(&kvm
->irq_lock
);
290 hlist_del_init_rcu(&kian
->link
);
291 mutex_unlock(&kvm
->irq_lock
);
293 kvm_ioapic_make_eoibitmap_request(kvm
);
296 int kvm_request_irq_source_id(struct kvm
*kvm
)
298 unsigned long *bitmap
= &kvm
->arch
.irq_sources_bitmap
;
301 mutex_lock(&kvm
->irq_lock
);
302 irq_source_id
= find_first_zero_bit(bitmap
, BITS_PER_LONG
);
304 if (irq_source_id
>= BITS_PER_LONG
) {
305 printk(KERN_WARNING
"kvm: exhaust allocatable IRQ sources!\n");
306 irq_source_id
= -EFAULT
;
310 ASSERT(irq_source_id
!= KVM_USERSPACE_IRQ_SOURCE_ID
);
312 ASSERT(irq_source_id
!= KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID
);
314 set_bit(irq_source_id
, bitmap
);
316 mutex_unlock(&kvm
->irq_lock
);
318 return irq_source_id
;
321 void kvm_free_irq_source_id(struct kvm
*kvm
, int irq_source_id
)
323 ASSERT(irq_source_id
!= KVM_USERSPACE_IRQ_SOURCE_ID
);
325 ASSERT(irq_source_id
!= KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID
);
328 mutex_lock(&kvm
->irq_lock
);
329 if (irq_source_id
< 0 ||
330 irq_source_id
>= BITS_PER_LONG
) {
331 printk(KERN_ERR
"kvm: IRQ source ID out of range!\n");
334 clear_bit(irq_source_id
, &kvm
->arch
.irq_sources_bitmap
);
335 if (!irqchip_in_kernel(kvm
))
338 kvm_ioapic_clear_all(kvm
->arch
.vioapic
, irq_source_id
);
340 kvm_pic_clear_all(pic_irqchip(kvm
), irq_source_id
);
343 mutex_unlock(&kvm
->irq_lock
);
346 void kvm_register_irq_mask_notifier(struct kvm
*kvm
, int irq
,
347 struct kvm_irq_mask_notifier
*kimn
)
349 mutex_lock(&kvm
->irq_lock
);
351 hlist_add_head_rcu(&kimn
->link
, &kvm
->mask_notifier_list
);
352 mutex_unlock(&kvm
->irq_lock
);
355 void kvm_unregister_irq_mask_notifier(struct kvm
*kvm
, int irq
,
356 struct kvm_irq_mask_notifier
*kimn
)
358 mutex_lock(&kvm
->irq_lock
);
359 hlist_del_rcu(&kimn
->link
);
360 mutex_unlock(&kvm
->irq_lock
);
364 void kvm_fire_mask_notifiers(struct kvm
*kvm
, unsigned irqchip
, unsigned pin
,
367 struct kvm_irq_mask_notifier
*kimn
;
371 gsi
= rcu_dereference(kvm
->irq_routing
)->chip
[irqchip
][pin
];
373 hlist_for_each_entry_rcu(kimn
, &kvm
->mask_notifier_list
, link
)
374 if (kimn
->irq
== gsi
)
375 kimn
->func(kimn
, mask
);
379 void kvm_free_irq_routing(struct kvm
*kvm
)
381 /* Called only during vm destruction. Nobody can use the pointer
383 kfree(kvm
->irq_routing
);
386 static int setup_routing_entry(struct kvm_irq_routing_table
*rt
,
387 struct kvm_kernel_irq_routing_entry
*e
,
388 const struct kvm_irq_routing_entry
*ue
)
393 struct kvm_kernel_irq_routing_entry
*ei
;
396 * Do not allow GSI to be mapped to the same irqchip more than once.
397 * Allow only one to one mapping between GSI and MSI.
399 hlist_for_each_entry(ei
, &rt
->map
[ue
->gsi
], link
)
400 if (ei
->type
== KVM_IRQ_ROUTING_MSI
||
401 ue
->type
== KVM_IRQ_ROUTING_MSI
||
402 ue
->u
.irqchip
.irqchip
== ei
->irqchip
.irqchip
)
408 case KVM_IRQ_ROUTING_IRQCHIP
:
410 switch (ue
->u
.irqchip
.irqchip
) {
411 case KVM_IRQCHIP_PIC_MASTER
:
412 e
->set
= kvm_set_pic_irq
;
413 max_pin
= PIC_NUM_PINS
;
415 case KVM_IRQCHIP_PIC_SLAVE
:
416 e
->set
= kvm_set_pic_irq
;
417 max_pin
= PIC_NUM_PINS
;
420 case KVM_IRQCHIP_IOAPIC
:
421 max_pin
= KVM_IOAPIC_NUM_PINS
;
422 e
->set
= kvm_set_ioapic_irq
;
427 e
->irqchip
.irqchip
= ue
->u
.irqchip
.irqchip
;
428 e
->irqchip
.pin
= ue
->u
.irqchip
.pin
+ delta
;
429 if (e
->irqchip
.pin
>= max_pin
)
431 rt
->chip
[ue
->u
.irqchip
.irqchip
][e
->irqchip
.pin
] = ue
->gsi
;
433 case KVM_IRQ_ROUTING_MSI
:
434 e
->set
= kvm_set_msi
;
435 e
->msi
.address_lo
= ue
->u
.msi
.address_lo
;
436 e
->msi
.address_hi
= ue
->u
.msi
.address_hi
;
437 e
->msi
.data
= ue
->u
.msi
.data
;
443 hlist_add_head(&e
->link
, &rt
->map
[e
->gsi
]);
450 int kvm_set_irq_routing(struct kvm
*kvm
,
451 const struct kvm_irq_routing_entry
*ue
,
455 struct kvm_irq_routing_table
*new, *old
;
456 u32 i
, j
, nr_rt_entries
= 0;
459 for (i
= 0; i
< nr
; ++i
) {
460 if (ue
[i
].gsi
>= KVM_MAX_IRQ_ROUTES
)
462 nr_rt_entries
= max(nr_rt_entries
, ue
[i
].gsi
);
467 new = kzalloc(sizeof(*new) + (nr_rt_entries
* sizeof(struct hlist_head
))
468 + (nr
* sizeof(struct kvm_kernel_irq_routing_entry
)),
474 new->rt_entries
= (void *)&new->map
[nr_rt_entries
];
476 new->nr_rt_entries
= nr_rt_entries
;
477 for (i
= 0; i
< 3; i
++)
478 for (j
= 0; j
< KVM_IOAPIC_NUM_PINS
; j
++)
479 new->chip
[i
][j
] = -1;
481 for (i
= 0; i
< nr
; ++i
) {
485 r
= setup_routing_entry(new, &new->rt_entries
[i
], ue
);
491 mutex_lock(&kvm
->irq_lock
);
492 old
= kvm
->irq_routing
;
493 kvm_irq_routing_update(kvm
, new);
494 mutex_unlock(&kvm
->irq_lock
);
506 #define IOAPIC_ROUTING_ENTRY(irq) \
507 { .gsi = irq, .type = KVM_IRQ_ROUTING_IRQCHIP, \
508 .u.irqchip.irqchip = KVM_IRQCHIP_IOAPIC, .u.irqchip.pin = (irq) }
509 #define ROUTING_ENTRY1(irq) IOAPIC_ROUTING_ENTRY(irq)
512 # define PIC_ROUTING_ENTRY(irq) \
513 { .gsi = irq, .type = KVM_IRQ_ROUTING_IRQCHIP, \
514 .u.irqchip.irqchip = SELECT_PIC(irq), .u.irqchip.pin = (irq) % 8 }
515 # define ROUTING_ENTRY2(irq) \
516 IOAPIC_ROUTING_ENTRY(irq), PIC_ROUTING_ENTRY(irq)
518 # define ROUTING_ENTRY2(irq) \
519 IOAPIC_ROUTING_ENTRY(irq)
522 static const struct kvm_irq_routing_entry default_routing
[] = {
523 ROUTING_ENTRY2(0), ROUTING_ENTRY2(1),
524 ROUTING_ENTRY2(2), ROUTING_ENTRY2(3),
525 ROUTING_ENTRY2(4), ROUTING_ENTRY2(5),
526 ROUTING_ENTRY2(6), ROUTING_ENTRY2(7),
527 ROUTING_ENTRY2(8), ROUTING_ENTRY2(9),
528 ROUTING_ENTRY2(10), ROUTING_ENTRY2(11),
529 ROUTING_ENTRY2(12), ROUTING_ENTRY2(13),
530 ROUTING_ENTRY2(14), ROUTING_ENTRY2(15),
531 ROUTING_ENTRY1(16), ROUTING_ENTRY1(17),
532 ROUTING_ENTRY1(18), ROUTING_ENTRY1(19),
533 ROUTING_ENTRY1(20), ROUTING_ENTRY1(21),
534 ROUTING_ENTRY1(22), ROUTING_ENTRY1(23),
536 ROUTING_ENTRY1(24), ROUTING_ENTRY1(25),
537 ROUTING_ENTRY1(26), ROUTING_ENTRY1(27),
538 ROUTING_ENTRY1(28), ROUTING_ENTRY1(29),
539 ROUTING_ENTRY1(30), ROUTING_ENTRY1(31),
540 ROUTING_ENTRY1(32), ROUTING_ENTRY1(33),
541 ROUTING_ENTRY1(34), ROUTING_ENTRY1(35),
542 ROUTING_ENTRY1(36), ROUTING_ENTRY1(37),
543 ROUTING_ENTRY1(38), ROUTING_ENTRY1(39),
544 ROUTING_ENTRY1(40), ROUTING_ENTRY1(41),
545 ROUTING_ENTRY1(42), ROUTING_ENTRY1(43),
546 ROUTING_ENTRY1(44), ROUTING_ENTRY1(45),
547 ROUTING_ENTRY1(46), ROUTING_ENTRY1(47),
551 int kvm_setup_default_irq_routing(struct kvm
*kvm
)
553 return kvm_set_irq_routing(kvm
, default_routing
,
554 ARRAY_SIZE(default_routing
), 0);