[^:]*: Assembler messages:
[^:]*:10: Error: bad type in SIMD instruction -- `vshrnt.i64 q0,q1,#1'
[^:]*:11: Error: bad type in SIMD instruction -- `vshrnb.i64 q0,q1,#1'
[^:]*:12: Error: bad type in SIMD instruction -- `vrshrnt.i64 q0,q1,#1'
[^:]*:13: Error: bad type in SIMD instruction -- `vrshrnb.i64 q0,q1,#1'
[^:]*:14: Error: immediate operand expected in the range \[1,8\] -- `vshrnt.i16 q0,q1,#0'
[^:]*:15: Error: immediate operand expected in the range \[1,8\] -- `vshrnt.i16 q0,q1,#9'
[^:]*:16: Error: immediate operand expected in the range \[1,16\] -- `vshrnt.i32 q0,q1,#0'
[^:]*:17: Error: immediate operand expected in the range \[1,16\] -- `vshrnt.i32 q0,q1,#17'
[^:]*:18: Error: immediate operand expected in the range \[1,8\] -- `vshrnb.i16 q0,q1,#0'
[^:]*:19: Error: immediate operand expected in the range \[1,8\] -- `vshrnb.i16 q0,q1,#9'
[^:]*:20: Error: immediate operand expected in the range \[1,16\] -- `vshrnb.i32 q0,q1,#0'
[^:]*:21: Error: immediate operand expected in the range \[1,16\] -- `vshrnb.i32 q0,q1,#17'
[^:]*:22: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:22: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:22: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:22: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:22: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:22: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:23: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:23: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:23: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:23: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:23: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:23: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:24: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:24: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:24: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:24: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:24: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:24: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:25: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:25: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:25: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:25: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:25: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:25: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:27: Error: syntax error -- `vshrnteq.i32 q0,q1,#1'
[^:]*:28: Error: syntax error -- `vshrnteq.i32 q0,q1,#1'
[^:]*:30: Error: syntax error -- `vshrnteq.i32 q0,q1,#1'
[^:]*:31: Error: vector predicated instruction should be in VPT/VPST block -- `vshrntt.i32 q0,q1,#1'
[^:]*:33: Error: instruction missing MVE vector predication code -- `vshrnt.i32 q0,q1,#1'
[^:]*:35: Error: syntax error -- `vshrnbeq.i32 q0,q1,#1'
[^:]*:36: Error: syntax error -- `vshrnbeq.i32 q0,q1,#1'
[^:]*:38: Error: syntax error -- `vshrnbeq.i32 q0,q1,#1'
[^:]*:39: Error: vector predicated instruction should be in VPT/VPST block -- `vshrnbt.i32 q0,q1,#1'
[^:]*:41: Error: instruction missing MVE vector predication code -- `vshrnb.i32 q0,q1,#1'
[^:]*:43: Error: syntax error -- `vrshrnteq.i32 q0,q1,#1'
[^:]*:44: Error: syntax error -- `vrshrnteq.i32 q0,q1,#1'
[^:]*:46: Error: syntax error -- `vrshrnteq.i32 q0,q1,#1'
[^:]*:47: Error: vector predicated instruction should be in VPT/VPST block -- `vrshrntt.i32 q0,q1,#1'
[^:]*:49: Error: instruction missing MVE vector predication code -- `vrshrnt.i32 q0,q1,#1'
[^:]*:51: Error: syntax error -- `vrshrnbeq.i32 q0,q1,#1'
[^:]*:52: Error: syntax error -- `vrshrnbeq.i32 q0,q1,#1'
[^:]*:54: Error: syntax error -- `vrshrnbeq.i32 q0,q1,#1'
[^:]*:55: Error: vector predicated instruction should be in VPT/VPST block -- `vrshrnbt.i32 q0,q1,#1'
[^:]*:57: Error: instruction missing MVE vector predication code -- `vrshrnb.i32 q0,q1,#1'