projects
/
deliverable
/
linux.git
/ blobdiff
commit
grep
author
committer
pickaxe
?
search:
re
summary
|
shortlog
|
log
|
commit
|
commitdiff
|
tree
raw
|
inline
| side by side
ARM: 6380/1: Introduce __sync_icache_dcache() for VIPT caches
[deliverable/linux.git]
/
arch
/
arm
/
include
/
asm
/
tlbflush.h
diff --git
a/arch/arm/include/asm/tlbflush.h
b/arch/arm/include/asm/tlbflush.h
index 33b546ae72d49c82545271372a1972283f7ddb5b..989c9e57d92bf8e93a74db44ee68ee6ad47f9f02 100644
(file)
--- a/
arch/arm/include/asm/tlbflush.h
+++ b/
arch/arm/include/asm/tlbflush.h
@@
-560,12
+560,20
@@
extern void flush_tlb_kernel_range(unsigned long start, unsigned long end);
#endif
/*
#endif
/*
- *
if PG_dcache_dirty is
set for the page, we need to ensure that any
+ *
If PG_dcache_clean is not
set for the page, we need to ensure that any
* cache entries for the kernels virtual memory range are written
* cache entries for the kernels virtual memory range are written
- * back to the page.
+ * back to the page. On ARMv6 and later, the cache coherency is handled via
+ * the set_pte_at() function.
*/
*/
+#if __LINUX_ARM_ARCH__ < 6
extern void update_mmu_cache(struct vm_area_struct *vma, unsigned long addr,
pte_t *ptep);
extern void update_mmu_cache(struct vm_area_struct *vma, unsigned long addr,
pte_t *ptep);
+#else
+static inline void update_mmu_cache(struct vm_area_struct *vma,
+ unsigned long addr, pte_t *ptep)
+{
+}
+#endif
#endif
#endif
This page took
0.033742 seconds
and
5
git commands to generate.