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Merge branch 'x86/asm' into x86/core, to prepare for new patch
[deliverable/linux.git]
/
arch
/
x86
/
kernel
/
cpu
/
common.c
diff --git
a/arch/x86/kernel/cpu/common.c
b/arch/x86/kernel/cpu/common.c
index a62cf04dac8ae99d1310b02b827bca528311d490..cc7f753e571db91de6efbdd873348db0a64fd5e5 100644
(file)
--- a/
arch/x86/kernel/cpu/common.c
+++ b/
arch/x86/kernel/cpu/common.c
@@
-508,7
+508,7
@@
static void cpu_detect_tlb(struct cpuinfo_x86 *c)
void detect_ht(struct cpuinfo_x86 *c)
{
void detect_ht(struct cpuinfo_x86 *c)
{
-#ifdef CONFIG_
X86_HT
+#ifdef CONFIG_
SMP
u32 eax, ebx, ecx, edx;
int index_msb, core_bits;
static bool printed;
u32 eax, ebx, ecx, edx;
int index_msb, core_bits;
static bool printed;
@@
-844,7
+844,7
@@
static void generic_identify(struct cpuinfo_x86 *c)
if (c->cpuid_level >= 0x00000001) {
c->initial_apicid = (cpuid_ebx(1) >> 24) & 0xFF;
#ifdef CONFIG_X86_32
if (c->cpuid_level >= 0x00000001) {
c->initial_apicid = (cpuid_ebx(1) >> 24) & 0xFF;
#ifdef CONFIG_X86_32
-# ifdef CONFIG_
X86_HT
+# ifdef CONFIG_
SMP
c->apicid = apic->phys_pkg_id(c->initial_apicid, 0);
# else
c->apicid = c->initial_apicid;
c->apicid = apic->phys_pkg_id(c->initial_apicid, 0);
# else
c->apicid = c->initial_apicid;
@@
-1026,7
+1026,7
@@
void enable_sep_cpu(void)
(unsigned long)tss + offsetofend(struct tss_struct, SYSENTER_stack),
0);
(unsigned long)tss + offsetofend(struct tss_struct, SYSENTER_stack),
0);
- wrmsr(MSR_IA32_SYSENTER_EIP, (unsigned long)
ia32_sysenter_target
, 0);
+ wrmsr(MSR_IA32_SYSENTER_EIP, (unsigned long)
entry_SYSENTER_32
, 0);
out:
put_cpu();
out:
put_cpu();
@@
-1155,10
+1155,6
@@
static __init int setup_disablecpuid(char *arg)
}
__setup("clearcpuid=", setup_disablecpuid);
}
__setup("clearcpuid=", setup_disablecpuid);
-DEFINE_PER_CPU(unsigned long, kernel_stack) =
- (unsigned long)&init_thread_union + THREAD_SIZE;
-EXPORT_PER_CPU_SYMBOL(kernel_stack);
-
#ifdef CONFIG_X86_64
struct desc_ptr idt_descr = { NR_VECTORS * 16 - 1, (unsigned long) idt_table };
struct desc_ptr debug_idt_descr = { NR_VECTORS * 16 - 1,
#ifdef CONFIG_X86_64
struct desc_ptr idt_descr = { NR_VECTORS * 16 - 1, (unsigned long) idt_table };
struct desc_ptr debug_idt_descr = { NR_VECTORS * 16 - 1,
@@
-1208,10
+1204,10
@@
void syscall_init(void)
* set CS/DS but only a 32bit target. LSTAR sets the 64bit rip.
*/
wrmsrl(MSR_STAR, ((u64)__USER32_CS)<<48 | ((u64)__KERNEL_CS)<<32);
* set CS/DS but only a 32bit target. LSTAR sets the 64bit rip.
*/
wrmsrl(MSR_STAR, ((u64)__USER32_CS)<<48 | ((u64)__KERNEL_CS)<<32);
- wrmsrl(MSR_LSTAR,
system_call
);
+ wrmsrl(MSR_LSTAR,
entry_SYSCALL_64
);
#ifdef CONFIG_IA32_EMULATION
#ifdef CONFIG_IA32_EMULATION
- wrmsrl(MSR_CSTAR,
ia32_cstar_targe
t);
+ wrmsrl(MSR_CSTAR,
entry_SYSCALL_compa
t);
/*
* This only works on Intel CPUs.
* On AMD CPUs these MSRs are 32-bit, CPU truncates MSR_IA32_SYSENTER_EIP.
/*
* This only works on Intel CPUs.
* On AMD CPUs these MSRs are 32-bit, CPU truncates MSR_IA32_SYSENTER_EIP.
@@
-1220,7
+1216,7
@@
void syscall_init(void)
*/
wrmsrl_safe(MSR_IA32_SYSENTER_CS, (u64)__KERNEL_CS);
wrmsrl_safe(MSR_IA32_SYSENTER_ESP, 0ULL);
*/
wrmsrl_safe(MSR_IA32_SYSENTER_CS, (u64)__KERNEL_CS);
wrmsrl_safe(MSR_IA32_SYSENTER_ESP, 0ULL);
- wrmsrl_safe(MSR_IA32_SYSENTER_EIP, (u64)
ia32_sysenter_targe
t);
+ wrmsrl_safe(MSR_IA32_SYSENTER_EIP, (u64)
entry_SYSENTER_compa
t);
#else
wrmsrl(MSR_CSTAR, ignore_sysret);
wrmsrl_safe(MSR_IA32_SYSENTER_CS, (u64)GDT_ENTRY_INVALID_SEG);
#else
wrmsrl(MSR_CSTAR, ignore_sysret);
wrmsrl_safe(MSR_IA32_SYSENTER_CS, (u64)GDT_ENTRY_INVALID_SEG);
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