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[ACPI] ACPICA 20050930
[deliverable/linux.git]
/
arch
/
x86_64
/
kernel
/
mpparse.c
diff --git
a/arch/x86_64/kernel/mpparse.c
b/arch/x86_64/kernel/mpparse.c
index 1105250bf02c3ee26d8b1f8a54ab78904e85ca5a..ba817e7454b248f6e302e2d026053cc141db1f31 100644
(file)
--- a/
arch/x86_64/kernel/mpparse.c
+++ b/
arch/x86_64/kernel/mpparse.c
@@
-915,7
+915,7
@@
void __init mp_config_acpi_legacy_irqs (void)
#define MAX_GSI_NUM 4096
#define MAX_GSI_NUM 4096
-int mp_register_gsi(u32 gsi, int
edge_level, int active_high_low
)
+int mp_register_gsi(u32 gsi, int
triggering, int polarity
)
{
int ioapic = -1;
int ioapic_pin = 0;
{
int ioapic = -1;
int ioapic_pin = 0;
@@
-964,7
+964,7
@@
int mp_register_gsi(u32 gsi, int edge_level, int active_high_low)
mp_ioapic_routing[ioapic].pin_programmed[idx] |= (1<<bit);
mp_ioapic_routing[ioapic].pin_programmed[idx] |= (1<<bit);
- if (
edge_level
) {
+ if (
triggering
) {
/*
* For PCI devices assign IRQs in order, avoiding gaps
* due to unused I/O APIC pins.
/*
* For PCI devices assign IRQs in order, avoiding gaps
* due to unused I/O APIC pins.
@@
-986,8
+986,8
@@
int mp_register_gsi(u32 gsi, int edge_level, int active_high_low)
}
io_apic_set_pci_routing(ioapic, ioapic_pin, gsi,
}
io_apic_set_pci_routing(ioapic, ioapic_pin, gsi,
-
edge_level
== ACPI_EDGE_SENSITIVE ? 0 : 1,
-
active_high_low
== ACPI_ACTIVE_HIGH ? 0 : 1);
+
triggering
== ACPI_EDGE_SENSITIVE ? 0 : 1,
+
polarity
== ACPI_ACTIVE_HIGH ? 0 : 1);
return gsi;
}
return gsi;
}
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