+#ifdef BFD64
+ sh5le-*-netbsd*)
+ targ_defvec=bfd_elf32_sh64lnbsd_vec
+ targ_selvecs="bfd_elf32_sh64nbsd_vec bfd_elf64_sh64lnbsd_vec bfd_elf64_sh64nbsd_vec"
+ ;;
+ sh5-*-netbsd*)
+ targ_defvec=bfd_elf32_sh64nbsd_vec
+ targ_selvecs="bfd_elf32_sh64lnbsd_vec bfd_elf64_sh64lnbsd_vec bfd_elf64_sh64nbsd_vec"
+ ;;
+
+ sh64le-*-netbsd*)
+ targ_defvec=bfd_elf64_sh64lnbsd_vec
+ targ_selvecs="bfd_elf64_sh64nbsd_vec bfd_elf32_sh64lnbsd_vec bfd_elf32_sh64nbsd_vec"
+ ;;
+ sh64-*-netbsd*)
+ targ_defvec=bfd_elf64_sh64nbsd_vec
+ targ_selvecs="bfd_elf64_sh64lnbsd_vec bfd_elf32_sh64lnbsd_vec bfd_elf32_sh64nbsd_vec"
+ ;;
+#endif
+
+ shle-*-netbsdelf*)
+ targ_defvec=bfd_elf32_shlnbsd_vec
+ targ_selvecs="bfd_elf32_shnbsd_vec shcoff_vec shlcoff_vec"
+#ifdef BFD64
+ targ_selvecs="${targ_selvecs} bfd_elf32_sh64_vec bfd_elf32_sh64l_vec bfd_elf64_sh64_vec bfd_elf64_sh64l_vec"
+#endif
+ ;;
+ sh*le-*-netbsdelf*)
+ targ_defvec=bfd_elf32_shlnbsd_vec
+ targ_selvecs="bfd_elf32_shnbsd_vec shcoff_vec shlcoff_vec"
+ ;;
+ sh-*-netbsdelf*)
+ targ_defvec=bfd_elf32_shnbsd_vec
+ targ_selvecs="bfd_elf32_shlnbsd_vec shcoff_vec shlcoff_vec"
+#ifdef BFD64
+ targ_selvecs="${targ_selvecs} bfd_elf32_sh64_vec bfd_elf32_sh64l_vec bfd_elf64_sh64_vec bfd_elf64_sh64l_vec"
+#endif
+ ;;
+ sh*-*-netbsdelf*)
+ targ_defvec=bfd_elf32_shnbsd_vec
+ targ_selvecs="bfd_elf32_shlnbsd_vec shcoff_vec shlcoff_vec"
+ ;;
+
+ shl*-*-elf*)
+ targ_defvec=bfd_elf32_shl_vec
+ targ_selvecs="bfd_elf32_sh_vec shlcoff_vec shcoff_vec shlcoff_small_vec shcoff_small_vec"
+#ifdef BFD64
+ targ_selvecs="${targ_selvecs} bfd_elf32_sh64_vec bfd_elf32_sh64l_vec bfd_elf64_sh64_vec bfd_elf64_sh64l_vec"
+#endif
+ targ_underscore=yes
+ ;;