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Yet more signed overflow fixes
[deliverable/binutils-gdb.git]
/
bfd
/
cpu-ia64-opc.c
diff --git
a/bfd/cpu-ia64-opc.c
b/bfd/cpu-ia64-opc.c
index 6abb4efa36ae58ef20123d08a6cbe96a3b01fd2e..8df90befe39300ae6cc5e2f582b60c41d7c16b77 100644
(file)
--- a/
bfd/cpu-ia64-opc.c
+++ b/
bfd/cpu-ia64-opc.c
@@
-1,4
+1,4
@@
-/* Copyright (C) 1998-201
6
Free Software Foundation, Inc.
+/* Copyright (C) 1998-201
9
Free Software Foundation, Inc.
Contributed by David Mosberger-Tang <davidm@hpl.hp.com>
This file is part of BFD, the Binary File Descriptor library.
Contributed by David Mosberger-Tang <davidm@hpl.hp.com>
This file is part of BFD, the Binary File Descriptor library.
@@
-86,7
+86,7
@@
ins_immu (const struct ia64_operand *self, ia64_insn value, ia64_insn *code)
for (i = 0; i < NELEMS (self->field) && self->field[i].bits; ++i)
{
new_insn |= ((value & ((((ia64_insn) 1) << self->field[i].bits) - 1))
for (i = 0; i < NELEMS (self->field) && self->field[i].bits; ++i)
{
new_insn |= ((value & ((((ia64_insn) 1) << self->field[i].bits) - 1))
-
<< self->field[i].shift);
+ << self->field[i].shift);
value >>= self->field[i].bits;
}
if (value)
value >>= self->field[i].bits;
}
if (value)
@@
-170,7
+170,7
@@
ins_imms_scaled (const struct ia64_operand *self, ia64_insn value,
for (i = 0; i < NELEMS (self->field) && self->field[i].bits; ++i)
{
new_insn |= ((svalue & ((((ia64_insn) 1) << self->field[i].bits) - 1))
for (i = 0; i < NELEMS (self->field) && self->field[i].bits; ++i)
{
new_insn |= ((svalue & ((((ia64_insn) 1) << self->field[i].bits) - 1))
-
<< self->field[i].shift);
+ << self->field[i].shift);
sign_bit = (svalue >> (self->field[i].bits - 1)) & 1;
svalue >>= self->field[i].bits;
}
sign_bit = (svalue >> (self->field[i].bits - 1)) & 1;
svalue >>= self->field[i].bits;
}
@@
-186,7
+186,7
@@
ext_imms_scaled (const struct ia64_operand *self, ia64_insn code,
ia64_insn *valuep, int scale)
{
int i, bits = 0, total = 0;
ia64_insn *valuep, int scale)
{
int i, bits = 0, total = 0;
- BFD_HOST_64_BIT val = 0, sign;
+ BFD_HOST_
U_
64_BIT val = 0, sign;
for (i = 0; i < NELEMS (self->field) && self->field[i].bits; ++i)
{
for (i = 0; i < NELEMS (self->field) && self->field[i].bits; ++i)
{
@@
-196,10
+196,10
@@
ext_imms_scaled (const struct ia64_operand *self, ia64_insn code,
total += bits;
}
/* sign extend: */
total += bits;
}
/* sign extend: */
- sign = (BFD_HOST_64_BIT) 1 << (total - 1);
+ sign = (BFD_HOST_
U_
64_BIT) 1 << (total - 1);
val = (val ^ sign) - sign;
val = (val ^ sign) - sign;
- *valuep =
(val << scale)
;
+ *valuep =
val << scale
;
return 0;
}
return 0;
}
@@
-657,7
+657,7
@@
const struct ia64_operand elf64_ia64_operands[IA64_OPND_COUNT] =
"a branch target" },
{ REL, ins_imms4, ext_imms4, 0, {{20, 13}, { 1, 36}}, 0, /* TGT25c */
"a branch target" },
"a branch target" },
{ REL, ins_imms4, ext_imms4, 0, {{20, 13}, { 1, 36}}, 0, /* TGT25c */
"a branch target" },
- { REL, ins_rsvd, ext_rsvd, 0, {{0, 0}}, 0,
/* TGT64 */
+ { REL, ins_rsvd, ext_rsvd, 0, {{0, 0}}, 0, /* TGT64 */
"a branch target" },
{ ABS, ins_const, ext_const, 0, {{0, 0}}, 0, /* LDXMOV */
"a branch target" },
{ ABS, ins_const, ext_const, 0, {{0, 0}}, 0, /* LDXMOV */
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