- RL78_OP_REL (ABS32, 2, 32, 0, dont, FALSE),
- RL78_OP_REL (ABS24S, 2, 24, 0, signed, FALSE),
- RL78_OP_REL (ABS16, 1, 16, 0, dont, FALSE),
- RL78_OP_REL (ABS16U, 1, 16, 0, unsigned, FALSE),
- RL78_OP_REL (ABS16S, 1, 16, 0, signed, FALSE),
- RL78_OP_REL (ABS8, 0, 8, 0, dont, FALSE),
- RL78_OP_REL (ABS8U, 0, 8, 0, unsigned, FALSE),
- RL78_OP_REL (ABS8S, 0, 8, 0, signed, FALSE),
- RL78_OP_REL (ABS24S_PCREL, 2, 24, 0, signed, TRUE),
- RL78_OP_REL (ABS16S_PCREL, 1, 16, 0, signed, TRUE),
- RL78_OP_REL (ABS8S_PCREL, 0, 8, 0, signed, TRUE),
- RL78_OP_REL (ABS16UL, 1, 16, 0, unsigned, FALSE),
- RL78_OP_REL (ABS16UW, 1, 16, 0, unsigned, FALSE),
- RL78_OP_REL (ABS8UL, 0, 8, 0, unsigned, FALSE),
- RL78_OP_REL (ABS8UW, 0, 8, 0, unsigned, FALSE),
- RL78_OP_REL (ABS32_REV, 2, 32, 0, dont, FALSE),
- RL78_OP_REL (ABS16_REV, 1, 16, 0, dont, FALSE),
+ RL78_OP_REL (ABS32, 2, 32, 0, dont, FALSE),
+ RL78_OP_REL (ABS24S, 2, 24, 0, signed, FALSE),
+ RL78_OP_REL (ABS16, 1, 16, 0, dont, FALSE),
+ RL78_OP_REL (ABS16U, 1, 16, 0, unsigned, FALSE),
+ RL78_OP_REL (ABS16S, 1, 16, 0, signed, FALSE),
+ RL78_OP_REL (ABS8, 0, 8, 0, dont, FALSE),
+ RL78_OP_REL (ABS8U, 0, 8, 0, unsigned, FALSE),
+ RL78_OP_REL (ABS8S, 0, 8, 0, signed, FALSE),
+ RL78_OP_REL (ABS24S_PCREL, 2, 24, 0, signed, TRUE),
+ RL78_OP_REL (ABS16S_PCREL, 1, 16, 0, signed, TRUE),
+ RL78_OP_REL (ABS8S_PCREL, 0, 8, 0, signed, TRUE),
+ RL78_OP_REL (ABS16UL, 1, 16, 0, unsigned, FALSE),
+ RL78_OP_REL (ABS16UW, 1, 16, 0, unsigned, FALSE),
+ RL78_OP_REL (ABS8UL, 0, 8, 0, unsigned, FALSE),
+ RL78_OP_REL (ABS8UW, 0, 8, 0, unsigned, FALSE),
+ RL78_OP_REL (ABS32_REV, 2, 32, 0, dont, FALSE),
+ RL78_OP_REL (ABS16_REV, 1, 16, 0, dont, FALSE),