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Automatic date update in version.in
[deliverable/binutils-gdb.git]
/
gas
/
config
/
tc-m68hc11.c
diff --git
a/gas/config/tc-m68hc11.c
b/gas/config/tc-m68hc11.c
index 9026ff40347c103ee96ce0c3bd60e986515e176e..1c36d5d98cba01efd4ee0f38bca0d21cbf467fa5 100644
(file)
--- a/
gas/config/tc-m68hc11.c
+++ b/
gas/config/tc-m68hc11.c
@@
-1,5
+1,5
@@
/* tc-m68hc11.c -- Assembler code for the Motorola 68HC11 & 68HC12.
/* tc-m68hc11.c -- Assembler code for the Motorola 68HC11 & 68HC12.
- Copyright (C) 1999-201
4
Free Software Foundation, Inc.
+ Copyright (C) 1999-201
9
Free Software Foundation, Inc.
Written by Stephane Carrez (stcarrez@nerim.fr)
XGATE and S12X added by James Murray (jsm@jsm-net.demon.co.uk)
Written by Stephane Carrez (stcarrez@nerim.fr)
XGATE and S12X added by James Murray (jsm@jsm-net.demon.co.uk)
@@
-241,7
+241,7
@@
static void s_m68hc11_mark_symbol (int);
dbcc -> db!cc +3
jmp L
dbcc -> db!cc +3
jmp L
- Setting the flag forbid
d
s this. */
+ Setting the flag forbids this. */
static short flag_fixed_branches = 0;
/* Force to use long jumps (absolute) instead of relative branches. */
static short flag_fixed_branches = 0;
/* Force to use long jumps (absolute) instead of relative branches. */
@@
-329,11
+329,11
@@
struct option md_longopts[] =
{
#define OPTION_FORCE_LONG_BRANCH (OPTION_MD_BASE)
{"force-long-branches", no_argument, NULL, OPTION_FORCE_LONG_BRANCH},
{
#define OPTION_FORCE_LONG_BRANCH (OPTION_MD_BASE)
{"force-long-branches", no_argument, NULL, OPTION_FORCE_LONG_BRANCH},
- {"force-long-branchs", no_argument, NULL, OPTION_FORCE_LONG_BRANCH}, /* Misspel
t
version kept for backwards compatibility. */
+ {"force-long-branchs", no_argument, NULL, OPTION_FORCE_LONG_BRANCH}, /* Misspel
led
version kept for backwards compatibility. */
#define OPTION_SHORT_BRANCHES (OPTION_MD_BASE + 1)
{"short-branches", no_argument, NULL, OPTION_SHORT_BRANCHES},
#define OPTION_SHORT_BRANCHES (OPTION_MD_BASE + 1)
{"short-branches", no_argument, NULL, OPTION_SHORT_BRANCHES},
- {"short-branchs", no_argument, NULL, OPTION_SHORT_BRANCHES}, /* Misspel
t
version kept for backwards compatibility. */
+ {"short-branchs", no_argument, NULL, OPTION_SHORT_BRANCHES}, /* Misspel
led
version kept for backwards compatibility. */
#define OPTION_STRICT_DIRECT_MODE (OPTION_MD_BASE + 2)
{"strict-direct-mode", no_argument, NULL, OPTION_STRICT_DIRECT_MODE},
#define OPTION_STRICT_DIRECT_MODE (OPTION_MD_BASE + 2)
{"strict-direct-mode", no_argument, NULL, OPTION_STRICT_DIRECT_MODE},
@@
-490,7
+490,7
@@
m68hc11_print_statistics (FILE *file)
}
int
}
int
-md_parse_option (int c, char *arg)
+md_parse_option (int c, c
onst c
har *arg)
{
get_default_target ();
switch (c)
{
get_default_target ();
switch (c)
@@
-555,7
+555,7
@@
md_parse_option (int c, char *arg)
current_architecture = cpu6812 | cpu6812s | cpu9s12x;
else if ((strcasecmp (arg, "m9s12xg") == 0)
|| (strcasecmp (arg, "xgate") == 0))
current_architecture = cpu6812 | cpu6812s | cpu9s12x;
else if ((strcasecmp (arg, "m9s12xg") == 0)
|| (strcasecmp (arg, "xgate") == 0))
- /* xgate for backwards compat
a
bility */
+ /* xgate for backwards compat
i
bility */
current_architecture = cpuxgate;
else
as_bad (_("Option `%s' is not recognized."), arg);
current_architecture = cpuxgate;
else
as_bad (_("Option `%s' is not recognized."), arg);
@@
-574,7
+574,7
@@
md_undefined_symbol (char *name ATTRIBUTE_UNUSED)
return 0;
}
return 0;
}
-char *
+c
onst c
har *
md_atof (int type, char *litP, int *sizeP)
{
return ieee_md_atof (type, litP, sizeP, TRUE);
md_atof (int type, char *litP, int *sizeP)
{
return ieee_md_atof (type, litP, sizeP, TRUE);
@@
-583,8
+583,8
@@
md_atof (int type, char *litP, int *sizeP)
valueT
md_section_align (asection *seg, valueT addr)
{
valueT
md_section_align (asection *seg, valueT addr)
{
- int align = bfd_
get_section_alignment (stdoutput,
seg);
- return ((addr + (1 << align) - 1) &
(-
1 << align));
+ int align = bfd_
section_alignment (
seg);
+ return ((addr + (1 << align) - 1) &
-(
1 << align));
}
static int
}
static int
@@
-603,7
+603,7
@@
cmp_opcode (struct m68hc11_opcode *op1, struct m68hc11_opcode *op2)
void
md_begin (void)
{
void
md_begin (void)
{
- char *prev_name = "";
+ c
onst c
har *prev_name = "";
struct m68hc11_opcode *opcodes;
struct m68hc11_opcode_def *opc = 0;
int i, j;
struct m68hc11_opcode *opcodes;
struct m68hc11_opcode_def *opc = 0;
int i, j;
@@
-613,9
+613,7
@@
md_begin (void)
m68hc11_hash = hash_new ();
/* Get a writable copy of the opcode table and sort it on the names. */
m68hc11_hash = hash_new ();
/* Get a writable copy of the opcode table and sort it on the names. */
- opcodes = (struct m68hc11_opcode *) xmalloc (m68hc11_num_opcodes *
- sizeof (struct
- m68hc11_opcode));
+ opcodes = XNEWVEC (struct m68hc11_opcode, m68hc11_num_opcodes);
m68hc11_sorted_opcodes = opcodes;
num_opcodes = 0;
for (i = 0; i < m68hc11_num_opcodes; i++)
m68hc11_sorted_opcodes = opcodes;
num_opcodes = 0;
for (i = 0; i < m68hc11_num_opcodes; i++)
@@
-644,8
+642,7
@@
md_begin (void)
qsort (opcodes, num_opcodes, sizeof (struct m68hc11_opcode),
(int (*) (const void*, const void*)) cmp_opcode);
qsort (opcodes, num_opcodes, sizeof (struct m68hc11_opcode),
(int (*) (const void*, const void*)) cmp_opcode);
- opc = (struct m68hc11_opcode_def *)
- xmalloc (num_opcodes * sizeof (struct m68hc11_opcode_def));
+ opc = XNEWVEC (struct m68hc11_opcode_def, num_opcodes);
m68hc11_opcode_defs = opc--;
/* Insert unique names into hash table. The M6811 instruction set
m68hc11_opcode_defs = opc--;
/* Insert unique names into hash table. The M6811 instruction set
@@
-964,7
+961,7
@@
static void
print_opcode_list (void)
{
int i;
print_opcode_list (void)
{
int i;
- char *prev_name = "";
+ c
onst c
har *prev_name = "";
struct m68hc11_opcode *opcodes;
int example = flag_print_opcodes == 2;
struct m68hc11_opcode *opcodes;
int example = flag_print_opcodes == 2;
@@
-1607,7
+1604,7
@@
fixup8 (expressionS *oper, int mode, int opmode)
else
{
fixS *fixp;
else
{
fixS *fixp;
-
int
reloc;
+
bfd_reloc_code_real_type
reloc;
/* Now create an 8-bit fixup. If there was some %hi, %lo
or %page modifier, generate the reloc accordingly. */
/* Now create an 8-bit fixup. If there was some %hi, %lo
or %page modifier, generate the reloc accordingly. */
@@
-1654,7
+1651,7
@@
fixup16 (expressionS *oper, int mode, int opmode ATTRIBUTE_UNUSED)
else if (oper->X_op != O_register)
{
fixS *fixp;
else if (oper->X_op != O_register)
{
fixS *fixp;
-
int
reloc;
+
bfd_reloc_code_real_type
reloc;
if ((opmode & M6811_OP_CALL_ADDR) && (mode & M6811_OP_IMM16))
reloc = BFD_RELOC_M68HC11_LO16;
if ((opmode & M6811_OP_CALL_ADDR) && (mode & M6811_OP_IMM16))
reloc = BFD_RELOC_M68HC11_LO16;
@@
-1713,7
+1710,7
@@
fixup24 (expressionS *oper, int mode, int opmode ATTRIBUTE_UNUSED)
}
/* XGATE Put a 1 byte expression described by 'oper'. If this expression
}
/* XGATE Put a 1 byte expression described by 'oper'. If this expression
- contain
t
s unresolved symbols, generate an 8-bit fixup. */
+ contains unresolved symbols, generate an 8-bit fixup. */
static void
fixup8_xg (expressionS *oper, int mode, int opmode)
{
static void
fixup8_xg (expressionS *oper, int mode, int opmode)
{
@@
-1724,7
+1721,7
@@
fixup8_xg (expressionS *oper, int mode, int opmode)
if (oper->X_op == O_constant)
{
fixS *fixp;
if (oper->X_op == O_constant)
{
fixS *fixp;
-
int
reloc;
+
bfd_reloc_code_real_type
reloc;
if ((opmode & M6811_OP_HIGH_ADDR) || (opmode & M6811_OP_LOW_ADDR))
{
if ((opmode & M6811_OP_HIGH_ADDR) || (opmode & M6811_OP_LOW_ADDR))
{
@@
-1765,7
+1762,7
@@
fixup8_xg (expressionS *oper, int mode, int opmode)
else
{
fixS *fixp;
else
{
fixS *fixp;
-
int
reloc;
+
bfd_reloc_code_real_type
reloc;
/* Now create an 8-bit fixup. If there was some %hi, %lo
modifier, generate the reloc accordingly. */
/* Now create an 8-bit fixup. If there was some %hi, %lo
modifier, generate the reloc accordingly. */
@@
-2141,8
+2138,8
@@
build_indexed_byte (operand *op, int format ATTRIBUTE_UNUSED, int move_insn)
if (!check_range (val, M6812_OP_IDX))
as_bad (_("Offset out of 16-bit range: %ld."), val);
if (!check_range (val, M6812_OP_IDX))
as_bad (_("Offset out of 16-bit range: %ld."), val);
- if (move_insn && !(val >= -16 && val <= 15)
- && ((!(mode & M6812_OP_IDX) && !(mode & M6812_OP_D_IDX_2))
+ if (move_insn && !(val >= -16 && val <= 15)
+ && ((!(mode & M6812_OP_IDX) && !(mode & M6812_OP_D_IDX_2))
|| !(current_architecture & cpu9s12x)))
{
as_bad (_("Offset out of 5-bit range for movw/movb insn: %ld."),
|| !(current_architecture & cpu9s12x)))
{
as_bad (_("Offset out of 5-bit range for movw/movb insn: %ld."),
@@
-2290,6
+2287,7
@@
build_indexed_byte (operand *op, int format ATTRIBUTE_UNUSED, int move_insn)
default:
as_bad (_("Invalid accumulator register."));
default:
as_bad (_("Invalid accumulator register."));
+ /* Fall through. */
case REG_D:
byte = 0xE6;
case REG_D:
byte = 0xE6;
@@
-2420,7
+2418,7
@@
build_insn_xg (struct m68hc11_opcode *opcode,
f = m68hc11_new_insn (1);
number_to_chars_bigendian (f, opcode->opcode >> 8, 1); /* High byte. */
fixup8_xg (&operands[0].exp, format, M68XG_OP_REL9);
f = m68hc11_new_insn (1);
number_to_chars_bigendian (f, opcode->opcode >> 8, 1); /* High byte. */
fixup8_xg (&operands[0].exp, format, M68XG_OP_REL9);
- }
+ }
else if (format & M68XG_OP_REL10)
{
f = m68hc11_new_insn (1);
else if (format & M68XG_OP_REL10)
{
f = m68hc11_new_insn (1);
@@
-2949,7
+2947,7
@@
md_assemble (char *str)
}
else
as_bad ("No opcode found\n");
}
else
as_bad ("No opcode found\n");
-
+
return;
}
else
return;
}
else
@@
-2973,7
+2971,7
@@
md_assemble (char *str)
{
opcode_local.opcode |= (operands[0].exp.X_add_number);
operands[0].mode = M68XG_OP_IMM3;
{
opcode_local.opcode |= (operands[0].exp.X_add_number);
operands[0].mode = M68XG_OP_IMM3;
-
+
opcode = find (opc, operands, 1);
if (opcode)
{
opcode = find (opc, operands, 1);
if (opcode)
{
@@
-3067,7
+3065,7
@@
md_assemble (char *str)
if (opc->format & (M68XG_OP_REL9 | M68XG_OP_REL10))
{
if (opc->format & (M68XG_OP_REL9 | M68XG_OP_REL10))
{
- opcode_local.format = opc->format;
+ opcode_local.format = opc->format;
input_line_pointer = skip_whites (input_line_pointer);
expression (&operands[0].exp);
if (operands[0].exp.X_op == O_illegal)
input_line_pointer = skip_whites (input_line_pointer);
expression (&operands[0].exp);
if (operands[0].exp.X_op == O_illegal)
@@
-3093,12
+3091,12
@@
md_assemble (char *str)
if ((*input_line_pointer == '\n') || (*input_line_pointer == '\r')
|| (*input_line_pointer == '\0'))
return; /* nothing left */
if ((*input_line_pointer == '\n') || (*input_line_pointer == '\r')
|| (*input_line_pointer == '\0'))
return; /* nothing left */
-
+
if (*input_line_pointer == '#')
{
as_bad ("No register specified before hash\n");
return;
if (*input_line_pointer == '#')
{
as_bad ("No register specified before hash\n");
return;
- }
+ }
/* first operand is expected to be a register */
if ((*input_line_pointer == 'R') || (*input_line_pointer == 'r'))
/* first operand is expected to be a register */
if ((*input_line_pointer == 'R') || (*input_line_pointer == 'r'))
@@
-3165,12
+3163,12
@@
md_assemble (char *str)
if (opcode)
opcode_local.opcode = opcode->opcode
| (operands[0].reg1 << 8);
if (opcode)
opcode_local.opcode = opcode->opcode
| (operands[0].reg1 << 8);
-
+
if (operands[0].exp.X_op != O_constant)
as_bad ("Only constants supported at for IMM4 mode\n");
else
{
if (operands[0].exp.X_op != O_constant)
as_bad ("Only constants supported at for IMM4 mode\n");
else
{
- if (check_range
+ if (check_range
(operands[0].exp.X_add_number,M68XG_OP_R_IMM4))
opcode_local.opcode
|= (operands[0].exp.X_add_number << 4);
(operands[0].exp.X_add_number,M68XG_OP_R_IMM4))
opcode_local.opcode
|= (operands[0].exp.X_add_number << 4);
@@
-3226,7
+3224,7
@@
md_assemble (char *str)
com RD, RS alias for xnor RD,R0,RS
mov RD, RS alias for or RD, R0, RS
neg RD, RS alias for sub RD, R0, RS */
com RD, RS alias for xnor RD,R0,RS
mov RD, RS alias for or RD, R0, RS
neg RD, RS alias for sub RD, R0, RS */
- opcode_local.opcode = opcode->opcode
+ opcode_local.opcode = opcode->opcode
| (operands[0].reg1 << 8) | (operands[1].reg1 << 2);
}
else if ((strncmp (opc->opcode->name, "cmp",3) == 0)
| (operands[0].reg1 << 8) | (operands[1].reg1 << 2);
}
else if ((strncmp (opc->opcode->name, "cmp",3) == 0)
@@
-3235,7
+3233,7
@@
md_assemble (char *str)
/* special cases for:
cmp RS1, RS2 alias for sub R0, RS1, RS2
cpc RS1, RS2 alias for sbc R0, RS1, RS2 */
/* special cases for:
cmp RS1, RS2 alias for sub R0, RS1, RS2
cpc RS1, RS2 alias for sbc R0, RS1, RS2 */
- opcode_local.opcode = opcode->opcode
+ opcode_local.opcode = opcode->opcode
| (operands[0].reg1 << 5) | (operands[1].reg1 << 2);
}
else
| (operands[0].reg1 << 5) | (operands[1].reg1 << 2);
}
else
@@
-3277,7
+3275,7
@@
md_assemble (char *str)
opcode = find (opc, operands, 1);
if (opcode)
{
opcode = find (opc, operands, 1);
if (opcode)
{
- opcode_local.opcode = opcode->opcode
+ opcode_local.opcode = opcode->opcode
| (operands[0].reg1 << 8) | (operands[1].reg1 << 5)
| (operands[2].reg1 << 2);
opcode_local.format = M68XG_OP_NONE;
| (operands[0].reg1 << 8) | (operands[1].reg1 << 5)
| (operands[2].reg1 << 2);
opcode_local.format = M68XG_OP_NONE;
@@
-3314,7
+3312,7
@@
md_assemble (char *str)
}
input_line_pointer = skip_whites (input_line_pointer);
}
input_line_pointer = skip_whites (input_line_pointer);
-
+
if (*input_line_pointer != ',')
{
as_bad (_("Missing operand."));
if (*input_line_pointer != ',')
{
as_bad (_("Missing operand."));
@@
-3349,7
+3347,7
@@
md_assemble (char *str)
{
input_line_pointer++;
}
{
input_line_pointer++;
}
-
+
/* Ok so far, can only be one mode. */
opcode_local.format = M68XG_OP_R_R_OFFS5;
operands[0].mode = M68XG_OP_R_R_OFFS5;
/* Ok so far, can only be one mode. */
opcode_local.format = M68XG_OP_R_R_OFFS5;
operands[0].mode = M68XG_OP_R_R_OFFS5;
@@
-3760,10
+3758,9
@@
s_m68hc11_mark_symbol (int mark)
do
{
do
{
- name = input_line_pointer;
- c = get_symbol_end ();
+ c = get_symbol_name (&name);
symbolP = symbol_find_or_make (name);
symbolP = symbol_find_or_make (name);
-
*input_line_pointer = c
;
+
(void) restore_line_pointer (c)
;
SKIP_WHITESPACE ();
SKIP_WHITESPACE ();
@@
-3832,8
+3829,8
@@
tc_gen_reloc (asection *section ATTRIBUTE_UNUSED, fixS *fixp)
{
arelent *reloc;
{
arelent *reloc;
- reloc =
(arelent *) xmalloc (sizeof (arelent)
);
- reloc->sym_ptr_ptr =
(asymbol **) xmalloc (sizeof (asymbol *)
);
+ reloc =
XNEW (arelent
);
+ reloc->sym_ptr_ptr =
XNEW (asymbol *
);
*reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
if (fixp->fx_r_type == 0)
*reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
if (fixp->fx_r_type == 0)
@@
-3878,7
+3875,7
@@
m68hc11_relax_frag (segT seg ATTRIBUTE_UNUSED, fragS *fragP,
const relax_typeS *table = TC_GENERIC_RELAX_TABLE;
/* We only have to cope with frags as prepared by
const relax_typeS *table = TC_GENERIC_RELAX_TABLE;
/* We only have to cope with frags as prepared by
- md_estimate_size_before_relax. The STATE_BITS16 case may ge
e
t here
+ md_estimate_size_before_relax. The STATE_BITS16 case may get here
because of the different reasons that it's not relaxable. */
switch (fragP->fr_subtype)
{
because of the different reasons that it's not relaxable. */
switch (fragP->fr_subtype)
{
@@
-4433,7
+4430,7
@@
md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED)
value);
if (value >= 0)
where[0] |= value;
value);
if (value >= 0)
where[0] |= value;
- else
+ else
where[0] |= (0x10 | (16 + value));
break;
where[0] |= (0x10 | (16 + value));
break;
@@
-4445,7
+4442,7
@@
md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED)
/* sign bit already in xb postbyte */
if (value >= 0)
where[1] = value;
/* sign bit already in xb postbyte */
if (value >= 0)
where[1] = value;
- else
+ else
where[1] = (256 + value);
break;
where[1] = (256 + value);
break;
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