+ struct tdesc_arch_data *tdesc_data_loc = tdesc_data_alloc ();
+
+ gdb_assert (feature != NULL);
+ int valid_p = 1;
+
+ for (int i = 0; i <= ARC_LAST_CORE_REGNUM; i++)
+ {
+ /* If rf16, then skip extra registers. */
+ if (is_reduced_rf && ((i >= ARC_R4_REGNUM && i <= ARC_R9_REGNUM)
+ || (i >= ARC_R16_REGNUM && i <= ARC_R25_REGNUM)))
+ continue;
+
+ valid_p = tdesc_numbered_register (feature, tdesc_data_loc, i,
+ core_regs[i]);
+
+ /* - Ignore errors in extension registers - they are optional.
+ - Ignore missing ILINK because it doesn't make sense for Linux.
+ - Ignore missing ILINK2 when architecture is ARCompact, because it
+ doesn't make sense for Linux targets.
+
+ In theory those optional registers should be in separate features, but
+ that would create numerous but tiny features, which looks like an
+ overengineering of a rather simple task. */
+ if (!valid_p && (i <= ARC_SP_REGNUM || i == ARC_BLINK_REGNUM
+ || i == ARC_LP_COUNT_REGNUM || i == ARC_PCL_REGNUM
+ || (i == ARC_R30_REGNUM && is_arcv2)))
+ {
+ arc_print (_("Error: Cannot find required register `%s' in "
+ "feature `%s'.\n"), core_regs[i], core_feature_name);
+ tdesc_data_cleanup (tdesc_data_loc);
+ return FALSE;
+ }
+ }
+
+ /* Mandatory AUX registeres are intentionally few and are common between
+ ARCompact and ARC v2, so same code can be used for both. */
+ feature = tdesc_find_feature (tdesc_loc, aux_minimal_feature_name);
+ if (feature == NULL)
+ {
+ arc_print (_("Error: Cannot find required feature `%s' in supplied "
+ "target description.\n"), aux_minimal_feature_name);
+ tdesc_data_cleanup (tdesc_data_loc);
+ return FALSE;
+ }
+
+ for (int i = ARC_FIRST_AUX_REGNUM; i <= ARC_LAST_AUX_REGNUM; i++)
+ {
+ const char *name = aux_minimal_register_names[i - ARC_FIRST_AUX_REGNUM];
+ valid_p = tdesc_numbered_register (feature, tdesc_data_loc, i, name);
+ if (!valid_p)
+ {
+ arc_print (_("Error: Cannot find required register `%s' "
+ "in feature `%s'.\n"),
+ name, tdesc_feature_name (feature));
+ tdesc_data_cleanup (tdesc_data_loc);
+ return FALSE;
+ }
+ }
+
+ *tdesc = tdesc_loc;
+ *tdesc_data = tdesc_data_loc;
+
+ return TRUE;
+}
+
+/* Implement the "init" gdbarch method. */
+
+static struct gdbarch *
+arc_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
+{
+ const struct target_desc *tdesc;
+ struct tdesc_arch_data *tdesc_data;
+
+ if (arc_debug)
+ debug_printf ("arc: Architecture initialization.\n");
+
+ if (!arc_tdesc_init (info, &tdesc, &tdesc_data))
+ return NULL;
+
+ /* Allocate the ARC-private target-dependent information structure, and the
+ GDB target-independent information structure. */
+ struct gdbarch_tdep *tdep = XCNEW (struct gdbarch_tdep);
+ tdep->jb_pc = -1; /* No longjmp support by default. */
+ struct gdbarch *gdbarch = gdbarch_alloc (&info, tdep);
+
+ /* Data types. */
+ set_gdbarch_short_bit (gdbarch, 16);
+ set_gdbarch_int_bit (gdbarch, 32);
+ set_gdbarch_long_bit (gdbarch, 32);
+ set_gdbarch_long_long_bit (gdbarch, 64);
+ set_gdbarch_long_long_align_bit (gdbarch, 32);
+ set_gdbarch_float_bit (gdbarch, 32);
+ set_gdbarch_float_format (gdbarch, floatformats_ieee_single);
+ set_gdbarch_double_bit (gdbarch, 64);
+ set_gdbarch_double_format (gdbarch, floatformats_ieee_double);
+ set_gdbarch_ptr_bit (gdbarch, 32);
+ set_gdbarch_addr_bit (gdbarch, 32);
+ set_gdbarch_char_signed (gdbarch, 0);
+
+ set_gdbarch_write_pc (gdbarch, arc_write_pc);
+
+ set_gdbarch_virtual_frame_pointer (gdbarch, arc_virtual_frame_pointer);
+
+ /* tdesc_use_registers expects gdbarch_num_regs to return number of registers
+ parsed by gdbarch_init, and then it will add all of the remaining
+ registers and will increase number of registers. */
+ set_gdbarch_num_regs (gdbarch, ARC_LAST_REGNUM + 1);
+ set_gdbarch_num_pseudo_regs (gdbarch, 0);
+ set_gdbarch_sp_regnum (gdbarch, ARC_SP_REGNUM);
+ set_gdbarch_pc_regnum (gdbarch, ARC_PC_REGNUM);
+ set_gdbarch_ps_regnum (gdbarch, ARC_STATUS32_REGNUM);
+ set_gdbarch_fp0_regnum (gdbarch, -1); /* No FPU registers. */
+
+ set_gdbarch_dummy_id (gdbarch, arc_dummy_id);
+ set_gdbarch_push_dummy_call (gdbarch, arc_push_dummy_call);
+ set_gdbarch_push_dummy_code (gdbarch, arc_push_dummy_code);
+
+ set_gdbarch_cannot_fetch_register (gdbarch, arc_cannot_fetch_register);
+ set_gdbarch_cannot_store_register (gdbarch, arc_cannot_store_register);
+
+ set_gdbarch_believe_pcc_promotion (gdbarch, 1);
+
+ set_gdbarch_return_value (gdbarch, arc_return_value);
+
+ set_gdbarch_skip_prologue (gdbarch, arc_skip_prologue);
+ set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
+
+ set_gdbarch_breakpoint_kind_from_pc (gdbarch, arc_breakpoint_kind_from_pc);
+ set_gdbarch_sw_breakpoint_from_kind (gdbarch, arc_sw_breakpoint_from_kind);
+
+ /* On ARC 600 BRK_S instruction advances PC, unlike other ARC cores. */
+ if (!arc_mach_is_arc600 (gdbarch))
+ set_gdbarch_decr_pc_after_break (gdbarch, 0);
+ else
+ set_gdbarch_decr_pc_after_break (gdbarch, 2);
+
+ set_gdbarch_unwind_pc (gdbarch, arc_unwind_pc);
+ set_gdbarch_unwind_sp (gdbarch, arc_unwind_sp);
+
+ set_gdbarch_frame_align (gdbarch, arc_frame_align);
+
+ set_gdbarch_print_insn (gdbarch, arc_delayed_print_insn);
+
+ set_gdbarch_cannot_step_breakpoint (gdbarch, 1);
+
+ /* "nonsteppable" watchpoint means that watchpoint triggers before
+ instruction is committed, therefore it is required to remove watchpoint
+ to step though instruction that triggers it. ARC watchpoints trigger
+ only after instruction is committed, thus there is no need to remove
+ them. In fact on ARC watchpoint for memory writes may trigger with more
+ significant delay, like one or two instructions, depending on type of
+ memory where write is performed (CCM or external) and next instruction
+ after the memory write. */
+ set_gdbarch_have_nonsteppable_watchpoint (gdbarch, 0);
+
+ /* This doesn't include possible long-immediate value. */
+ set_gdbarch_max_insn_length (gdbarch, 4);
+
+ /* Frame unwinders and sniffers. */
+ dwarf2_frame_set_init_reg (gdbarch, arc_dwarf2_frame_init_reg);
+ dwarf2_append_unwinders (gdbarch);
+ frame_unwind_append_unwinder (gdbarch, &arc_frame_unwind);
+ frame_base_set_default (gdbarch, &arc_normal_base);
+
+ /* Setup stuff specific to a particular environment (baremetal or Linux).
+ It can override functions set earlier. */
+ gdbarch_init_osabi (info, gdbarch);
+
+ if (tdep->jb_pc >= 0)
+ set_gdbarch_get_longjmp_target (gdbarch, arc_get_longjmp_target);
+
+ tdesc_use_registers (gdbarch, tdesc, tdesc_data);
+
+ return gdbarch;