#include "ia64-libunwind-tdep.h"
/* Note: KERNEL_START is supposed to be an address which is not going
#include "ia64-libunwind-tdep.h"
/* Note: KERNEL_START is supposed to be an address which is not going
- to ever contain any valid unwind info. For ia64 linux, the choice
- of 0xc000000000000000 is fairly safe since that's uncached space.
+ to ever contain any valid unwind info. For ia64 linux, the choice
+ of 0xc000000000000000 is fairly safe since that's uncached space.
- We use KERNEL_START as follows: after obtaining the kernel's
- unwind table via getunwind(), we project its unwind data into
- address-range KERNEL_START-(KERNEL_START+ktab_size) and then
- when ia64_access_mem() sees a memory access to this
- address-range, we redirect it to ktab instead.
+ We use KERNEL_START as follows: after obtaining the kernel's
+ unwind table via getunwind(), we project its unwind data into
+ address-range KERNEL_START-(KERNEL_START+ktab_size) and then
+ when ia64_access_mem() sees a memory access to this
+ address-range, we redirect it to ktab instead.
- None of this hackery is needed with a modern kernel/libcs
- which uses the kernel virtual DSO to provide access to the
- kernel's unwind info. In that case, ktab_size remains 0 and
- hence the value of KERNEL_START doesn't matter. */
+ None of this hackery is needed with a modern kernel/libcs
+ which uses the kernel virtual DSO to provide access to the
+ kernel's unwind info. In that case, ktab_size remains 0 and
+ hence the value of KERNEL_START doesn't matter. */
{ "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
"r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
"r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
{ "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
"r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
"r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
- vector_p = TYPE_VECTOR (register_type (gdbarch, regnum));
- float_p = TYPE_CODE (register_type (gdbarch, regnum)) == TYPE_CODE_FLT;
+ vector_p = register_type (gdbarch, regnum)->is_vector ();
+ float_p = register_type (gdbarch, regnum)->code () == TYPE_CODE_FLT;
The current addressing used by the code below:
original PC placed_address placed_size required covered
The current addressing used by the code below:
original PC placed_address placed_size required covered
0xABCDE0 0xABCDE0 0x10 <0x0...0x5> <0x0..0xF>
0xABCDE1 0xABCDE1 0xF <0x5...0xA> <0x1..0xF>
0xABCDE2 0xABCDE2 0xE <0xA...0xF> <0x2..0xF>
0xABCDE0 0xABCDE0 0x10 <0x0...0x5> <0x0..0xF>
0xABCDE1 0xABCDE1 0xF <0x5...0xA> <0x1..0xF>
0xABCDE2 0xABCDE2 0xE <0xA...0xF> <0x2..0xF>
static enum register_status
ia64_pseudo_register_read (struct gdbarch *gdbarch, readable_regcache *regcache,
static enum register_status
ia64_pseudo_register_read (struct gdbarch *gdbarch, readable_regcache *regcache,
}
prN_val = (pr & (1LL << (regnum - VP0_REGNUM))) != 0;
store_unsigned_integer (buf, register_size (gdbarch, regnum),
}
prN_val = (pr & (1LL << (regnum - VP0_REGNUM))) != 0;
store_unsigned_integer (buf, register_size (gdbarch, regnum),
}
prN_val = extract_unsigned_integer (buf, register_size (gdbarch, regnum),
byte_order);
}
prN_val = extract_unsigned_integer (buf, register_size (gdbarch, regnum),
byte_order);
ia64_convert_register_p (struct gdbarch *gdbarch, int regno, struct type *type)
{
return (regno >= IA64_FR0_REGNUM && regno <= IA64_FR127_REGNUM
ia64_convert_register_p (struct gdbarch *gdbarch, int regno, struct type *type)
{
return (regno >= IA64_FR0_REGNUM && regno <= IA64_FR127_REGNUM
/* Convert to TYPE. */
if (!get_frame_register_bytes (frame, regnum, 0,
/* Convert to TYPE. */
if (!get_frame_register_bytes (frame, regnum, 0,
- register_size (gdbarch, regnum),
- in, optimizedp, unavailablep))
+ gdb::make_array_view (in,
+ register_size (gdbarch,
+ regnum)),
+ optimizedp, unavailablep))
return 0;
target_float_convert (in, ia64_ext_type (gdbarch), out, valtype);
return 0;
target_float_convert (in, ia64_ext_type (gdbarch), out, valtype);
in the function looking for address ranges whose corresponding
line number is less than or equal to the first one that we
found for the function. (It can be less than when the
scheduler puts a body instruction before the first prologue
instruction.) */
for (i = 2 * max_skip_non_prologue_insns;
in the function looking for address ranges whose corresponding
line number is less than or equal to the first one that we
found for the function. (It can be less than when the
scheduler puts a body instruction before the first prologue
instruction.) */
for (i = 2 * max_skip_non_prologue_insns;
struct symtab_and_line sal;
sal = find_pc_line (addr, 0);
struct symtab_and_line sal;
sal = find_pc_line (addr, 0);
- struct frame_info *this_frame,
- struct ia64_frame_cache *cache)
+ struct frame_info *this_frame,
+ struct ia64_frame_cache *cache)
{
/* adds rN = imm14, rM (or mov rN, rM when imm14 is 0) */
int imm = (int) ((((instr & 0x01000000000LL) ? -1 : 0) << 13)
{
/* adds rN = imm14, rM (or mov rN, rM when imm14 is 0) */
int imm = (int) ((((instr & 0x01000000000LL) ? -1 : 0) << 13)
int rM = (int) ((instr & 0x00007f00000LL) >> 20);
int rN = (int) ((instr & 0x00000001fc0LL) >> 6);
int qp = (int) (instr & 0x0000000003fLL);
int rM = (int) ((instr & 0x00007f00000LL) >> 20);
int rN = (int) ((instr & 0x00000001fc0LL) >> 6);
int qp = (int) (instr & 0x0000000003fLL);
{
/* adds rN = imm14, rM (or mov rN, rM when imm14 is 0) */
int imm = (int) ((((instr & 0x01000000000LL) ? -1 : 0) << 13)
{
/* adds rN = imm14, rM (or mov rN, rM when imm14 is 0) */
int imm = (int) ((((instr & 0x01000000000LL) ? -1 : 0) << 13)
int rM = (int) ((instr & 0x00007f00000LL) >> 20);
int rN = (int) ((instr & 0x00000001fc0LL) >> 6);
int qp = (int) (instr & 0x0000000003fLL);
int rM = (int) ((instr & 0x00007f00000LL) >> 20);
int rN = (int) ((instr & 0x00000001fc0LL) >> 6);
int qp = (int) (instr & 0x0000000003fLL);
The address to start spilling at is loaded into r2.
FIXME: Why r2? That's what gcc currently uses; it
could well be different for other compilers. */
/* Hmm... whether or not this will work will depend on
The address to start spilling at is loaded into r2.
FIXME: Why r2? That's what gcc currently uses; it
could well be different for other compilers. */
/* Hmm... whether or not this will work will depend on
this'll be wrong. FIXME */
if (this_frame)
saved_sp = get_frame_register_unsigned (this_frame,
sp_regnum);
spill_addr = saved_sp
this'll be wrong. FIXME */
if (this_frame)
saved_sp = get_frame_register_unsigned (this_frame,
sp_regnum);
spill_addr = saved_sp
- && ( ((instr & 0x1efc0000000LL) == 0x0eec0000000LL)
- || ((instr & 0x1ffc8000000LL) == 0x0cec0000000LL) ))
+ && ( ((instr & 0x1efc0000000LL) == 0x0eec0000000LL)
+ || ((instr & 0x1ffc8000000LL) == 0x0cec0000000LL) ))
- && ( ((instr & 0x1ffc8000000LL) == 0x08cc0000000LL)
- || ((instr & 0x1efc0000000LL) == 0x0acc0000000LL)))
+ && ( ((instr & 0x1ffc8000000LL) == 0x08cc0000000LL)
+ || ((instr & 0x1efc0000000LL) == 0x0acc0000000LL)))
&& (rM == unat_save_reg || rM == pr_save_reg))
{
/* We've found a spill of either the UNAT register or the PR
&& (rM == unat_save_reg || rM == pr_save_reg))
{
/* We've found a spill of either the UNAT register or the PR
- && ( ((instr & 0x1ffc8000000LL) == 0x08ec0000000LL)
- || ((instr & 0x1efc0000000LL) == 0x0aec0000000LL)))
+ && ( ((instr & 0x1ffc8000000LL) == 0x08ec0000000LL)
+ || ((instr & 0x1efc0000000LL) == 0x0aec0000000LL)))
if (qp == 0 && rN == spill_reg && 4 <= rM && rM <= 7)
{
/* We've found a spill of one of the preserved general purpose
if (qp == 0 && rN == spill_reg && 4 <= rM && rM <= 7)
{
/* We've found a spill of one of the preserved general purpose
register if appropriate. */
cache->saved_regs[IA64_GR0_REGNUM + rM] = spill_addr;
if ((instr & 0x1efc0000000LL) == 0x0aec0000000LL)
register if appropriate. */
cache->saved_regs[IA64_GR0_REGNUM + rM] = spill_addr;
if ((instr & 0x1efc0000000LL) == 0x0aec0000000LL)
CORE_ADDR prev_cfm, bsp, prev_bsp;
/* We want to calculate the previous bsp as the end of the previous
CORE_ADDR prev_cfm, bsp, prev_bsp;
/* We want to calculate the previous bsp as the end of the previous
- register stack frame. This corresponds to what the hardware bsp
- register will be if we pop the frame back which is why we might
- have been called. We know the beginning of the current frame is
- cache->bsp - cache->sof. This value in the previous frame points
- to the start of the output registers. We can calculate the end of
- that frame by adding the size of output:
- (sof (size of frame) - sol (size of locals)). */
+ register stack frame. This corresponds to what the hardware bsp
+ register will be if we pop the frame back which is why we might
+ have been called. We know the beginning of the current frame is
+ cache->bsp - cache->sof. This value in the previous frame points
+ to the start of the output registers. We can calculate the end of
+ that frame by adding the size of output:
+ (sof (size of frame) - sol (size of locals)). */
val = ia64_frame_prev_register (this_frame, this_cache, IA64_CFM_REGNUM);
prev_cfm = extract_unsigned_integer (value_contents_all (val),
8, byte_order);
bsp = rse_address_add (cache->bsp, -(cache->sof));
prev_bsp =
val = ia64_frame_prev_register (this_frame, this_cache, IA64_CFM_REGNUM);
prev_cfm = extract_unsigned_integer (value_contents_all (val),
8, byte_order);
bsp = rse_address_add (cache->bsp, -(cache->sof));
prev_bsp =
return frame_unwind_got_register (this_frame, regnum, 0);
}
else if (regnum == IA64_VFP_REGNUM)
{
/* If the function in question uses an automatic register (r32-r127)
return frame_unwind_got_register (this_frame, regnum, 0);
}
else if (regnum == IA64_VFP_REGNUM)
{
/* If the function in question uses an automatic register (r32-r127)
above. If the function lacks one of these frame pointers, we can
still provide a value since we know the size of the frame. */
return frame_unwind_got_constant (this_frame, regnum, cache->base);
above. If the function lacks one of these frame pointers, we can
still provide a value since we know the size of the frame. */
return frame_unwind_got_constant (this_frame, regnum, cache->base);
if (VP16_REGNUM <= regnum && regnum <= VP63_REGNUM)
{
/* Fetch predicate register rename base from current frame
if (VP16_REGNUM <= regnum && regnum <= VP63_REGNUM)
{
/* Fetch predicate register rename base from current frame
regnum = VP16_REGNUM + ((regnum - VP16_REGNUM) + rrb_pr) % 48;
}
prN = extract_bit_field (value_contents_all (pr_val),
regnum = VP16_REGNUM + ((regnum - VP16_REGNUM) + rrb_pr) % 48;
}
prN = extract_bit_field (value_contents_all (pr_val),
- {
- read_memory (addr, buf, register_size (gdbarch, IA64_IP_REGNUM));
- pc = extract_unsigned_integer (buf, 8, byte_order);
- }
+ {
+ read_memory (addr, buf, register_size (gdbarch, IA64_IP_REGNUM));
+ pc = extract_unsigned_integer (buf, 8, byte_order);
+ }
else if (cache->frameless)
{
get_frame_register (this_frame, IA64_BR0_REGNUM, buf);
else if (cache->frameless)
{
get_frame_register (this_frame, IA64_BR0_REGNUM, buf);
else if (regnum == IA64_PSR_REGNUM)
{
/* We don't know how to get the complete previous PSR, but we need it
else if (regnum == IA64_PSR_REGNUM)
{
/* We don't know how to get the complete previous PSR, but we need it
- for the slot information when we unwind the pc (pc is formed of IP
- register plus slot information from PSR). To get the previous
- slot information, we mask it off the return address. */
+ for the slot information when we unwind the pc (pc is formed of IP
+ register plus slot information from PSR). To get the previous
+ slot information, we mask it off the return address. */
return frame_unwind_got_constant (this_frame, regnum, 0);
}
else if ((regnum >= IA64_GR32_REGNUM && regnum <= IA64_GR127_REGNUM)
return frame_unwind_got_constant (this_frame, regnum, 0);
}
else if ((regnum >= IA64_GR32_REGNUM && regnum <= IA64_GR127_REGNUM)
prev_bof = rse_address_add (prev_bsp, -(prev_cfm & 0x7f));
addr = rse_address_add (prev_bof, (regnum - IA64_GR32_REGNUM));
prev_bof = rse_address_add (prev_bsp, -(prev_cfm & 0x7f));
addr = rse_address_add (prev_bof, (regnum - IA64_GR32_REGNUM));
}
/* If we have stored a memory address, access the register. */
addr = cache->saved_regs[regnum];
if (addr != 0)
}
/* If we have stored a memory address, access the register. */
addr = cache->saved_regs[regnum];
if (addr != 0)
ia64_sigtramp_frame_cache (this_frame, this_cache);
(*this_id) = frame_id_build_special (cache->base,
ia64_sigtramp_frame_cache (this_frame, this_cache);
(*this_id) = frame_id_build_special (cache->base,
if (gdbarch_debug >= 1)
fprintf_unfiltered (gdb_stdlog,
"sigtramp frame id: code %s, stack %s, "
if (gdbarch_debug >= 1)
fprintf_unfiltered (gdb_stdlog,
"sigtramp frame id: code %s, stack %s, "
- return target_read_alloc (current_top_target (), TARGET_OBJECT_UNWIND_TABLE,
- NULL);
+ return target_read_alloc (current_inferior ()->top_target (),
+ TARGET_OBJECT_UNWIND_TABLE, NULL);
dip->format = UNW_INFO_FORMAT_REMOTE_TABLE;
dip->u.rti.name_ptr = (unw_word_t) bfd_get_filename (bfd);
dip->u.rti.segbase = segbase;
dip->format = UNW_INFO_FORMAT_REMOTE_TABLE;
dip->u.rti.name_ptr = (unw_word_t) bfd_get_filename (bfd);
dip->u.rti.segbase = segbase;
CORE_ADDR prev_bsp, prev_cfm;
/* We want to calculate the previous bsp as the end of the previous
CORE_ADDR prev_bsp, prev_cfm;
/* We want to calculate the previous bsp as the end of the previous
- register stack frame. This corresponds to what the hardware bsp
- register will be if we pop the frame back which is why we might
- have been called. We know that libunwind will pass us back the
- beginning of the current frame so we should just add sof to it. */
+ register stack frame. This corresponds to what the hardware bsp
+ register will be if we pop the frame back which is why we might
+ have been called. We know that libunwind will pass us back the
+ beginning of the current frame so we should just add sof to it. */
prev_bsp = extract_unsigned_integer (value_contents_all (val),
8, byte_order);
cfm_val = libunwind_frame_prev_register (this_frame, this_cache,
prev_bsp = extract_unsigned_integer (value_contents_all (val),
8, byte_order);
cfm_val = libunwind_frame_prev_register (this_frame, this_cache,
prev_cfm = extract_unsigned_integer (value_contents_all (cfm_val),
8, byte_order);
prev_bsp = rse_address_add (prev_bsp, (prev_cfm & 0x7f));
prev_cfm = extract_unsigned_integer (value_contents_all (cfm_val),
8, byte_order);
prev_bsp = rse_address_add (prev_bsp, (prev_cfm & 0x7f));
{
if (libunwind_is_initialized ()
&& libunwind_frame_sniffer (self, this_frame, this_cache))
{
if (libunwind_is_initialized ()
&& libunwind_frame_sniffer (self, this_frame, this_cache))
/* If the previous frame pc value is 0, then we want to use the SIGCONTEXT
method of getting previous registers. */
prev_ip_val = libunwind_frame_prev_register (this_frame, this_cache,
/* If the previous frame pc value is 0, then we want to use the SIGCONTEXT
method of getting previous registers. */
prev_ip_val = libunwind_frame_prev_register (this_frame, this_cache,
{
if (libunwind_is_initialized ())
{
if (libunwind_sigtramp_frame_sniffer (self, this_frame, this_cache))
{
if (libunwind_is_initialized ())
{
if (libunwind_sigtramp_frame_sniffer (self, this_frame, this_cache))
/* Don't use the struct convention for anything but structure,
union, or array types. */
/* Don't use the struct convention for anything but structure,
union, or array types. */
- if (!(TYPE_CODE (type) == TYPE_CODE_STRUCT
- || TYPE_CODE (type) == TYPE_CODE_UNION
- || TYPE_CODE (type) == TYPE_CODE_ARRAY))
+ if (!(type->code () == TYPE_CODE_STRUCT
+ || type->code () == TYPE_CODE_UNION
+ || type->code () == TYPE_CODE_ARRAY))
else if (!ia64_struct_type_p (type) && TYPE_LENGTH (type) < 8)
{
/* This is an integral value, and its size is less than 8 bytes.
else if (!ia64_struct_type_p (type) && TYPE_LENGTH (type) < 8)
{
/* This is an integral value, and its size is less than 8 bytes.
- These values are LSB-aligned, so extract the relevant bytes,
- and copy them into VALBUF. */
+ These values are LSB-aligned, so extract the relevant bytes,
+ and copy them into VALBUF. */
/* brobecker/2005-12-30: Actually, all integral values are LSB aligned,
so I suppose we should also add handling here for integral values
whose size is greater than 8. But I wasn't able to create such
/* brobecker/2005-12-30: Actually, all integral values are LSB aligned,
so I suppose we should also add handling here for integral values
whose size is greater than 8. But I wasn't able to create such
struct obj_section *pc_section = find_pc_section (pc);
if (pc_section && (pc_section->the_bfd_section->flags & SEC_CODE))
struct obj_section *pc_section = find_pc_section (pc);
if (pc_section && (pc_section->the_bfd_section->flags & SEC_CODE))
- if (!ia64_struct_type_p (type) && len < 8)
- {
- /* Integral types are LSB-aligned, so we have to be careful
- to insert the argument on the correct side of the buffer.
- This is why we use store_unsigned_integer. */
- store_unsigned_integer
- (val_buf, 8, byte_order,
- extract_unsigned_integer (value_contents (arg), len,
+ if (!ia64_struct_type_p (type) && len < 8)
+ {
+ /* Integral types are LSB-aligned, so we have to be careful
+ to insert the argument on the correct side of the buffer.
+ This is why we use store_unsigned_integer. */
+ store_unsigned_integer
+ (val_buf, 8, byte_order,
+ extract_unsigned_integer (value_contents (arg), len,
- }
- else
- {
- /* This is either an 8bit integral type, or an aggregate.
- For 8bit integral type, there is no problem, we just
- copy the value over.
-
- For aggregates, the only potentially tricky portion
- is to write the last one if it is less than 8 bytes.
- In this case, the data is Byte0-aligned. Happy news,
- this means that we don't need to differentiate the
- handling of 8byte blocks and less-than-8bytes blocks. */
- memcpy (val_buf, value_contents (arg) + argoffset,
- (len > 8) ? 8 : len);
- }
+ }
+ else
+ {
+ /* This is either an 8bit integral type, or an aggregate.
+ For 8bit integral type, there is no problem, we just
+ copy the value over.
+
+ For aggregates, the only potentially tricky portion
+ is to write the last one if it is less than 8 bytes.
+ In this case, the data is Byte0-aligned. Happy news,
+ this means that we don't need to differentiate the
+ handling of 8byte blocks and less-than-8bytes blocks. */
+ memcpy (val_buf, value_contents (arg) + argoffset,
+ (len > 8) ? 8 : len);
+ }
set_gdbarch_unwind_pc (gdbarch, ia64_unwind_pc);
#ifdef HAVE_LIBUNWIND_IA64_H
frame_unwind_append_unwinder (gdbarch,
set_gdbarch_unwind_pc (gdbarch, ia64_unwind_pc);
#ifdef HAVE_LIBUNWIND_IA64_H
frame_unwind_append_unwinder (gdbarch,
frame_unwind_append_unwinder (gdbarch, &ia64_libunwind_frame_unwind);
frame_unwind_append_unwinder (gdbarch, &ia64_sigtramp_frame_unwind);
libunwind_frame_set_descr (gdbarch, &ia64_libunwind_descr);
frame_unwind_append_unwinder (gdbarch, &ia64_libunwind_frame_unwind);
frame_unwind_append_unwinder (gdbarch, &ia64_sigtramp_frame_unwind);
libunwind_frame_set_descr (gdbarch, &ia64_libunwind_descr);